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File indexing completed on 2025-05-11 08:23:35 

0001 /**
0002   ******************************************************************************
0003   * @file    stm32h7xx_hal_i2c.h
0004   * @author  MCD Application Team
0005   * @brief   Header file of I2C HAL module.
0006   ******************************************************************************
0007   * @attention
0008   *
0009   * Copyright (c) 2017 STMicroelectronics.
0010   * All rights reserved.
0011   *
0012   * This software is licensed under terms that can be found in the LICENSE file
0013   * in the root directory of this software component.
0014   * If no LICENSE file comes with this software, it is provided AS-IS.
0015   *
0016   ******************************************************************************
0017   */
0018 
0019 /* Define to prevent recursive inclusion -------------------------------------*/
0020 #ifndef STM32H7xx_HAL_I2C_H
0021 #define STM32H7xx_HAL_I2C_H
0022 
0023 #ifdef __cplusplus
0024 extern "C" {
0025 #endif
0026 
0027 /* Includes ------------------------------------------------------------------*/
0028 #include "stm32h7xx_hal_def.h"
0029 
0030 /** @addtogroup STM32H7xx_HAL_Driver
0031   * @{
0032   */
0033 
0034 /** @addtogroup I2C
0035   * @{
0036   */
0037 
0038 /* Exported types ------------------------------------------------------------*/
0039 /** @defgroup I2C_Exported_Types I2C Exported Types
0040   * @ingroup RTEMSBSPsARMSTM32H7
0041   * @{
0042   */
0043 
0044 /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
0045   * @ingroup RTEMSBSPsARMSTM32H7
0046   * @brief  I2C Configuration Structure definition
0047   * @{
0048   */
0049 typedef struct
0050 {
0051   uint32_t Timing;              /*!< Specifies the I2C_TIMINGR_register value.
0052                                      This parameter calculated by referring to I2C initialization section
0053                                      in Reference manual */
0054 
0055   uint32_t OwnAddress1;         /*!< Specifies the first device own address.
0056                                      This parameter can be a 7-bit or 10-bit address. */
0057 
0058   uint32_t AddressingMode;      /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
0059                                      This parameter can be a value of @ref I2C_ADDRESSING_MODE */
0060 
0061   uint32_t DualAddressMode;     /*!< Specifies if dual addressing mode is selected.
0062                                      This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */
0063 
0064   uint32_t OwnAddress2;         /*!< Specifies the second device own address if dual addressing mode is selected
0065                                      This parameter can be a 7-bit address. */
0066 
0067   uint32_t OwnAddress2Masks;    /*!< Specifies the acknowledge mask address second device own address if dual addressing
0068                                      mode is selected.
0069                                      This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */
0070 
0071   uint32_t GeneralCallMode;     /*!< Specifies if general call mode is selected.
0072                                      This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */
0073 
0074   uint32_t NoStretchMode;       /*!< Specifies if nostretch mode is selected.
0075                                      This parameter can be a value of @ref I2C_NOSTRETCH_MODE */
0076 
0077 } I2C_InitTypeDef;
0078 
0079 /**
0080   * @}
0081   */
0082 
0083 /** @defgroup HAL_state_structure_definition HAL state structure definition
0084   * @ingroup RTEMSBSPsARMSTM32H7
0085   * @brief  HAL State structure definition
0086   * @note  HAL I2C State value coding follow below described bitmap :\n
0087   *          b7-b6  Error information\n
0088   *             00 : No Error\n
0089   *             01 : Abort (Abort user request on going)\n
0090   *             10 : Timeout\n
0091   *             11 : Error\n
0092   *          b5     Peripheral initialization status\n
0093   *             0  : Reset (peripheral not initialized)\n
0094   *             1  : Init done (peripheral initialized and ready to use. HAL I2C Init function called)\n
0095   *          b4     (not used)\n
0096   *             x  : Should be set to 0\n
0097   *          b3\n
0098   *             0  : Ready or Busy (No Listen mode ongoing)\n
0099   *             1  : Listen (peripheral in Address Listen Mode)\n
0100   *          b2     Intrinsic process state\n
0101   *             0  : Ready\n
0102   *             1  : Busy (peripheral busy with some configuration or internal operations)\n
0103   *          b1     Rx state\n
0104   *             0  : Ready (no Rx operation ongoing)\n
0105   *             1  : Busy (Rx operation ongoing)\n
0106   *          b0     Tx state\n
0107   *             0  : Ready (no Tx operation ongoing)\n
0108   *             1  : Busy (Tx operation ongoing)
0109   * @{
0110   */
0111 typedef enum
0112 {
0113   HAL_I2C_STATE_RESET             = 0x00U,   /*!< Peripheral is not yet Initialized         */
0114   HAL_I2C_STATE_READY             = 0x20U,   /*!< Peripheral Initialized and ready for use  */
0115   HAL_I2C_STATE_BUSY              = 0x24U,   /*!< An internal process is ongoing            */
0116   HAL_I2C_STATE_BUSY_TX           = 0x21U,   /*!< Data Transmission process is ongoing      */
0117   HAL_I2C_STATE_BUSY_RX           = 0x22U,   /*!< Data Reception process is ongoing         */
0118   HAL_I2C_STATE_LISTEN            = 0x28U,   /*!< Address Listen Mode is ongoing            */
0119   HAL_I2C_STATE_BUSY_TX_LISTEN    = 0x29U,   /*!< Address Listen Mode and Data Transmission
0120                                                  process is ongoing                         */
0121   HAL_I2C_STATE_BUSY_RX_LISTEN    = 0x2AU,   /*!< Address Listen Mode and Data Reception
0122                                                  process is ongoing                         */
0123   HAL_I2C_STATE_ABORT             = 0x60U,   /*!< Abort user request ongoing                */
0124 
0125 } HAL_I2C_StateTypeDef;
0126 
0127 /**
0128   * @}
0129   */
0130 
0131 /** @defgroup HAL_mode_structure_definition HAL mode structure definition
0132   * @ingroup RTEMSBSPsARMSTM32H7
0133   * @brief  HAL Mode structure definition
0134   * @note  HAL I2C Mode value coding follow below described bitmap :\n
0135   *          b7     (not used)\n
0136   *             x  : Should be set to 0\n
0137   *          b6\n
0138   *             0  : None\n
0139   *             1  : Memory (HAL I2C communication is in Memory Mode)\n
0140   *          b5\n
0141   *             0  : None\n
0142   *             1  : Slave (HAL I2C communication is in Slave Mode)\n
0143   *          b4\n
0144   *             0  : None\n
0145   *             1  : Master (HAL I2C communication is in Master Mode)\n
0146   *          b3-b2-b1-b0  (not used)\n
0147   *             xxxx : Should be set to 0000
0148   * @{
0149   */
0150 typedef enum
0151 {
0152   HAL_I2C_MODE_NONE               = 0x00U,   /*!< No I2C communication on going             */
0153   HAL_I2C_MODE_MASTER             = 0x10U,   /*!< I2C communication is in Master Mode       */
0154   HAL_I2C_MODE_SLAVE              = 0x20U,   /*!< I2C communication is in Slave Mode        */
0155   HAL_I2C_MODE_MEM                = 0x40U    /*!< I2C communication is in Memory Mode       */
0156 
0157 } HAL_I2C_ModeTypeDef;
0158 
0159 /**
0160   * @}
0161   */
0162 
0163 /** @defgroup I2C_Error_Code_definition I2C Error Code definition
0164   * @ingroup RTEMSBSPsARMSTM32H7
0165   * @brief  I2C Error Code definition
0166   * @{
0167   */
0168 #define HAL_I2C_ERROR_NONE      (0x00000000U)    /*!< No error              */
0169 #define HAL_I2C_ERROR_BERR      (0x00000001U)    /*!< BERR error            */
0170 #define HAL_I2C_ERROR_ARLO      (0x00000002U)    /*!< ARLO error            */
0171 #define HAL_I2C_ERROR_AF        (0x00000004U)    /*!< ACKF error            */
0172 #define HAL_I2C_ERROR_OVR       (0x00000008U)    /*!< OVR error             */
0173 #define HAL_I2C_ERROR_DMA       (0x00000010U)    /*!< DMA transfer error    */
0174 #define HAL_I2C_ERROR_TIMEOUT   (0x00000020U)    /*!< Timeout error         */
0175 #define HAL_I2C_ERROR_SIZE      (0x00000040U)    /*!< Size Management error */
0176 #define HAL_I2C_ERROR_DMA_PARAM (0x00000080U)    /*!< DMA Parameter Error   */
0177 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
0178 #define HAL_I2C_ERROR_INVALID_CALLBACK  (0x00000100U)    /*!< Invalid Callback error */
0179 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
0180 #define HAL_I2C_ERROR_INVALID_PARAM     (0x00000200U)    /*!< Invalid Parameters error  */
0181 /**
0182   * @}
0183   */
0184 
0185 /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
0186   * @ingroup RTEMSBSPsARMSTM32H7
0187   * @brief  I2C handle Structure definition
0188   * @{
0189   */
0190 typedef struct __I2C_HandleTypeDef
0191 {
0192   I2C_TypeDef                *Instance;      /*!< I2C registers base address                */
0193 
0194   I2C_InitTypeDef            Init;           /*!< I2C communication parameters              */
0195 
0196   uint8_t                    *pBuffPtr;      /*!< Pointer to I2C transfer buffer            */
0197 
0198   uint16_t                   XferSize;       /*!< I2C transfer size                         */
0199 
0200   __IO uint16_t              XferCount;      /*!< I2C transfer counter                      */
0201 
0202   __IO uint32_t              XferOptions;    /*!< I2C sequantial transfer options, this parameter can
0203                                                   be a value of @ref I2C_XFEROPTIONS */
0204 
0205   __IO uint32_t              PreviousState;  /*!< I2C communication Previous state          */
0206 
0207   HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
0208   /*!< I2C transfer IRQ handler function pointer */
0209 
0210   DMA_HandleTypeDef          *hdmatx;        /*!< I2C Tx DMA handle parameters              */
0211 
0212   DMA_HandleTypeDef          *hdmarx;        /*!< I2C Rx DMA handle parameters              */
0213 
0214 
0215   HAL_LockTypeDef            Lock;           /*!< I2C locking object                        */
0216 
0217   __IO HAL_I2C_StateTypeDef  State;          /*!< I2C communication state                   */
0218 
0219   __IO HAL_I2C_ModeTypeDef   Mode;           /*!< I2C communication mode                    */
0220 
0221   __IO uint32_t              ErrorCode;      /*!< I2C Error code                            */
0222 
0223   __IO uint32_t              AddrEventCount; /*!< I2C Address Event counter                 */
0224 
0225   __IO uint32_t              Devaddress;     /*!< I2C Target device address                 */
0226 
0227   __IO uint32_t              Memaddress;     /*!< I2C Target memory address                 */
0228 
0229 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
0230   void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
0231   /*!< I2C Master Tx Transfer completed callback */
0232   void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
0233   /*!< I2C Master Rx Transfer completed callback */
0234   void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
0235   /*!< I2C Slave Tx Transfer completed callback  */
0236   void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
0237   /*!< I2C Slave Rx Transfer completed callback  */
0238   void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
0239   /*!< I2C Listen Complete callback              */
0240   void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
0241   /*!< I2C Memory Tx Transfer completed callback */
0242   void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
0243   /*!< I2C Memory Rx Transfer completed callback */
0244   void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c);
0245   /*!< I2C Error callback                        */
0246   void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
0247   /*!< I2C Abort callback                        */
0248 
0249   void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
0250   /*!< I2C Slave Address Match callback */
0251 
0252   void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c);
0253   /*!< I2C Msp Init callback                     */
0254   void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c);
0255   /*!< I2C Msp DeInit callback                   */
0256 
0257 #endif  /* USE_HAL_I2C_REGISTER_CALLBACKS */
0258 } I2C_HandleTypeDef;
0259 
0260 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
0261 /**
0262   * @brief  HAL I2C Callback ID enumeration definition
0263   */
0264 typedef enum
0265 {
0266   HAL_I2C_MASTER_TX_COMPLETE_CB_ID      = 0x00U,    /*!< I2C Master Tx Transfer completed callback ID  */
0267   HAL_I2C_MASTER_RX_COMPLETE_CB_ID      = 0x01U,    /*!< I2C Master Rx Transfer completed callback ID  */
0268   HAL_I2C_SLAVE_TX_COMPLETE_CB_ID       = 0x02U,    /*!< I2C Slave Tx Transfer completed callback ID   */
0269   HAL_I2C_SLAVE_RX_COMPLETE_CB_ID       = 0x03U,    /*!< I2C Slave Rx Transfer completed callback ID   */
0270   HAL_I2C_LISTEN_COMPLETE_CB_ID         = 0x04U,    /*!< I2C Listen Complete callback ID               */
0271   HAL_I2C_MEM_TX_COMPLETE_CB_ID         = 0x05U,    /*!< I2C Memory Tx Transfer callback ID            */
0272   HAL_I2C_MEM_RX_COMPLETE_CB_ID         = 0x06U,    /*!< I2C Memory Rx Transfer completed callback ID  */
0273   HAL_I2C_ERROR_CB_ID                   = 0x07U,    /*!< I2C Error callback ID                         */
0274   HAL_I2C_ABORT_CB_ID                   = 0x08U,    /*!< I2C Abort callback ID                         */
0275 
0276   HAL_I2C_MSPINIT_CB_ID                 = 0x09U,    /*!< I2C Msp Init callback ID                      */
0277   HAL_I2C_MSPDEINIT_CB_ID               = 0x0AU     /*!< I2C Msp DeInit callback ID                    */
0278 
0279 } HAL_I2C_CallbackIDTypeDef;
0280 
0281 /**
0282   * @brief  HAL I2C Callback pointer definition
0283   */
0284 typedef  void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c);
0285 /*!< pointer to an I2C callback function */
0286 typedef  void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection,
0287                                           uint16_t AddrMatchCode);
0288 /*!< pointer to an I2C Address Match callback function */
0289 
0290 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
0291 /**
0292   * @}
0293   */
0294 
0295 /**
0296   * @}
0297   */
0298 /* Exported constants --------------------------------------------------------*/
0299 
0300 /** @defgroup I2C_Exported_Constants I2C Exported Constants
0301   * @ingroup RTEMSBSPsARMSTM32H7
0302   * @{
0303   */
0304 
0305 /** @defgroup I2C_XFEROPTIONS  I2C Sequential Transfer Options
0306   * @ingroup RTEMSBSPsARMSTM32H7
0307   * @{
0308   */
0309 #define I2C_FIRST_FRAME                 ((uint32_t)I2C_SOFTEND_MODE)
0310 #define I2C_FIRST_AND_NEXT_FRAME        ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
0311 #define I2C_NEXT_FRAME                  ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
0312 #define I2C_FIRST_AND_LAST_FRAME        ((uint32_t)I2C_AUTOEND_MODE)
0313 #define I2C_LAST_FRAME                  ((uint32_t)I2C_AUTOEND_MODE)
0314 #define I2C_LAST_FRAME_NO_STOP          ((uint32_t)I2C_SOFTEND_MODE)
0315 
0316 /* List of XferOptions in usage of :
0317  * 1- Restart condition in all use cases (direction change or not)
0318  */
0319 #define  I2C_OTHER_FRAME                (0x000000AAU)
0320 #define  I2C_OTHER_AND_LAST_FRAME       (0x0000AA00U)
0321 /**
0322   * @}
0323   */
0324 
0325 /** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode
0326   * @ingroup RTEMSBSPsARMSTM32H7
0327   * @{
0328   */
0329 #define I2C_ADDRESSINGMODE_7BIT         (0x00000001U)
0330 #define I2C_ADDRESSINGMODE_10BIT        (0x00000002U)
0331 /**
0332   * @}
0333   */
0334 
0335 /** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode
0336   * @ingroup RTEMSBSPsARMSTM32H7
0337   * @{
0338   */
0339 #define I2C_DUALADDRESS_DISABLE         (0x00000000U)
0340 #define I2C_DUALADDRESS_ENABLE          I2C_OAR2_OA2EN
0341 /**
0342   * @}
0343   */
0344 
0345 /** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks
0346   * @ingroup RTEMSBSPsARMSTM32H7
0347   * @{
0348   */
0349 #define I2C_OA2_NOMASK                  ((uint8_t)0x00U)
0350 #define I2C_OA2_MASK01                  ((uint8_t)0x01U)
0351 #define I2C_OA2_MASK02                  ((uint8_t)0x02U)
0352 #define I2C_OA2_MASK03                  ((uint8_t)0x03U)
0353 #define I2C_OA2_MASK04                  ((uint8_t)0x04U)
0354 #define I2C_OA2_MASK05                  ((uint8_t)0x05U)
0355 #define I2C_OA2_MASK06                  ((uint8_t)0x06U)
0356 #define I2C_OA2_MASK07                  ((uint8_t)0x07U)
0357 /**
0358   * @}
0359   */
0360 
0361 /** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode
0362   * @ingroup RTEMSBSPsARMSTM32H7
0363   * @{
0364   */
0365 #define I2C_GENERALCALL_DISABLE         (0x00000000U)
0366 #define I2C_GENERALCALL_ENABLE          I2C_CR1_GCEN
0367 /**
0368   * @}
0369   */
0370 
0371 /** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode
0372   * @ingroup RTEMSBSPsARMSTM32H7
0373   * @{
0374   */
0375 #define I2C_NOSTRETCH_DISABLE           (0x00000000U)
0376 #define I2C_NOSTRETCH_ENABLE            I2C_CR1_NOSTRETCH
0377 /**
0378   * @}
0379   */
0380 
0381 /** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size
0382   * @ingroup RTEMSBSPsARMSTM32H7
0383   * @{
0384   */
0385 #define I2C_MEMADD_SIZE_8BIT            (0x00000001U)
0386 #define I2C_MEMADD_SIZE_16BIT           (0x00000002U)
0387 /**
0388   * @}
0389   */
0390 
0391 /** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View
0392   * @ingroup RTEMSBSPsARMSTM32H7
0393   * @{
0394   */
0395 #define I2C_DIRECTION_TRANSMIT          (0x00000000U)
0396 #define I2C_DIRECTION_RECEIVE           (0x00000001U)
0397 /**
0398   * @}
0399   */
0400 
0401 /** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode
0402   * @ingroup RTEMSBSPsARMSTM32H7
0403   * @{
0404   */
0405 #define  I2C_RELOAD_MODE                I2C_CR2_RELOAD
0406 #define  I2C_AUTOEND_MODE               I2C_CR2_AUTOEND
0407 #define  I2C_SOFTEND_MODE               (0x00000000U)
0408 /**
0409   * @}
0410   */
0411 
0412 /** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode
0413   * @ingroup RTEMSBSPsARMSTM32H7
0414   * @{
0415   */
0416 #define  I2C_NO_STARTSTOP               (0x00000000U)
0417 #define  I2C_GENERATE_STOP              (uint32_t)(0x80000000U | I2C_CR2_STOP)
0418 #define  I2C_GENERATE_START_READ        (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)
0419 #define  I2C_GENERATE_START_WRITE       (uint32_t)(0x80000000U | I2C_CR2_START)
0420 /**
0421   * @}
0422   */
0423 
0424 /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
0425   * @ingroup RTEMSBSPsARMSTM32H7
0426   * @brief I2C Interrupt definition
0427   *        Elements values convention: 0xXXXXXXXX
0428   *           - XXXXXXXX  : Interrupt control mask
0429   * @{
0430   */
0431 #define I2C_IT_ERRI                     I2C_CR1_ERRIE
0432 #define I2C_IT_TCI                      I2C_CR1_TCIE
0433 #define I2C_IT_STOPI                    I2C_CR1_STOPIE
0434 #define I2C_IT_NACKI                    I2C_CR1_NACKIE
0435 #define I2C_IT_ADDRI                    I2C_CR1_ADDRIE
0436 #define I2C_IT_RXI                      I2C_CR1_RXIE
0437 #define I2C_IT_TXI                      I2C_CR1_TXIE
0438 /**
0439   * @}
0440   */
0441 
0442 /** @defgroup I2C_Flag_definition I2C Flag definition
0443   * @ingroup RTEMSBSPsARMSTM32H7
0444   * @{
0445   */
0446 #define I2C_FLAG_TXE                    I2C_ISR_TXE
0447 #define I2C_FLAG_TXIS                   I2C_ISR_TXIS
0448 #define I2C_FLAG_RXNE                   I2C_ISR_RXNE
0449 #define I2C_FLAG_ADDR                   I2C_ISR_ADDR
0450 #define I2C_FLAG_AF                     I2C_ISR_NACKF
0451 #define I2C_FLAG_STOPF                  I2C_ISR_STOPF
0452 #define I2C_FLAG_TC                     I2C_ISR_TC
0453 #define I2C_FLAG_TCR                    I2C_ISR_TCR
0454 #define I2C_FLAG_BERR                   I2C_ISR_BERR
0455 #define I2C_FLAG_ARLO                   I2C_ISR_ARLO
0456 #define I2C_FLAG_OVR                    I2C_ISR_OVR
0457 #define I2C_FLAG_PECERR                 I2C_ISR_PECERR
0458 #define I2C_FLAG_TIMEOUT                I2C_ISR_TIMEOUT
0459 #define I2C_FLAG_ALERT                  I2C_ISR_ALERT
0460 #define I2C_FLAG_BUSY                   I2C_ISR_BUSY
0461 #define I2C_FLAG_DIR                    I2C_ISR_DIR
0462 /**
0463   * @}
0464   */
0465 
0466 /**
0467   * @}
0468   */
0469 
0470 /* Exported macros -----------------------------------------------------------*/
0471 
0472 /** @defgroup I2C_Exported_Macros I2C Exported Macros
0473   * @ingroup RTEMSBSPsARMSTM32H7
0474   * @{
0475   */
0476 
0477 /** @brief Reset I2C handle state.
0478   * @param  __HANDLE__ specifies the I2C Handle.
0479   * @retval None
0480   */
0481 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
0482 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__)                do{                                             \
0483                                                                     (__HANDLE__)->State = HAL_I2C_STATE_RESET;  \
0484                                                                     (__HANDLE__)->MspInitCallback = NULL;       \
0485                                                                     (__HANDLE__)->MspDeInitCallback = NULL;     \
0486                                                                   } while(0)
0487 #else
0488 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__)                ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
0489 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
0490 
0491 /** @brief  Enable the specified I2C interrupt.
0492   * @param  __HANDLE__ specifies the I2C Handle.
0493   * @param  __INTERRUPT__ specifies the interrupt source to enable.
0494   *        This parameter can be one of the following values:
0495   *            @arg @ref I2C_IT_ERRI  Errors interrupt enable
0496   *            @arg @ref I2C_IT_TCI   Transfer complete interrupt enable
0497   *            @arg @ref I2C_IT_STOPI STOP detection interrupt enable
0498   *            @arg @ref I2C_IT_NACKI NACK received interrupt enable
0499   *            @arg @ref I2C_IT_ADDRI Address match interrupt enable
0500   *            @arg @ref I2C_IT_RXI   RX interrupt enable
0501   *            @arg @ref I2C_IT_TXI   TX interrupt enable
0502   *
0503   * @retval None
0504   */
0505 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__)          ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
0506 
0507 /** @brief  Disable the specified I2C interrupt.
0508   * @param  __HANDLE__ specifies the I2C Handle.
0509   * @param  __INTERRUPT__ specifies the interrupt source to disable.
0510   *        This parameter can be one of the following values:
0511   *            @arg @ref I2C_IT_ERRI  Errors interrupt enable
0512   *            @arg @ref I2C_IT_TCI   Transfer complete interrupt enable
0513   *            @arg @ref I2C_IT_STOPI STOP detection interrupt enable
0514   *            @arg @ref I2C_IT_NACKI NACK received interrupt enable
0515   *            @arg @ref I2C_IT_ADDRI Address match interrupt enable
0516   *            @arg @ref I2C_IT_RXI   RX interrupt enable
0517   *            @arg @ref I2C_IT_TXI   TX interrupt enable
0518   *
0519   * @retval None
0520   */
0521 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__)         ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
0522 
0523 /** @brief  Check whether the specified I2C interrupt source is enabled or not.
0524   * @param  __HANDLE__ specifies the I2C Handle.
0525   * @param  __INTERRUPT__ specifies the I2C interrupt source to check.
0526   *          This parameter can be one of the following values:
0527   *            @arg @ref I2C_IT_ERRI  Errors interrupt enable
0528   *            @arg @ref I2C_IT_TCI   Transfer complete interrupt enable
0529   *            @arg @ref I2C_IT_STOPI STOP detection interrupt enable
0530   *            @arg @ref I2C_IT_NACKI NACK received interrupt enable
0531   *            @arg @ref I2C_IT_ADDRI Address match interrupt enable
0532   *            @arg @ref I2C_IT_RXI   RX interrupt enable
0533   *            @arg @ref I2C_IT_TXI   TX interrupt enable
0534   *
0535   * @retval The new state of __INTERRUPT__ (SET or RESET).
0536   */
0537 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)      ((((__HANDLE__)->Instance->CR1 & \
0538                                                                    (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
0539 
0540 /** @brief  Check whether the specified I2C flag is set or not.
0541   * @param  __HANDLE__ specifies the I2C Handle.
0542   * @param  __FLAG__ specifies the flag to check.
0543   *        This parameter can be one of the following values:
0544   *            @arg @ref I2C_FLAG_TXE     Transmit data register empty
0545   *            @arg @ref I2C_FLAG_TXIS    Transmit interrupt status
0546   *            @arg @ref I2C_FLAG_RXNE    Receive data register not empty
0547   *            @arg @ref I2C_FLAG_ADDR    Address matched (slave mode)
0548   *            @arg @ref I2C_FLAG_AF      Acknowledge failure received flag
0549   *            @arg @ref I2C_FLAG_STOPF   STOP detection flag
0550   *            @arg @ref I2C_FLAG_TC      Transfer complete (master mode)
0551   *            @arg @ref I2C_FLAG_TCR     Transfer complete reload
0552   *            @arg @ref I2C_FLAG_BERR    Bus error
0553   *            @arg @ref I2C_FLAG_ARLO    Arbitration lost
0554   *            @arg @ref I2C_FLAG_OVR     Overrun/Underrun
0555   *            @arg @ref I2C_FLAG_PECERR  PEC error in reception
0556   *            @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
0557   *            @arg @ref I2C_FLAG_ALERT   SMBus alert
0558   *            @arg @ref I2C_FLAG_BUSY    Bus busy
0559   *            @arg @ref I2C_FLAG_DIR     Transfer direction (slave mode)
0560   *
0561   * @retval The new state of __FLAG__ (SET or RESET).
0562   */
0563 #define I2C_FLAG_MASK  (0x0001FFFFU)
0564 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & \
0565                                                     (__FLAG__)) == (__FLAG__)) ? SET : RESET)
0566 
0567 /** @brief  Clear the I2C pending flags which are cleared by writing 1 in a specific bit.
0568   * @param  __HANDLE__ specifies the I2C Handle.
0569   * @param  __FLAG__ specifies the flag to clear.
0570   *          This parameter can be any combination of the following values:
0571   *            @arg @ref I2C_FLAG_TXE     Transmit data register empty
0572   *            @arg @ref I2C_FLAG_ADDR    Address matched (slave mode)
0573   *            @arg @ref I2C_FLAG_AF      Acknowledge failure received flag
0574   *            @arg @ref I2C_FLAG_STOPF   STOP detection flag
0575   *            @arg @ref I2C_FLAG_BERR    Bus error
0576   *            @arg @ref I2C_FLAG_ARLO    Arbitration lost
0577   *            @arg @ref I2C_FLAG_OVR     Overrun/Underrun
0578   *            @arg @ref I2C_FLAG_PECERR  PEC error in reception
0579   *            @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
0580   *            @arg @ref I2C_FLAG_ALERT   SMBus alert
0581   *
0582   * @retval None
0583   */
0584 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? \
0585                                                     ((__HANDLE__)->Instance->ISR |= (__FLAG__)) : \
0586                                                     ((__HANDLE__)->Instance->ICR = (__FLAG__)))
0587 
0588 /** @brief  Enable the specified I2C peripheral.
0589   * @param  __HANDLE__ specifies the I2C Handle.
0590   * @retval None
0591   */
0592 #define __HAL_I2C_ENABLE(__HANDLE__)                         (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
0593 
0594 /** @brief  Disable the specified I2C peripheral.
0595   * @param  __HANDLE__ specifies the I2C Handle.
0596   * @retval None
0597   */
0598 #define __HAL_I2C_DISABLE(__HANDLE__)                        (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
0599 
0600 /** @brief  Generate a Non-Acknowledge I2C peripheral in Slave mode.
0601   * @param  __HANDLE__ specifies the I2C Handle.
0602   * @retval None
0603   */
0604 #define __HAL_I2C_GENERATE_NACK(__HANDLE__)                  (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
0605 /**
0606   * @}
0607   */
0608 
0609 /* Include I2C HAL Extended module */
0610 #include "stm32h7xx_hal_i2c_ex.h"
0611 
0612 /* Exported functions --------------------------------------------------------*/
0613 /** @addtogroup I2C_Exported_Functions
0614   * @{
0615   */
0616 
0617 /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
0618   * @{
0619   */
0620 /* Initialization and de-initialization functions******************************/
0621 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
0622 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);
0623 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
0624 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
0625 
0626 /* Callbacks Register/UnRegister functions  ***********************************/
0627 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
0628 HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID,
0629                                            pI2C_CallbackTypeDef pCallback);
0630 HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID);
0631 
0632 HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback);
0633 HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c);
0634 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
0635 /**
0636   * @}
0637   */
0638 
0639 /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
0640   * @{
0641   */
0642 /* IO operation functions  ****************************************************/
0643 /******* Blocking mode: Polling */
0644 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
0645                                           uint16_t Size, uint32_t Timeout);
0646 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
0647                                          uint16_t Size, uint32_t Timeout);
0648 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
0649                                          uint32_t Timeout);
0650 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
0651                                         uint32_t Timeout);
0652 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
0653                                     uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
0654 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
0655                                    uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
0656 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials,
0657                                         uint32_t Timeout);
0658 
0659 /******* Non-Blocking mode: Interrupt */
0660 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
0661                                              uint16_t Size);
0662 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
0663                                             uint16_t Size);
0664 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
0665 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
0666 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
0667                                        uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
0668 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
0669                                       uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
0670 
0671 HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
0672                                                  uint16_t Size, uint32_t XferOptions);
0673 HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
0674                                                 uint16_t Size, uint32_t XferOptions);
0675 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
0676                                                 uint32_t XferOptions);
0677 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
0678                                                uint32_t XferOptions);
0679 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
0680 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
0681 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
0682 
0683 /******* Non-Blocking mode: DMA */
0684 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
0685                                               uint16_t Size);
0686 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
0687                                              uint16_t Size);
0688 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
0689 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
0690 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
0691                                         uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
0692 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
0693                                        uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
0694 
0695 HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
0696                                                   uint16_t Size, uint32_t XferOptions);
0697 HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
0698                                                  uint16_t Size, uint32_t XferOptions);
0699 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
0700                                                  uint32_t XferOptions);
0701 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
0702                                                 uint32_t XferOptions);
0703 /**
0704   * @}
0705   */
0706 
0707 /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
0708   * @{
0709   */
0710 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
0711 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
0712 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
0713 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
0714 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
0715 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
0716 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
0717 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
0718 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
0719 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
0720 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
0721 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
0722 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
0723 /**
0724   * @}
0725   */
0726 
0727 /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
0728   * @{
0729   */
0730 /* Peripheral State, Mode and Error functions  *********************************/
0731 HAL_I2C_StateTypeDef HAL_I2C_GetState(const I2C_HandleTypeDef *hi2c);
0732 HAL_I2C_ModeTypeDef  HAL_I2C_GetMode(const I2C_HandleTypeDef *hi2c);
0733 uint32_t             HAL_I2C_GetError(const I2C_HandleTypeDef *hi2c);
0734 
0735 /**
0736   * @}
0737   */
0738 
0739 /**
0740   * @}
0741   */
0742 
0743 /* Private constants ---------------------------------------------------------*/
0744 /** @defgroup I2C_Private_Constants I2C Private Constants
0745   * @ingroup RTEMSBSPsARMSTM32H7
0746   * @{
0747   */
0748 
0749 /**
0750   * @}
0751   */
0752 
0753 /* Private macros ------------------------------------------------------------*/
0754 /** @defgroup I2C_Private_Macro I2C Private Macros
0755   * @ingroup RTEMSBSPsARMSTM32H7
0756   * @{
0757   */
0758 
0759 #define IS_I2C_ADDRESSING_MODE(MODE)    (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
0760                                          ((MODE) == I2C_ADDRESSINGMODE_10BIT))
0761 
0762 #define IS_I2C_DUAL_ADDRESS(ADDRESS)    (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
0763                                          ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
0764 
0765 #define IS_I2C_OWN_ADDRESS2_MASK(MASK)  (((MASK) == I2C_OA2_NOMASK)  || \
0766                                          ((MASK) == I2C_OA2_MASK01) || \
0767                                          ((MASK) == I2C_OA2_MASK02) || \
0768                                          ((MASK) == I2C_OA2_MASK03) || \
0769                                          ((MASK) == I2C_OA2_MASK04) || \
0770                                          ((MASK) == I2C_OA2_MASK05) || \
0771                                          ((MASK) == I2C_OA2_MASK06) || \
0772                                          ((MASK) == I2C_OA2_MASK07))
0773 
0774 #define IS_I2C_GENERAL_CALL(CALL)       (((CALL) == I2C_GENERALCALL_DISABLE) || \
0775                                          ((CALL) == I2C_GENERALCALL_ENABLE))
0776 
0777 #define IS_I2C_NO_STRETCH(STRETCH)      (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
0778                                          ((STRETCH) == I2C_NOSTRETCH_ENABLE))
0779 
0780 #define IS_I2C_MEMADD_SIZE(SIZE)        (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
0781                                          ((SIZE) == I2C_MEMADD_SIZE_16BIT))
0782 
0783 #define IS_TRANSFER_MODE(MODE)          (((MODE) == I2C_RELOAD_MODE)   || \
0784                                          ((MODE) == I2C_AUTOEND_MODE) || \
0785                                          ((MODE) == I2C_SOFTEND_MODE))
0786 
0787 #define IS_TRANSFER_REQUEST(REQUEST)    (((REQUEST) == I2C_GENERATE_STOP)        || \
0788                                          ((REQUEST) == I2C_GENERATE_START_READ)  || \
0789                                          ((REQUEST) == I2C_GENERATE_START_WRITE) || \
0790                                          ((REQUEST) == I2C_NO_STARTSTOP))
0791 
0792 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST)  (((REQUEST) == I2C_FIRST_FRAME)          || \
0793                                                    ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
0794                                                    ((REQUEST) == I2C_NEXT_FRAME)           || \
0795                                                    ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
0796                                                    ((REQUEST) == I2C_LAST_FRAME)           || \
0797                                                    ((REQUEST) == I2C_LAST_FRAME_NO_STOP)   || \
0798                                                    IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
0799 
0800 #define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME)     || \
0801                                                         ((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
0802 
0803 #define I2C_RESET_CR2(__HANDLE__)                 ((__HANDLE__)->Instance->CR2 &= \
0804                                                    (uint32_t)~((uint32_t)(I2C_CR2_SADD   | I2C_CR2_HEAD10R | \
0805                                                                           I2C_CR2_NBYTES | I2C_CR2_RELOAD  | \
0806                                                                           I2C_CR2_RD_WRN)))
0807 
0808 #define I2C_GET_ADDR_MATCH(__HANDLE__)            ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) \
0809                                                               >> 16U))
0810 #define I2C_GET_DIR(__HANDLE__)                   ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) \
0811                                                              >> 16U))
0812 #define I2C_GET_STOP_MODE(__HANDLE__)             ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
0813 #define I2C_GET_OWN_ADDRESS1(__HANDLE__)          ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1))
0814 #define I2C_GET_OWN_ADDRESS2(__HANDLE__)          ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2))
0815 
0816 #define IS_I2C_OWN_ADDRESS1(ADDRESS1)             ((ADDRESS1) <= 0x000003FFU)
0817 #define IS_I2C_OWN_ADDRESS2(ADDRESS2)             ((ADDRESS2) <= (uint16_t)0x00FFU)
0818 
0819 #define I2C_MEM_ADD_MSB(__ADDRESS__)              ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & \
0820                                                                          (uint16_t)(0xFF00U))) >> 8U)))
0821 #define I2C_MEM_ADD_LSB(__ADDRESS__)              ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
0822 
0823 #define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? \
0824                                                      (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \
0825                                                                  (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & \
0826                                                                 (~I2C_CR2_RD_WRN)) : \
0827                                                      (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \
0828                                                                  (I2C_CR2_ADD10) | (I2C_CR2_START) | \
0829                                                                  (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)))
0830 
0831 #define I2C_CHECK_FLAG(__ISR__, __FLAG__)         ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == \
0832                                                     ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
0833 #define I2C_CHECK_IT_SOURCE(__CR1__, __IT__)      ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
0834 /**
0835   * @}
0836   */
0837 
0838 /* Private Functions ---------------------------------------------------------*/
0839 /** @defgroup I2C_Private_Functions I2C Private Functions
0840   * @ingroup RTEMSBSPsARMSTM32H7
0841   * @{
0842   */
0843 /* Private functions are defined in stm32h7xx_hal_i2c.c file */
0844 /**
0845   * @}
0846   */
0847 
0848 /**
0849   * @}
0850   */
0851 
0852 /**
0853   * @}
0854   */
0855 
0856 #ifdef __cplusplus
0857 }
0858 #endif
0859 
0860 
0861 #endif /* STM32H7xx_HAL_I2C_H */
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