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File indexing completed on 2025-05-11 08:23:35
0001 /** 0002 ****************************************************************************** 0003 * @file stm32h7xx_hal_dts.h 0004 * @author MCD Application Team 0005 * @brief Header file of DTS HAL module. 0006 ****************************************************************************** 0007 * @attention 0008 * 0009 * Copyright (c) 2017 STMicroelectronics. 0010 * All rights reserved. 0011 * 0012 * This software is licensed under terms that can be found in the LICENSE file 0013 * in the root directory of this software component. 0014 * If no LICENSE file comes with this software, it is provided AS-IS. 0015 * 0016 ****************************************************************************** 0017 */ 0018 0019 /* Define to prevent recursive inclusion -------------------------------------*/ 0020 #ifndef __STM32H7xx_HAL_DTS_H 0021 #define __STM32H7xx_HAL_DTS_H 0022 0023 #ifdef __cplusplus 0024 extern "C" { 0025 #endif 0026 0027 0028 /* Includes ------------------------------------------------------------------*/ 0029 #include "stm32h7xx_hal_def.h" 0030 0031 0032 /** @addtogroup STM32H7xx_HAL_Driver 0033 * @{ 0034 */ 0035 #if defined(DTS) 0036 /** @addtogroup DTS 0037 * @{ 0038 */ 0039 0040 /* Exported types ------------------------------------------------------------*/ 0041 /** @defgroup DTS_Exported_Types DTS Exported Types 0042 * @ingroup RTEMSBSPsARMSTM32H7 0043 * @{ 0044 */ 0045 0046 /** 0047 * @brief DTS Init structure definition 0048 */ 0049 typedef struct 0050 { 0051 uint32_t QuickMeasure; /*!< Specifies the quick measure option selection of the DTS sensor. 0052 This parameter can be a value of @ref DTS_Quick_Measurement */ 0053 0054 uint32_t RefClock; /*!< Specifies the reference clock selection of the DTS sensor. 0055 This parameter can be a value of @ref DTS_Reference_Clock_Selection */ 0056 0057 uint32_t TriggerInput; /*!< Specifies the trigger input of the DTS sensor. 0058 This parameter can be a value of @ref DTS_TriggerConfig */ 0059 0060 uint32_t SamplingTime; /*!< Specifies the sampling time configuration. 0061 This parameter can be a value of @ref DTS_Sampling_Time */ 0062 0063 uint32_t Divider; /*!< Specifies the high speed clock divider ratio. 0064 This parameter can be a value from 0 to 127 */ 0065 0066 uint32_t HighThreshold; /*!< Specifies the high threshold of the DTS sensor */ 0067 0068 uint32_t LowThreshold; /*!< Specifies the low threshold of the DTS sensor */ 0069 0070 } DTS_InitTypeDef; 0071 0072 /** 0073 * @brief HAL State structures definition 0074 */ 0075 typedef enum 0076 { 0077 HAL_DTS_STATE_RESET = 0x00UL, /*!< DTS not yet initialized or disabled */ 0078 HAL_DTS_STATE_READY = 0x01UL, /*!< DTS initialized and ready for use */ 0079 HAL_DTS_STATE_BUSY = 0x02UL, /*!< DTS is running */ 0080 HAL_DTS_STATE_TIMEOUT = 0x03UL, /*!< Timeout state */ 0081 HAL_DTS_STATE_ERROR = 0x04UL /*!< Internal Process error */ 0082 } HAL_DTS_StateTypeDef; 0083 0084 /** 0085 * @brief DTS Handle Structure definition 0086 */ 0087 #if (USE_HAL_DTS_REGISTER_CALLBACKS == 1) 0088 typedef struct __DTS_HandleTypeDef 0089 #else 0090 typedef struct 0091 #endif /* USE_HAL_DTS_REGISTER_CALLBACKS */ 0092 { 0093 DTS_TypeDef *Instance; /*!< Register base address */ 0094 DTS_InitTypeDef Init; /*!< DTS required parameters */ 0095 HAL_LockTypeDef Lock; /*!< DTS Locking object */ 0096 __IO HAL_DTS_StateTypeDef State; /*!< DTS peripheral state */ 0097 #if (USE_HAL_DTS_REGISTER_CALLBACKS == 1) 0098 void (* MspInitCallback)(struct __DTS_HandleTypeDef *hdts); /*!< DTS Base Msp Init Callback */ 0099 void (* MspDeInitCallback)(struct __DTS_HandleTypeDef *hdts); /*!< DTS Base Msp DeInit Callback */ 0100 void (* EndCallback)(struct __DTS_HandleTypeDef *hdts); /*!< End measure Callback */ 0101 void (* LowCallback)(struct __DTS_HandleTypeDef *hdts); /*!< low threshold Callback */ 0102 void (* HighCallback)(struct __DTS_HandleTypeDef *hdts); /*!< high threshold Callback */ 0103 void (* AsyncEndCallback)(struct __DTS_HandleTypeDef *hdts); /*!< Asynchronous end of measure Callback */ 0104 void (* AsyncLowCallback)(struct __DTS_HandleTypeDef *hdts); /*!< Asynchronous low threshold Callback */ 0105 void (* AsyncHighCallback)(struct __DTS_HandleTypeDef *hdts); /*!< Asynchronous high threshold Callback */ 0106 #endif /* USE_HAL_DTS_REGISTER_CALLBACKS */ 0107 } DTS_HandleTypeDef; 0108 0109 #if (USE_HAL_DTS_REGISTER_CALLBACKS == 1) 0110 /** 0111 * @brief DTS callback ID enumeration definition 0112 */ 0113 typedef enum 0114 { 0115 HAL_DTS_MEAS_COMPLETE_CB_ID = 0x00U, /*!< Measure complete callback ID */ 0116 HAL_DTS_ASYNC_MEAS_COMPLETE_CB_ID = 0x01U, /*!< Asynchronous measure complete callback ID */ 0117 HAL_DTS_LOW_THRESHOLD_CB_ID = 0x02U, /*!< Low threshold detection callback ID */ 0118 HAL_DTS_ASYNC_LOW_THRESHOLD_CB_ID = 0x03U, /*!< Asynchronous low threshold detection callback ID */ 0119 HAL_DTS_HIGH_THRESHOLD_CB_ID = 0x04U, /*!< High threshold detection callback ID */ 0120 HAL_DTS_ASYNC_HIGH_THRESHOLD_CB_ID = 0x05U, /*!< Asynchronous high threshold detection callback ID */ 0121 HAL_DTS_MSPINIT_CB_ID = 0x06U, /*!< MSP init callback ID */ 0122 HAL_DTS_MSPDEINIT_CB_ID = 0x07U /*!< MSP de-init callback ID */ 0123 } HAL_DTS_CallbackIDTypeDef; 0124 0125 /** 0126 * @brief DTS callback pointers definition 0127 */ 0128 typedef void (*pDTS_CallbackTypeDef)(DTS_HandleTypeDef *hdts); 0129 #endif /* USE_HAL_DTS_REGISTER_CALLBACKS */ 0130 0131 /** 0132 * @} 0133 */ 0134 0135 /* Exported constants --------------------------------------------------------*/ 0136 /** @defgroup DTS_Exported_Constants DTS Exported Constants 0137 * @ingroup RTEMSBSPsARMSTM32H7 0138 * @{ 0139 */ 0140 0141 /** @defgroup DTS_TriggerConfig DTS Trigger Configuration 0142 * @ingroup RTEMSBSPsARMSTM32H7 0143 * @{ 0144 */ 0145 /* @brief No Hardware trigger detection */ 0146 #define DTS_TRIGGER_HW_NONE (0UL) 0147 0148 /* @brief External Interrupt Mode with LPTIMER1 trigger detection */ 0149 #define DTS_TRIGGER_LPTIMER1 DTS_CFGR1_TS1_INTRIG_SEL_0 0150 0151 /* @brief External Interrupt Mode with LPTIMER2 trigger detection */ 0152 #define DTS_TRIGGER_LPTIMER2 DTS_CFGR1_TS1_INTRIG_SEL_1 0153 0154 /* @brief External Interrupt Mode with LPTIMER3 trigger detection */ 0155 #define DTS_TRIGGER_LPTIMER3 (DTS_CFGR1_TS1_INTRIG_SEL_0 | DTS_CFGR1_TS1_INTRIG_SEL_1) 0156 0157 /* @brief External Interrupt Mode with EXTI13 trigger detection */ 0158 #define DTS_TRIGGER_EXTI13 DTS_CFGR1_TS1_INTRIG_SEL_2 0159 /** 0160 * @} 0161 */ 0162 0163 /** @defgroup DTS_Quick_Measurement DTS Quick Measurement 0164 * @ingroup RTEMSBSPsARMSTM32H7 0165 * @{ 0166 */ 0167 #define DTS_QUICKMEAS_ENABLE DTS_CFGR1_Q_MEAS_OPT /*!< Enable the Quick Measure (Measure without calibration) */ 0168 #define DTS_QUICKMEAS_DISABLE (0x0UL) /*!< Disable the Quick Measure (Measure with calibration) */ 0169 /** 0170 * @} 0171 */ 0172 0173 /** @defgroup DTS_Reference_Clock_Selection DTS Reference Clock Selection 0174 * @ingroup RTEMSBSPsARMSTM32H7 0175 * @{ 0176 */ 0177 #define DTS_REFCLKSEL_LSE DTS_CFGR1_REFCLK_SEL /*!< Low speed REF clock (LSE) */ 0178 #define DTS_REFCLKSEL_PCLK (0UL) /*!< High speed REF clock (PCLK) */ 0179 /** 0180 * @} 0181 */ 0182 0183 /** @defgroup DTS_Sampling_Time DTS Sampling Time 0184 * @ingroup RTEMSBSPsARMSTM32H7 0185 * @{ 0186 */ 0187 #define DTS_SMP_TIME_1_CYCLE DTS_CFGR1_TS1_SMP_TIME_0 /*!< 1 clock cycle for the sampling time */ 0188 #define DTS_SMP_TIME_2_CYCLE DTS_CFGR1_TS1_SMP_TIME_1 /*!< 2 clock cycle for the sampling time */ 0189 #define DTS_SMP_TIME_3_CYCLE (DTS_CFGR1_TS1_SMP_TIME_0 | DTS_CFGR1_TS1_SMP_TIME_1) /*!< 3 clock cycle for the sampling time */ 0190 #define DTS_SMP_TIME_4_CYCLE (DTS_CFGR1_TS1_SMP_TIME_2) /*!< 4 clock cycle for the sampling time */ 0191 #define DTS_SMP_TIME_5_CYCLE (DTS_CFGR1_TS1_SMP_TIME_0 | DTS_CFGR1_TS1_SMP_TIME_2) /*!< 5 clock cycle for the sampling time */ 0192 #define DTS_SMP_TIME_6_CYCLE (DTS_CFGR1_TS1_SMP_TIME_1 | DTS_CFGR1_TS1_SMP_TIME_2) /*!< 6 clock cycle for the sampling time */ 0193 #define DTS_SMP_TIME_7_CYCLE (DTS_CFGR1_TS1_SMP_TIME_0 | DTS_CFGR1_TS1_SMP_TIME_1 | DTS_CFGR1_TS1_SMP_TIME_2) /*!< 7 clock cycle for the sampling time */ 0194 #define DTS_SMP_TIME_8_CYCLE (DTS_CFGR1_TS1_SMP_TIME_3) /*!< 8 clock cycle for the sampling time */ 0195 #define DTS_SMP_TIME_9_CYCLE (DTS_CFGR1_TS1_SMP_TIME_0 | DTS_CFGR1_TS1_SMP_TIME_3) /*!< 9 clock cycle for the sampling time */ 0196 #define DTS_SMP_TIME_10_CYCLE (DTS_CFGR1_TS1_SMP_TIME_1 | DTS_CFGR1_TS1_SMP_TIME_3) /*!< 10 clock cycle for the sampling time */ 0197 #define DTS_SMP_TIME_11_CYCLE (DTS_CFGR1_TS1_SMP_TIME_0 | DTS_CFGR1_TS1_SMP_TIME_1 | DTS_CFGR1_TS1_SMP_TIME_3) /*!< 11 clock cycle for the sampling time */ 0198 #define DTS_SMP_TIME_12_CYCLE (DTS_CFGR1_TS1_SMP_TIME_2 | DTS_CFGR1_TS1_SMP_TIME_3) /*!< 12 clock cycle for the sampling time */ 0199 #define DTS_SMP_TIME_13_CYCLE (DTS_CFGR1_TS1_SMP_TIME_0 | DTS_CFGR1_TS1_SMP_TIME_2 | DTS_CFGR1_TS1_SMP_TIME_3) /*!< 13 clock cycle for the sampling time */ 0200 #define DTS_SMP_TIME_14_CYCLE (DTS_CFGR1_TS1_SMP_TIME_1 | DTS_CFGR1_TS1_SMP_TIME_2 | DTS_CFGR1_TS1_SMP_TIME_3) /*!< 14 clock cycle for the sampling time */ 0201 #define DTS_SMP_TIME_15_CYCLE (DTS_CFGR1_TS1_SMP_TIME_0 | DTS_CFGR1_TS1_SMP_TIME_1 | DTS_CFGR1_TS1_SMP_TIME_2 | DTS_CFGR1_TS1_SMP_TIME_3) /*!< 15 clock cycle for the sampling time */ 0202 /** 0203 * @} 0204 */ 0205 /** @defgroup DTS_Flag_Definitions DTS Flag Definitions 0206 * @ingroup RTEMSBSPsARMSTM32H7 0207 * @{ 0208 */ 0209 #define DTS_FLAG_TS1_ITE DTS_SR_TS1_ITEF /*!< Interrupt flag for end of measure for DTS1 */ 0210 #define DTS_FLAG_TS1_ITL DTS_SR_TS1_ITLF /*!< Interrupt flag for low threshold for DTS1 */ 0211 #define DTS_FLAG_TS1_ITH DTS_SR_TS1_ITHF /*!< Interrupt flag for high threshold for DTS1 */ 0212 #define DTS_FLAG_TS1_AITE DTS_SR_TS1_AITEF /*!< Asynchronous Interrupt flag for end of measure for DTS1 */ 0213 #define DTS_FLAG_TS1_AITL DTS_SR_TS1_AITLF /*!< Asynchronous Interrupt flag for low threshold for DTS1 */ 0214 #define DTS_FLAG_TS1_AITH DTS_SR_TS1_AITHF /*!< Asynchronous Interrupt flag for high threshold for DTS1 */ 0215 #define DTS_FLAG_TS1_RDY DTS_SR_TS1_RDY /*!< Ready flag for DTS1 */ 0216 /** 0217 * @} 0218 */ 0219 0220 /** @defgroup DTS_Interrupts_Definitions DTS Interrupts Definitions 0221 * @ingroup RTEMSBSPsARMSTM32H7 0222 * @{ 0223 */ 0224 #define DTS_IT_TS1_ITE DTS_ITENR_TS1_ITEEN /*!< Enable interrupt flag for end of measure for DTS1 */ 0225 #define DTS_IT_TS1_ITL DTS_ITENR_TS1_ITLEN /*!< Enable interrupt flag for low threshold for DTS1 */ 0226 #define DTS_IT_TS1_ITH DTS_ITENR_TS1_ITHEN /*!< Enable interrupt flag for high threshold for DTS1 */ 0227 #define DTS_IT_TS1_AITE DTS_ITENR_TS1_AITEEN /*!< Enable asynchronous interrupt flag for end of measure for DTS1 */ 0228 #define DTS_IT_TS1_AITL DTS_ITENR_TS1_AITLEN /*!< Enable asynchronous interrupt flag for low threshold for DTS1 */ 0229 #define DTS_IT_TS1_AITH DTS_ITENR_TS1_AITHEN /*!< Enable asynchronous interrupt flag for high threshold for DTS1 */ 0230 /** 0231 * @} 0232 */ 0233 0234 /** 0235 * @} 0236 */ 0237 /* Exported macros -----------------------------------------------------------*/ 0238 /** @defgroup DTS_Exported_Macros DTS Exported Macros 0239 * @ingroup RTEMSBSPsARMSTM32H7 0240 * @{ 0241 */ 0242 0243 /** @brief Reset DTS handle state 0244 * @param __HANDLE__ DTS handle. 0245 * @retval None 0246 */ 0247 #if (USE_HAL_DTS_REGISTER_CALLBACKS == 1) 0248 #define __HAL_DTS_RESET_HANDLE_STATE(__HANDLE__) do{ \ 0249 (__HANDLE__)->State = HAL_DTS_STATE_RESET; \ 0250 (__HANDLE__)->MspInitCallback = NULL; \ 0251 (__HANDLE__)->MspDeInitCallback = NULL; \ 0252 } while(0) 0253 #else /* USE_HAL_DTS_REGISTER_CALLBACKS */ 0254 #define __HAL_DTS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DTS_STATE_RESET) 0255 #endif /* USE_HAL_DTS_REGISTER_CALLBACKS */ 0256 0257 /** 0258 * @brief Enable the specified DTS sensor 0259 * @param __HANDLE__ DTS handle. 0260 * @retval None 0261 */ 0262 #define __HAL_DTS_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CFGR1, DTS_CFGR1_TS1_EN) 0263 0264 /** 0265 * @brief Disable the specified DTS sensor 0266 * @param __HANDLE__ DTS handle. 0267 * @retval None 0268 */ 0269 #define __HAL_DTS_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CFGR1, DTS_CFGR1_TS1_EN) 0270 0271 /** 0272 * @brief Enable the DTS EXTI line in interrupt mode 0273 * @retval None 0274 */ 0275 #define __HAL_DTS_EXTI_WAKEUP_ENABLE_IT() SET_BIT(EXTI->IMR3, DTS_EXTI_LINE_DTS1) 0276 0277 /** 0278 * @brief Disable the DTS EXTI line in interrupt mode 0279 * @retval None 0280 */ 0281 #define __HAL_DTS_EXTI_WAKEUP_DISABLE_IT() CLEAR_BIT(EXTI->IMR3, DTS_EXTI_LINE_DTS1) 0282 0283 /** 0284 * @brief Enable the DTS EXTI Line in event mode 0285 * @retval None 0286 */ 0287 #define __HAL_DTS_EXTI_WAKEUP_ENABLE_EVENT() SET_BIT(EXTI->EMR3, DTS_EXTI_LINE_DTS1) 0288 0289 /** 0290 * @brief Disable the DTS EXTI Line in event mode 0291 * @retval None 0292 */ 0293 #define __HAL_DTS_EXTI_WAKEUP_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR3, DTS_EXTI_LINE_DTS1) 0294 0295 /** @brief Checks whether the specified DTS flag is set or not. 0296 * @param __HANDLE__ specifies the DTS Handle. 0297 * @param __FLAG__ specifies the flag to check. 0298 * This parameter can be one of the following values: 0299 * @arg DTS_FLAG_TS1_ITE : interrupt flag for end of measure for DTS1 0300 * @arg DTS_FLAG_TS1_ITL : interrupt flag for low threshold for DTS1 0301 * @arg DTS_FLAG_TS1_ITH : interrupt flag for high threshold for DTS1 0302 * @arg DTS_FLAG_TS1_AITE: asynchronous interrupt flag for end of measure for DTS1 0303 * @arg DTS_FLAG_TS1_AITL: asynchronous interrupt flag for low threshold for DTS1 0304 * @arg DTS_FLAG_TS1_AITH: asynchronous interrupt flag for high threshold for DTS1 0305 * @arg DTS_FLAG_TS1_RDY : Ready flag for DTS1 0306 * @retval The new state of __FLAG__ (SET or RESET). 0307 */ 0308 #define __HAL_DTS_GET_FLAG(__HANDLE__, __FLAG__) \ 0309 (((((__HANDLE__)->Instance->SR &(__FLAG__)) == (__FLAG__)))? SET : RESET) 0310 0311 0312 /** @brief Clears the specified DTS pending flag. 0313 * @param __HANDLE__ specifies the DTS Handle. 0314 * @param __FLAG__ specifies the flag to check. 0315 * This parameter can be any combination of the following values: 0316 * @arg DTS_FLAG_TS1_ITE : interrupt flag for end of measure for DTS1 0317 * @arg DTS_FLAG_TS1_ITL : interrupt flag for low threshold for DTS1 0318 * @arg DTS_FLAG_TS1_ITH : interrupt flag for high threshold for DTS1 0319 * @arg DTS_FLAG_TS1_AITE: asynchronous interrupt flag for end of measure for DTS1 0320 * @arg DTS_FLAG_TS1_AITL: asynchronous interrupt flag for low threshold for DTS1 0321 * @arg DTS_FLAG_TS1_AITH: asynchronous interrupt flag for high threshold for DTS1 0322 * @retval None 0323 */ 0324 #define __HAL_DTS_CLEAR_FLAG(__HANDLE__, __FLAG__) \ 0325 ((__HANDLE__)->Instance->ICIFR = (__FLAG__)) 0326 0327 0328 /** @brief Enable the specified DTS interrupt. 0329 * @param __HANDLE__ specifies the DTS Handle. 0330 * @param __INTERRUPT__ specifies the DTS interrupt source to enable. 0331 * This parameter can be one of the following values: 0332 * @arg DTS_IT_TS1_ITE : interrupt flag for end of measure for DTS1 0333 * @arg DTS_IT_TS1_ITL : interrupt flag for low of measure for DTS1 0334 * @arg DTS_IT_TS1_ITH : interrupt flag for high of measure for DTS1 0335 * @arg DTS_IT_TS1_AITE : asynchronous interrupt flag for end of measure for DTS1 0336 * @arg DTS_IT_TS1_AITL : asynchronous interrupt flag for low of measure for DTS1 0337 * @arg DTS_IT_TS1_AITH : asynchronous interrupt flag for high of measure for DTS1 0338 * @retval None 0339 */ 0340 #define __HAL_DTS_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ 0341 SET_BIT((__HANDLE__)->Instance->ITENR, __INTERRUPT__) 0342 0343 0344 /** @brief Disable the specified DTS interrupt. 0345 * @param __HANDLE__ specifies the DTS Handle. 0346 * @param __INTERRUPT__ specifies the DTS interrupt source to enable. 0347 * This parameter can be one of the following values: 0348 * @arg DTS_IT_TS1_ITE : interrupt flag for end of measure for DTS1 0349 * @arg DTS_IT_TS1_ITL : interrupt flag for low of measure for DTS1 0350 * @arg DTS_IT_TS1_ITH : interrupt flag for high of measure for DTS1 0351 * @arg DTS_IT_TS1_AITE : asynchronous interrupt flag for end of measure for DTS1 0352 * @arg DTS_IT_TS1_AITL : asynchronous interrupt flag for low of measure for DTS1 0353 * @arg DTS_IT_TS1_AITH : asynchronous interrupt flag for high of measure for DTS1 0354 * @retval None 0355 */ 0356 #define __HAL_DTS_DISABLE_IT(__HANDLE__,__INTERRUPT__) \ 0357 CLEAR_BIT((__HANDLE__)->Instance->ITENR, __INTERRUPT__) 0358 0359 0360 /** @brief Check whether the specified DTS interrupt source is enabled or not. 0361 * @param __HANDLE__ DTS handle. 0362 * @param __INTERRUPT__ DTS interrupt source to check 0363 * This parameter can be one of the following values: 0364 * @arg DTS_IT_TS1_ITE : interrupt flag for end of measure for DTS1 0365 * @arg DTS_IT_TS1_ITL : interrupt flag for low of measure for DTS1 0366 * @arg DTS_IT_TS1_ITH : interrupt flag for high of measure for DTS1 0367 * @arg DTS_IT_TS1_AITE : asynchronous interrupt flag for end of measure for DTS1 0368 * @arg DTS_IT_TS1_AITL : asynchronous interrupt flag for low of measure for DTS1 0369 * @arg DTS_IT_TS1_AITH : asynchronous interrupt flag for high of measure for DTS1 0370 * @retval State of interruption (SET or RESET) 0371 */ 0372 #define __HAL_DTS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \ 0373 (( ((__HANDLE__)->Instance->ITENR & (__INTERRUPT__)) == (__INTERRUPT__) \ 0374 )? SET : RESET) 0375 0376 0377 /** @brief Check whether the specified DTS REFCLK is selected 0378 * @param __HANDLE__ DTS handle. 0379 * @param __REFCLK__ DTS reference clock to check 0380 * This parameter can be one of the following values: 0381 * @arg DTS_REFCLKSEL_LSE: Low speed REF clock 0382 * @arg DTS_REFCLKSEL_PCLK: High speed REF clock 0383 * @retval State of the REF clock tested (SET or RESET) 0384 */ 0385 #define __HAL_DTS_GET_REFCLK(__HANDLE__, __REFCLK__) ((((__HANDLE__)->Instance->CFGR1 & (__REFCLK__)) == (__REFCLK__))? SET : RESET) 0386 0387 /** @brief Get Trigger 0388 * @param __HANDLE__ DTS handle. 0389 * @retval One of the following trigger 0390 * DTS_TRIGGER_HW_NONE : No HW trigger (SW trigger) 0391 * DTS_TRIGGER_LPTIMER1: LPTIMER1 trigger 0392 * DTS_TRIGGER_LPTIMER2: LPTIMER2 trigger 0393 * DTS_TRIGGER_LPTIMER3: LPTIMER3 trigger 0394 * DTS_TRIGGER_EXTI13 : EXTI13 trigger 0395 */ 0396 #define __HAL_DTS_GET_TRIGGER(__HANDLE__) ((__HANDLE__)->Instance->CFGR1 & (DTS_CFGR1_TS1_INTRIG_SEL)) 0397 /** 0398 * @} 0399 */ 0400 0401 /* Exported functions --------------------------------------------------------*/ 0402 /** @addtogroup DTS_Exported_Functions 0403 * @{ 0404 */ 0405 0406 /** @addtogroup DTS_Exported_Functions_Group1 0407 * @{ 0408 */ 0409 /* Initialization and de-initialization functions **********************************/ 0410 HAL_StatusTypeDef HAL_DTS_Init(DTS_HandleTypeDef *hdts); 0411 HAL_StatusTypeDef HAL_DTS_DeInit(DTS_HandleTypeDef *hdts); 0412 void HAL_DTS_MspInit(DTS_HandleTypeDef *hdts); 0413 void HAL_DTS_MspDeInit(DTS_HandleTypeDef *hdts); 0414 #if (USE_HAL_DTS_REGISTER_CALLBACKS == 1) 0415 HAL_StatusTypeDef HAL_DTS_RegisterCallback(DTS_HandleTypeDef *hdts, 0416 HAL_DTS_CallbackIDTypeDef CallbackID, 0417 pDTS_CallbackTypeDef pCallback); 0418 HAL_StatusTypeDef HAL_DTS_UnRegisterCallback(DTS_HandleTypeDef *hdts, 0419 HAL_DTS_CallbackIDTypeDef CallbackID); 0420 #endif /* USE_HAL_DTS_REGISTER_CALLBACKS */ 0421 /** 0422 * @} 0423 */ 0424 0425 /* IO operation functions *****************************************************/ 0426 /** @addtogroup DTS_Exported_Functions_Group2 0427 * @{ 0428 */ 0429 HAL_StatusTypeDef HAL_DTS_Start(DTS_HandleTypeDef *hdts); 0430 HAL_StatusTypeDef HAL_DTS_Stop(DTS_HandleTypeDef *hdts); 0431 HAL_StatusTypeDef HAL_DTS_GetTemperature(DTS_HandleTypeDef *hdts, int32_t *Temperature); 0432 HAL_StatusTypeDef HAL_DTS_Start_IT(DTS_HandleTypeDef *hdts); 0433 HAL_StatusTypeDef HAL_DTS_Stop_IT(DTS_HandleTypeDef *hdts); 0434 void HAL_DTS_IRQHandler(DTS_HandleTypeDef *hdts); 0435 HAL_DTS_StateTypeDef HAL_DTS_GetState(DTS_HandleTypeDef *hdts); 0436 /* Callback in Interrupt mode */ 0437 void HAL_DTS_EndCallback(DTS_HandleTypeDef *hdts); 0438 void HAL_DTS_LowCallback(DTS_HandleTypeDef *hdts); 0439 void HAL_DTS_HighCallback(DTS_HandleTypeDef *hdts); 0440 void HAL_DTS_AsyncEndCallback(DTS_HandleTypeDef *hdts); 0441 void HAL_DTS_AsyncLowCallback(DTS_HandleTypeDef *hdts); 0442 void HAL_DTS_AsyncHighCallback(DTS_HandleTypeDef *hdts); 0443 /** 0444 * @} 0445 */ 0446 /** 0447 * @} 0448 */ 0449 0450 /* Private types -------------------------------------------------------------*/ 0451 /* Private constants ---------------------------------------------------------*/ 0452 /** @defgroup DTS_Private_Constants DTS Private Constants 0453 * @ingroup RTEMSBSPsARMSTM32H7 0454 * @{ 0455 */ 0456 /** @defgroup DTS_ExtiLine DTS EXTI Lines 0457 * @ingroup RTEMSBSPsARMSTM32H7 0458 * @{ 0459 */ 0460 #define DTS_EXTI_LINE_DTS1 (EXTI_IMR3_IM88) /*!< EXTI line 88 connected to DTS1 output */ 0461 /** 0462 * @} 0463 */ 0464 /** 0465 * @} 0466 */ 0467 0468 /* Private macros ------------------------------------------------------------*/ 0469 /** @defgroup DTS_Private_Macros DTS Private Macros 0470 * @ingroup RTEMSBSPsARMSTM32H7 0471 * @{ 0472 */ 0473 0474 /** @defgroup DTS_IS_DTS_Definitions DTS Private macros to check input parameters 0475 * @ingroup RTEMSBSPsARMSTM32H7 0476 * @{ 0477 */ 0478 #define IS_DTS_QUICKMEAS(__SEL__) (((__SEL__) == DTS_QUICKMEAS_DISABLE) || \ 0479 ((__SEL__) == DTS_QUICKMEAS_ENABLE)) 0480 0481 #define IS_DTS_REFCLK(__SEL__) (((__SEL__) == DTS_REFCLKSEL_LSE) || \ 0482 ((__SEL__) == DTS_REFCLKSEL_PCLK)) 0483 0484 #define IS_DTS_TRIGGERINPUT(__INPUT__) (((__INPUT__) == DTS_TRIGGER_HW_NONE) || \ 0485 ((__INPUT__) == DTS_TRIGGER_LPTIMER1) || \ 0486 ((__INPUT__) == DTS_TRIGGER_LPTIMER2) || \ 0487 ((__INPUT__) == DTS_TRIGGER_LPTIMER3) || \ 0488 ((__INPUT__) == DTS_TRIGGER_EXTI13)) 0489 0490 #define IS_DTS_THRESHOLD(__THRESHOLD__) ((__THRESHOLD__) <= 0xFFFFUL) 0491 0492 #define IS_DTS_DIVIDER_RATIO_NUMBER(__NUMBER__) ((__NUMBER__) <= 127UL) 0493 0494 #define IS_DTS_SAMPLINGTIME(__CYCLE__) (((__CYCLE__) == DTS_SMP_TIME_1_CYCLE) || \ 0495 ((__CYCLE__) == DTS_SMP_TIME_2_CYCLE) || \ 0496 ((__CYCLE__) == DTS_SMP_TIME_3_CYCLE) || \ 0497 ((__CYCLE__) == DTS_SMP_TIME_4_CYCLE) || \ 0498 ((__CYCLE__) == DTS_SMP_TIME_5_CYCLE) || \ 0499 ((__CYCLE__) == DTS_SMP_TIME_6_CYCLE) || \ 0500 ((__CYCLE__) == DTS_SMP_TIME_7_CYCLE) || \ 0501 ((__CYCLE__) == DTS_SMP_TIME_8_CYCLE) || \ 0502 ((__CYCLE__) == DTS_SMP_TIME_9_CYCLE) || \ 0503 ((__CYCLE__) == DTS_SMP_TIME_10_CYCLE) || \ 0504 ((__CYCLE__) == DTS_SMP_TIME_11_CYCLE) || \ 0505 ((__CYCLE__) == DTS_SMP_TIME_12_CYCLE) || \ 0506 ((__CYCLE__) == DTS_SMP_TIME_13_CYCLE) || \ 0507 ((__CYCLE__) == DTS_SMP_TIME_14_CYCLE) || \ 0508 ((__CYCLE__) == DTS_SMP_TIME_15_CYCLE)) 0509 0510 /** 0511 * @} 0512 */ 0513 0514 /** 0515 * @} 0516 */ 0517 0518 /* Private functions ---------------------------------------------------------*/ 0519 0520 /** 0521 * @} 0522 */ 0523 0524 /** 0525 * @} 0526 */ 0527 0528 #endif /* DTS */ 0529 0530 #ifdef __cplusplus 0531 } 0532 #endif 0533 0534 #endif /* __STM32H7xx_HAL_DTS_H */ 0535
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