stm32h7/include/stm32h7xx_hal_dac.h

0001 /**
0002   ******************************************************************************
0003   * @file    stm32h7xx_hal_dac.h
0004   * @author  MCD Application Team
0005   * @brief   Header file of DAC HAL module.
0006   ******************************************************************************
0007   * @attention
0008   *
0009   * Copyright (c) 2017 STMicroelectronics.
0010   * All rights reserved.
0011   *
0012   * This software is licensed under terms that can be found in the LICENSE file
0013   * in the root directory of this software component.
0014   * If no LICENSE file comes with this software, it is provided AS-IS.
0015   *
0016   ******************************************************************************
0017   */
0018
0019 /* Define to prevent recursive inclusion -------------------------------------*/
0020 #ifndef STM32H7xx_HAL_DAC_H
0021 #define STM32H7xx_HAL_DAC_H
0022
0023 #ifdef __cplusplus
0024 extern "C" {
0025 #endif
0026
0027 /** @addtogroup STM32H7xx_HAL_Driver
0028   * @{
0029   */
0030
0031 /* Includes ------------------------------------------------------------------*/
0032 #include "stm32h7xx_hal_def.h"
0033
0034 #if defined(DAC1) || defined(DAC2)
0035
0036 /** @addtogroup DAC
0037   * @{
0038   */
0039
0040 /* Exported types ------------------------------------------------------------*/
0041
0042 /** @defgroup DAC_Exported_Types DAC Exported Types
0043   * @ingroup RTEMSBSPsARMSTM32H7
0044   * @{
0045   */
0046
0047 /**
0048   * @brief  HAL State structures definition
0049   */
0050 typedef enum
0051 {
0052   HAL_DAC_STATE_RESET             = 0x00U,  /*!< DAC not yet initialized or disabled  */
0053   HAL_DAC_STATE_READY             = 0x01U,  /*!< DAC initialized and ready for use    */
0054   HAL_DAC_STATE_BUSY              = 0x02U,  /*!< DAC internal processing is ongoing   */
0055   HAL_DAC_STATE_TIMEOUT           = 0x03U,  /*!< DAC timeout state                    */
0056   HAL_DAC_STATE_ERROR             = 0x04U   /*!< DAC error state                      */
0057
0058 } HAL_DAC_StateTypeDef;
0059
0060 /**
0061   * @brief  DAC handle Structure definition
0062   */
0063 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
0064 typedef struct __DAC_HandleTypeDef
0065 #else
0066 typedef struct
0067 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
0068 {
0069   DAC_TypeDef                 *Instance;     /*!< Register base address             */
0070
0071   __IO HAL_DAC_StateTypeDef   State;         /*!< DAC communication state           */
0072
0073   HAL_LockTypeDef             Lock;          /*!< DAC locking object                */
0074
0075   DMA_HandleTypeDef           *DMA_Handle1;  /*!< Pointer DMA handler for channel 1 */
0076
0077   DMA_HandleTypeDef           *DMA_Handle2;  /*!< Pointer DMA handler for channel 2 */
0078
0079   __IO uint32_t               ErrorCode;     /*!< DAC Error code                    */
0080
0081 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
0082   void (* ConvCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
0083   void (* ConvHalfCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
0084   void (* ErrorCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
0085   void (* DMAUnderrunCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
0086
0087   void (* ConvCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
0088   void (* ConvHalfCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
0089   void (* ErrorCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
0090   void (* DMAUnderrunCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
0091
0092
0093   void (* MspInitCallback)(struct __DAC_HandleTypeDef *hdac);
0094   void (* MspDeInitCallback)(struct __DAC_HandleTypeDef *hdac);
0095 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
0096
0097 } DAC_HandleTypeDef;
0098
0099 /**
0100   * @brief   DAC Configuration sample and hold Channel structure definition
0101   */
0102 typedef struct
0103 {
0104   uint32_t DAC_SampleTime ;          /*!< Specifies the Sample time for the selected channel.
0105                                           This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE.
0106                                           This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */
0107
0108   uint32_t DAC_HoldTime ;            /*!< Specifies the hold time for the selected channel
0109                                           This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE.
0110                                           This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */
0111
0112   uint32_t DAC_RefreshTime ;         /*!< Specifies the refresh time for the selected channel
0113                                           This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE.
0114                                           This parameter must be a number between Min_Data = 0 and Max_Data = 255 */
0115 } DAC_SampleAndHoldConfTypeDef;
0116
0117 /**
0118   * @brief   DAC Configuration regular Channel structure definition
0119   */
0120 typedef struct
0121 {
0122   uint32_t DAC_SampleAndHold;            /*!< Specifies whether the DAC mode.
0123                                               This parameter can be a value of @ref DAC_SampleAndHold */
0124
0125   uint32_t DAC_Trigger;                  /*!< Specifies the external trigger for the selected DAC channel.
0126                                               This parameter can be a value of @ref DAC_trigger_selection */
0127
0128   uint32_t DAC_OutputBuffer;             /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
0129                                                This parameter can be a value of @ref DAC_output_buffer */
0130
0131   uint32_t DAC_ConnectOnChipPeripheral ; /*!< Specifies whether the DAC output is connected or not to on chip peripheral.
0132                                               This parameter can be a value of @ref DAC_ConnectOnChipPeripheral */
0133
0134   uint32_t DAC_UserTrimming;             /*!< Specifies the trimming mode
0135                                               This parameter must be a value of @ref DAC_UserTrimming
0136                                               DAC_UserTrimming is either factory or user trimming */
0137
0138   uint32_t DAC_TrimmingValue;             /*!< Specifies the offset trimming value
0139                                                i.e. when DAC_SampleAndHold is DAC_TRIMMING_USER.
0140                                                This parameter must be a number between Min_Data = 1 and Max_Data = 31 */
0141   DAC_SampleAndHoldConfTypeDef  DAC_SampleAndHoldConfig;  /*!< Sample and Hold settings */
0142 } DAC_ChannelConfTypeDef;
0143
0144 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
0145 /**
0146   * @brief  HAL DAC Callback ID enumeration definition
0147   */
0148 typedef enum
0149 {
0150   HAL_DAC_CH1_COMPLETE_CB_ID                 = 0x00U,  /*!< DAC CH1 Complete Callback ID      */
0151   HAL_DAC_CH1_HALF_COMPLETE_CB_ID            = 0x01U,  /*!< DAC CH1 half Complete Callback ID */
0152   HAL_DAC_CH1_ERROR_ID                       = 0x02U,  /*!< DAC CH1 error Callback ID         */
0153   HAL_DAC_CH1_UNDERRUN_CB_ID                 = 0x03U,  /*!< DAC CH1 underrun Callback ID      */
0154
0155   HAL_DAC_CH2_COMPLETE_CB_ID                 = 0x04U,  /*!< DAC CH2 Complete Callback ID      */
0156   HAL_DAC_CH2_HALF_COMPLETE_CB_ID            = 0x05U,  /*!< DAC CH2 half Complete Callback ID */
0157   HAL_DAC_CH2_ERROR_ID                       = 0x06U,  /*!< DAC CH2 error Callback ID         */
0158   HAL_DAC_CH2_UNDERRUN_CB_ID                 = 0x07U,  /*!< DAC CH2 underrun Callback ID      */
0159
0160   HAL_DAC_MSPINIT_CB_ID                      = 0x08U,  /*!< DAC MspInit Callback ID           */
0161   HAL_DAC_MSPDEINIT_CB_ID                    = 0x09U,  /*!< DAC MspDeInit Callback ID         */
0162   HAL_DAC_ALL_CB_ID                          = 0x0AU   /*!< DAC All ID                        */
0163 } HAL_DAC_CallbackIDTypeDef;
0164
0165 /**
0166   * @brief  HAL DAC Callback pointer definition
0167   */
0168 typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
0169 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
0170
0171 /**
0172   * @}
0173   */
0174
0175 /* Exported constants --------------------------------------------------------*/
0176
0177 /** @defgroup DAC_Exported_Constants DAC Exported Constants
0178   * @ingroup RTEMSBSPsARMSTM32H7
0179   * @{
0180   */
0181
0182 /** @defgroup DAC_Error_Code DAC Error Code
0183   * @ingroup RTEMSBSPsARMSTM32H7
0184   * @{
0185   */
0186 #define  HAL_DAC_ERROR_NONE              0x00U    /*!< No error                          */
0187 #define  HAL_DAC_ERROR_DMAUNDERRUNCH1    0x01U    /*!< DAC channel1 DMA underrun error   */
0188 #define  HAL_DAC_ERROR_DMAUNDERRUNCH2    0x02U    /*!< DAC channel2 DMA underrun error   */
0189 #define  HAL_DAC_ERROR_DMA               0x04U    /*!< DMA error                         */
0190 #define  HAL_DAC_ERROR_TIMEOUT           0x08U    /*!< Timeout error                     */
0191 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
0192 #define HAL_DAC_ERROR_INVALID_CALLBACK   0x10U    /*!< Invalid callback error            */
0193 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
0194
0195 /**
0196   * @}
0197   */
0198
0199 /** @defgroup DAC_trigger_selection DAC trigger selection
0200   * @ingroup RTEMSBSPsARMSTM32H7
0201   * @{
0202   */
0203 #define DAC_TRIGGER_NONE                0x00000000U                                                                       /*!< Conversion is automatic once the DAC_DHRxxxx register has been loaded, and not by external trigger */
0204 #define DAC_TRIGGER_SOFTWARE            (                                                                    DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */
0205 #define DAC_TRIGGER_T1_TRGO             (                                                   DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM1 TRGO selected as external conversion trigger for DAC channel */
0206 #define DAC_TRIGGER_T2_TRGO             (                                  DAC_CR_TSEL1_1                  | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
0207 #define DAC_TRIGGER_T4_TRGO             (                                  DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
0208 #define DAC_TRIGGER_T5_TRGO             (                 DAC_CR_TSEL1_2                                   | DAC_CR_TEN1) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
0209 #define DAC_TRIGGER_T6_TRGO             (                 DAC_CR_TSEL1_2                  | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
0210 #define DAC_TRIGGER_T7_TRGO             (                 DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1                  | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
0211 #define DAC_TRIGGER_T8_TRGO             (                 DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */
0212 #define DAC_TRIGGER_T15_TRGO            (DAC_CR_TSEL1_3                                                    | DAC_CR_TEN1) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel */
0213 #if defined(HRTIM1)
0214 #define DAC_TRIGGER_HR1_TRGO1           (DAC_CR_TSEL1_3                                   | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< HR1 TRGO1 selected as external conversion trigger for DAC channel */
0215 #define DAC_TRIGGER_HR1_TRGO2           (DAC_CR_TSEL1_3                  | DAC_CR_TSEL1_1                  | DAC_CR_TEN1) /*!< HR1 TRGO2 selected as external conversion trigger for DAC channel */
0216 #endif /* HRTIM12 */
0217 #define DAC_TRIGGER_LPTIM1_OUT          (DAC_CR_TSEL1_3                  | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< LPTIM1 OUT TRGO selected as external conversion trigger for DAC channel */
0218 #define DAC_TRIGGER_LPTIM2_OUT          (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2                                   | DAC_CR_TEN1) /*!< LPTIM2 OUT TRGO selected as external conversion trigger for DAC channel */
0219 #define DAC_TRIGGER_EXT_IT9             (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2                  | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
0220 #if defined(TIM23)
0221 #define DAC_TRIGGER_T23_TRGO            (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1                  | DAC_CR_TEN1) /*!< TIM23 TRGO selected as external conversion trigger for DAC channel */
0222 #endif /* TIM23 */
0223 #if defined(TIM24)
0224 #define DAC_TRIGGER_T24_TRGO            (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM24 TRGO selected as external conversion trigger for DAC channel */
0225 #endif /* TIM24 */
0226 #if defined(DAC2)
0227 #define DAC_TRIGGER_LPTIM3_OUT          (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1                  | DAC_CR_TEN1) /*!< LPTIM3 OUT TRGO selected as external conversion trigger for DAC channel */
0228 #endif /* DAC2 */
0229
0230 /**
0231   * @}
0232   */
0233
0234 /** @defgroup DAC_output_buffer DAC output buffer
0235   * @ingroup RTEMSBSPsARMSTM32H7
0236   * @{
0237   */
0238 #define DAC_OUTPUTBUFFER_ENABLE            0x00000000U
0239 #define DAC_OUTPUTBUFFER_DISABLE           (DAC_MCR_MODE1_1)
0240
0241 /**
0242   * @}
0243   */
0244
0245 /** @defgroup DAC_Channel_selection DAC Channel selection
0246   * @ingroup RTEMSBSPsARMSTM32H7
0247   * @{
0248   */
0249 #define DAC_CHANNEL_1                      0x00000000U
0250
0251 #define DAC_CHANNEL_2                      0x00000010U
0252
0253 /**
0254   * @}
0255   */
0256
0257 /** @defgroup DAC_data_alignment DAC data alignment
0258   * @ingroup RTEMSBSPsARMSTM32H7
0259   * @{
0260   */
0261 #define DAC_ALIGN_12B_R                    0x00000000U
0262 #define DAC_ALIGN_12B_L                    0x00000004U
0263 #define DAC_ALIGN_8B_R                     0x00000008U
0264
0265 /**
0266   * @}
0267   */
0268
0269 /** @defgroup DAC_flags_definition DAC flags definition
0270   * @ingroup RTEMSBSPsARMSTM32H7
0271   * @{
0272   */
0273 #define DAC_FLAG_DMAUDR1                   (DAC_SR_DMAUDR1)
0274
0275 #define DAC_FLAG_DMAUDR2                   (DAC_SR_DMAUDR2)
0276
0277
0278 /**
0279   * @}
0280   */
0281
0282 /** @defgroup DAC_IT_definition  DAC IT definition
0283   * @ingroup RTEMSBSPsARMSTM32H7
0284   * @{
0285   */
0286 #define DAC_IT_DMAUDR1                   (DAC_SR_DMAUDR1)
0287
0288 #define DAC_IT_DMAUDR2                   (DAC_SR_DMAUDR2)
0289
0290
0291 /**
0292   * @}
0293   */
0294
0295 /** @defgroup DAC_ConnectOnChipPeripheral DAC ConnectOnChipPeripheral
0296   * @ingroup RTEMSBSPsARMSTM32H7
0297   * @{
0298   */
0299 #define DAC_CHIPCONNECT_EXTERNAL       (1UL << 0)
0300 #define DAC_CHIPCONNECT_INTERNAL       (1UL << 1)
0301 #define DAC_CHIPCONNECT_BOTH           (1UL << 2)
0302
0303 /**
0304   * @}
0305   */
0306
0307 /** @defgroup DAC_UserTrimming DAC User Trimming
0308   * @ingroup RTEMSBSPsARMSTM32H7
0309   * @{
0310   */
0311 #define DAC_TRIMMING_FACTORY        (0x00000000UL)        /*!< Factory trimming */
0312 #define DAC_TRIMMING_USER           (0x00000001UL)        /*!< User trimming */
0313 /**
0314   * @}
0315   */
0316
0317 /** @defgroup DAC_SampleAndHold DAC power mode
0318   * @ingroup RTEMSBSPsARMSTM32H7
0319   * @{
0320   */
0321 #define DAC_SAMPLEANDHOLD_DISABLE     (0x00000000UL)
0322 #define DAC_SAMPLEANDHOLD_ENABLE      (DAC_MCR_MODE1_2)
0323
0324 /**
0325   * @}
0326   */
0327 /**
0328   * @}
0329   */
0330
0331 /* Exported macro ------------------------------------------------------------*/
0332
0333 /** @defgroup DAC_Exported_Macros DAC Exported Macros
0334   * @ingroup RTEMSBSPsARMSTM32H7
0335   * @{
0336   */
0337
0338 /** @brief Reset DAC handle state.
0339   * @param  __HANDLE__ specifies the DAC handle.
0340   * @retval None
0341   */
0342 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
0343 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do {                                                        \
0344                                                       (__HANDLE__)->State             = HAL_DAC_STATE_RESET; \
0345                                                       (__HANDLE__)->MspInitCallback   = NULL;                \
0346                                                       (__HANDLE__)->MspDeInitCallback = NULL;                \
0347                                                      } while(0)
0348 #else
0349 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
0350 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
0351
0352 /** @brief Enable the DAC channel.
0353   * @param  __HANDLE__ specifies the DAC handle.
0354   * @param  __DAC_Channel__ specifies the DAC channel
0355   * @retval None
0356   */
0357 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \
0358   ((__HANDLE__)->Instance->CR |=  (DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL)))
0359
0360 /** @brief Disable the DAC channel.
0361   * @param  __HANDLE__ specifies the DAC handle
0362   * @param  __DAC_Channel__ specifies the DAC channel.
0363   * @retval None
0364   */
0365 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \
0366   ((__HANDLE__)->Instance->CR &=  ~(DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL)))
0367
0368 /** @brief Set DHR12R1 alignment.
0369   * @param  __ALIGNMENT__ specifies the DAC alignment
0370   * @retval None
0371   */
0372 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008UL + (__ALIGNMENT__))
0373
0374
0375 /** @brief  Set DHR12R2 alignment.
0376   * @param  __ALIGNMENT__ specifies the DAC alignment
0377   * @retval None
0378   */
0379 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014UL + (__ALIGNMENT__))
0380
0381
0382 /** @brief  Set DHR12RD alignment.
0383   * @param  __ALIGNMENT__ specifies the DAC alignment
0384   * @retval None
0385   */
0386 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020UL + (__ALIGNMENT__))
0387
0388 /** @brief Enable the DAC interrupt.
0389   * @param  __HANDLE__ specifies the DAC handle
0390   * @param  __INTERRUPT__ specifies the DAC interrupt.
0391   *          This parameter can be any combination of the following values:
0392   *            @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
0393   *            @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
0394   * @retval None
0395   */
0396 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
0397
0398 /** @brief Disable the DAC interrupt.
0399   * @param  __HANDLE__ specifies the DAC handle
0400   * @param  __INTERRUPT__ specifies the DAC interrupt.
0401   *          This parameter can be any combination of the following values:
0402   *            @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
0403   *            @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
0404   * @retval None
0405   */
0406 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
0407
0408 /** @brief  Check whether the specified DAC interrupt source is enabled or not.
0409   * @param __HANDLE__ DAC handle
0410   * @param __INTERRUPT__ DAC interrupt source to check
0411   *          This parameter can be any combination of the following values:
0412   *            @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
0413   *            @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
0414   * @retval State of interruption (SET or RESET)
0415   */
0416 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR\
0417                                                              & (__INTERRUPT__)) == (__INTERRUPT__))
0418
0419 /** @brief  Get the selected DAC's flag status.
0420   * @param  __HANDLE__ specifies the DAC handle.
0421   * @param  __FLAG__ specifies the DAC flag to get.
0422   *          This parameter can be any combination of the following values:
0423   *            @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag
0424   *            @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag
0425   * @retval None
0426   */
0427 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
0428
0429 /** @brief  Clear the DAC's flag.
0430   * @param  __HANDLE__ specifies the DAC handle.
0431   * @param  __FLAG__ specifies the DAC flag to clear.
0432   *          This parameter can be any combination of the following values:
0433   *            @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag
0434   *            @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag
0435   * @retval None
0436   */
0437 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
0438
0439 /**
0440   * @}
0441   */
0442
0443 /* Private macro -------------------------------------------------------------*/
0444
0445 /** @defgroup DAC_Private_Macros DAC Private Macros
0446   * @ingroup RTEMSBSPsARMSTM32H7
0447   * @{
0448   */
0449 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
0450                                            ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
0451
0452 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
0453                                  ((CHANNEL) == DAC_CHANNEL_2))
0454
0455 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
0456                              ((ALIGN) == DAC_ALIGN_12B_L) || \
0457                              ((ALIGN) == DAC_ALIGN_8B_R))
0458
0459 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0UL)
0460
0461 #define IS_DAC_REFRESHTIME(TIME)   ((TIME) <= 0x000000FFUL)
0462
0463 /**
0464   * @}
0465   */
0466
0467 /* Include DAC HAL Extended module */
0468 #include "stm32h7xx_hal_dac_ex.h"
0469
0470 /* Exported functions --------------------------------------------------------*/
0471
0472 /** @addtogroup DAC_Exported_Functions
0473   * @{
0474   */
0475
0476 /** @addtogroup DAC_Exported_Functions_Group1
0477   * @{
0478   */
0479 /* Initialization and de-initialization functions *****************************/
0480 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac);
0481 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac);
0482 void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac);
0483 void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac);
0484
0485 /**
0486   * @}
0487   */
0488
0489 /** @addtogroup DAC_Exported_Functions_Group2
0490   * @{
0491   */
0492 /* IO operation functions *****************************************************/
0493 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel);
0494 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel);
0495 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, const uint32_t *pData, uint32_t Length,
0496                                     uint32_t Alignment);
0497 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel);
0498 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac);
0499 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
0500
0501 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac);
0502 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac);
0503 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
0504 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
0505
0506 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
0507 /* DAC callback registering/unregistering */
0508 HAL_StatusTypeDef     HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID,
0509                                                pDAC_CallbackTypeDef pCallback);
0510 HAL_StatusTypeDef     HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID);
0511 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
0512
0513 /**
0514   * @}
0515   */
0516
0517 /** @addtogroup DAC_Exported_Functions_Group3
0518   * @{
0519   */
0520 /* Peripheral Control functions ***********************************************/
0521 uint32_t HAL_DAC_GetValue(const DAC_HandleTypeDef *hdac, uint32_t Channel);
0522 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac,
0523                                         const DAC_ChannelConfTypeDef *sConfig, uint32_t Channel);
0524 /**
0525   * @}
0526   */
0527
0528 /** @addtogroup DAC_Exported_Functions_Group4
0529   * @{
0530   */
0531 /* Peripheral State and Error functions ***************************************/
0532 HAL_DAC_StateTypeDef HAL_DAC_GetState(const DAC_HandleTypeDef *hdac);
0533 uint32_t HAL_DAC_GetError(const DAC_HandleTypeDef *hdac);
0534
0535 /**
0536   * @}
0537   */
0538
0539 /**
0540   * @}
0541   */
0542
0543 /** @defgroup DAC_Private_Functions DAC Private Functions
0544   * @ingroup RTEMSBSPsARMSTM32H7
0545   * @{
0546   */
0547 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
0548 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
0549 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
0550 /**
0551   * @}
0552   */
0553
0554 /**
0555   * @}
0556   */
0557
0558 #endif /* DAC1 || DAC2 */
0559
0560 /**
0561   * @}
0562   */
0563
0564 #ifdef __cplusplus
0565 }
0566 #endif
0567
0568
0569 #endif /* STM32H7xx_HAL_DAC_H */