File indexing completed on 2025-05-11 08:23:35
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0020 #ifndef STM32H7xx_HAL_COMP_H
0021 #define STM32H7xx_HAL_COMP_H
0022
0023 #ifdef __cplusplus
0024 extern "C" {
0025 #endif
0026
0027
0028 #include "stm32h7xx_hal_def.h"
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0046
0047 typedef struct
0048 {
0049
0050 uint32_t WindowMode;
0051
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0054
0055 uint32_t Mode;
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0058
0059
0060 uint32_t NonInvertingInput;
0061
0062
0063 uint32_t InvertingInput;
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0065
0066 uint32_t Hysteresis;
0067
0068
0069 uint32_t OutputPol;
0070
0071
0072 uint32_t BlankingSrce;
0073
0074
0075 uint32_t TriggerMode;
0076
0077
0078 }COMP_InitTypeDef;
0079
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0081
0082
0083 #define COMP_STATE_BITFIELD_LOCK ((uint32_t)0x10)
0084 typedef enum
0085 {
0086 HAL_COMP_STATE_RESET = 0x00,
0087 HAL_COMP_STATE_RESET_LOCKED = (HAL_COMP_STATE_RESET | COMP_STATE_BITFIELD_LOCK),
0088 HAL_COMP_STATE_READY = 0x01,
0089 HAL_COMP_STATE_READY_LOCKED = (HAL_COMP_STATE_READY | COMP_STATE_BITFIELD_LOCK),
0090 HAL_COMP_STATE_BUSY = 0x02,
0091 HAL_COMP_STATE_BUSY_LOCKED = (HAL_COMP_STATE_BUSY | COMP_STATE_BITFIELD_LOCK)
0092 }HAL_COMP_StateTypeDef;
0093
0094
0095
0096
0097 #if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
0098 typedef struct __COMP_HandleTypeDef
0099 #else
0100 typedef struct
0101 #endif
0102 {
0103 COMP_TypeDef *Instance;
0104 COMP_InitTypeDef Init;
0105 HAL_LockTypeDef Lock;
0106 __IO HAL_COMP_StateTypeDef State;
0107 __IO uint32_t ErrorCode;
0108 #if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
0109 void (* TriggerCallback)(struct __COMP_HandleTypeDef *hcomp);
0110 void (* MspInitCallback)(struct __COMP_HandleTypeDef *hcomp);
0111 void (* MspDeInitCallback)(struct __COMP_HandleTypeDef *hcomp);
0112 #endif
0113
0114 } COMP_HandleTypeDef;
0115
0116 #if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
0117
0118
0119
0120 typedef enum
0121 {
0122 HAL_COMP_TRIGGER_CB_ID = 0x00U,
0123 HAL_COMP_MSPINIT_CB_ID = 0x01U,
0124 HAL_COMP_MSPDEINIT_CB_ID = 0x02U
0125 } HAL_COMP_CallbackIDTypeDef;
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0130 typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp);
0131
0132 #endif
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0146
0147 #define HAL_COMP_ERROR_NONE (0x00U)
0148 #if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
0149 #define HAL_COMP_ERROR_INVALID_CALLBACK (0x01U)
0150 #endif
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0158
0159 #define COMP_WINDOWMODE_DISABLE ((uint32_t)0x00000000)
0160 #define COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON (COMP_CFGRx_WINMODE)
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0172
0173 #define COMP_POWERMODE_HIGHSPEED ((uint32_t)0x00000000)
0174 #define COMP_POWERMODE_MEDIUMSPEED (COMP_CFGRx_PWRMODE_0)
0175 #define COMP_POWERMODE_ULTRALOWPOWER (COMP_CFGRx_PWRMODE)
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0183
0184 #define COMP_INPUT_PLUS_IO1 ((uint32_t)0x00000000)
0185 #define COMP_INPUT_PLUS_IO2 (COMP_CFGRx_INPSEL)
0186 #if defined (COMP_CFGRx_INP2SEL)
0187 #define COMP_INPUT_PLUS_DAC2_CH1 (COMP_CFGRx_INP2SEL)
0188 #endif
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0196
0197 #define COMP_INPUT_MINUS_1_4VREFINT ( COMP_CFGRx_SCALEN | COMP_CFGRx_BRGEN)
0198 #define COMP_INPUT_MINUS_1_2VREFINT ( COMP_CFGRx_INMSEL_0 | COMP_CFGRx_SCALEN | COMP_CFGRx_BRGEN)
0199 #define COMP_INPUT_MINUS_3_4VREFINT ( COMP_CFGRx_INMSEL_1 | COMP_CFGRx_SCALEN | COMP_CFGRx_BRGEN)
0200 #define COMP_INPUT_MINUS_VREFINT ( COMP_CFGRx_INMSEL_1 | COMP_CFGRx_INMSEL_0 | COMP_CFGRx_SCALEN )
0201 #define COMP_INPUT_MINUS_DAC1_CH1 ( COMP_CFGRx_INMSEL_2 )
0202 #define COMP_INPUT_MINUS_DAC1_CH2 ( COMP_CFGRx_INMSEL_2 | COMP_CFGRx_INMSEL_0 )
0203 #define COMP_INPUT_MINUS_IO1 ( COMP_CFGRx_INMSEL_2 | COMP_CFGRx_INMSEL_1 )
0204 #define COMP_INPUT_MINUS_IO2 ( COMP_CFGRx_INMSEL_2 | COMP_CFGRx_INMSEL_1 | COMP_CFGRx_INMSEL_0 )
0205 #if defined (COMP_CFGRx_INMSEL_3)
0206 #define COMP_INPUT_MINUS_TPSENS_DAC2CH1 (COMP_CFGRx_INMSEL_3 )
0207 #define COMP_INPUT_MINUS_VBAT_VDDAP (COMP_CFGRx_INMSEL_3 | COMP_CFGRx_INMSEL_0 )
0208 #endif
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0217 #define COMP_HYSTERESIS_NONE ((uint32_t)0x00000000)
0218 #define COMP_HYSTERESIS_LOW (COMP_CFGRx_HYST_0)
0219 #define COMP_HYSTERESIS_MEDIUM (COMP_CFGRx_HYST_1)
0220 #define COMP_HYSTERESIS_HIGH (COMP_CFGRx_HYST)
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0229 #define COMP_OUTPUTPOL_NONINVERTED ((uint32_t)0x00000000)
0230 #define COMP_OUTPUTPOL_INVERTED (COMP_CFGRx_POLARITY)
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0240
0241 #define COMP_BLANKINGSRC_NONE ((uint32_t)0x00000000)
0242 #define COMP_BLANKINGSRC_TIM1_OC5 (COMP_CFGRx_BLANKING_0)
0243 #define COMP_BLANKINGSRC_TIM2_OC3 (COMP_CFGRx_BLANKING_1)
0244 #define COMP_BLANKINGSRC_TIM3_OC3 (COMP_CFGRx_BLANKING_0 |COMP_CFGRx_BLANKING_1)
0245 #define COMP_BLANKINGSRC_TIM3_OC4 (COMP_CFGRx_BLANKING_2)
0246 #define COMP_BLANKINGSRC_TIM8_OC5 (COMP_CFGRx_BLANKING_2|COMP_CFGRx_BLANKING_0)
0247 #define COMP_BLANKINGSRC_TIM15_OC1 (COMP_CFGRx_BLANKING_2|COMP_CFGRx_BLANKING_1)
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0266 #define COMP_OUTPUT_LEVEL_LOW ((uint32_t)0x00000000)
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0269 #define COMP_OUTPUT_LEVEL_HIGH ((uint32_t)0x00000001)
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0279 #define COMP_TRIGGERMODE_NONE ((uint32_t)0x00000000)
0280 #define COMP_TRIGGERMODE_IT_RISING (COMP_EXTI_IT | COMP_EXTI_RISING)
0281 #define COMP_TRIGGERMODE_IT_FALLING (COMP_EXTI_IT | COMP_EXTI_FALLING)
0282 #define COMP_TRIGGERMODE_IT_RISING_FALLING (COMP_EXTI_IT | COMP_EXTI_RISING | COMP_EXTI_FALLING)
0283 #define COMP_TRIGGERMODE_EVENT_RISING (COMP_EXTI_EVENT | COMP_EXTI_RISING)
0284 #define COMP_TRIGGERMODE_EVENT_FALLING (COMP_EXTI_EVENT | COMP_EXTI_FALLING)
0285 #define COMP_TRIGGERMODE_EVENT_RISING_FALLING (COMP_EXTI_EVENT | COMP_EXTI_RISING | COMP_EXTI_FALLING)
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0295 #define COMP_FLAG_C1I COMP_SR_C1IF
0296 #define COMP_FLAG_C2I COMP_SR_C2IF
0297 #define COMP_FLAG_LOCK COMP_CFGRx_LOCK
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0305 #define COMP_CLEAR_C1IF COMP_ICFR_C1IF
0306 #define COMP_CLEAR_C2IF COMP_ICFR_C2IF
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0314 #define COMP_IT_EN COMP_CFGRx_ITEN
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0339 #if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
0340 #define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) do{ \
0341 (__HANDLE__)->State = HAL_COMP_STATE_RESET; \
0342 (__HANDLE__)->MspInitCallback = NULL; \
0343 (__HANDLE__)->MspDeInitCallback = NULL; \
0344 } while(0)
0345 #else
0346 #define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_COMP_STATE_RESET)
0347 #endif
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0354 #define COMP_CLEAR_ERRORCODE(__HANDLE__) ((__HANDLE__)->ErrorCode = HAL_COMP_ERROR_NONE)
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0361 #define __HAL_COMP_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CFGR, COMP_CFGRx_EN)
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0368 #define __HAL_COMP_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, COMP_CFGRx_EN)
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0379 #define __HAL_COMP_LOCK(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CFGR, COMP_CFGRx_LOCK)
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0386 #define __HAL_COMP_IS_LOCKED(__HANDLE__) (READ_BIT((__HANDLE__)->Instance->CFGR, COMP_CFGRx_LOCK) == COMP_CFGRx_LOCK)
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0401 #define __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, COMP_EXTI_LINE_COMP1)
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0408 #define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, COMP_EXTI_LINE_COMP1)
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0414 #define __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, COMP_EXTI_LINE_COMP1)
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0420 #define __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, COMP_EXTI_LINE_COMP1)
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0427 #define __HAL_COMP_COMP1_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
0428 __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE(); \
0429 __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE(); \
0430 } while(0)
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0437 #define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
0438 __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE(); \
0439 __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE(); \
0440 } while(0)
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0447 #define __HAL_COMP_COMP1_EXTI_ENABLE_IT() SET_BIT(EXTI_D1->IMR1, COMP_EXTI_LINE_COMP1)
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0453 #define __HAL_COMP_COMP1_EXTI_DISABLE_IT() CLEAR_BIT(EXTI_D1->IMR1, COMP_EXTI_LINE_COMP1)
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0459 #define __HAL_COMP_COMP1_EXTI_ENABLE_EVENT() SET_BIT(EXTI_D1->EMR1, COMP_EXTI_LINE_COMP1)
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0465 #define __HAL_COMP_COMP1_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI_D1->EMR1, COMP_EXTI_LINE_COMP1)
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0471 #define __HAL_COMP_COMP1_EXTI_GET_FLAG() READ_BIT(EXTI_D1->PR1, COMP_EXTI_LINE_COMP1)
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0476 #define __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() WRITE_REG(EXTI_D1->PR1, COMP_EXTI_LINE_COMP1)
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0482 #define __HAL_COMP_COMP1_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, COMP_EXTI_LINE_COMP1)
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0488 #define __HAL_COMP_COMP1_EXTID3_ENABLE_EVENT() SET_BIT(EXTI->D3PMR1, COMP_EXTI_LINE_COMP1)
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0494 #define __HAL_COMP_COMP1_EXTID3_DISABLE_EVENT() CLEAR_BIT(EXTI->D3PMR1, COMP_EXTI_LINE_COMP1)
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0496 #if defined(DUAL_CORE)
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0501 #define __HAL_COMP_COMP1_EXTID2_ENABLE_IT() SET_BIT(EXTI_D2->IMR1, COMP_EXTI_LINE_COMP1)
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0507 #define __HAL_COMP_COMP1_EXTID2_DISABLE_IT() CLEAR_BIT(EXTI_D2->IMR1, COMP_EXTI_LINE_COMP1)
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0513 #define __HAL_COMP_COMP1_EXTID2_ENABLE_EVENT() SET_BIT(EXTI_D2->EMR1, COMP_EXTI_LINE_COMP1)
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0519 #define __HAL_COMP_COMP1_EXTID2_DISABLE_EVENT() CLEAR_BIT(EXTI_D2->EMR1, COMP_EXTI_LINE_COMP1)
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0525 #define __HAL_COMP_COMP1_EXTID2_GET_FLAG() READ_BIT(EXTI_D2->PR1, COMP_EXTI_LINE_COMP1)
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0531 #define __HAL_COMP_COMP1_EXTID2_CLEAR_FLAG() WRITE_REG(EXTI_D2->PR1, COMP_EXTI_LINE_COMP1)
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0533 #endif
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0539 #define __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, COMP_EXTI_LINE_COMP2)
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0545 #define __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, COMP_EXTI_LINE_COMP2)
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0551 #define __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, COMP_EXTI_LINE_COMP2)
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0557 #define __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, COMP_EXTI_LINE_COMP2)
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0563 #define __HAL_COMP_COMP2_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
0564 __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE(); \
0565 __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE(); \
0566 } while(0)
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0572 #define __HAL_COMP_COMP2_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
0573 __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE(); \
0574 __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE(); \
0575 } while(0)
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0580 #define __HAL_COMP_COMP2_EXTI_ENABLE_IT() SET_BIT(EXTI_D1->IMR1, COMP_EXTI_LINE_COMP2)
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0586 #define __HAL_COMP_COMP2_EXTI_DISABLE_IT() CLEAR_BIT(EXTI_D1->IMR1, COMP_EXTI_LINE_COMP2)
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0592 #define __HAL_COMP_COMP2_EXTI_ENABLE_EVENT() SET_BIT(EXTI_D1->EMR1, COMP_EXTI_LINE_COMP2)
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0598 #define __HAL_COMP_COMP2_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI_D1->EMR1, COMP_EXTI_LINE_COMP2)
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0604 #define __HAL_COMP_COMP2_EXTI_GET_FLAG() READ_BIT(EXTI_D1->PR1, COMP_EXTI_LINE_COMP2)
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0610 #define __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() WRITE_REG(EXTI_D1->PR1, COMP_EXTI_LINE_COMP2)
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0616 #define __HAL_COMP_COMP2_EXTID3_ENABLE_EVENT() SET_BIT(EXTI->D3PMR1, COMP_EXTI_LINE_COMP2)
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0622 #define __HAL_COMP_COMP2_EXTID3_DISABLE_EVENT() CLEAR_BIT(EXTI->D3PMR1, COMP_EXTI_LINE_COMP2)
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0628 #define __HAL_COMP_COMP2_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, COMP_EXTI_LINE_COMP2)
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0630 #if defined(DUAL_CORE)
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0635 #define __HAL_COMP_COMP2_EXTID2_ENABLE_IT() SET_BIT(EXTI_D2->IMR1, COMP_EXTI_LINE_COMP2)
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0642 #define __HAL_COMP_COMP2_EXTID2_DISABLE_IT() CLEAR_BIT(EXTI_D2->IMR1, COMP_EXTI_LINE_COMP2)
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0650 #define __HAL_COMP_COMP2_EXTID2_ENABLE_EVENT() SET_BIT(EXTI_D2->EMR1, COMP_EXTI_LINE_COMP2)
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0658 #define __HAL_COMP_COMP2_EXTID2_DISABLE_EVENT() CLEAR_BIT(EXTI_D2->EMR1, COMP_EXTI_LINE_COMP2)
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0665 #define __HAL_COMP_COMP2_EXTID2_GET_FLAG() READ_BIT(EXTI_D2->PR1, COMP_EXTI_LINE_COMP2)
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0671 #define __HAL_COMP_COMP2_EXTID2_CLEAR_FLAG() WRITE_REG(EXTI_D2->PR1, COMP_EXTI_LINE_COMP2)
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0673 #endif
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0683 #define __HAL_COMP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CFGR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
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0692 #define __HAL_COMP_GET_FLAG(__FLAG__) ((COMP12->SR & (__FLAG__)) == (__FLAG__))
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0701 #define __HAL_COMP_CLEAR_FLAG(__FLAG__) (COMP12->ICFR = (__FLAG__))
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0706 #define __HAL_COMP_CLEAR_C1IFLAG() __HAL_COMP_CLEAR_FLAG( COMP_CLEAR_C1IF)
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0711 #define __HAL_COMP_CLEAR_C2IFLAG() __HAL_COMP_CLEAR_FLAG( COMP_CLEAR_C2IF)
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0720 #define __HAL_COMP_ENABLE_IT(__HANDLE__, __INTERRUPT__) ( ((__HANDLE__)->Instance->CFGR) |= (__INTERRUPT__) )
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0729 #define __HAL_COMP_DISABLE_IT(__HANDLE__,__INTERRUPT__) (((__HANDLE__)->Instance->CFGR) &= ~(__INTERRUPT__))
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0750 #define __HAL_COMP_ENABLE_OR(__AF__) SET_BIT(COMP12->OR, (__AF__))
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0768 #define __HAL_COMP_DISABLE_OR(__AF__) CLEAR_BIT(COMP12->OR, (__AF__))
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0783 #define COMP_EXTI_LINE_COMP1 (EXTI_IMR1_IM20)
0784 #define COMP_EXTI_LINE_COMP2 (EXTI_IMR1_IM21)
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0792 #define COMP_EXTI_IT ((uint32_t) 0x01)
0793 #define COMP_EXTI_EVENT ((uint32_t) 0x02)
0794 #define COMP_EXTI_RISING ((uint32_t) 0x10)
0795 #define COMP_EXTI_FALLING ((uint32_t) 0x20)
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0817 #define COMP_GET_EXTI_LINE(__INSTANCE__) (((__INSTANCE__) == COMP1) ? COMP_EXTI_LINE_COMP1 : \
0818 COMP_EXTI_LINE_COMP2)
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0826 #define IS_COMP_WINDOWMODE(__WINDOWMODE__) (((__WINDOWMODE__) == COMP_WINDOWMODE_DISABLE) || \
0827 ((__WINDOWMODE__) == COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON) )
0828
0829 #define IS_COMP_POWERMODE(__POWERMODE__) (((__POWERMODE__) == COMP_POWERMODE_HIGHSPEED) || \
0830 ((__POWERMODE__) == COMP_POWERMODE_MEDIUMSPEED) || \
0831 ((__POWERMODE__) == COMP_POWERMODE_ULTRALOWPOWER) )
0832
0833 #if defined (COMP_CFGRx_INP2SEL)
0834 #define IS_COMP_INPUT_PLUS(__COMP_INSTANCE__, __INPUT_PLUS__) (((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO1) || \
0835 ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO2) || \
0836 ((__INPUT_PLUS__) == COMP_INPUT_PLUS_DAC2_CH1))
0837 #else
0838 #define IS_COMP_INPUT_PLUS(__COMP_INSTANCE__, __INPUT_PLUS__) (((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO1) || \
0839 ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO2))
0840 #endif
0841
0842
0843 #if defined (COMP_CFGRx_INMSEL_3)
0844 #define IS_COMP_INPUT_MINUS(__COMP_INSTANCE__, __INPUT_MINUS__) (((__INPUT_MINUS__) == COMP_INPUT_MINUS_1_4VREFINT) || \
0845 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_1_2VREFINT) || \
0846 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_3_4VREFINT) || \
0847 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_VREFINT) || \
0848 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH1) || \
0849 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH2) || \
0850 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_IO1) || \
0851 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_IO2) || \
0852 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_TPSENS_DAC2CH1) || \
0853 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_VBAT_VDDAP))
0854 #else
0855 #define IS_COMP_INPUT_MINUS(__COMP_INSTANCE__, __INPUT_MINUS__) (((__INPUT_MINUS__) == COMP_INPUT_MINUS_1_4VREFINT) || \
0856 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_1_2VREFINT) || \
0857 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_3_4VREFINT) || \
0858 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_VREFINT) || \
0859 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH1) || \
0860 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH2) || \
0861 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_IO1) || \
0862 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_IO2))
0863 #endif
0864
0865 #define IS_COMP_HYSTERESIS(__HYSTERESIS__) (((__HYSTERESIS__) == COMP_HYSTERESIS_NONE) || \
0866 ((__HYSTERESIS__) == COMP_HYSTERESIS_LOW) || \
0867 ((__HYSTERESIS__) == COMP_HYSTERESIS_MEDIUM) || \
0868 ((__HYSTERESIS__) == COMP_HYSTERESIS_HIGH))
0869
0870 #define IS_COMP_OUTPUTPOL(__POL__) (((__POL__) == COMP_OUTPUTPOL_NONINVERTED) || \
0871 ((__POL__) == COMP_OUTPUTPOL_INVERTED))
0872
0873 #define IS_COMP_BLANKINGSRCE(__SOURCE__) (((__SOURCE__) == COMP_BLANKINGSRC_NONE) || \
0874 ((__SOURCE__) == COMP_BLANKINGSRC_TIM1_OC5) || \
0875 ((__SOURCE__) == COMP_BLANKINGSRC_TIM2_OC3) || \
0876 ((__SOURCE__) == COMP_BLANKINGSRC_TIM3_OC3) || \
0877 ((__SOURCE__) == COMP_BLANKINGSRC_TIM3_OC4) || \
0878 ((__SOURCE__) == COMP_BLANKINGSRC_TIM8_OC5) || \
0879 ((__SOURCE__) == COMP_BLANKINGSRC_TIM15_OC1))
0880
0881
0882 #define IS_COMP_TRIGGERMODE(__MODE__) (((__MODE__) == COMP_TRIGGERMODE_NONE) || \
0883 ((__MODE__) == COMP_TRIGGERMODE_IT_RISING) || \
0884 ((__MODE__) == COMP_TRIGGERMODE_IT_FALLING) || \
0885 ((__MODE__) == COMP_TRIGGERMODE_IT_RISING_FALLING) || \
0886 ((__MODE__) == COMP_TRIGGERMODE_EVENT_RISING) || \
0887 ((__MODE__) == COMP_TRIGGERMODE_EVENT_FALLING) || \
0888 ((__MODE__) == COMP_TRIGGERMODE_EVENT_RISING_FALLING))
0889
0890 #define IS_COMP_OUTPUT_LEVEL(__OUTPUT_LEVEL__) (((__OUTPUT_LEVEL__) == COMP_OUTPUT_LEVEL_LOW) || \
0891 ((__OUTPUT_LEVEL__) == COMP_OUTPUT_LEVEL_HIGH))
0892
0893
0894
0895
0896
0897
0898
0899
0900
0901
0902
0903
0904
0905
0906
0907
0908
0909
0910 HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp);
0911 HAL_StatusTypeDef HAL_COMP_DeInit (COMP_HandleTypeDef *hcomp);
0912 void HAL_COMP_MspInit(COMP_HandleTypeDef *hcomp);
0913 void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp);
0914 #if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
0915
0916 HAL_StatusTypeDef HAL_COMP_RegisterCallback(COMP_HandleTypeDef *hcomp, HAL_COMP_CallbackIDTypeDef CallbackID, pCOMP_CallbackTypeDef pCallback);
0917 HAL_StatusTypeDef HAL_COMP_UnRegisterCallback(COMP_HandleTypeDef *hcomp, HAL_COMP_CallbackIDTypeDef CallbackID);
0918 #endif
0919
0920
0921
0922
0923
0924
0925
0926
0927 HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp);
0928 HAL_StatusTypeDef HAL_COMP_Stop(COMP_HandleTypeDef *hcomp);
0929 HAL_StatusTypeDef HAL_COMP_Start_IT(COMP_HandleTypeDef *hcomp);
0930 HAL_StatusTypeDef HAL_COMP_Stop_IT(COMP_HandleTypeDef *hcomp);
0931 void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp);
0932
0933
0934
0935
0936
0937
0938
0939
0940
0941 HAL_StatusTypeDef HAL_COMP_Lock(COMP_HandleTypeDef *hcomp);
0942 uint32_t HAL_COMP_GetOutputLevel(COMP_HandleTypeDef *hcomp);
0943
0944 void HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp);
0945
0946
0947
0948
0949
0950
0951
0952
0953 HAL_COMP_StateTypeDef HAL_COMP_GetState(COMP_HandleTypeDef *hcomp);
0954 uint32_t HAL_COMP_GetError(COMP_HandleTypeDef *hcomp);
0955
0956
0957
0958
0959
0960
0961
0962
0963
0964
0965
0966
0967
0968
0969
0970
0971 #ifdef __cplusplus
0972 }
0973 #endif
0974
0975 #endif
0976
0977