stm32h7/include/stm32h7xx.h

0001 /*
0002  * The file was modified by RTEMS contributors.
0003  */
0004 /**
0005   ******************************************************************************
0006   * @file    stm32h7xx.h
0007   * @author  MCD Application Team
0008   * @brief   CMSIS STM32H7xx Device Peripheral Access Layer Header File.
0009   *
0010   *          The file is the unique include file that the application programmer
0011   *          is using in the C source code, usually in main.c. This file contains:
0012   *           - Configuration section that allows to select:
0013   *              - The STM32H7xx device used in the target application
0014   *              - To use or not the peripheral's drivers in application code(i.e.
0015   *                code will be based on direct access to peripheral's registers
0016   *                rather than drivers API), this option is controlled by
0017   *                "#define USE_HAL_DRIVER"
0018   *
0019   ******************************************************************************
0020   * @attention
0021   *
0022   * Copyright (c) 2017 STMicroelectronics.
0023   * All rights reserved.
0024   *
0025   * This software is licensed under terms that can be found in the LICENSE file
0026   * in the root directory of this software component.
0027   * If no LICENSE file comes with this software, it is provided AS-IS.
0028   *
0029   ******************************************************************************
0030   */
0031
0032 /** @addtogroup CMSIS
0033   * @{
0034   */
0035
0036 /** @addtogroup stm32h7xx
0037   * @{
0038   */
0039
0040 #ifndef STM32H7xx_H
0041 #define STM32H7xx_H
0042
0043 #ifdef __rtems__
0044 #include <bspopts.h>
0045 #endif /* __rtems__ */
0046 #ifdef __cplusplus
0047  extern "C" {
0048 #endif /* __cplusplus */
0049
0050 /** @addtogroup Library_configuration_section
0051   * @{
0052   */
0053
0054 /**
0055   * @brief STM32 Family
0056   */
0057 #if !defined  (STM32H7)
0058 #define STM32H7
0059 #endif /* STM32H7 */
0060
0061
0062 /* Uncomment the line below according to the target STM32H7 device used in your
0063    application
0064   */
0065
0066 #if !defined (STM32H743xx) && !defined (STM32H753xx)  && !defined (STM32H750xx) && !defined (STM32H742xx) && \
0067     !defined (STM32H745xx) && !defined (STM32H745xG)  && !defined (STM32H755xx)  && !defined (STM32H747xx) && !defined (STM32H747xG)&& !defined (STM32H757xx) && \
0068     !defined (STM32H7A3xx) && !defined (STM32H7A3xxQ) && !defined (STM32H7B3xx) && !defined (STM32H7B3xxQ) && !defined (STM32H7B0xx)  && !defined (STM32H7B0xxQ) && \
0069     !defined (STM32H735xx) && !defined (STM32H733xx)  && !defined (STM32H730xx) && !defined (STM32H730xxQ)  && !defined (STM32H725xx) && !defined (STM32H723xx)
0070   /* #define STM32H742xx */   /*!< STM32H742VI, STM32H742ZI, STM32H742AI, STM32H742II, STM32H742BI, STM32H742XI Devices */
0071   /* #define STM32H743xx */   /*!< STM32H743VI, STM32H743ZI, STM32H743AI, STM32H743II, STM32H743BI, STM32H743XI Devices */
0072   /* #define STM32H753xx */   /*!< STM32H753VI, STM32H753ZI, STM32H753AI, STM32H753II, STM32H753BI, STM32H753XI Devices */
0073   /* #define STM32H750xx */   /*!< STM32H750V, STM32H750I, STM32H750X Devices */
0074   /* #define STM32H747xx */   /*!< STM32H747ZI, STM32H747AI, STM32H747II, STM32H747BI, STM32H747XI Devices */
0075   /* #define STM32H747xG */   /*!< STM32H747AG, STM32H747IG, STM32H747BG, STM32H747XG */
0076   /* #define STM32H757xx */   /*!< STM32H757ZI, STM32H757AI, STM32H757II, STM32H757BI, STM32H757XI Devices */
0077   /* #define STM32H745xx */   /*!< STM32H745ZI, STM32H745II, STM32H745BI, STM32H745XI Devices  */
0078   /* #define STM32H745xG */   /*!< STM32H745ZG, STM32H745IG, STM32H745BG, STM32H745XG Devices  */
0079   /* #define STM32H755xx */   /*!< STM32H755ZI, STM32H755II, STM32H755BI, STM32H755XI Devices  */
0080   /* #define STM32H7B0xx */   /*!< STM32H7B0ABIxQ, STM32H7B0IBTx, STM32H7B0RBTx, STM32H7B0VBTx, STM32H7B0ZBTx, STM32H7B0IBKxQ */
0081   /* #define STM32H7A3xx */   /*!< STM32H7A3IIK6, STM32H7A3IIT6, STM32H7A3NIH6, STM32H7A3RIT6, STM32H7A3VIH6, STM32H7A3VIT6, STM32H7A3ZIT6 */
0082   /* #define STM32H7A3xxQ */  /*!< STM32H7A3QIY6Q, STM32H7A3IIK6Q, STM32H7A3IIT6Q, STM32H7A3LIH6Q, STM32H7A3VIH6Q, STM32H7A3VIT6Q, STM32H7A3AII6Q, STM32H7A3ZIT6Q */
0083   /* #define STM32H7B3xx */   /*!< STM32H7B3IIK6, STM32H7B3IIT6, STM32H7B3NIH6, STM32H7B3RIT6, STM32H7B3VIH6, STM32H7B3VIT6, STM32H7B3ZIT6 */
0084   /* #define STM32H7B3xxQ */  /*!< STM32H7B3QIY6Q, STM32H7B3IIK6Q, STM32H7B3IIT6Q, STM32H7B3LIH6Q, STM32H7B3VIH6Q, STM32H7B3VIT6Q, STM32H7B3AII6Q, STM32H7B3ZIT6Q */
0085   /* #define STM32H735xx */   /*!< STM32H735AGI6, STM32H735IGK6, STM32H735RGV6, STM32H735VGT6, STM32H735VGY6, STM32H735ZGT6 Devices */
0086   /* #define STM32H733xx */   /*!< STM32H733VGH6, STM32H733VGT6, STM32H733ZGI6, STM32H733ZGT6, Devices */
0087   /* #define STM32H730xx */   /*!< STM32H730VBH6, STM32H730VBT6, STM32H730ZBT6, STM32H730ZBI6 Devices */
0088   /* #define STM32H730xxQ */  /*!< STM32H730IBT6Q, STM32H730ABI6Q, STM32H730IBK6Q Devices */
0089   /* #define STM32H725xx */   /*!< STM32H725AGI6, STM32H725IGK6, STM32H725IGT6, STM32H725RGV6, STM32H725VGT6, STM32H725VGY6, STM32H725ZGT6, STM32H725REV6, SM32H725VET6, STM32H725ZET6, STM32H725AEI6, STM32H725IET6, STM32H725IEK6  Devices */
0090   /* #define STM32H723xx */   /*!< STM32H723VGH6, STM32H723VGT6, STM32H723ZGI6, STM32H723ZGT6, STM32H723VET6, STM32H723VEH6, STM32H723ZET6, STM32H723ZEI6 Devices */
0091 #endif
0092
0093 /*  Tip: To avoid modifying this file each time you need to switch between these
0094         devices, you can define the device in your toolchain compiler preprocessor.
0095   */
0096
0097 #if defined(DUAL_CORE) && !defined(CORE_CM4) && !defined(CORE_CM7)
0098  #error "Dual core device, please select CORE_CM4 or CORE_CM7"
0099 #endif
0100
0101 #if !defined  (USE_HAL_DRIVER)
0102 /**
0103  * @brief Comment the line below if you will not use the peripherals drivers.
0104    In this case, these drivers will not be included and the application code will
0105    be based on direct access to peripherals registers
0106    */
0107   /*#define USE_HAL_DRIVER */
0108 #endif /* USE_HAL_DRIVER */
0109
0110 /**
0111   * @brief CMSIS Device version number V1.10.4
0112   */
0113 #define __STM32H7xx_CMSIS_DEVICE_VERSION_MAIN   (0x01) /*!< [31:24] main version */
0114 #define __STM32H7xx_CMSIS_DEVICE_VERSION_SUB1   (0x0A) /*!< [23:16] sub1 version */
0115 #define __STM32H7xx_CMSIS_DEVICE_VERSION_SUB2   (0x04) /*!< [15:8]  sub2 version */
0116 #define __STM32H7xx_CMSIS_DEVICE_VERSION_RC     (0x00) /*!< [7:0]  release candidate */
0117 #define __STM32H7xx_CMSIS_DEVICE_VERSION        ((__STM32H7xx_CMSIS_DEVICE_VERSION_MAIN     << 24)\
0118                                       |(__STM32H7xx_CMSIS_DEVICE_VERSION_SUB1 << 16)\
0119                                       |(__STM32H7xx_CMSIS_DEVICE_VERSION_SUB2 << 8 )\
0120                                       |(__STM32H7xx_CMSIS_DEVICE_VERSION_RC))
0121
0122 /**
0123   * @}
0124   */
0125
0126 /** @addtogroup Device_Included
0127   * @{
0128   */
0129
0130 #if defined(STM32H743xx)
0131   #include "stm32h743xx.h"
0132 #elif defined(STM32H753xx)
0133   #include "stm32h753xx.h"
0134 #elif defined(STM32H750xx)
0135   #include "stm32h750xx.h"
0136 #elif defined(STM32H742xx)
0137   #include "stm32h742xx.h"
0138 #elif defined(STM32H745xx)
0139   #include "stm32h745xx.h"
0140 #elif defined(STM32H745xG)
0141   #include "stm32h745xg.h"
0142 #elif defined(STM32H755xx)
0143   #include "stm32h755xx.h"
0144 #elif defined(STM32H747xx)
0145   #include "stm32h747xx.h"
0146 #elif defined(STM32H747xG)
0147   #include "stm32h747xg.h"
0148 #elif defined(STM32H757xx)
0149   #include "stm32h757xx.h"
0150 #elif defined(STM32H7B0xx)
0151   #include "stm32h7b0xx.h"
0152 #elif defined(STM32H7B0xxQ)
0153   #include "stm32h7b0xxq.h"
0154 #elif defined(STM32H7A3xx)
0155   #include "stm32h7a3xx.h"
0156 #elif defined(STM32H7B3xx)
0157   #include "stm32h7b3xx.h"
0158 #elif defined(STM32H7A3xxQ)
0159   #include "stm32h7a3xxq.h"
0160 #elif defined(STM32H7B3xxQ)
0161   #include "stm32h7b3xxq.h"
0162 #elif defined(STM32H735xx)
0163   #include "stm32h735xx.h"
0164 #elif defined(STM32H733xx)
0165   #include "stm32h733xx.h"
0166 #elif defined(STM32H730xx)
0167   #include "stm32h730xx.h"
0168 #elif defined(STM32H730xxQ)
0169   #include "stm32h730xxq.h"
0170 #elif defined(STM32H725xx)
0171   #include "stm32h725xx.h"
0172 #elif defined(STM32H723xx)
0173   #include "stm32h723xx.h"
0174 #else
0175  #error "Please select first the target STM32H7xx device used in your application (in stm32h7xx.h file)"
0176 #endif
0177
0178 /**
0179   * @}
0180   */
0181
0182 /** @addtogroup Exported_types
0183   * @{
0184   */
0185 typedef enum
0186 {
0187   RESET = 0,
0188   SET = !RESET
0189 } FlagStatus, ITStatus;
0190
0191 typedef enum
0192 {
0193   DISABLE = 0,
0194   ENABLE = !DISABLE
0195 } FunctionalState;
0196 #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
0197
0198 typedef enum
0199 {
0200   SUCCESS = 0,
0201   ERROR = !SUCCESS
0202 } ErrorStatus;
0203
0204 /**
0205   * @}
0206   */
0207
0208
0209 /** @addtogroup Exported_macros
0210   * @{
0211   */
0212 #define SET_BIT(REG, BIT)     ((REG) |= (BIT))
0213
0214 #define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
0215
0216 #define READ_BIT(REG, BIT)    ((REG) & (BIT))
0217
0218 #define CLEAR_REG(REG)        ((REG) = (0x0))
0219
0220 #define WRITE_REG(REG, VAL)   ((REG) = (VAL))
0221
0222 #define READ_REG(REG)         ((REG))
0223
0224 #define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
0225
0226 #define POSITION_VAL(VAL)     (__CLZ(__RBIT(VAL)))
0227
0228 /* Use of CMSIS compiler intrinsics for register exclusive access */
0229 /* Atomic 32-bit register access macro to set one or several bits */
0230 #define ATOMIC_SET_BIT(REG, BIT)                             \
0231   do {                                                       \
0232     uint32_t val;                                            \
0233     do {                                                     \
0234       val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT);       \
0235     } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
0236   } while(0)
0237
0238 /* Atomic 32-bit register access macro to clear one or several bits */
0239 #define ATOMIC_CLEAR_BIT(REG, BIT)                           \
0240   do {                                                       \
0241     uint32_t val;                                            \
0242     do {                                                     \
0243       val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT);      \
0244     } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
0245   } while(0)
0246
0247 /* Atomic 32-bit register access macro to clear and set one or several bits */
0248 #define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK)                          \
0249   do {                                                                     \
0250     uint32_t val;                                                          \
0251     do {                                                                   \
0252       val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
0253     } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U);               \
0254   } while(0)
0255
0256 /* Atomic 16-bit register access macro to set one or several bits */
0257 #define ATOMIC_SETH_BIT(REG, BIT)                            \
0258   do {                                                       \
0259     uint16_t val;                                            \
0260     do {                                                     \
0261       val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT);       \
0262     } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
0263   } while(0)
0264
0265 /* Atomic 16-bit register access macro to clear one or several bits */
0266 #define ATOMIC_CLEARH_BIT(REG, BIT)                          \
0267   do {                                                       \
0268     uint16_t val;                                            \
0269     do {                                                     \
0270       val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT);      \
0271     } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
0272   } while(0)
0273
0274 /* Atomic 16-bit register access macro to clear and set one or several bits */
0275 #define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK)                         \
0276   do {                                                                     \
0277     uint16_t val;                                                          \
0278     do {                                                                   \
0279       val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
0280     } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U);               \
0281   } while(0)
0282
0283 /**
0284   * @}
0285   */
0286
0287 #if defined (USE_HAL_DRIVER)
0288  #include "stm32h7xx_hal.h"
0289 #endif /* USE_HAL_DRIVER */
0290
0291
0292 #ifdef __cplusplus
0293 }
0294 #endif /* __cplusplus */
0295
0296 #endif /* STM32H7xx_H */
0297 /**
0298   * @}
0299   */
0300
0301 /**
0302   * @}
0303   */
0304
0305
0306
0307