File indexing completed on 2025-05-11 08:23:09
0001
0002
0003
0004
0005
0006
0007
0008
0009
0010
0011
0012
0013
0014
0015
0016
0017
0018 #if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
0019
0020
0021 #include "stm32h7xx_ll_lpuart.h"
0022 #include "stm32h7xx_ll_rcc.h"
0023 #include "stm32h7xx_ll_bus.h"
0024 #ifdef USE_FULL_ASSERT
0025 #include "stm32_assert.h"
0026 #else
0027 #define assert_param(expr) ((void)0U)
0028 #endif
0029
0030
0031
0032
0033
0034 #if defined (LPUART1)
0035
0036
0037
0038
0039
0040
0041
0042
0043
0044
0045
0046
0047
0048 #define LPUART_DEFAULT_BAUDRATE (9600U)
0049
0050
0051
0052
0053
0054
0055
0056
0057
0058
0059
0060
0061
0062 #define IS_LL_LPUART_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPUART_PRESCALER_DIV1) \
0063 || ((__VALUE__) == LL_LPUART_PRESCALER_DIV2) \
0064 || ((__VALUE__) == LL_LPUART_PRESCALER_DIV4) \
0065 || ((__VALUE__) == LL_LPUART_PRESCALER_DIV6) \
0066 || ((__VALUE__) == LL_LPUART_PRESCALER_DIV8) \
0067 || ((__VALUE__) == LL_LPUART_PRESCALER_DIV10) \
0068 || ((__VALUE__) == LL_LPUART_PRESCALER_DIV12) \
0069 || ((__VALUE__) == LL_LPUART_PRESCALER_DIV16) \
0070 || ((__VALUE__) == LL_LPUART_PRESCALER_DIV32) \
0071 || ((__VALUE__) == LL_LPUART_PRESCALER_DIV64) \
0072 || ((__VALUE__) == LL_LPUART_PRESCALER_DIV128) \
0073 || ((__VALUE__) == LL_LPUART_PRESCALER_DIV256))
0074
0075
0076
0077
0078
0079
0080
0081 #define IS_LL_LPUART_BAUDRATE(__BAUDRATE__) (((__BAUDRATE__) <= 33000000U) && ((__BAUDRATE__) >= 8U))
0082
0083
0084 #define IS_LL_LPUART_BRR_MIN(__VALUE__) ((__VALUE__) >= 0x300U)
0085
0086
0087 #define IS_LL_LPUART_BRR_MAX(__VALUE__) ((__VALUE__) <= 0x000FFFFFU)
0088
0089 #define IS_LL_LPUART_DIRECTION(__VALUE__) (((__VALUE__) == LL_LPUART_DIRECTION_NONE) \
0090 || ((__VALUE__) == LL_LPUART_DIRECTION_RX) \
0091 || ((__VALUE__) == LL_LPUART_DIRECTION_TX) \
0092 || ((__VALUE__) == LL_LPUART_DIRECTION_TX_RX))
0093
0094 #define IS_LL_LPUART_PARITY(__VALUE__) (((__VALUE__) == LL_LPUART_PARITY_NONE) \
0095 || ((__VALUE__) == LL_LPUART_PARITY_EVEN) \
0096 || ((__VALUE__) == LL_LPUART_PARITY_ODD))
0097
0098 #define IS_LL_LPUART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_LPUART_DATAWIDTH_7B) \
0099 || ((__VALUE__) == LL_LPUART_DATAWIDTH_8B) \
0100 || ((__VALUE__) == LL_LPUART_DATAWIDTH_9B))
0101
0102 #define IS_LL_LPUART_STOPBITS(__VALUE__) (((__VALUE__) == LL_LPUART_STOPBITS_1) \
0103 || ((__VALUE__) == LL_LPUART_STOPBITS_2))
0104
0105 #define IS_LL_LPUART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_LPUART_HWCONTROL_NONE) \
0106 || ((__VALUE__) == LL_LPUART_HWCONTROL_RTS) \
0107 || ((__VALUE__) == LL_LPUART_HWCONTROL_CTS) \
0108 || ((__VALUE__) == LL_LPUART_HWCONTROL_RTS_CTS))
0109
0110
0111
0112
0113
0114
0115
0116
0117
0118
0119
0120
0121
0122
0123
0124
0125
0126
0127
0128
0129
0130
0131
0132 ErrorStatus LL_LPUART_DeInit(const USART_TypeDef *LPUARTx)
0133 {
0134 ErrorStatus status = SUCCESS;
0135
0136
0137 assert_param(IS_LPUART_INSTANCE(LPUARTx));
0138
0139 if (LPUARTx == LPUART1)
0140 {
0141
0142 LL_APB4_GRP1_ForceReset(LL_APB4_GRP1_PERIPH_LPUART1);
0143
0144
0145 LL_APB4_GRP1_ReleaseReset(LL_APB4_GRP1_PERIPH_LPUART1);
0146 }
0147 else
0148 {
0149 status = ERROR;
0150 }
0151
0152 return (status);
0153 }
0154
0155
0156
0157
0158
0159
0160
0161
0162
0163
0164
0165
0166
0167
0168
0169
0170 ErrorStatus LL_LPUART_Init(USART_TypeDef *LPUARTx, const LL_LPUART_InitTypeDef *LPUART_InitStruct)
0171 {
0172 ErrorStatus status = ERROR;
0173 uint32_t periphclk;
0174
0175
0176 assert_param(IS_LPUART_INSTANCE(LPUARTx));
0177 assert_param(IS_LL_LPUART_PRESCALER(LPUART_InitStruct->PrescalerValue));
0178 assert_param(IS_LL_LPUART_BAUDRATE(LPUART_InitStruct->BaudRate));
0179 assert_param(IS_LL_LPUART_DATAWIDTH(LPUART_InitStruct->DataWidth));
0180 assert_param(IS_LL_LPUART_STOPBITS(LPUART_InitStruct->StopBits));
0181 assert_param(IS_LL_LPUART_PARITY(LPUART_InitStruct->Parity));
0182 assert_param(IS_LL_LPUART_DIRECTION(LPUART_InitStruct->TransferDirection));
0183 assert_param(IS_LL_LPUART_HWCONTROL(LPUART_InitStruct->HardwareFlowControl));
0184
0185
0186
0187 if (LL_LPUART_IsEnabled(LPUARTx) == 0U)
0188 {
0189
0190
0191
0192
0193
0194
0195 MODIFY_REG(LPUARTx->CR1,
0196 (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE),
0197 (LPUART_InitStruct->DataWidth | LPUART_InitStruct->Parity | LPUART_InitStruct->TransferDirection));
0198
0199
0200
0201
0202
0203 LL_LPUART_SetStopBitsLength(LPUARTx, LPUART_InitStruct->StopBits);
0204
0205
0206
0207
0208
0209
0210 LL_LPUART_SetHWFlowCtrl(LPUARTx, LPUART_InitStruct->HardwareFlowControl);
0211
0212
0213
0214
0215 periphclk = LL_RCC_GetLPUARTClockFreq(LL_RCC_LPUART1_CLKSOURCE);
0216
0217
0218
0219
0220
0221
0222 if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
0223 && (LPUART_InitStruct->BaudRate != 0U))
0224 {
0225 status = SUCCESS;
0226 LL_LPUART_SetBaudRate(LPUARTx,
0227 periphclk,
0228 LPUART_InitStruct->PrescalerValue,
0229 LPUART_InitStruct->BaudRate);
0230
0231
0232 assert_param(IS_LL_LPUART_BRR_MIN(LPUARTx->BRR));
0233
0234
0235 assert_param(IS_LL_LPUART_BRR_MAX(LPUARTx->BRR));
0236 }
0237
0238
0239
0240
0241
0242 LL_LPUART_SetPrescaler(LPUARTx, LPUART_InitStruct->PrescalerValue);
0243 }
0244
0245 return (status);
0246 }
0247
0248
0249
0250
0251
0252
0253
0254
0255 void LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct)
0256 {
0257
0258 LPUART_InitStruct->PrescalerValue = LL_LPUART_PRESCALER_DIV1;
0259 LPUART_InitStruct->BaudRate = LPUART_DEFAULT_BAUDRATE;
0260 LPUART_InitStruct->DataWidth = LL_LPUART_DATAWIDTH_8B;
0261 LPUART_InitStruct->StopBits = LL_LPUART_STOPBITS_1;
0262 LPUART_InitStruct->Parity = LL_LPUART_PARITY_NONE ;
0263 LPUART_InitStruct->TransferDirection = LL_LPUART_DIRECTION_TX_RX;
0264 LPUART_InitStruct->HardwareFlowControl = LL_LPUART_HWCONTROL_NONE;
0265 }
0266
0267
0268
0269
0270
0271
0272
0273
0274
0275
0276
0277
0278
0279 #endif
0280
0281
0282
0283
0284
0285 #endif