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File indexing completed on 2025-05-11 08:23:09

0001 /**
0002   ******************************************************************************
0003   * @file    stm32h7xx_ll_i2c.c
0004   * @author  MCD Application Team
0005   * @brief   I2C LL module driver.
0006   ******************************************************************************
0007   * @attention
0008   *
0009   * Copyright (c) 2017 STMicroelectronics.
0010   * All rights reserved.
0011   *
0012   * This software is licensed under terms that can be found in the LICENSE file
0013   * in the root directory of this software component.
0014   * If no LICENSE file comes with this software, it is provided AS-IS.
0015   *
0016   ******************************************************************************
0017   */
0018 #if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
0019 
0020 /* Includes ------------------------------------------------------------------*/
0021 #include "stm32h7xx_ll_i2c.h"
0022 #include "stm32h7xx_ll_bus.h"
0023 #ifdef  USE_FULL_ASSERT
0024 #include "stm32_assert.h"
0025 #else
0026 #define assert_param(expr) ((void)0U)
0027 #endif /* USE_FULL_ASSERT */
0028 
0029 /** @addtogroup STM32H7xx_LL_Driver
0030   * @{
0031   */
0032 
0033 #if defined (I2C1) || defined (I2C2) || defined (I2C3) || defined (I2C4) || defined (I2C5)
0034 
0035 /** @defgroup I2C_LL I2C
0036   * @ingroup RTEMSBSPsARMSTM32H7
0037   * @{
0038   */
0039 
0040 /* Private types -------------------------------------------------------------*/
0041 /* Private variables ---------------------------------------------------------*/
0042 /* Private constants ---------------------------------------------------------*/
0043 /* Private macros ------------------------------------------------------------*/
0044 /** @addtogroup I2C_LL_Private_Macros
0045   * @{
0046   */
0047 
0048 #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__)    (((__VALUE__) == LL_I2C_MODE_I2C)          || \
0049                                                  ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST)   || \
0050                                                  ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \
0051                                                  ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP))
0052 
0053 #define IS_LL_I2C_ANALOG_FILTER(__VALUE__)      (((__VALUE__) == LL_I2C_ANALOGFILTER_ENABLE) || \
0054                                                  ((__VALUE__) == LL_I2C_ANALOGFILTER_DISABLE))
0055 
0056 #define IS_LL_I2C_DIGITAL_FILTER(__VALUE__)     ((__VALUE__) <= 0x0000000FU)
0057 
0058 #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__)       ((__VALUE__) <= 0x000003FFU)
0059 
0060 #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__)   (((__VALUE__) == LL_I2C_ACK) || \
0061                                                  ((__VALUE__) == LL_I2C_NACK))
0062 
0063 #define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__)       (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \
0064                                                  ((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT))
0065 /**
0066   * @}
0067   */
0068 
0069 /* Private function prototypes -----------------------------------------------*/
0070 
0071 /* Exported functions --------------------------------------------------------*/
0072 /** @addtogroup I2C_LL_Exported_Functions
0073   * @{
0074   */
0075 
0076 /** @addtogroup I2C_LL_EF_Init
0077   * @{
0078   */
0079 
0080 /**
0081   * @brief  De-initialize the I2C registers to their default reset values.
0082   * @param  I2Cx I2C Instance.
0083   * @retval An ErrorStatus enumeration value:
0084   *          - SUCCESS: I2C registers are de-initialized
0085   *          - ERROR: I2C registers are not de-initialized
0086   */
0087 ErrorStatus LL_I2C_DeInit(const I2C_TypeDef *I2Cx)
0088 {
0089   ErrorStatus status = SUCCESS;
0090 
0091   /* Check the I2C Instance I2Cx */
0092   assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
0093 
0094   if (I2Cx == I2C1)
0095   {
0096     /* Force reset of I2C clock */
0097     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1);
0098 
0099     /* Release reset of I2C clock */
0100     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1);
0101   }
0102   else if (I2Cx == I2C2)
0103   {
0104     /* Force reset of I2C clock */
0105     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2);
0106 
0107     /* Release reset of I2C clock */
0108     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2);
0109 
0110   }
0111   else if (I2Cx == I2C3)
0112   {
0113     /* Force reset of I2C clock */
0114     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C3);
0115 
0116     /* Release reset of I2C clock */
0117     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C3);
0118   }
0119   else if (I2Cx == I2C4)
0120   {
0121     /* Force reset of I2C clock */
0122     LL_APB4_GRP1_ForceReset(LL_APB4_GRP1_PERIPH_I2C4);
0123 
0124     /* Release reset of I2C clock */
0125     LL_APB4_GRP1_ReleaseReset(LL_APB4_GRP1_PERIPH_I2C4);
0126   }
0127 #if defined(I2C5)
0128   else if (I2Cx == I2C5)
0129   {
0130     /* Force reset of I2C clock */
0131     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C5);
0132 
0133     /* Release reset of I2C clock */
0134     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C5);
0135   }
0136 #endif /* I2C5 */
0137   else
0138   {
0139     status = ERROR;
0140   }
0141 
0142   return status;
0143 }
0144 
0145 /**
0146   * @brief  Initialize the I2C registers according to the specified parameters in I2C_InitStruct.
0147   * @param  I2Cx I2C Instance.
0148   * @param  I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure.
0149   * @retval An ErrorStatus enumeration value:
0150   *          - SUCCESS: I2C registers are initialized
0151   *          - ERROR: Not applicable
0152   */
0153 ErrorStatus LL_I2C_Init(I2C_TypeDef *I2Cx, const LL_I2C_InitTypeDef *I2C_InitStruct)
0154 {
0155   /* Check the I2C Instance I2Cx */
0156   assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
0157 
0158   /* Check the I2C parameters from I2C_InitStruct */
0159   assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode));
0160   assert_param(IS_LL_I2C_ANALOG_FILTER(I2C_InitStruct->AnalogFilter));
0161   assert_param(IS_LL_I2C_DIGITAL_FILTER(I2C_InitStruct->DigitalFilter));
0162   assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1));
0163   assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge));
0164   assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize));
0165 
0166   /* Disable the selected I2Cx Peripheral */
0167   LL_I2C_Disable(I2Cx);
0168 
0169   /*---------------------------- I2Cx CR1 Configuration ------------------------
0170    * Configure the analog and digital noise filters with parameters :
0171    * - AnalogFilter: I2C_CR1_ANFOFF bit
0172    * - DigitalFilter: I2C_CR1_DNF[3:0] bits
0173    */
0174   LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter);
0175 
0176   /*---------------------------- I2Cx TIMINGR Configuration --------------------
0177    * Configure the SDA setup, hold time and the SCL high, low period with parameter :
0178    * - Timing: I2C_TIMINGR_PRESC[3:0], I2C_TIMINGR_SCLDEL[3:0], I2C_TIMINGR_SDADEL[3:0],
0179    *           I2C_TIMINGR_SCLH[7:0] and I2C_TIMINGR_SCLL[7:0] bits
0180    */
0181   LL_I2C_SetTiming(I2Cx, I2C_InitStruct->Timing);
0182 
0183   /* Enable the selected I2Cx Peripheral */
0184   LL_I2C_Enable(I2Cx);
0185 
0186   /*---------------------------- I2Cx OAR1 Configuration -----------------------
0187    * Disable, Configure and Enable I2Cx device own address 1 with parameters :
0188    * - OwnAddress1:  I2C_OAR1_OA1[9:0] bits
0189    * - OwnAddrSize:  I2C_OAR1_OA1MODE bit
0190    */
0191   LL_I2C_DisableOwnAddress1(I2Cx);
0192   LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize);
0193 
0194   /* OwnAdress1 == 0 is reserved for General Call address */
0195   if (I2C_InitStruct->OwnAddress1 != 0U)
0196   {
0197     LL_I2C_EnableOwnAddress1(I2Cx);
0198   }
0199 
0200   /*---------------------------- I2Cx MODE Configuration -----------------------
0201   * Configure I2Cx peripheral mode with parameter :
0202    * - PeripheralMode: I2C_CR1_SMBDEN and I2C_CR1_SMBHEN bits
0203    */
0204   LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode);
0205 
0206   /*---------------------------- I2Cx CR2 Configuration ------------------------
0207    * Configure the ACKnowledge or Non ACKnowledge condition
0208    * after the address receive match code or next received byte with parameter :
0209    * - TypeAcknowledge: I2C_CR2_NACK bit
0210    */
0211   LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge);
0212 
0213   return SUCCESS;
0214 }
0215 
0216 /**
0217   * @brief  Set each @ref LL_I2C_InitTypeDef field to default value.
0218   * @param  I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure.
0219   * @retval None
0220   */
0221 void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct)
0222 {
0223   /* Set I2C_InitStruct fields to default values */
0224   I2C_InitStruct->PeripheralMode  = LL_I2C_MODE_I2C;
0225   I2C_InitStruct->Timing          = 0U;
0226   I2C_InitStruct->AnalogFilter    = LL_I2C_ANALOGFILTER_ENABLE;
0227   I2C_InitStruct->DigitalFilter   = 0U;
0228   I2C_InitStruct->OwnAddress1     = 0U;
0229   I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK;
0230   I2C_InitStruct->OwnAddrSize     = LL_I2C_OWNADDRESS1_7BIT;
0231 }
0232 
0233 /**
0234   * @}
0235   */
0236 
0237 /**
0238   * @}
0239   */
0240 
0241 /**
0242   * @}
0243   */
0244 
0245 #endif /* I2C1 || I2C2 || I2C3 || I2C4  || I2C5 */
0246 
0247 /**
0248   * @}
0249   */
0250 
0251 #endif /* USE_FULL_LL_DRIVER */