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0162 #include "stm32h7xx_hal.h"
0163
0164
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0171
0172
0173
0174 #ifdef HAL_UART_MODULE_ENABLED
0175
0176
0177
0178
0179
0180
0181
0182 #define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | \
0183 USART_CR1_OVER8 | USART_CR1_FIFOEN))
0184
0185 #define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT | USART_CR3_TXFTCFG | \
0186 USART_CR3_RXFTCFG))
0187
0188 #define LPUART_BRR_MIN 0x00000300U
0189 #define LPUART_BRR_MAX 0x000FFFFFU
0190
0191 #define UART_BRR_MIN 0x10U
0192 #define UART_BRR_MAX 0x0000FFFFU
0193
0194
0195
0196
0197
0198
0199
0200
0201
0202 static void UART_EndRxTransfer(UART_HandleTypeDef *huart);
0203 static void UART_EndTxTransfer(UART_HandleTypeDef *huart);
0204 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
0205 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
0206 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
0207 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
0208 static void UART_DMAError(DMA_HandleTypeDef *hdma);
0209 static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
0210 static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
0211 static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
0212 static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
0213 static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
0214 static void UART_TxISR_8BIT(UART_HandleTypeDef *huart);
0215 static void UART_TxISR_16BIT(UART_HandleTypeDef *huart);
0216 static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart);
0217 static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart);
0218 static void UART_EndTransmit_IT(UART_HandleTypeDef *huart);
0219 static void UART_RxISR_8BIT(UART_HandleTypeDef *huart);
0220 static void UART_RxISR_16BIT(UART_HandleTypeDef *huart);
0221 static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart);
0222 static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart);
0223
0224
0225
0226
0227
0228
0229
0230
0231 const uint16_t UARTPrescTable[12] = {1U, 2U, 4U, 6U, 8U, 10U, 12U, 16U, 32U, 64U, 128U, 256U};
0232
0233
0234
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0309
0310
0311 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
0312 {
0313
0314 if (huart == NULL)
0315 {
0316 return HAL_ERROR;
0317 }
0318
0319 if (huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
0320 {
0321
0322 assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
0323 }
0324 else
0325 {
0326
0327 assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
0328 }
0329
0330 if (huart->gState == HAL_UART_STATE_RESET)
0331 {
0332
0333 huart->Lock = HAL_UNLOCKED;
0334
0335 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
0336 UART_InitCallbacksToDefault(huart);
0337
0338 if (huart->MspInitCallback == NULL)
0339 {
0340 huart->MspInitCallback = HAL_UART_MspInit;
0341 }
0342
0343
0344 huart->MspInitCallback(huart);
0345 #else
0346
0347 HAL_UART_MspInit(huart);
0348 #endif
0349 }
0350
0351 huart->gState = HAL_UART_STATE_BUSY;
0352
0353 __HAL_UART_DISABLE(huart);
0354
0355
0356
0357 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
0358 {
0359 UART_AdvFeatureConfig(huart);
0360 }
0361
0362
0363 if (UART_SetConfig(huart) == HAL_ERROR)
0364 {
0365 return HAL_ERROR;
0366 }
0367
0368
0369
0370
0371 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
0372 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
0373
0374 __HAL_UART_ENABLE(huart);
0375
0376
0377 return (UART_CheckIdleState(huart));
0378 }
0379
0380
0381
0382
0383
0384
0385
0386 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
0387 {
0388
0389 if (huart == NULL)
0390 {
0391 return HAL_ERROR;
0392 }
0393
0394
0395 assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
0396
0397 if (huart->gState == HAL_UART_STATE_RESET)
0398 {
0399
0400 huart->Lock = HAL_UNLOCKED;
0401
0402 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
0403 UART_InitCallbacksToDefault(huart);
0404
0405 if (huart->MspInitCallback == NULL)
0406 {
0407 huart->MspInitCallback = HAL_UART_MspInit;
0408 }
0409
0410
0411 huart->MspInitCallback(huart);
0412 #else
0413
0414 HAL_UART_MspInit(huart);
0415 #endif
0416 }
0417
0418 huart->gState = HAL_UART_STATE_BUSY;
0419
0420 __HAL_UART_DISABLE(huart);
0421
0422
0423
0424 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
0425 {
0426 UART_AdvFeatureConfig(huart);
0427 }
0428
0429
0430 if (UART_SetConfig(huart) == HAL_ERROR)
0431 {
0432 return HAL_ERROR;
0433 }
0434
0435
0436
0437
0438 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
0439 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN));
0440
0441
0442 SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
0443
0444 __HAL_UART_ENABLE(huart);
0445
0446
0447 return (UART_CheckIdleState(huart));
0448 }
0449
0450
0451
0452
0453
0454
0455
0456
0457
0458
0459
0460
0461 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
0462 {
0463
0464 if (huart == NULL)
0465 {
0466 return HAL_ERROR;
0467 }
0468
0469
0470 assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
0471
0472 assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
0473
0474
0475 if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
0476 {
0477 return HAL_ERROR;
0478 }
0479
0480 if (huart->Init.WordLength != UART_WORDLENGTH_8B)
0481 {
0482 return HAL_ERROR;
0483 }
0484
0485 if (huart->gState == HAL_UART_STATE_RESET)
0486 {
0487
0488 huart->Lock = HAL_UNLOCKED;
0489
0490 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
0491 UART_InitCallbacksToDefault(huart);
0492
0493 if (huart->MspInitCallback == NULL)
0494 {
0495 huart->MspInitCallback = HAL_UART_MspInit;
0496 }
0497
0498
0499 huart->MspInitCallback(huart);
0500 #else
0501
0502 HAL_UART_MspInit(huart);
0503 #endif
0504 }
0505
0506 huart->gState = HAL_UART_STATE_BUSY;
0507
0508 __HAL_UART_DISABLE(huart);
0509
0510
0511
0512 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
0513 {
0514 UART_AdvFeatureConfig(huart);
0515 }
0516
0517
0518 if (UART_SetConfig(huart) == HAL_ERROR)
0519 {
0520 return HAL_ERROR;
0521 }
0522
0523
0524
0525
0526 CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN);
0527 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN));
0528
0529
0530 SET_BIT(huart->Instance->CR2, USART_CR2_LINEN);
0531
0532
0533 MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength);
0534
0535 __HAL_UART_ENABLE(huart);
0536
0537
0538 return (UART_CheckIdleState(huart));
0539 }
0540
0541
0542
0543
0544
0545
0546
0547
0548
0549
0550
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0552
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0558
0559
0560 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
0561 {
0562
0563 if (huart == NULL)
0564 {
0565 return HAL_ERROR;
0566 }
0567
0568
0569 assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
0570
0571 if (huart->gState == HAL_UART_STATE_RESET)
0572 {
0573
0574 huart->Lock = HAL_UNLOCKED;
0575
0576 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
0577 UART_InitCallbacksToDefault(huart);
0578
0579 if (huart->MspInitCallback == NULL)
0580 {
0581 huart->MspInitCallback = HAL_UART_MspInit;
0582 }
0583
0584
0585 huart->MspInitCallback(huart);
0586 #else
0587
0588 HAL_UART_MspInit(huart);
0589 #endif
0590 }
0591
0592 huart->gState = HAL_UART_STATE_BUSY;
0593
0594 __HAL_UART_DISABLE(huart);
0595
0596
0597
0598 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
0599 {
0600 UART_AdvFeatureConfig(huart);
0601 }
0602
0603
0604 if (UART_SetConfig(huart) == HAL_ERROR)
0605 {
0606 return HAL_ERROR;
0607 }
0608
0609
0610
0611
0612 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
0613 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
0614
0615 if (WakeUpMethod == UART_WAKEUPMETHOD_ADDRESSMARK)
0616 {
0617
0618 MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)Address << UART_CR2_ADDRESS_LSB_POS));
0619 }
0620
0621
0622 MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod);
0623
0624 __HAL_UART_ENABLE(huart);
0625
0626
0627 return (UART_CheckIdleState(huart));
0628 }
0629
0630
0631
0632
0633
0634
0635
0636 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
0637 {
0638
0639 if (huart == NULL)
0640 {
0641 return HAL_ERROR;
0642 }
0643
0644
0645 assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
0646
0647 huart->gState = HAL_UART_STATE_BUSY;
0648
0649 __HAL_UART_DISABLE(huart);
0650
0651 huart->Instance->CR1 = 0x0U;
0652 huart->Instance->CR2 = 0x0U;
0653 huart->Instance->CR3 = 0x0U;
0654
0655 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
0656 if (huart->MspDeInitCallback == NULL)
0657 {
0658 huart->MspDeInitCallback = HAL_UART_MspDeInit;
0659 }
0660
0661 huart->MspDeInitCallback(huart);
0662 #else
0663
0664 HAL_UART_MspDeInit(huart);
0665 #endif
0666
0667 huart->ErrorCode = HAL_UART_ERROR_NONE;
0668 huart->gState = HAL_UART_STATE_RESET;
0669 huart->RxState = HAL_UART_STATE_RESET;
0670 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
0671 huart->RxEventType = HAL_UART_RXEVENT_TC;
0672
0673 __HAL_UNLOCK(huart);
0674
0675 return HAL_OK;
0676 }
0677
0678 #ifndef __rtems__
0679
0680
0681
0682
0683
0684 __weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
0685 {
0686
0687 UNUSED(huart);
0688
0689
0690
0691
0692 }
0693 #endif
0694
0695
0696
0697
0698
0699
0700 __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
0701 {
0702
0703 UNUSED(huart);
0704
0705
0706
0707
0708 }
0709
0710 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
0711
0712
0713
0714
0715
0716
0717
0718
0719
0720
0721
0722
0723
0724
0725
0726
0727
0728
0729
0730
0731
0732
0733
0734
0735
0736 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID,
0737 pUART_CallbackTypeDef pCallback)
0738 {
0739 HAL_StatusTypeDef status = HAL_OK;
0740
0741 if (pCallback == NULL)
0742 {
0743 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
0744
0745 return HAL_ERROR;
0746 }
0747
0748 if (huart->gState == HAL_UART_STATE_READY)
0749 {
0750 switch (CallbackID)
0751 {
0752 case HAL_UART_TX_HALFCOMPLETE_CB_ID :
0753 huart->TxHalfCpltCallback = pCallback;
0754 break;
0755
0756 case HAL_UART_TX_COMPLETE_CB_ID :
0757 huart->TxCpltCallback = pCallback;
0758 break;
0759
0760 case HAL_UART_RX_HALFCOMPLETE_CB_ID :
0761 huart->RxHalfCpltCallback = pCallback;
0762 break;
0763
0764 case HAL_UART_RX_COMPLETE_CB_ID :
0765 huart->RxCpltCallback = pCallback;
0766 break;
0767
0768 case HAL_UART_ERROR_CB_ID :
0769 huart->ErrorCallback = pCallback;
0770 break;
0771
0772 case HAL_UART_ABORT_COMPLETE_CB_ID :
0773 huart->AbortCpltCallback = pCallback;
0774 break;
0775
0776 case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
0777 huart->AbortTransmitCpltCallback = pCallback;
0778 break;
0779
0780 case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
0781 huart->AbortReceiveCpltCallback = pCallback;
0782 break;
0783
0784 case HAL_UART_WAKEUP_CB_ID :
0785 huart->WakeupCallback = pCallback;
0786 break;
0787
0788 case HAL_UART_RX_FIFO_FULL_CB_ID :
0789 huart->RxFifoFullCallback = pCallback;
0790 break;
0791
0792 case HAL_UART_TX_FIFO_EMPTY_CB_ID :
0793 huart->TxFifoEmptyCallback = pCallback;
0794 break;
0795
0796 case HAL_UART_MSPINIT_CB_ID :
0797 huart->MspInitCallback = pCallback;
0798 break;
0799
0800 case HAL_UART_MSPDEINIT_CB_ID :
0801 huart->MspDeInitCallback = pCallback;
0802 break;
0803
0804 default :
0805 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
0806
0807 status = HAL_ERROR;
0808 break;
0809 }
0810 }
0811 else if (huart->gState == HAL_UART_STATE_RESET)
0812 {
0813 switch (CallbackID)
0814 {
0815 case HAL_UART_MSPINIT_CB_ID :
0816 huart->MspInitCallback = pCallback;
0817 break;
0818
0819 case HAL_UART_MSPDEINIT_CB_ID :
0820 huart->MspDeInitCallback = pCallback;
0821 break;
0822
0823 default :
0824 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
0825
0826 status = HAL_ERROR;
0827 break;
0828 }
0829 }
0830 else
0831 {
0832 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
0833
0834 status = HAL_ERROR;
0835 }
0836
0837 return status;
0838 }
0839
0840
0841
0842
0843
0844
0845
0846
0847
0848
0849
0850
0851
0852
0853
0854
0855
0856
0857
0858
0859
0860
0861
0862
0863
0864 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID)
0865 {
0866 HAL_StatusTypeDef status = HAL_OK;
0867
0868 if (HAL_UART_STATE_READY == huart->gState)
0869 {
0870 switch (CallbackID)
0871 {
0872 case HAL_UART_TX_HALFCOMPLETE_CB_ID :
0873 huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback;
0874 break;
0875
0876 case HAL_UART_TX_COMPLETE_CB_ID :
0877 huart->TxCpltCallback = HAL_UART_TxCpltCallback;
0878 break;
0879
0880 case HAL_UART_RX_HALFCOMPLETE_CB_ID :
0881 huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback;
0882 break;
0883
0884 case HAL_UART_RX_COMPLETE_CB_ID :
0885 huart->RxCpltCallback = HAL_UART_RxCpltCallback;
0886 break;
0887
0888 case HAL_UART_ERROR_CB_ID :
0889 huart->ErrorCallback = HAL_UART_ErrorCallback;
0890 break;
0891
0892 case HAL_UART_ABORT_COMPLETE_CB_ID :
0893 huart->AbortCpltCallback = HAL_UART_AbortCpltCallback;
0894 break;
0895
0896 case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
0897 huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback;
0898
0899 break;
0900
0901 case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
0902 huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback;
0903
0904 break;
0905
0906 case HAL_UART_WAKEUP_CB_ID :
0907 huart->WakeupCallback = HAL_UARTEx_WakeupCallback;
0908 break;
0909
0910 case HAL_UART_RX_FIFO_FULL_CB_ID :
0911 huart->RxFifoFullCallback = HAL_UARTEx_RxFifoFullCallback;
0912 break;
0913
0914 case HAL_UART_TX_FIFO_EMPTY_CB_ID :
0915 huart->TxFifoEmptyCallback = HAL_UARTEx_TxFifoEmptyCallback;
0916 break;
0917
0918 case HAL_UART_MSPINIT_CB_ID :
0919 huart->MspInitCallback = HAL_UART_MspInit;
0920 break;
0921
0922 case HAL_UART_MSPDEINIT_CB_ID :
0923 huart->MspDeInitCallback = HAL_UART_MspDeInit;
0924 break;
0925
0926 default :
0927 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
0928
0929 status = HAL_ERROR;
0930 break;
0931 }
0932 }
0933 else if (HAL_UART_STATE_RESET == huart->gState)
0934 {
0935 switch (CallbackID)
0936 {
0937 case HAL_UART_MSPINIT_CB_ID :
0938 huart->MspInitCallback = HAL_UART_MspInit;
0939 break;
0940
0941 case HAL_UART_MSPDEINIT_CB_ID :
0942 huart->MspDeInitCallback = HAL_UART_MspDeInit;
0943 break;
0944
0945 default :
0946 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
0947
0948 status = HAL_ERROR;
0949 break;
0950 }
0951 }
0952 else
0953 {
0954 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
0955
0956 status = HAL_ERROR;
0957 }
0958
0959 return status;
0960 }
0961
0962
0963
0964
0965
0966
0967
0968
0969 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback)
0970 {
0971 HAL_StatusTypeDef status = HAL_OK;
0972
0973 if (pCallback == NULL)
0974 {
0975 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
0976
0977 return HAL_ERROR;
0978 }
0979
0980 if (huart->RxState == HAL_UART_STATE_READY)
0981 {
0982 huart->RxEventCallback = pCallback;
0983 }
0984 else
0985 {
0986 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
0987
0988 status = HAL_ERROR;
0989 }
0990
0991 return status;
0992 }
0993
0994
0995
0996
0997
0998
0999
1000 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart)
1001 {
1002 HAL_StatusTypeDef status = HAL_OK;
1003
1004 if (huart->RxState == HAL_UART_STATE_READY)
1005 {
1006 huart->RxEventCallback = HAL_UARTEx_RxEventCallback;
1007 }
1008 else
1009 {
1010 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
1011
1012 status = HAL_ERROR;
1013 }
1014
1015 return status;
1016 }
1017
1018 #endif
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
1125 {
1126 const uint8_t *pdata8bits;
1127 const uint16_t *pdata16bits;
1128 uint32_t tickstart;
1129
1130
1131 if (huart->gState == HAL_UART_STATE_READY)
1132 {
1133 if ((pData == NULL) || (Size == 0U))
1134 {
1135 return HAL_ERROR;
1136 }
1137
1138 huart->ErrorCode = HAL_UART_ERROR_NONE;
1139 huart->gState = HAL_UART_STATE_BUSY_TX;
1140
1141
1142 tickstart = HAL_GetTick();
1143
1144 huart->TxXferSize = Size;
1145 huart->TxXferCount = Size;
1146
1147
1148 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1149 {
1150 pdata8bits = NULL;
1151 pdata16bits = (const uint16_t *) pData;
1152 }
1153 else
1154 {
1155 pdata8bits = pData;
1156 pdata16bits = NULL;
1157 }
1158
1159 while (huart->TxXferCount > 0U)
1160 {
1161 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
1162 {
1163
1164 huart->gState = HAL_UART_STATE_READY;
1165
1166 return HAL_TIMEOUT;
1167 }
1168 if (pdata8bits == NULL)
1169 {
1170 huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU);
1171 pdata16bits++;
1172 }
1173 else
1174 {
1175 huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU);
1176 pdata8bits++;
1177 }
1178 huart->TxXferCount--;
1179 }
1180
1181 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
1182 {
1183 huart->gState = HAL_UART_STATE_READY;
1184
1185 return HAL_TIMEOUT;
1186 }
1187
1188
1189 huart->gState = HAL_UART_STATE_READY;
1190
1191 return HAL_OK;
1192 }
1193 else
1194 {
1195 return HAL_BUSY;
1196 }
1197 }
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1215 {
1216 uint8_t *pdata8bits;
1217 uint16_t *pdata16bits;
1218 uint16_t uhMask;
1219 uint32_t tickstart;
1220
1221
1222 if (huart->RxState == HAL_UART_STATE_READY)
1223 {
1224 if ((pData == NULL) || (Size == 0U))
1225 {
1226 return HAL_ERROR;
1227 }
1228
1229 huart->ErrorCode = HAL_UART_ERROR_NONE;
1230 huart->RxState = HAL_UART_STATE_BUSY_RX;
1231 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1232
1233
1234 tickstart = HAL_GetTick();
1235
1236 huart->RxXferSize = Size;
1237 huart->RxXferCount = Size;
1238
1239
1240 UART_MASK_COMPUTATION(huart);
1241 uhMask = huart->Mask;
1242
1243
1244 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1245 {
1246 pdata8bits = NULL;
1247 pdata16bits = (uint16_t *) pData;
1248 }
1249 else
1250 {
1251 pdata8bits = pData;
1252 pdata16bits = NULL;
1253 }
1254
1255
1256 while (huart->RxXferCount > 0U)
1257 {
1258 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
1259 {
1260 huart->RxState = HAL_UART_STATE_READY;
1261
1262 return HAL_TIMEOUT;
1263 }
1264 if (pdata8bits == NULL)
1265 {
1266 *pdata16bits = (uint16_t)(huart->Instance->RDR & uhMask);
1267 pdata16bits++;
1268 }
1269 else
1270 {
1271 *pdata8bits = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
1272 pdata8bits++;
1273 }
1274 huart->RxXferCount--;
1275 }
1276
1277
1278 huart->RxState = HAL_UART_STATE_READY;
1279
1280 return HAL_OK;
1281 }
1282 else
1283 {
1284 return HAL_BUSY;
1285 }
1286 }
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
1299 {
1300
1301 if (huart->gState == HAL_UART_STATE_READY)
1302 {
1303 if ((pData == NULL) || (Size == 0U))
1304 {
1305 return HAL_ERROR;
1306 }
1307
1308 huart->pTxBuffPtr = pData;
1309 huart->TxXferSize = Size;
1310 huart->TxXferCount = Size;
1311 huart->TxISR = NULL;
1312
1313 huart->ErrorCode = HAL_UART_ERROR_NONE;
1314 huart->gState = HAL_UART_STATE_BUSY_TX;
1315
1316
1317 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1318 {
1319
1320 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1321 {
1322 huart->TxISR = UART_TxISR_16BIT_FIFOEN;
1323 }
1324 else
1325 {
1326 huart->TxISR = UART_TxISR_8BIT_FIFOEN;
1327 }
1328
1329
1330 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
1331 }
1332 else
1333 {
1334
1335 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1336 {
1337 huart->TxISR = UART_TxISR_16BIT;
1338 }
1339 else
1340 {
1341 huart->TxISR = UART_TxISR_8BIT;
1342 }
1343
1344
1345 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
1346 }
1347
1348 return HAL_OK;
1349 }
1350 else
1351 {
1352 return HAL_BUSY;
1353 }
1354 }
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1367 {
1368
1369 if (huart->RxState == HAL_UART_STATE_READY)
1370 {
1371 if ((pData == NULL) || (Size == 0U))
1372 {
1373 return HAL_ERROR;
1374 }
1375
1376
1377 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1378
1379 if (!(IS_LPUART_INSTANCE(huart->Instance)))
1380 {
1381
1382 if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
1383 {
1384
1385 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
1386 }
1387 }
1388
1389 return (UART_Start_Receive_IT(huart, pData, Size));
1390 }
1391 else
1392 {
1393 return HAL_BUSY;
1394 }
1395 }
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
1408 {
1409
1410 if (huart->gState == HAL_UART_STATE_READY)
1411 {
1412 if ((pData == NULL) || (Size == 0U))
1413 {
1414 return HAL_ERROR;
1415 }
1416
1417 huart->pTxBuffPtr = pData;
1418 huart->TxXferSize = Size;
1419 huart->TxXferCount = Size;
1420
1421 huart->ErrorCode = HAL_UART_ERROR_NONE;
1422 huart->gState = HAL_UART_STATE_BUSY_TX;
1423
1424 if (huart->hdmatx != NULL)
1425 {
1426
1427 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
1428
1429
1430 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
1431
1432
1433 huart->hdmatx->XferErrorCallback = UART_DMAError;
1434
1435
1436 huart->hdmatx->XferAbortCallback = NULL;
1437
1438
1439 if (HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size) != HAL_OK)
1440 {
1441
1442 huart->ErrorCode = HAL_UART_ERROR_DMA;
1443
1444
1445 huart->gState = HAL_UART_STATE_READY;
1446
1447 return HAL_ERROR;
1448 }
1449 }
1450
1451 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF);
1452
1453
1454
1455 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1456
1457 return HAL_OK;
1458 }
1459 else
1460 {
1461 return HAL_BUSY;
1462 }
1463 }
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1478 {
1479
1480 if (huart->RxState == HAL_UART_STATE_READY)
1481 {
1482 if ((pData == NULL) || (Size == 0U))
1483 {
1484 return HAL_ERROR;
1485 }
1486
1487
1488 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1489
1490 if (!(IS_LPUART_INSTANCE(huart->Instance)))
1491 {
1492
1493 if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
1494 {
1495
1496 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
1497 }
1498 }
1499
1500 return (UART_Start_Receive_DMA(huart, pData, Size));
1501 }
1502 else
1503 {
1504 return HAL_BUSY;
1505 }
1506 }
1507
1508
1509
1510
1511
1512
1513 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
1514 {
1515 const HAL_UART_StateTypeDef gstate = huart->gState;
1516 const HAL_UART_StateTypeDef rxstate = huart->RxState;
1517
1518 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
1519 (gstate == HAL_UART_STATE_BUSY_TX))
1520 {
1521
1522 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1523 }
1524 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
1525 (rxstate == HAL_UART_STATE_BUSY_RX))
1526 {
1527
1528 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1529 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1530
1531
1532 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1533 }
1534
1535 return HAL_OK;
1536 }
1537
1538
1539
1540
1541
1542
1543 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
1544 {
1545 if (huart->gState == HAL_UART_STATE_BUSY_TX)
1546 {
1547
1548 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1549 }
1550 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
1551 {
1552
1553 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
1554
1555
1556 if (huart->Init.Parity != UART_PARITY_NONE)
1557 {
1558 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1559 }
1560 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
1561
1562
1563 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1564 }
1565
1566 return HAL_OK;
1567 }
1568
1569
1570
1571
1572
1573
1574 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
1575 {
1576
1577
1578
1579
1580
1581
1582
1583 const HAL_UART_StateTypeDef gstate = huart->gState;
1584 const HAL_UART_StateTypeDef rxstate = huart->RxState;
1585
1586
1587 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
1588 (gstate == HAL_UART_STATE_BUSY_TX))
1589 {
1590 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1591
1592
1593 if (huart->hdmatx != NULL)
1594 {
1595 if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1596 {
1597 if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1598 {
1599
1600 huart->ErrorCode = HAL_UART_ERROR_DMA;
1601
1602 return HAL_TIMEOUT;
1603 }
1604 }
1605 }
1606
1607 UART_EndTxTransfer(huart);
1608 }
1609
1610
1611 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
1612 (rxstate == HAL_UART_STATE_BUSY_RX))
1613 {
1614 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1615
1616
1617 if (huart->hdmarx != NULL)
1618 {
1619 if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1620 {
1621 if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1622 {
1623
1624 huart->ErrorCode = HAL_UART_ERROR_DMA;
1625
1626 return HAL_TIMEOUT;
1627 }
1628 }
1629 }
1630
1631 UART_EndRxTransfer(huart);
1632 }
1633
1634 return HAL_OK;
1635 }
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
1650 {
1651
1652 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE |
1653 USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE));
1654 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE);
1655
1656
1657 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
1658 {
1659 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
1660 }
1661
1662
1663 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1664 {
1665
1666 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1667
1668
1669 if (huart->hdmatx != NULL)
1670 {
1671
1672
1673 huart->hdmatx->XferAbortCallback = NULL;
1674
1675 if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1676 {
1677 if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1678 {
1679
1680 huart->ErrorCode = HAL_UART_ERROR_DMA;
1681
1682 return HAL_TIMEOUT;
1683 }
1684 }
1685 }
1686 }
1687
1688
1689 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1690 {
1691
1692 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1693
1694
1695 if (huart->hdmarx != NULL)
1696 {
1697
1698
1699 huart->hdmarx->XferAbortCallback = NULL;
1700
1701 if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1702 {
1703 if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1704 {
1705
1706 huart->ErrorCode = HAL_UART_ERROR_DMA;
1707
1708 return HAL_TIMEOUT;
1709 }
1710 }
1711 }
1712 }
1713
1714
1715 huart->TxXferCount = 0U;
1716 huart->RxXferCount = 0U;
1717
1718
1719 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
1720
1721
1722 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1723 {
1724 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
1725 }
1726
1727
1728 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
1729
1730
1731 huart->gState = HAL_UART_STATE_READY;
1732 huart->RxState = HAL_UART_STATE_READY;
1733 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1734
1735 huart->ErrorCode = HAL_UART_ERROR_NONE;
1736
1737 return HAL_OK;
1738 }
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
1753 {
1754
1755 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE));
1756 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
1757
1758
1759 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1760 {
1761
1762 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1763
1764
1765 if (huart->hdmatx != NULL)
1766 {
1767
1768
1769 huart->hdmatx->XferAbortCallback = NULL;
1770
1771 if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1772 {
1773 if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1774 {
1775
1776 huart->ErrorCode = HAL_UART_ERROR_DMA;
1777
1778 return HAL_TIMEOUT;
1779 }
1780 }
1781 }
1782 }
1783
1784
1785 huart->TxXferCount = 0U;
1786
1787
1788 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1789 {
1790 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
1791 }
1792
1793
1794 huart->gState = HAL_UART_STATE_READY;
1795
1796 return HAL_OK;
1797 }
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
1812 {
1813
1814 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE));
1815 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE);
1816
1817
1818 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
1819 {
1820 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
1821 }
1822
1823
1824 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1825 {
1826
1827 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1828
1829
1830 if (huart->hdmarx != NULL)
1831 {
1832
1833
1834 huart->hdmarx->XferAbortCallback = NULL;
1835
1836 if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1837 {
1838 if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1839 {
1840
1841 huart->ErrorCode = HAL_UART_ERROR_DMA;
1842
1843 return HAL_TIMEOUT;
1844 }
1845 }
1846 }
1847 }
1848
1849
1850 huart->RxXferCount = 0U;
1851
1852
1853 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
1854
1855
1856 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
1857
1858
1859 huart->RxState = HAL_UART_STATE_READY;
1860 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1861
1862 return HAL_OK;
1863 }
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
1880 {
1881 uint32_t abortcplt = 1U;
1882
1883
1884 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_TCIE | USART_CR1_RXNEIE_RXFNEIE |
1885 USART_CR1_TXEIE_TXFNFIE));
1886 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE));
1887
1888
1889 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
1890 {
1891 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
1892 }
1893
1894
1895
1896
1897 if (huart->hdmatx != NULL)
1898 {
1899
1900
1901 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1902 {
1903 huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback;
1904 }
1905 else
1906 {
1907 huart->hdmatx->XferAbortCallback = NULL;
1908 }
1909 }
1910
1911 if (huart->hdmarx != NULL)
1912 {
1913
1914
1915 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1916 {
1917 huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback;
1918 }
1919 else
1920 {
1921 huart->hdmarx->XferAbortCallback = NULL;
1922 }
1923 }
1924
1925
1926 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1927 {
1928
1929 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1930
1931
1932 if (huart->hdmatx != NULL)
1933 {
1934
1935
1936
1937
1938 if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
1939 {
1940 huart->hdmatx->XferAbortCallback = NULL;
1941 }
1942 else
1943 {
1944 abortcplt = 0U;
1945 }
1946 }
1947 }
1948
1949
1950 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1951 {
1952
1953 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1954
1955
1956 if (huart->hdmarx != NULL)
1957 {
1958
1959
1960
1961
1962 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
1963 {
1964 huart->hdmarx->XferAbortCallback = NULL;
1965 abortcplt = 1U;
1966 }
1967 else
1968 {
1969 abortcplt = 0U;
1970 }
1971 }
1972 }
1973
1974
1975 if (abortcplt == 1U)
1976 {
1977
1978 huart->TxXferCount = 0U;
1979 huart->RxXferCount = 0U;
1980
1981
1982 huart->RxISR = NULL;
1983 huart->TxISR = NULL;
1984
1985
1986 huart->ErrorCode = HAL_UART_ERROR_NONE;
1987
1988
1989 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
1990
1991
1992 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1993 {
1994 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
1995 }
1996
1997
1998 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
1999
2000
2001 huart->gState = HAL_UART_STATE_READY;
2002 huart->RxState = HAL_UART_STATE_READY;
2003 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2004
2005
2006 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2007
2008 huart->AbortCpltCallback(huart);
2009 #else
2010
2011 HAL_UART_AbortCpltCallback(huart);
2012 #endif
2013 }
2014
2015 return HAL_OK;
2016 }
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
2033 {
2034
2035 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE));
2036 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
2037
2038
2039 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
2040 {
2041
2042 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
2043
2044
2045 if (huart->hdmatx != NULL)
2046 {
2047
2048
2049 huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback;
2050
2051
2052 if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
2053 {
2054
2055 huart->hdmatx->XferAbortCallback(huart->hdmatx);
2056 }
2057 }
2058 else
2059 {
2060
2061 huart->TxXferCount = 0U;
2062
2063
2064 huart->TxISR = NULL;
2065
2066
2067 huart->gState = HAL_UART_STATE_READY;
2068
2069
2070 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2071
2072 huart->AbortTransmitCpltCallback(huart);
2073 #else
2074
2075 HAL_UART_AbortTransmitCpltCallback(huart);
2076 #endif
2077 }
2078 }
2079 else
2080 {
2081
2082 huart->TxXferCount = 0U;
2083
2084
2085 huart->TxISR = NULL;
2086
2087
2088 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
2089 {
2090 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
2091 }
2092
2093
2094 huart->gState = HAL_UART_STATE_READY;
2095
2096
2097 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2098
2099 huart->AbortTransmitCpltCallback(huart);
2100 #else
2101
2102 HAL_UART_AbortTransmitCpltCallback(huart);
2103 #endif
2104 }
2105
2106 return HAL_OK;
2107 }
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
2124 {
2125
2126 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE));
2127 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
2128
2129
2130 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
2131 {
2132 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
2133 }
2134
2135
2136 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2137 {
2138
2139 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2140
2141
2142 if (huart->hdmarx != NULL)
2143 {
2144
2145
2146 huart->hdmarx->XferAbortCallback = UART_DMARxOnlyAbortCallback;
2147
2148
2149 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2150 {
2151
2152 huart->hdmarx->XferAbortCallback(huart->hdmarx);
2153 }
2154 }
2155 else
2156 {
2157
2158 huart->RxXferCount = 0U;
2159
2160
2161 huart->pRxBuffPtr = NULL;
2162
2163
2164 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
2165
2166
2167 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
2168
2169
2170 huart->RxState = HAL_UART_STATE_READY;
2171 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2172
2173
2174 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2175
2176 huart->AbortReceiveCpltCallback(huart);
2177 #else
2178
2179 HAL_UART_AbortReceiveCpltCallback(huart);
2180 #endif
2181 }
2182 }
2183 else
2184 {
2185
2186 huart->RxXferCount = 0U;
2187
2188
2189 huart->pRxBuffPtr = NULL;
2190
2191
2192 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
2193
2194
2195 huart->RxState = HAL_UART_STATE_READY;
2196 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2197
2198
2199 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2200
2201 huart->AbortReceiveCpltCallback(huart);
2202 #else
2203
2204 HAL_UART_AbortReceiveCpltCallback(huart);
2205 #endif
2206 }
2207
2208 return HAL_OK;
2209 }
2210
2211
2212
2213
2214
2215
2216 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
2217 {
2218 uint32_t isrflags = READ_REG(huart->Instance->ISR);
2219 uint32_t cr1its = READ_REG(huart->Instance->CR1);
2220 uint32_t cr3its = READ_REG(huart->Instance->CR3);
2221
2222 uint32_t errorflags;
2223 uint32_t errorcode;
2224
2225
2226 errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF));
2227 if (errorflags == 0U)
2228 {
2229
2230 if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
2231 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
2232 || ((cr3its & USART_CR3_RXFTIE) != 0U)))
2233 {
2234 if (huart->RxISR != NULL)
2235 {
2236 huart->RxISR(huart);
2237 }
2238 return;
2239 }
2240 }
2241
2242
2243 if ((errorflags != 0U)
2244 && ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)
2245 || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))))
2246 {
2247
2248 if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
2249 {
2250 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
2251
2252 huart->ErrorCode |= HAL_UART_ERROR_PE;
2253 }
2254
2255
2256 if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
2257 {
2258 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
2259
2260 huart->ErrorCode |= HAL_UART_ERROR_FE;
2261 }
2262
2263
2264 if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
2265 {
2266 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
2267
2268 huart->ErrorCode |= HAL_UART_ERROR_NE;
2269 }
2270
2271
2272 if (((isrflags & USART_ISR_ORE) != 0U)
2273 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
2274 ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)))
2275 {
2276 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
2277
2278 huart->ErrorCode |= HAL_UART_ERROR_ORE;
2279 }
2280
2281
2282 if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U))
2283 {
2284 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
2285
2286 huart->ErrorCode |= HAL_UART_ERROR_RTO;
2287 }
2288
2289
2290 if (huart->ErrorCode != HAL_UART_ERROR_NONE)
2291 {
2292
2293 if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
2294 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
2295 || ((cr3its & USART_CR3_RXFTIE) != 0U)))
2296 {
2297 if (huart->RxISR != NULL)
2298 {
2299 huart->RxISR(huart);
2300 }
2301 }
2302
2303
2304
2305
2306
2307
2308 errorcode = huart->ErrorCode;
2309 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
2310 ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U))
2311 {
2312
2313
2314
2315 UART_EndRxTransfer(huart);
2316
2317
2318 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2319 {
2320
2321 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2322
2323
2324 if (huart->hdmarx != NULL)
2325 {
2326
2327
2328 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
2329
2330
2331 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2332 {
2333
2334 huart->hdmarx->XferAbortCallback(huart->hdmarx);
2335 }
2336 }
2337 else
2338 {
2339
2340 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2341
2342 huart->ErrorCallback(huart);
2343 #else
2344
2345 HAL_UART_ErrorCallback(huart);
2346 #endif
2347
2348 }
2349 }
2350 else
2351 {
2352
2353 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2354
2355 huart->ErrorCallback(huart);
2356 #else
2357
2358 HAL_UART_ErrorCallback(huart);
2359 #endif
2360 }
2361 }
2362 else
2363 {
2364
2365
2366 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2367
2368 huart->ErrorCallback(huart);
2369 #else
2370
2371 HAL_UART_ErrorCallback(huart);
2372 #endif
2373 huart->ErrorCode = HAL_UART_ERROR_NONE;
2374 }
2375 }
2376 return;
2377
2378 }
2379
2380
2381
2382 if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
2383 && ((isrflags & USART_ISR_IDLE) != 0U)
2384 && ((cr1its & USART_ISR_IDLE) != 0U))
2385 {
2386 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
2387
2388
2389 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2390 {
2391
2392
2393
2394
2395 uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx);
2396 if ((nb_remaining_rx_data > 0U)
2397 && (nb_remaining_rx_data < huart->RxXferSize))
2398 {
2399
2400 huart->RxXferCount = nb_remaining_rx_data;
2401
2402
2403 if (huart->hdmarx->Init.Mode != DMA_CIRCULAR)
2404 {
2405
2406 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
2407 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
2408
2409
2410
2411 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2412
2413
2414 huart->RxState = HAL_UART_STATE_READY;
2415 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2416
2417 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
2418
2419
2420 (void)HAL_DMA_Abort(huart->hdmarx);
2421 }
2422
2423
2424
2425 huart->RxEventType = HAL_UART_RXEVENT_IDLE;
2426
2427 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2428
2429 huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
2430 #else
2431
2432 HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
2433 #endif
2434 }
2435 return;
2436 }
2437 else
2438 {
2439
2440
2441
2442 uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount;
2443 if ((huart->RxXferCount > 0U)
2444 && (nb_rx_data > 0U))
2445 {
2446
2447 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
2448
2449
2450 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
2451
2452
2453 huart->RxState = HAL_UART_STATE_READY;
2454 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2455
2456
2457 huart->RxISR = NULL;
2458
2459 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
2460
2461
2462
2463 huart->RxEventType = HAL_UART_RXEVENT_IDLE;
2464
2465 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2466
2467 huart->RxEventCallback(huart, nb_rx_data);
2468 #else
2469
2470 HAL_UARTEx_RxEventCallback(huart, nb_rx_data);
2471 #endif
2472 }
2473 return;
2474 }
2475 }
2476
2477
2478 if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U))
2479 {
2480 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF);
2481
2482
2483
2484
2485 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2486
2487 huart->WakeupCallback(huart);
2488 #else
2489
2490 HAL_UARTEx_WakeupCallback(huart);
2491 #endif
2492 return;
2493 }
2494
2495
2496 if (((isrflags & USART_ISR_TXE_TXFNF) != 0U)
2497 && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U)
2498 || ((cr3its & USART_CR3_TXFTIE) != 0U)))
2499 {
2500 if (huart->TxISR != NULL)
2501 {
2502 huart->TxISR(huart);
2503 }
2504 return;
2505 }
2506
2507
2508 if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
2509 {
2510 UART_EndTransmit_IT(huart);
2511 return;
2512 }
2513
2514
2515 if (((isrflags & USART_ISR_TXFE) != 0U) && ((cr1its & USART_CR1_TXFEIE) != 0U))
2516 {
2517 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2518
2519 huart->TxFifoEmptyCallback(huart);
2520 #else
2521
2522 HAL_UARTEx_TxFifoEmptyCallback(huart);
2523 #endif
2524 return;
2525 }
2526
2527
2528 if (((isrflags & USART_ISR_RXFF) != 0U) && ((cr1its & USART_CR1_RXFFIE) != 0U))
2529 {
2530 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2531
2532 huart->RxFifoFullCallback(huart);
2533 #else
2534
2535 HAL_UARTEx_RxFifoFullCallback(huart);
2536 #endif
2537 return;
2538 }
2539 }
2540
2541
2542
2543
2544
2545
2546 __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
2547 {
2548
2549 UNUSED(huart);
2550
2551
2552
2553
2554 }
2555
2556
2557
2558
2559
2560
2561 __weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
2562 {
2563
2564 UNUSED(huart);
2565
2566
2567
2568
2569 }
2570
2571
2572
2573
2574
2575
2576 __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
2577 {
2578
2579 UNUSED(huart);
2580
2581
2582
2583
2584 }
2585
2586
2587
2588
2589
2590
2591 __weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
2592 {
2593
2594 UNUSED(huart);
2595
2596
2597
2598
2599 }
2600
2601
2602
2603
2604
2605
2606 __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
2607 {
2608
2609 UNUSED(huart);
2610
2611
2612
2613
2614 }
2615
2616
2617
2618
2619
2620
2621 __weak void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart)
2622 {
2623
2624 UNUSED(huart);
2625
2626
2627
2628
2629 }
2630
2631
2632
2633
2634
2635
2636 __weak void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart)
2637 {
2638
2639 UNUSED(huart);
2640
2641
2642
2643
2644 }
2645
2646
2647
2648
2649
2650
2651 __weak void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart)
2652 {
2653
2654 UNUSED(huart);
2655
2656
2657
2658
2659 }
2660
2661
2662
2663
2664
2665
2666
2667
2668 __weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size)
2669 {
2670
2671 UNUSED(huart);
2672 UNUSED(Size);
2673
2674
2675
2676
2677 }
2678
2679
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694
2695
2696
2697
2698
2699
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue)
2718 {
2719 if (!(IS_LPUART_INSTANCE(huart->Instance)))
2720 {
2721 assert_param(IS_UART_RECEIVER_TIMEOUT_VALUE(TimeoutValue));
2722 MODIFY_REG(huart->Instance->RTOR, USART_RTOR_RTO, TimeoutValue);
2723 }
2724 }
2725
2726
2727
2728
2729
2730
2731
2732 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart)
2733 {
2734 if (!(IS_LPUART_INSTANCE(huart->Instance)))
2735 {
2736 if (huart->gState == HAL_UART_STATE_READY)
2737 {
2738
2739 __HAL_LOCK(huart);
2740
2741 huart->gState = HAL_UART_STATE_BUSY;
2742
2743
2744 SET_BIT(huart->Instance->CR2, USART_CR2_RTOEN);
2745
2746 huart->gState = HAL_UART_STATE_READY;
2747
2748
2749 __HAL_UNLOCK(huart);
2750
2751 return HAL_OK;
2752 }
2753 else
2754 {
2755 return HAL_BUSY;
2756 }
2757 }
2758 else
2759 {
2760 return HAL_ERROR;
2761 }
2762 }
2763
2764
2765
2766
2767
2768
2769
2770 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart)
2771 {
2772 if (!(IS_LPUART_INSTANCE(huart->Instance)))
2773 {
2774 if (huart->gState == HAL_UART_STATE_READY)
2775 {
2776
2777 __HAL_LOCK(huart);
2778
2779 huart->gState = HAL_UART_STATE_BUSY;
2780
2781
2782 CLEAR_BIT(huart->Instance->CR2, USART_CR2_RTOEN);
2783
2784 huart->gState = HAL_UART_STATE_READY;
2785
2786
2787 __HAL_UNLOCK(huart);
2788
2789 return HAL_OK;
2790 }
2791 else
2792 {
2793 return HAL_BUSY;
2794 }
2795 }
2796 else
2797 {
2798 return HAL_ERROR;
2799 }
2800 }
2801
2802
2803
2804
2805
2806
2807
2808 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart)
2809 {
2810 __HAL_LOCK(huart);
2811
2812 huart->gState = HAL_UART_STATE_BUSY;
2813
2814
2815 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_MME);
2816
2817 huart->gState = HAL_UART_STATE_READY;
2818
2819 return (UART_CheckIdleState(huart));
2820 }
2821
2822
2823
2824
2825
2826
2827
2828 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart)
2829 {
2830 __HAL_LOCK(huart);
2831
2832 huart->gState = HAL_UART_STATE_BUSY;
2833
2834
2835 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME);
2836
2837 huart->gState = HAL_UART_STATE_READY;
2838
2839 return (UART_CheckIdleState(huart));
2840 }
2841
2842
2843
2844
2845
2846
2847
2848 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
2849 {
2850 __HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST);
2851 }
2852
2853
2854
2855
2856
2857
2858 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
2859 {
2860 __HAL_LOCK(huart);
2861 huart->gState = HAL_UART_STATE_BUSY;
2862
2863
2864 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
2865
2866
2867 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TE);
2868
2869 huart->gState = HAL_UART_STATE_READY;
2870
2871 __HAL_UNLOCK(huart);
2872
2873 return HAL_OK;
2874 }
2875
2876
2877
2878
2879
2880
2881 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
2882 {
2883 __HAL_LOCK(huart);
2884 huart->gState = HAL_UART_STATE_BUSY;
2885
2886
2887 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
2888
2889
2890 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RE);
2891
2892 huart->gState = HAL_UART_STATE_READY;
2893
2894 __HAL_UNLOCK(huart);
2895
2896 return HAL_OK;
2897 }
2898
2899
2900
2901
2902
2903
2904
2905 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
2906 {
2907
2908 assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
2909
2910 __HAL_LOCK(huart);
2911
2912 huart->gState = HAL_UART_STATE_BUSY;
2913
2914
2915 __HAL_UART_SEND_REQ(huart, UART_SENDBREAK_REQUEST);
2916
2917 huart->gState = HAL_UART_STATE_READY;
2918
2919 __HAL_UNLOCK(huart);
2920
2921 return HAL_OK;
2922 }
2923
2924
2925
2926
2927
2928
2929
2930
2931
2932
2933
2934
2935
2936
2937
2938
2939
2940
2941
2942
2943
2944
2945
2946
2947
2948
2949
2950
2951 HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart)
2952 {
2953 uint32_t temp1;
2954 uint32_t temp2;
2955 temp1 = huart->gState;
2956 temp2 = huart->RxState;
2957
2958 return (HAL_UART_StateTypeDef)(temp1 | temp2);
2959 }
2960
2961
2962
2963
2964
2965
2966
2967 uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart)
2968 {
2969 return huart->ErrorCode;
2970 }
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985
2986
2987
2988
2989 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2990 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart)
2991 {
2992
2993 huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback;
2994 huart->TxCpltCallback = HAL_UART_TxCpltCallback;
2995 huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback;
2996 huart->RxCpltCallback = HAL_UART_RxCpltCallback;
2997 huart->ErrorCallback = HAL_UART_ErrorCallback;
2998 huart->AbortCpltCallback = HAL_UART_AbortCpltCallback;
2999 huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback;
3000 huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback;
3001 huart->WakeupCallback = HAL_UARTEx_WakeupCallback;
3002 huart->RxFifoFullCallback = HAL_UARTEx_RxFifoFullCallback;
3003 huart->TxFifoEmptyCallback = HAL_UARTEx_TxFifoEmptyCallback;
3004 huart->RxEventCallback = HAL_UARTEx_RxEventCallback;
3005
3006 }
3007 #endif
3008
3009
3010
3011
3012
3013
3014 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
3015 {
3016 uint32_t tmpreg;
3017 uint16_t brrtemp;
3018 UART_ClockSourceTypeDef clocksource;
3019 uint32_t usartdiv;
3020 HAL_StatusTypeDef ret = HAL_OK;
3021 uint32_t lpuart_ker_ck_pres;
3022 PLL2_ClocksTypeDef pll2_clocks;
3023 PLL3_ClocksTypeDef pll3_clocks;
3024 uint32_t pclk;
3025
3026
3027 assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
3028 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
3029 if (UART_INSTANCE_LOWPOWER(huart))
3030 {
3031 assert_param(IS_LPUART_STOPBITS(huart->Init.StopBits));
3032 }
3033 else
3034 {
3035 assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
3036 assert_param(IS_UART_ONE_BIT_SAMPLE(huart->Init.OneBitSampling));
3037 }
3038
3039 assert_param(IS_UART_PARITY(huart->Init.Parity));
3040 assert_param(IS_UART_MODE(huart->Init.Mode));
3041 assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
3042 assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
3043 assert_param(IS_UART_PRESCALER(huart->Init.ClockPrescaler));
3044
3045
3046
3047
3048
3049
3050
3051
3052 tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
3053 MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
3054
3055
3056
3057
3058 MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
3059
3060
3061
3062
3063
3064
3065
3066 tmpreg = (uint32_t)huart->Init.HwFlowCtl;
3067
3068 if (!(UART_INSTANCE_LOWPOWER(huart)))
3069 {
3070 tmpreg |= huart->Init.OneBitSampling;
3071 }
3072 MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
3073
3074
3075
3076
3077 MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler);
3078
3079
3080 UART_GETCLOCKSOURCE(huart, clocksource);
3081
3082
3083 if (UART_INSTANCE_LOWPOWER(huart))
3084 {
3085
3086 switch (clocksource)
3087 {
3088 case UART_CLOCKSOURCE_D3PCLK1:
3089 pclk = HAL_RCCEx_GetD3PCLK1Freq();
3090 break;
3091 case UART_CLOCKSOURCE_PLL2:
3092 HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
3093 pclk = pll2_clocks.PLL2_Q_Frequency;
3094 break;
3095 case UART_CLOCKSOURCE_PLL3:
3096 HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
3097 pclk = pll3_clocks.PLL3_Q_Frequency;
3098 break;
3099 case UART_CLOCKSOURCE_HSI:
3100 if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
3101 {
3102 pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
3103 }
3104 else
3105 {
3106 pclk = (uint32_t) HSI_VALUE;
3107 }
3108 break;
3109 case UART_CLOCKSOURCE_CSI:
3110 pclk = (uint32_t) CSI_VALUE;
3111 break;
3112 case UART_CLOCKSOURCE_LSE:
3113 pclk = (uint32_t) LSE_VALUE;
3114 break;
3115 default:
3116 pclk = 0U;
3117 ret = HAL_ERROR;
3118 break;
3119 }
3120
3121
3122 if (pclk != 0U)
3123 {
3124
3125 lpuart_ker_ck_pres = (pclk / UARTPrescTable[huart->Init.ClockPrescaler]);
3126
3127
3128 if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
3129 (lpuart_ker_ck_pres > (4096U * huart->Init.BaudRate)))
3130 {
3131 ret = HAL_ERROR;
3132 }
3133 else
3134 {
3135
3136
3137 usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3138 if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX))
3139 {
3140 huart->Instance->BRR = usartdiv;
3141 }
3142 else
3143 {
3144 ret = HAL_ERROR;
3145 }
3146 }
3147
3148 }
3149 }
3150
3151 else if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
3152 {
3153 switch (clocksource)
3154 {
3155 case UART_CLOCKSOURCE_D2PCLK1:
3156 pclk = HAL_RCC_GetPCLK1Freq();
3157 break;
3158 case UART_CLOCKSOURCE_D2PCLK2:
3159 pclk = HAL_RCC_GetPCLK2Freq();
3160 break;
3161 case UART_CLOCKSOURCE_PLL2:
3162 HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
3163 pclk = pll2_clocks.PLL2_Q_Frequency;
3164 break;
3165 case UART_CLOCKSOURCE_PLL3:
3166 HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
3167 pclk = pll3_clocks.PLL3_Q_Frequency;
3168 break;
3169 case UART_CLOCKSOURCE_HSI:
3170 if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
3171 {
3172 pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
3173 }
3174 else
3175 {
3176 pclk = (uint32_t) HSI_VALUE;
3177 }
3178 break;
3179 case UART_CLOCKSOURCE_CSI:
3180 pclk = (uint32_t) CSI_VALUE;
3181 break;
3182 case UART_CLOCKSOURCE_LSE:
3183 pclk = (uint32_t) LSE_VALUE;
3184 break;
3185 default:
3186 pclk = 0U;
3187 ret = HAL_ERROR;
3188 break;
3189 }
3190
3191
3192 if (pclk != 0U)
3193 {
3194 usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3195 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
3196 {
3197 brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
3198 brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
3199 huart->Instance->BRR = brrtemp;
3200 }
3201 else
3202 {
3203 ret = HAL_ERROR;
3204 }
3205 }
3206 }
3207 else
3208 {
3209 switch (clocksource)
3210 {
3211 case UART_CLOCKSOURCE_D2PCLK1:
3212 pclk = HAL_RCC_GetPCLK1Freq();
3213 break;
3214 case UART_CLOCKSOURCE_D2PCLK2:
3215 pclk = HAL_RCC_GetPCLK2Freq();
3216 break;
3217 case UART_CLOCKSOURCE_PLL2:
3218 HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
3219 pclk = pll2_clocks.PLL2_Q_Frequency;
3220 break;
3221 case UART_CLOCKSOURCE_PLL3:
3222 HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
3223 pclk = pll3_clocks.PLL3_Q_Frequency;
3224 break;
3225 case UART_CLOCKSOURCE_HSI:
3226 if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
3227 {
3228 pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
3229 }
3230 else
3231 {
3232 pclk = (uint32_t) HSI_VALUE;
3233 }
3234 break;
3235 case UART_CLOCKSOURCE_CSI:
3236 pclk = (uint32_t) CSI_VALUE;
3237 break;
3238 case UART_CLOCKSOURCE_LSE:
3239 pclk = (uint32_t) LSE_VALUE;
3240 break;
3241 default:
3242 pclk = 0U;
3243 ret = HAL_ERROR;
3244 break;
3245 }
3246
3247 if (pclk != 0U)
3248 {
3249
3250 usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3251 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
3252 {
3253 huart->Instance->BRR = (uint16_t)usartdiv;
3254 }
3255 else
3256 {
3257 ret = HAL_ERROR;
3258 }
3259 }
3260 }
3261
3262
3263 huart->NbTxDataToProcess = 1;
3264 huart->NbRxDataToProcess = 1;
3265
3266
3267 huart->RxISR = NULL;
3268 huart->TxISR = NULL;
3269
3270 return ret;
3271 }
3272
3273
3274
3275
3276
3277
3278 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
3279 {
3280
3281 assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
3282
3283
3284 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
3285 {
3286 assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
3287 MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
3288 }
3289
3290
3291 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
3292 {
3293 assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
3294 MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
3295 }
3296
3297
3298 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
3299 {
3300 assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
3301 MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
3302 }
3303
3304
3305 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
3306 {
3307 assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
3308 MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
3309 }
3310
3311
3312 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
3313 {
3314 assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
3315 MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
3316 }
3317
3318
3319 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
3320 {
3321 assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
3322 MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
3323 }
3324
3325
3326 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
3327 {
3328 assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
3329 assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
3330 MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
3331
3332 if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
3333 {
3334 assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
3335 MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
3336 }
3337 }
3338
3339
3340 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
3341 {
3342 assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
3343 MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
3344 }
3345 }
3346
3347
3348
3349
3350
3351
3352 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
3353 {
3354 uint32_t tickstart;
3355
3356
3357 huart->ErrorCode = HAL_UART_ERROR_NONE;
3358
3359
3360 tickstart = HAL_GetTick();
3361
3362
3363 if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
3364 {
3365
3366 if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
3367 {
3368
3369 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE));
3370
3371 huart->gState = HAL_UART_STATE_READY;
3372
3373 __HAL_UNLOCK(huart);
3374
3375
3376 return HAL_TIMEOUT;
3377 }
3378 }
3379
3380
3381 if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
3382 {
3383
3384 if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
3385 {
3386
3387
3388 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
3389 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3390
3391 huart->RxState = HAL_UART_STATE_READY;
3392
3393 __HAL_UNLOCK(huart);
3394
3395
3396 return HAL_TIMEOUT;
3397 }
3398 }
3399
3400
3401 huart->gState = HAL_UART_STATE_READY;
3402 huart->RxState = HAL_UART_STATE_READY;
3403 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
3404 huart->RxEventType = HAL_UART_RXEVENT_TC;
3405
3406 __HAL_UNLOCK(huart);
3407
3408 return HAL_OK;
3409 }
3410
3411
3412
3413
3414
3415
3416
3417
3418
3419
3420
3421 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
3422 uint32_t Tickstart, uint32_t Timeout)
3423 {
3424
3425 while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
3426 {
3427
3428 if (Timeout != HAL_MAX_DELAY)
3429 {
3430 if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
3431 {
3432
3433 return HAL_TIMEOUT;
3434 }
3435
3436 if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
3437 {
3438 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
3439 {
3440
3441 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
3442
3443
3444
3445
3446 UART_EndRxTransfer(huart);
3447
3448 huart->ErrorCode = HAL_UART_ERROR_ORE;
3449
3450
3451 __HAL_UNLOCK(huart);
3452
3453 return HAL_ERROR;
3454 }
3455 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
3456 {
3457
3458 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
3459
3460
3461
3462
3463 UART_EndRxTransfer(huart);
3464
3465 huart->ErrorCode = HAL_UART_ERROR_RTO;
3466
3467
3468 __HAL_UNLOCK(huart);
3469
3470 return HAL_TIMEOUT;
3471 }
3472 }
3473 }
3474 }
3475 return HAL_OK;
3476 }
3477
3478
3479
3480
3481
3482
3483
3484
3485
3486
3487
3488
3489 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
3490 {
3491 huart->pRxBuffPtr = pData;
3492 huart->RxXferSize = Size;
3493 huart->RxXferCount = Size;
3494 huart->RxISR = NULL;
3495
3496
3497 UART_MASK_COMPUTATION(huart);
3498
3499 huart->ErrorCode = HAL_UART_ERROR_NONE;
3500 huart->RxState = HAL_UART_STATE_BUSY_RX;
3501
3502
3503 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
3504
3505
3506 if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess))
3507 {
3508
3509 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
3510 {
3511 huart->RxISR = UART_RxISR_16BIT_FIFOEN;
3512 }
3513 else
3514 {
3515 huart->RxISR = UART_RxISR_8BIT_FIFOEN;
3516 }
3517
3518
3519 if (huart->Init.Parity != UART_PARITY_NONE)
3520 {
3521 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3522 }
3523 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
3524 }
3525 else
3526 {
3527
3528 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
3529 {
3530 huart->RxISR = UART_RxISR_16BIT;
3531 }
3532 else
3533 {
3534 huart->RxISR = UART_RxISR_8BIT;
3535 }
3536
3537
3538 if (huart->Init.Parity != UART_PARITY_NONE)
3539 {
3540 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
3541 }
3542 else
3543 {
3544 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
3545 }
3546 }
3547 return HAL_OK;
3548 }
3549
3550
3551
3552
3553
3554
3555
3556
3557
3558
3559
3560
3561 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
3562 {
3563 huart->pRxBuffPtr = pData;
3564 huart->RxXferSize = Size;
3565
3566 huart->ErrorCode = HAL_UART_ERROR_NONE;
3567 huart->RxState = HAL_UART_STATE_BUSY_RX;
3568
3569 if (huart->hdmarx != NULL)
3570 {
3571
3572 huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
3573
3574
3575 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
3576
3577
3578 huart->hdmarx->XferErrorCallback = UART_DMAError;
3579
3580
3581 huart->hdmarx->XferAbortCallback = NULL;
3582
3583
3584 if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size) != HAL_OK)
3585 {
3586
3587 huart->ErrorCode = HAL_UART_ERROR_DMA;
3588
3589
3590 huart->RxState = HAL_UART_STATE_READY;
3591
3592 return HAL_ERROR;
3593 }
3594 }
3595
3596
3597 if (huart->Init.Parity != UART_PARITY_NONE)
3598 {
3599 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3600 }
3601
3602
3603 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
3604
3605
3606
3607 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
3608
3609 return HAL_OK;
3610 }
3611
3612
3613
3614
3615
3616
3617
3618 static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
3619 {
3620
3621 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE));
3622 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_TXFTIE));
3623
3624
3625 huart->gState = HAL_UART_STATE_READY;
3626 }
3627
3628
3629
3630
3631
3632
3633
3634 static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
3635 {
3636
3637 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
3638 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
3639
3640
3641 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
3642 {
3643 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
3644 }
3645
3646
3647 huart->RxState = HAL_UART_STATE_READY;
3648 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
3649
3650
3651 huart->RxISR = NULL;
3652 }
3653
3654
3655
3656
3657
3658
3659
3660 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
3661 {
3662 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3663
3664
3665 if (hdma->Init.Mode != DMA_CIRCULAR)
3666 {
3667 huart->TxXferCount = 0U;
3668
3669
3670
3671 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
3672
3673
3674 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3675 }
3676
3677 else
3678 {
3679 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3680
3681 huart->TxCpltCallback(huart);
3682 #else
3683
3684 HAL_UART_TxCpltCallback(huart);
3685 #endif
3686 }
3687 }
3688
3689
3690
3691
3692
3693
3694 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
3695 {
3696 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3697
3698 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3699
3700 huart->TxHalfCpltCallback(huart);
3701 #else
3702
3703 HAL_UART_TxHalfCpltCallback(huart);
3704 #endif
3705 }
3706
3707
3708
3709
3710
3711
3712 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
3713 {
3714 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3715
3716
3717 if (hdma->Init.Mode != DMA_CIRCULAR)
3718 {
3719 huart->RxXferCount = 0U;
3720
3721
3722 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3723 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3724
3725
3726
3727 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
3728
3729
3730 huart->RxState = HAL_UART_STATE_READY;
3731
3732
3733 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
3734 {
3735 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
3736 }
3737 }
3738
3739
3740
3741 huart->RxEventType = HAL_UART_RXEVENT_TC;
3742
3743
3744
3745 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
3746 {
3747 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3748
3749 huart->RxEventCallback(huart, huart->RxXferSize);
3750 #else
3751
3752 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
3753 #endif
3754 }
3755 else
3756 {
3757
3758 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3759
3760 huart->RxCpltCallback(huart);
3761 #else
3762
3763 HAL_UART_RxCpltCallback(huart);
3764 #endif
3765 }
3766 }
3767
3768
3769
3770
3771
3772
3773 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
3774 {
3775 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3776
3777
3778
3779 huart->RxEventType = HAL_UART_RXEVENT_HT;
3780
3781
3782
3783 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
3784 {
3785 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3786
3787 huart->RxEventCallback(huart, huart->RxXferSize / 2U);
3788 #else
3789
3790 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize / 2U);
3791 #endif
3792 }
3793 else
3794 {
3795
3796 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3797
3798 huart->RxHalfCpltCallback(huart);
3799 #else
3800
3801 HAL_UART_RxHalfCpltCallback(huart);
3802 #endif
3803 }
3804 }
3805
3806
3807
3808
3809
3810
3811 static void UART_DMAError(DMA_HandleTypeDef *hdma)
3812 {
3813 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3814
3815 const HAL_UART_StateTypeDef gstate = huart->gState;
3816 const HAL_UART_StateTypeDef rxstate = huart->RxState;
3817
3818
3819 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
3820 (gstate == HAL_UART_STATE_BUSY_TX))
3821 {
3822 huart->TxXferCount = 0U;
3823 UART_EndTxTransfer(huart);
3824 }
3825
3826
3827 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
3828 (rxstate == HAL_UART_STATE_BUSY_RX))
3829 {
3830 huart->RxXferCount = 0U;
3831 UART_EndRxTransfer(huart);
3832 }
3833
3834 huart->ErrorCode |= HAL_UART_ERROR_DMA;
3835
3836 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3837
3838 huart->ErrorCallback(huart);
3839 #else
3840
3841 HAL_UART_ErrorCallback(huart);
3842 #endif
3843 }
3844
3845
3846
3847
3848
3849
3850
3851 static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
3852 {
3853 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3854 huart->RxXferCount = 0U;
3855 huart->TxXferCount = 0U;
3856
3857 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3858
3859 huart->ErrorCallback(huart);
3860 #else
3861
3862 HAL_UART_ErrorCallback(huart);
3863 #endif
3864 }
3865
3866
3867
3868
3869
3870
3871
3872
3873
3874 static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
3875 {
3876 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3877
3878 huart->hdmatx->XferAbortCallback = NULL;
3879
3880
3881 if (huart->hdmarx != NULL)
3882 {
3883 if (huart->hdmarx->XferAbortCallback != NULL)
3884 {
3885 return;
3886 }
3887 }
3888
3889
3890 huart->TxXferCount = 0U;
3891 huart->RxXferCount = 0U;
3892
3893
3894 huart->ErrorCode = HAL_UART_ERROR_NONE;
3895
3896
3897 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
3898
3899
3900 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
3901 {
3902 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
3903 }
3904
3905
3906 huart->gState = HAL_UART_STATE_READY;
3907 huart->RxState = HAL_UART_STATE_READY;
3908 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
3909
3910
3911 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3912
3913 huart->AbortCpltCallback(huart);
3914 #else
3915
3916 HAL_UART_AbortCpltCallback(huart);
3917 #endif
3918 }
3919
3920
3921
3922
3923
3924
3925
3926
3927
3928
3929 static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
3930 {
3931 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3932
3933 huart->hdmarx->XferAbortCallback = NULL;
3934
3935
3936 if (huart->hdmatx != NULL)
3937 {
3938 if (huart->hdmatx->XferAbortCallback != NULL)
3939 {
3940 return;
3941 }
3942 }
3943
3944
3945 huart->TxXferCount = 0U;
3946 huart->RxXferCount = 0U;
3947
3948
3949 huart->ErrorCode = HAL_UART_ERROR_NONE;
3950
3951
3952 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
3953
3954
3955 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
3956
3957
3958 huart->gState = HAL_UART_STATE_READY;
3959 huart->RxState = HAL_UART_STATE_READY;
3960 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
3961
3962
3963 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3964
3965 huart->AbortCpltCallback(huart);
3966 #else
3967
3968 HAL_UART_AbortCpltCallback(huart);
3969 #endif
3970 }
3971
3972
3973
3974
3975
3976
3977
3978
3979
3980
3981 static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
3982 {
3983 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3984
3985 huart->TxXferCount = 0U;
3986
3987
3988 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
3989 {
3990 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
3991 }
3992
3993
3994 huart->gState = HAL_UART_STATE_READY;
3995
3996
3997 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3998
3999 huart->AbortTransmitCpltCallback(huart);
4000 #else
4001
4002 HAL_UART_AbortTransmitCpltCallback(huart);
4003 #endif
4004 }
4005
4006
4007
4008
4009
4010
4011
4012
4013
4014 static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
4015 {
4016 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
4017
4018 huart->RxXferCount = 0U;
4019
4020
4021 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
4022
4023
4024 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4025
4026
4027 huart->RxState = HAL_UART_STATE_READY;
4028 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4029
4030
4031 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4032
4033 huart->AbortReceiveCpltCallback(huart);
4034 #else
4035
4036 HAL_UART_AbortReceiveCpltCallback(huart);
4037 #endif
4038 }
4039
4040
4041
4042
4043
4044
4045
4046
4047 static void UART_TxISR_8BIT(UART_HandleTypeDef *huart)
4048 {
4049
4050 if (huart->gState == HAL_UART_STATE_BUSY_TX)
4051 {
4052 if (huart->TxXferCount == 0U)
4053 {
4054
4055 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
4056
4057
4058 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4059 }
4060 else
4061 {
4062 huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
4063 huart->pTxBuffPtr++;
4064 huart->TxXferCount--;
4065 }
4066 }
4067 }
4068
4069
4070
4071
4072
4073
4074
4075
4076 static void UART_TxISR_16BIT(UART_HandleTypeDef *huart)
4077 {
4078 const uint16_t *tmp;
4079
4080
4081 if (huart->gState == HAL_UART_STATE_BUSY_TX)
4082 {
4083 if (huart->TxXferCount == 0U)
4084 {
4085
4086 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
4087
4088
4089 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4090 }
4091 else
4092 {
4093 tmp = (const uint16_t *) huart->pTxBuffPtr;
4094 huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
4095 huart->pTxBuffPtr += 2U;
4096 huart->TxXferCount--;
4097 }
4098 }
4099 }
4100
4101
4102
4103
4104
4105
4106
4107
4108 static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
4109 {
4110 uint16_t nb_tx_data;
4111
4112
4113 if (huart->gState == HAL_UART_STATE_BUSY_TX)
4114 {
4115 for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
4116 {
4117 if (huart->TxXferCount == 0U)
4118 {
4119
4120 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
4121
4122
4123 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4124
4125 break;
4126 }
4127 else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
4128 {
4129 huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
4130 huart->pTxBuffPtr++;
4131 huart->TxXferCount--;
4132 }
4133 else
4134 {
4135
4136 }
4137 }
4138 }
4139 }
4140
4141
4142
4143
4144
4145
4146
4147
4148 static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
4149 {
4150 const uint16_t *tmp;
4151 uint16_t nb_tx_data;
4152
4153
4154 if (huart->gState == HAL_UART_STATE_BUSY_TX)
4155 {
4156 for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
4157 {
4158 if (huart->TxXferCount == 0U)
4159 {
4160
4161 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
4162
4163
4164 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4165
4166 break;
4167 }
4168 else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
4169 {
4170 tmp = (const uint16_t *) huart->pTxBuffPtr;
4171 huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
4172 huart->pTxBuffPtr += 2U;
4173 huart->TxXferCount--;
4174 }
4175 else
4176 {
4177
4178 }
4179 }
4180 }
4181 }
4182
4183
4184
4185
4186
4187
4188
4189 static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
4190 {
4191
4192 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4193
4194
4195 huart->gState = HAL_UART_STATE_READY;
4196
4197
4198 huart->TxISR = NULL;
4199
4200 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4201
4202 huart->TxCpltCallback(huart);
4203 #else
4204
4205 HAL_UART_TxCpltCallback(huart);
4206 #endif
4207 }
4208
4209
4210
4211
4212
4213
4214 static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
4215 {
4216 uint16_t uhMask = huart->Mask;
4217 uint16_t uhdata;
4218
4219
4220 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4221 {
4222 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4223 *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
4224 huart->pRxBuffPtr++;
4225 huart->RxXferCount--;
4226
4227 if (huart->RxXferCount == 0U)
4228 {
4229
4230 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
4231
4232
4233 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
4234
4235
4236 huart->RxState = HAL_UART_STATE_READY;
4237
4238
4239 huart->RxISR = NULL;
4240
4241
4242 huart->RxEventType = HAL_UART_RXEVENT_TC;
4243
4244 if (!(IS_LPUART_INSTANCE(huart->Instance)))
4245 {
4246
4247 if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
4248 {
4249
4250 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
4251 }
4252 }
4253
4254
4255
4256 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
4257 {
4258
4259 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4260
4261
4262 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
4263
4264 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
4265 {
4266
4267 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
4268 }
4269
4270 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4271
4272 huart->RxEventCallback(huart, huart->RxXferSize);
4273 #else
4274
4275 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
4276 #endif
4277 }
4278 else
4279 {
4280
4281 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4282
4283 huart->RxCpltCallback(huart);
4284 #else
4285
4286 HAL_UART_RxCpltCallback(huart);
4287 #endif
4288 }
4289 }
4290 }
4291 else
4292 {
4293
4294 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4295 }
4296 }
4297
4298
4299
4300
4301
4302
4303
4304
4305 static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
4306 {
4307 uint16_t *tmp;
4308 uint16_t uhMask = huart->Mask;
4309 uint16_t uhdata;
4310
4311
4312 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4313 {
4314 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4315 tmp = (uint16_t *) huart->pRxBuffPtr ;
4316 *tmp = (uint16_t)(uhdata & uhMask);
4317 huart->pRxBuffPtr += 2U;
4318 huart->RxXferCount--;
4319
4320 if (huart->RxXferCount == 0U)
4321 {
4322
4323 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
4324
4325
4326 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
4327
4328
4329 huart->RxState = HAL_UART_STATE_READY;
4330
4331
4332 huart->RxISR = NULL;
4333
4334
4335 huart->RxEventType = HAL_UART_RXEVENT_TC;
4336
4337 if (!(IS_LPUART_INSTANCE(huart->Instance)))
4338 {
4339
4340 if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
4341 {
4342
4343 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
4344 }
4345 }
4346
4347
4348
4349 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
4350 {
4351
4352 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4353
4354
4355 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
4356
4357 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
4358 {
4359
4360 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
4361 }
4362
4363 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4364
4365 huart->RxEventCallback(huart, huart->RxXferSize);
4366 #else
4367
4368 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
4369 #endif
4370 }
4371 else
4372 {
4373
4374 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4375
4376 huart->RxCpltCallback(huart);
4377 #else
4378
4379 HAL_UART_RxCpltCallback(huart);
4380 #endif
4381 }
4382 }
4383 }
4384 else
4385 {
4386
4387 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4388 }
4389 }
4390
4391
4392
4393
4394
4395
4396
4397
4398 static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
4399 {
4400 uint16_t uhMask = huart->Mask;
4401 uint16_t uhdata;
4402 uint16_t nb_rx_data;
4403 uint16_t rxdatacount;
4404 uint32_t isrflags = READ_REG(huart->Instance->ISR);
4405 uint32_t cr1its = READ_REG(huart->Instance->CR1);
4406 uint32_t cr3its = READ_REG(huart->Instance->CR3);
4407
4408
4409 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4410 {
4411 nb_rx_data = huart->NbRxDataToProcess;
4412 while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
4413 {
4414 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4415 *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
4416 huart->pRxBuffPtr++;
4417 huart->RxXferCount--;
4418 isrflags = READ_REG(huart->Instance->ISR);
4419
4420
4421 if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
4422 {
4423
4424 if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
4425 {
4426 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
4427
4428 huart->ErrorCode |= HAL_UART_ERROR_PE;
4429 }
4430
4431
4432 if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
4433 {
4434 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
4435
4436 huart->ErrorCode |= HAL_UART_ERROR_FE;
4437 }
4438
4439
4440 if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
4441 {
4442 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
4443
4444 huart->ErrorCode |= HAL_UART_ERROR_NE;
4445 }
4446
4447
4448 if (huart->ErrorCode != HAL_UART_ERROR_NONE)
4449 {
4450
4451
4452 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4453
4454 huart->ErrorCallback(huart);
4455 #else
4456
4457 HAL_UART_ErrorCallback(huart);
4458 #endif
4459 huart->ErrorCode = HAL_UART_ERROR_NONE;
4460 }
4461 }
4462
4463 if (huart->RxXferCount == 0U)
4464 {
4465
4466 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
4467
4468
4469
4470 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
4471
4472
4473 huart->RxState = HAL_UART_STATE_READY;
4474
4475
4476 huart->RxISR = NULL;
4477
4478
4479 huart->RxEventType = HAL_UART_RXEVENT_TC;
4480
4481 if (!(IS_LPUART_INSTANCE(huart->Instance)))
4482 {
4483
4484 if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
4485 {
4486
4487 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
4488 }
4489 }
4490
4491
4492
4493 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
4494 {
4495
4496 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4497
4498
4499 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
4500
4501 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
4502 {
4503
4504 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
4505 }
4506
4507 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4508
4509 huart->RxEventCallback(huart, huart->RxXferSize);
4510 #else
4511
4512 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
4513 #endif
4514 }
4515 else
4516 {
4517
4518 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4519
4520 huart->RxCpltCallback(huart);
4521 #else
4522
4523 HAL_UART_RxCpltCallback(huart);
4524 #endif
4525 }
4526 }
4527 }
4528
4529
4530
4531
4532
4533 rxdatacount = huart->RxXferCount;
4534 if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
4535 {
4536
4537 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
4538
4539
4540 huart->RxISR = UART_RxISR_8BIT;
4541
4542
4543 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
4544 }
4545 }
4546 else
4547 {
4548
4549 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4550 }
4551 }
4552
4553
4554
4555
4556
4557
4558
4559
4560 static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
4561 {
4562 uint16_t *tmp;
4563 uint16_t uhMask = huart->Mask;
4564 uint16_t uhdata;
4565 uint16_t nb_rx_data;
4566 uint16_t rxdatacount;
4567 uint32_t isrflags = READ_REG(huart->Instance->ISR);
4568 uint32_t cr1its = READ_REG(huart->Instance->CR1);
4569 uint32_t cr3its = READ_REG(huart->Instance->CR3);
4570
4571
4572 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4573 {
4574 nb_rx_data = huart->NbRxDataToProcess;
4575 while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
4576 {
4577 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4578 tmp = (uint16_t *) huart->pRxBuffPtr ;
4579 *tmp = (uint16_t)(uhdata & uhMask);
4580 huart->pRxBuffPtr += 2U;
4581 huart->RxXferCount--;
4582 isrflags = READ_REG(huart->Instance->ISR);
4583
4584
4585 if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
4586 {
4587
4588 if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
4589 {
4590 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
4591
4592 huart->ErrorCode |= HAL_UART_ERROR_PE;
4593 }
4594
4595
4596 if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
4597 {
4598 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
4599
4600 huart->ErrorCode |= HAL_UART_ERROR_FE;
4601 }
4602
4603
4604 if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
4605 {
4606 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
4607
4608 huart->ErrorCode |= HAL_UART_ERROR_NE;
4609 }
4610
4611
4612 if (huart->ErrorCode != HAL_UART_ERROR_NONE)
4613 {
4614
4615
4616 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4617
4618 huart->ErrorCallback(huart);
4619 #else
4620
4621 HAL_UART_ErrorCallback(huart);
4622 #endif
4623 huart->ErrorCode = HAL_UART_ERROR_NONE;
4624 }
4625 }
4626
4627 if (huart->RxXferCount == 0U)
4628 {
4629
4630 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
4631
4632
4633
4634 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
4635
4636
4637 huart->RxState = HAL_UART_STATE_READY;
4638
4639
4640 huart->RxISR = NULL;
4641
4642
4643 huart->RxEventType = HAL_UART_RXEVENT_TC;
4644
4645 if (!(IS_LPUART_INSTANCE(huart->Instance)))
4646 {
4647
4648 if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
4649 {
4650
4651 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
4652 }
4653 }
4654
4655
4656
4657 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
4658 {
4659
4660 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4661
4662
4663 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
4664
4665 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
4666 {
4667
4668 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
4669 }
4670
4671 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4672
4673 huart->RxEventCallback(huart, huart->RxXferSize);
4674 #else
4675
4676 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
4677 #endif
4678 }
4679 else
4680 {
4681
4682 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4683
4684 huart->RxCpltCallback(huart);
4685 #else
4686
4687 HAL_UART_RxCpltCallback(huart);
4688 #endif
4689 }
4690 }
4691 }
4692
4693
4694
4695
4696
4697 rxdatacount = huart->RxXferCount;
4698 if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
4699 {
4700
4701 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
4702
4703
4704 huart->RxISR = UART_RxISR_16BIT;
4705
4706
4707 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
4708 }
4709 }
4710 else
4711 {
4712
4713 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4714 }
4715 }
4716
4717
4718
4719
4720
4721 #endif
4722
4723
4724
4725
4726
4727
4728
4729