stm32h7/hal/stm32h7xx_hal_spdifrx.c

0001 /**
0002   ******************************************************************************
0003   * @file    stm32h7xx_hal_spdifrx.c
0004   * @author  MCD Application Team
0005   * @brief   This file provides firmware functions to manage the following
0006   *          functionalities of the SPDIFRX audio interface:
0007   *           + Initialization and Configuration
0008   *           + Data transfers functions
0009   *           + DMA transfers management
0010   *           + Interrupts and flags management
0011   *
0012   ******************************************************************************
0013   * @attention
0014   *
0015   * Copyright (c) 2017 STMicroelectronics.
0016   * All rights reserved.
0017   *
0018   * This software is licensed under terms that can be found in the LICENSE file
0019   * in the root directory of this software component.
0020   * If no LICENSE file comes with this software, it is provided AS-IS.
0021   *
0022   ******************************************************************************
0023   @verbatim
0024  ===============================================================================
0025                   ##### How to use this driver #####
0026  ===============================================================================
0027  [..]
0028     The SPDIFRX HAL driver can be used as follow:
0029
0030     (#) Declare SPDIFRX_HandleTypeDef handle structure.
0031     (#) Initialize the SPDIFRX low level resources by implement the HAL_SPDIFRX_MspInit() API:
0032         (##) Enable the SPDIFRX interface clock.
0033         (##) SPDIFRX pins configuration:
0034             (+++) Enable the clock for the SPDIFRX GPIOs.
0035             (+++) Configure these SPDIFRX pins as alternate function pull-up.
0036         (##) NVIC configuration if you need to use interrupt process (HAL_SPDIFRX_ReceiveCtrlFlow_IT() and
0037              HAL_SPDIFRX_ReceiveDataFlow_IT() API's).
0038             (+++) Configure the SPDIFRX interrupt priority.
0039             (+++) Enable the NVIC SPDIFRX IRQ handle.
0040         (##) DMA Configuration if you need to use DMA process (HAL_SPDIFRX_ReceiveDataFlow_DMA() and
0041              HAL_SPDIFRX_ReceiveCtrlFlow_DMA() API's).
0042             (+++) Declare a DMA handle structure for the reception of the Data Flow channel.
0043             (+++) Declare a DMA handle structure for the reception of the Control Flow channel.
0044             (+++) Enable the DMAx interface clock.
0045             (+++) Configure the declared DMA handle structure CtrlRx/DataRx with the required parameters.
0046             (+++) Configure the DMA Channel.
0047             (+++) Associate the initialized DMA handle to the SPDIFRX DMA CtrlRx/DataRx handle.
0048             (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
0049                 DMA CtrlRx/DataRx channel.
0050
0051    (#) Program the input selection, re-tries number, wait for activity, channel status selection, data format,
0052        stereo mode and masking of user bits using HAL_SPDIFRX_Init() function.
0053
0054    -@- The specific SPDIFRX interrupts (RXNE/CSRNE and Error Interrupts) will be managed using the macros
0055        __SPDIFRX_ENABLE_IT() and __SPDIFRX_DISABLE_IT() inside the receive process.
0056    -@- Make sure that ck_spdif clock is configured.
0057
0058    (#) Three operation modes are available within this driver :
0059
0060    *** Polling mode for reception operation (for debug purpose) ***
0061    ================================================================
0062    [..]
0063      (+) Receive data flow in blocking mode using HAL_SPDIFRX_ReceiveDataFlow()
0064      (+) Receive control flow of data in blocking mode using HAL_SPDIFRX_ReceiveCtrlFlow()
0065
0066    *** Interrupt mode for reception operation ***
0067    =========================================
0068    [..]
0069      (+) Receive an amount of data (Data Flow) in non blocking mode using HAL_SPDIFRX_ReceiveDataFlow_IT()
0070      (+) Receive an amount of data (Control Flow) in non blocking mode using HAL_SPDIFRX_ReceiveCtrlFlow_IT()
0071      (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
0072          add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
0073      (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
0074          add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
0075      (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
0076          add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
0077
0078    *** DMA mode for reception operation ***
0079    ========================================
0080    [..]
0081      (+) Receive an amount of data (Data Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveDataFlow_DMA()
0082      (+) Receive an amount of data (Control Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveCtrlFlow_DMA()
0083      (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
0084          add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
0085      (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
0086          add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
0087      (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
0088          add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
0089      (+) Stop the DMA Transfer using HAL_SPDIFRX_DMAStop()
0090
0091    *** SPDIFRX HAL driver macros list ***
0092    =============================================
0093    [..]
0094      Below the list of most used macros in SPDIFRX HAL driver.
0095       (+) __HAL_SPDIFRX_IDLE: Disable the specified SPDIFRX peripheral (IDLE State)
0096       (+) __HAL_SPDIFRX_SYNC: Enable the synchronization state of the specified SPDIFRX peripheral (SYNC State)
0097       (+) __HAL_SPDIFRX_RCV: Enable the receive state of the specified SPDIFRX peripheral (RCV State)
0098       (+) __HAL_SPDIFRX_ENABLE_IT : Enable the specified SPDIFRX interrupts
0099       (+) __HAL_SPDIFRX_DISABLE_IT : Disable the specified SPDIFRX interrupts
0100       (+) __HAL_SPDIFRX_GET_FLAG: Check whether the specified SPDIFRX flag is set or not.
0101
0102    [..]
0103       (@) You can refer to the SPDIFRX HAL driver header file for more useful macros
0104
0105   *** Callback registration ***
0106   =============================================
0107
0108   The compilation define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS when set to 1
0109   allows the user to configure dynamically the driver callbacks.
0110   Use HAL_SPDIFRX_RegisterCallback() function to register an interrupt callback.
0111
0112   The HAL_SPDIFRX_RegisterCallback() function allows to register the following callbacks:
0113     (+) RxHalfCpltCallback  : SPDIFRX Data flow half completed callback.
0114     (+) RxCpltCallback      : SPDIFRX Data flow completed callback.
0115     (+) CxHalfCpltCallback  : SPDIFRX Control flow half completed callback.
0116     (+) CxCpltCallback      : SPDIFRX Control flow completed callback.
0117     (+) ErrorCallback       : SPDIFRX error callback.
0118     (+) MspInitCallback     : SPDIFRX MspInit.
0119     (+) MspDeInitCallback   : SPDIFRX MspDeInit.
0120   This function takes as parameters the HAL peripheral handle, the Callback ID
0121   and a pointer to the user callback function.
0122
0123   Use HAL_SPDIFRX_UnRegisterCallback() function to reset a callback to the default
0124   weak function.
0125   The HAL_SPDIFRX_UnRegisterCallback() function takes as parameters the HAL peripheral handle,
0126   and the Callback ID.
0127   This function allows to reset the following callbacks:
0128     (+) RxHalfCpltCallback  : SPDIFRX Data flow half completed callback.
0129     (+) RxCpltCallback      : SPDIFRX Data flow completed callback.
0130     (+) CxHalfCpltCallback  : SPDIFRX Control flow half completed callback.
0131     (+) CxCpltCallback      : SPDIFRX Control flow completed callback.
0132     (+) ErrorCallback       : SPDIFRX error callback.
0133     (+) MspInitCallback     : SPDIFRX MspInit.
0134     (+) MspDeInitCallback   : SPDIFRX MspDeInit.
0135
0136   By default, after the HAL_SPDIFRX_Init() and when the state is HAL_SPDIFRX_STATE_RESET
0137   all callbacks are set to the corresponding weak functions :
0138   HAL_SPDIFRX_RxHalfCpltCallback() , HAL_SPDIFRX_RxCpltCallback(), HAL_SPDIFRX_CxHalfCpltCallback(),
0139   HAL_SPDIFRX_CxCpltCallback() and HAL_SPDIFRX_ErrorCallback()
0140   Exception done for MspInit and MspDeInit functions that are
0141   reset to the legacy weak function in the HAL_SPDIFRX_Init()/ HAL_SPDIFRX_DeInit() only when
0142   these callbacks pointers are NULL (not registered beforehand).
0143   If not, MspInit or MspDeInit callbacks pointers are not null, the HAL_SPDIFRX_Init() / HAL_SPDIFRX_DeInit()
0144   keep and use the user MspInit/MspDeInit functions (registered beforehand)
0145
0146   Callbacks can be registered/unregistered in HAL_SPDIFRX_STATE_READY state only.
0147   Exception done MspInit/MspDeInit callbacks that can be registered/unregistered
0148   in HAL_SPDIFRX_STATE_READY or HAL_SPDIFRX_STATE_RESET state,
0149   thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
0150   In that case first register the MspInit/MspDeInit user callbacks
0151   using HAL_SPDIFRX_RegisterCallback() before calling HAL_SPDIFRX_DeInit()
0152   or HAL_SPDIFRX_Init() function.
0153
0154   When The compilation define USE_HAL_SPDIFRX_REGISTER_CALLBACKS is set to 0 or
0155   not defined, the callback registration feature is not available and all callbacks
0156   are set to the corresponding weak functions.
0157
0158   @endverbatim
0159   */
0160
0161 /* Includes ------------------------------------------------------------------*/
0162 #include "stm32h7xx_hal.h"
0163
0164 /** @addtogroup STM32H7xx_HAL_Driver
0165   * @{
0166   */
0167
0168 /** @defgroup SPDIFRX SPDIFRX
0169   * @ingroup RTEMSBSPsARMSTM32H7
0170   * @brief SPDIFRX HAL module driver
0171   * @{
0172   */
0173
0174 #ifdef HAL_SPDIFRX_MODULE_ENABLED
0175 #if defined (SPDIFRX)
0176
0177 /* Private typedef -----------------------------------------------------------*/
0178 /* Private define ------------------------------------------------------------*/
0179 /** @defgroup SPDIFRX_Private_Defines SPDIFRX Private Defines
0180   * @{
0181   */
0182 #define SPDIFRX_TIMEOUT_VALUE  10U
0183 /**
0184   * @}
0185   */
0186 /* Private macro -------------------------------------------------------------*/
0187 /* Private variables ---------------------------------------------------------*/
0188 /* Private function prototypes -----------------------------------------------*/
0189 /** @addtogroup SPDIFRX_Private_Functions
0190   * @{
0191   */
0192 static void  SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma);
0193 static void  SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
0194 static void  SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma);
0195 static void  SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma);
0196 static void  SPDIFRX_DMAError(DMA_HandleTypeDef *hdma);
0197 static void  SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
0198 static void  SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
0199 static HAL_StatusTypeDef  SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag,
0200                                                          FlagStatus Status, uint32_t Timeout, uint32_t tickstart);
0201 /**
0202   * @}
0203   */
0204 /* Exported functions ---------------------------------------------------------*/
0205
0206 /** @defgroup SPDIFRX_Exported_Functions SPDIFRX Exported Functions
0207   * @ingroup RTEMSBSPsARMSTM32H7
0208   * @{
0209   */
0210
0211 /** @defgroup  SPDIFRX_Exported_Functions_Group1 Initialization and de-initialization functions
0212   * @ingroup RTEMSBSPsARMSTM32H7
0213   *  @brief    Initialization and Configuration functions
0214   *
0215   @verbatim
0216   ===============================================================================
0217   ##### Initialization and de-initialization functions #####
0218   ===============================================================================
0219   [..]  This subsection provides a set of functions allowing to initialize and
0220         de-initialize the SPDIFRX peripheral:
0221
0222   (+) User must Implement HAL_SPDIFRX_MspInit() function in which he configures
0223       all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
0224
0225   (+) Call the function HAL_SPDIFRX_Init() to configure the SPDIFRX peripheral with
0226       the selected configuration:
0227   (++) Input Selection (IN0, IN1,...)
0228   (++) Maximum allowed re-tries during synchronization phase
0229   (++) Wait for activity on SPDIF selected input
0230   (++) Channel status selection (from channel A or B)
0231   (++) Data format (LSB, MSB, ...)
0232   (++) Stereo mode
0233   (++) User bits masking (PT,C,U,V,...)
0234
0235   (+) Call the function HAL_SPDIFRX_DeInit() to restore the default configuration
0236       of the selected SPDIFRXx peripheral.
0237   @endverbatim
0238   * @{
0239   */
0240
0241 /**
0242   * @brief Initializes the SPDIFRX according to the specified parameters
0243   *        in the SPDIFRX_InitTypeDef and create the associated handle.
0244   * @param hspdif SPDIFRX handle
0245   * @retval HAL status
0246   */
0247 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif)
0248 {
0249   uint32_t tmpreg;
0250
0251   /* Check the SPDIFRX handle allocation */
0252   if (hspdif == NULL)
0253   {
0254     return HAL_ERROR;
0255   }
0256
0257   /* Check the SPDIFRX parameters */
0258   assert_param(IS_STEREO_MODE(hspdif->Init.StereoMode));
0259   assert_param(IS_SPDIFRX_INPUT_SELECT(hspdif->Init.InputSelection));
0260   assert_param(IS_SPDIFRX_MAX_RETRIES(hspdif->Init.Retries));
0261   assert_param(IS_SPDIFRX_WAIT_FOR_ACTIVITY(hspdif->Init.WaitForActivity));
0262   assert_param(IS_SPDIFRX_CHANNEL(hspdif->Init.ChannelSelection));
0263   assert_param(IS_SPDIFRX_DATA_FORMAT(hspdif->Init.DataFormat));
0264   assert_param(IS_PREAMBLE_TYPE_MASK(hspdif->Init.PreambleTypeMask));
0265   assert_param(IS_CHANNEL_STATUS_MASK(hspdif->Init.ChannelStatusMask));
0266   assert_param(IS_VALIDITY_MASK(hspdif->Init.ValidityBitMask));
0267   assert_param(IS_PARITY_ERROR_MASK(hspdif->Init.ParityErrorMask));
0268   assert_param(IS_SYMBOL_CLOCK_GEN(hspdif->Init.SymbolClockGen));
0269   assert_param(IS_SYMBOL_CLOCK_GEN(hspdif->Init.BackupSymbolClockGen));
0270
0271 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
0272   if (hspdif->State == HAL_SPDIFRX_STATE_RESET)
0273   {
0274     /* Allocate lock resource and initialize it */
0275     hspdif->Lock = HAL_UNLOCKED;
0276
0277     hspdif->RxHalfCpltCallback  = HAL_SPDIFRX_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
0278     hspdif->RxCpltCallback      = HAL_SPDIFRX_RxCpltCallback;     /* Legacy weak RxCpltCallback     */
0279     hspdif->CxHalfCpltCallback  = HAL_SPDIFRX_CxHalfCpltCallback; /* Legacy weak CxHalfCpltCallback */
0280     hspdif->CxCpltCallback      = HAL_SPDIFRX_CxCpltCallback;     /* Legacy weak CxCpltCallback     */
0281     hspdif->ErrorCallback       = HAL_SPDIFRX_ErrorCallback;      /* Legacy weak ErrorCallback      */
0282
0283     if (hspdif->MspInitCallback == NULL)
0284     {
0285       hspdif->MspInitCallback = HAL_SPDIFRX_MspInit; /* Legacy weak MspInit  */
0286     }
0287
0288     /* Init the low level hardware */
0289     hspdif->MspInitCallback(hspdif);
0290   }
0291 #else
0292   if (hspdif->State == HAL_SPDIFRX_STATE_RESET)
0293   {
0294     /* Allocate lock resource and initialize it */
0295     hspdif->Lock = HAL_UNLOCKED;
0296     /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
0297     HAL_SPDIFRX_MspInit(hspdif);
0298   }
0299 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
0300
0301   /* SPDIFRX peripheral state is BUSY */
0302   hspdif->State = HAL_SPDIFRX_STATE_BUSY;
0303
0304   /* Disable SPDIFRX interface (IDLE State) */
0305   __HAL_SPDIFRX_IDLE(hspdif);
0306
0307   /* Reset the old SPDIFRX CR configuration */
0308   tmpreg = hspdif->Instance->CR;
0309
0310   tmpreg &= ~(SPDIFRX_CR_RXSTEO  | SPDIFRX_CR_DRFMT  | SPDIFRX_CR_PMSK |
0311               SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK  |
0312               SPDIFRX_CR_CHSEL | SPDIFRX_CR_NBTR | SPDIFRX_CR_WFA |
0313               SPDIFRX_CR_CKSEN | SPDIFRX_CR_CKSBKPEN |
0314               SPDIFRX_CR_INSEL);
0315
0316   /* Sets the new configuration of the SPDIFRX peripheral */
0317   tmpreg |= (hspdif->Init.StereoMode |
0318              hspdif->Init.InputSelection |
0319              hspdif->Init.Retries |
0320              hspdif->Init.WaitForActivity |
0321              hspdif->Init.ChannelSelection |
0322              hspdif->Init.DataFormat |
0323              hspdif->Init.PreambleTypeMask |
0324              hspdif->Init.ChannelStatusMask |
0325              hspdif->Init.ValidityBitMask |
0326              hspdif->Init.ParityErrorMask
0327             );
0328
0329   if (hspdif->Init.SymbolClockGen == ENABLE)
0330   {
0331     tmpreg |= SPDIFRX_CR_CKSEN;
0332   }
0333
0334   if (hspdif->Init.BackupSymbolClockGen == ENABLE)
0335   {
0336     tmpreg |= SPDIFRX_CR_CKSBKPEN;
0337   }
0338
0339   hspdif->Instance->CR = tmpreg;
0340
0341   hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
0342
0343   /* SPDIFRX peripheral state is READY*/
0344   hspdif->State = HAL_SPDIFRX_STATE_READY;
0345
0346   return HAL_OK;
0347 }
0348
0349 /**
0350   * @brief DeInitializes the SPDIFRX peripheral
0351   * @param hspdif SPDIFRX handle
0352   * @retval HAL status
0353   */
0354 HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif)
0355 {
0356   /* Check the SPDIFRX handle allocation */
0357   if (hspdif == NULL)
0358   {
0359     return HAL_ERROR;
0360   }
0361
0362   /* Check the parameters */
0363   assert_param(IS_SPDIFRX_ALL_INSTANCE(hspdif->Instance));
0364
0365   hspdif->State = HAL_SPDIFRX_STATE_BUSY;
0366
0367   /* Disable SPDIFRX interface (IDLE state) */
0368   __HAL_SPDIFRX_IDLE(hspdif);
0369
0370 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
0371   if (hspdif->MspDeInitCallback == NULL)
0372   {
0373     hspdif->MspDeInitCallback = HAL_SPDIFRX_MspDeInit; /* Legacy weak MspDeInit  */
0374   }
0375
0376   /* DeInit the low level hardware */
0377   hspdif->MspDeInitCallback(hspdif);
0378 #else
0379   /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
0380   HAL_SPDIFRX_MspDeInit(hspdif);
0381 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
0382
0383   hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
0384
0385   /* SPDIFRX peripheral state is RESET*/
0386   hspdif->State = HAL_SPDIFRX_STATE_RESET;
0387
0388   /* Release Lock */
0389   __HAL_UNLOCK(hspdif);
0390
0391   return HAL_OK;
0392 }
0393
0394 /**
0395   * @brief SPDIFRX MSP Init
0396   * @param hspdif SPDIFRX handle
0397   * @retval None
0398   */
0399 __weak void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif)
0400 {
0401   /* Prevent unused argument(s) compilation warning */
0402   UNUSED(hspdif);
0403
0404   /* NOTE : This function Should not be modified, when the callback is needed,
0405   the HAL_SPDIFRX_MspInit could be implemented in the user file
0406   */
0407 }
0408
0409 /**
0410   * @brief SPDIFRX MSP DeInit
0411   * @param hspdif SPDIFRX handle
0412   * @retval None
0413   */
0414 __weak void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif)
0415 {
0416   /* Prevent unused argument(s) compilation warning */
0417   UNUSED(hspdif);
0418
0419   /* NOTE : This function Should not be modified, when the callback is needed,
0420   the HAL_SPDIFRX_MspDeInit could be implemented in the user file
0421   */
0422 }
0423
0424 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
0425 /**
0426   * @brief  Register a User SPDIFRX Callback
0427   *         To be used instead of the weak predefined callback
0428   * @param  hspdif SPDIFRX handle
0429   * @param  CallbackID ID of the callback to be registered
0430   *         This parameter can be one of the following values:
0431   *          @arg @ref HAL_SPDIFRX_RX_HALF_CB_ID    SPDIFRX Data flow half completed callback ID
0432   *          @arg @ref HAL_SPDIFRX_RX_CPLT_CB_ID    SPDIFRX Data flow completed callback ID
0433   *          @arg @ref HAL_SPDIFRX_CX_HALF_CB_ID    SPDIFRX Control flow half completed callback ID
0434   *          @arg @ref HAL_SPDIFRX_CX_CPLT_CB_ID    SPDIFRX Control flow completed callback ID
0435   *          @arg @ref HAL_SPDIFRX_ERROR_CB_ID      SPDIFRX error callback ID
0436   *          @arg @ref HAL_SPDIFRX_MSPINIT_CB_ID    MspInit callback ID
0437   *          @arg @ref HAL_SPDIFRX_MSPDEINIT_CB_ID  MspDeInit callback ID
0438   * @param  pCallback pointer to the Callback function
0439   * @retval HAL status
0440   */
0441 HAL_StatusTypeDef HAL_SPDIFRX_RegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID,
0442                                                pSPDIFRX_CallbackTypeDef pCallback)
0443 {
0444   HAL_StatusTypeDef status = HAL_OK;
0445
0446   if (pCallback == NULL)
0447   {
0448     /* Update the error code */
0449     hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
0450     return HAL_ERROR;
0451   }
0452   /* Process locked */
0453   __HAL_LOCK(hspdif);
0454
0455   if (HAL_SPDIFRX_STATE_READY == hspdif->State)
0456   {
0457     switch (CallbackID)
0458     {
0459       case HAL_SPDIFRX_RX_HALF_CB_ID :
0460         hspdif->RxHalfCpltCallback = pCallback;
0461         break;
0462
0463       case HAL_SPDIFRX_RX_CPLT_CB_ID :
0464         hspdif->RxCpltCallback = pCallback;
0465         break;
0466
0467       case HAL_SPDIFRX_CX_HALF_CB_ID :
0468         hspdif->CxHalfCpltCallback = pCallback;
0469         break;
0470
0471       case HAL_SPDIFRX_CX_CPLT_CB_ID :
0472         hspdif->CxCpltCallback = pCallback;
0473         break;
0474
0475       case HAL_SPDIFRX_ERROR_CB_ID :
0476         hspdif->ErrorCallback = pCallback;
0477         break;
0478
0479       case HAL_SPDIFRX_MSPINIT_CB_ID :
0480         hspdif->MspInitCallback = pCallback;
0481         break;
0482
0483       case HAL_SPDIFRX_MSPDEINIT_CB_ID :
0484         hspdif->MspDeInitCallback = pCallback;
0485         break;
0486
0487       default :
0488         /* Update the error code */
0489         hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
0490         /* Return error status */
0491         status =  HAL_ERROR;
0492         break;
0493     }
0494   }
0495   else if (HAL_SPDIFRX_STATE_RESET == hspdif->State)
0496   {
0497     switch (CallbackID)
0498     {
0499       case HAL_SPDIFRX_MSPINIT_CB_ID :
0500         hspdif->MspInitCallback = pCallback;
0501         break;
0502
0503       case HAL_SPDIFRX_MSPDEINIT_CB_ID :
0504         hspdif->MspDeInitCallback = pCallback;
0505         break;
0506
0507       default :
0508         /* Update the error code */
0509         hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
0510         /* Return error status */
0511         status =  HAL_ERROR;
0512         break;
0513     }
0514   }
0515   else
0516   {
0517     /* Update the error code */
0518     hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
0519     /* Return error status */
0520     status =  HAL_ERROR;
0521   }
0522
0523   /* Release Lock */
0524   __HAL_UNLOCK(hspdif);
0525   return status;
0526 }
0527
0528 /**
0529   * @brief  Unregister a SPDIFRX Callback
0530   *         SPDIFRX callback is redirected to the weak predefined callback
0531   * @param  hspdif SPDIFRX handle
0532   * @param  CallbackID ID of the callback to be unregistered
0533   *         This parameter can be one of the following values:
0534   *          @arg @ref HAL_SPDIFRX_RX_HALF_CB_ID    SPDIFRX Data flow half completed callback ID
0535   *          @arg @ref HAL_SPDIFRX_RX_CPLT_CB_ID    SPDIFRX Data flow completed callback ID
0536   *          @arg @ref HAL_SPDIFRX_CX_HALF_CB_ID    SPDIFRX Control flow half completed callback ID
0537   *          @arg @ref HAL_SPDIFRX_CX_CPLT_CB_ID    SPDIFRX Control flow completed callback ID
0538   *          @arg @ref HAL_SPDIFRX_ERROR_CB_ID      SPDIFRX error callback ID
0539   *          @arg @ref HAL_SPDIFRX_MSPINIT_CB_ID    MspInit callback ID
0540   *          @arg @ref HAL_SPDIFRX_MSPDEINIT_CB_ID  MspDeInit callback ID
0541   * @retval HAL status
0542   */
0543 HAL_StatusTypeDef HAL_SPDIFRX_UnRegisterCallback(SPDIFRX_HandleTypeDef *hspdif,
0544                                                  HAL_SPDIFRX_CallbackIDTypeDef CallbackID)
0545 {
0546   HAL_StatusTypeDef status = HAL_OK;
0547
0548   /* Process locked */
0549   __HAL_LOCK(hspdif);
0550
0551   if (HAL_SPDIFRX_STATE_READY == hspdif->State)
0552   {
0553     switch (CallbackID)
0554     {
0555       case HAL_SPDIFRX_RX_HALF_CB_ID :
0556         hspdif->RxHalfCpltCallback = HAL_SPDIFRX_RxHalfCpltCallback;
0557         break;
0558
0559       case HAL_SPDIFRX_RX_CPLT_CB_ID :
0560         hspdif->RxCpltCallback = HAL_SPDIFRX_RxCpltCallback;
0561         break;
0562
0563       case HAL_SPDIFRX_CX_HALF_CB_ID :
0564         hspdif->CxHalfCpltCallback = HAL_SPDIFRX_CxHalfCpltCallback;
0565         break;
0566
0567       case HAL_SPDIFRX_CX_CPLT_CB_ID :
0568         hspdif->CxCpltCallback = HAL_SPDIFRX_CxCpltCallback;
0569         break;
0570
0571       case HAL_SPDIFRX_ERROR_CB_ID :
0572         hspdif->ErrorCallback = HAL_SPDIFRX_ErrorCallback;
0573         break;
0574
0575       default :
0576         /* Update the error code */
0577         hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
0578         /* Return error status */
0579         status =  HAL_ERROR;
0580         break;
0581     }
0582   }
0583   else if (HAL_SPDIFRX_STATE_RESET == hspdif->State)
0584   {
0585     switch (CallbackID)
0586     {
0587       case HAL_SPDIFRX_MSPINIT_CB_ID :
0588         hspdif->MspInitCallback = HAL_SPDIFRX_MspInit;  /* Legacy weak MspInit  */
0589         break;
0590
0591       case HAL_SPDIFRX_MSPDEINIT_CB_ID :
0592         hspdif->MspDeInitCallback = HAL_SPDIFRX_MspDeInit;  /* Legacy weak MspInit  */
0593         break;
0594
0595       default :
0596         /* Update the error code */
0597         hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
0598         /* Return error status */
0599         status =  HAL_ERROR;
0600         break;
0601     }
0602   }
0603   else
0604   {
0605     /* Update the error code */
0606     hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
0607     /* Return error status */
0608     status =  HAL_ERROR;
0609   }
0610
0611   /* Release Lock */
0612   __HAL_UNLOCK(hspdif);
0613   return status;
0614 }
0615
0616 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
0617
0618 /**
0619   * @brief Set the SPDIFRX  data format according to the specified parameters in the SPDIFRX_InitTypeDef.
0620   * @param hspdif SPDIFRX handle
0621   * @param sDataFormat SPDIFRX data format
0622   * @retval HAL status
0623   */
0624 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat)
0625 {
0626   uint32_t tmpreg;
0627
0628   /* Check the SPDIFRX handle allocation */
0629   if (hspdif == NULL)
0630   {
0631     return HAL_ERROR;
0632   }
0633
0634   /* Check the SPDIFRX parameters */
0635   assert_param(IS_STEREO_MODE(sDataFormat.StereoMode));
0636   assert_param(IS_SPDIFRX_DATA_FORMAT(sDataFormat.DataFormat));
0637   assert_param(IS_PREAMBLE_TYPE_MASK(sDataFormat.PreambleTypeMask));
0638   assert_param(IS_CHANNEL_STATUS_MASK(sDataFormat.ChannelStatusMask));
0639   assert_param(IS_VALIDITY_MASK(sDataFormat.ValidityBitMask));
0640   assert_param(IS_PARITY_ERROR_MASK(sDataFormat.ParityErrorMask));
0641
0642   /* Reset the old SPDIFRX CR configuration */
0643   tmpreg = hspdif->Instance->CR;
0644
0645   if (((tmpreg & SPDIFRX_STATE_RCV) == SPDIFRX_STATE_RCV) &&
0646       (((tmpreg & SPDIFRX_CR_DRFMT) != sDataFormat.DataFormat) ||
0647        ((tmpreg & SPDIFRX_CR_RXSTEO) != sDataFormat.StereoMode)))
0648   {
0649     return HAL_ERROR;
0650   }
0651
0652   tmpreg &= ~(SPDIFRX_CR_RXSTEO  | SPDIFRX_CR_DRFMT  | SPDIFRX_CR_PMSK |
0653               SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK);
0654
0655   /* Configure the new data format */
0656   tmpreg |= (sDataFormat.StereoMode |
0657              sDataFormat.DataFormat |
0658              sDataFormat.PreambleTypeMask |
0659              sDataFormat.ChannelStatusMask |
0660              sDataFormat.ValidityBitMask |
0661              sDataFormat.ParityErrorMask);
0662
0663   hspdif->Instance->CR = tmpreg;
0664
0665   return HAL_OK;
0666 }
0667
0668 /**
0669   * @}
0670   */
0671
0672 /** @defgroup SPDIFRX_Exported_Functions_Group2 IO operation functions
0673   * @ingroup RTEMSBSPsARMSTM32H7
0674   *  @brief Data transfers functions
0675   *
0676 @verbatim
0677 ===============================================================================
0678                      ##### IO operation functions #####
0679 ===============================================================================
0680     [..]
0681     This subsection provides a set of functions allowing to manage the SPDIFRX data
0682     transfers.
0683
0684     (#) There is two mode of transfer:
0685         (++) Blocking mode : The communication is performed in the polling mode.
0686              The status of all data processing is returned by the same function
0687              after finishing transfer.
0688         (++) No-Blocking mode : The communication is performed using Interrupts
0689              or DMA. These functions return the status of the transfer start-up.
0690              The end of the data processing will be indicated through the
0691              dedicated SPDIFRX IRQ when using Interrupt mode or the DMA IRQ when
0692              using DMA mode.
0693
0694     (#) Blocking mode functions are :
0695         (++) HAL_SPDIFRX_ReceiveDataFlow()
0696         (++) HAL_SPDIFRX_ReceiveCtrlFlow()
0697                 (+@) Do not use blocking mode to receive both control and data flow at the same time.
0698
0699     (#) No-Blocking mode functions with Interrupt are :
0700         (++) HAL_SPDIFRX_ReceiveCtrlFlow_IT()
0701         (++) HAL_SPDIFRX_ReceiveDataFlow_IT()
0702
0703     (#) No-Blocking mode functions with DMA are :
0704         (++) HAL_SPDIFRX_ReceiveCtrlFlow_DMA()
0705         (++) HAL_SPDIFRX_ReceiveDataFlow_DMA()
0706
0707     (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
0708         (++) HAL_SPDIFRX_RxCpltCallback()
0709         (++) HAL_SPDIFRX_CxCpltCallback()
0710
0711 @endverbatim
0712   * @{
0713   */
0714
0715 /**
0716   * @brief  Receives an amount of data (Data Flow) in blocking mode.
0717   * @param  hspdif pointer to SPDIFRX_HandleTypeDef structure that contains
0718   *                 the configuration information for SPDIFRX module.
0719   * @param  pData Pointer to data buffer
0720   * @param  Size Amount of data to be received
0721   * @param  Timeout Timeout duration
0722   * @retval HAL status
0723   */
0724 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size,
0725                                               uint32_t Timeout)
0726 {
0727   uint32_t tickstart;
0728   uint16_t sizeCounter = Size;
0729   uint32_t *pTmpBuf = pData;
0730
0731   if ((pData == NULL) || (Size == 0U))
0732   {
0733     return  HAL_ERROR;
0734   }
0735
0736   if (hspdif->State == HAL_SPDIFRX_STATE_READY)
0737   {
0738     /* Process Locked */
0739     __HAL_LOCK(hspdif);
0740
0741     hspdif->State = HAL_SPDIFRX_STATE_BUSY;
0742
0743     /* Start synchronisation */
0744     __HAL_SPDIFRX_SYNC(hspdif);
0745
0746     /* Get tick */
0747     tickstart = HAL_GetTick();
0748
0749     /* Wait until SYNCD flag is set */
0750     if (SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout, tickstart) != HAL_OK)
0751     {
0752       return HAL_TIMEOUT;
0753     }
0754
0755     /* Start reception */
0756     __HAL_SPDIFRX_RCV(hspdif);
0757
0758     /* Receive data flow */
0759     while (sizeCounter > 0U)
0760     {
0761       /* Get tick */
0762       tickstart = HAL_GetTick();
0763
0764       /* Wait until RXNE flag is set */
0765       if (SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK)
0766       {
0767         return HAL_TIMEOUT;
0768       }
0769
0770       (*pTmpBuf) = hspdif->Instance->DR;
0771       pTmpBuf++;
0772       sizeCounter--;
0773     }
0774
0775     /* SPDIFRX ready */
0776     hspdif->State = HAL_SPDIFRX_STATE_READY;
0777
0778     /* Process Unlocked */
0779     __HAL_UNLOCK(hspdif);
0780
0781     return HAL_OK;
0782   }
0783   else
0784   {
0785     return HAL_BUSY;
0786   }
0787 }
0788
0789 /**
0790   * @brief  Receives an amount of data (Control Flow) in blocking mode.
0791   * @param  hspdif pointer to a SPDIFRX_HandleTypeDef structure that contains
0792   *                 the configuration information for SPDIFRX module.
0793   * @param  pData Pointer to data buffer
0794   * @param  Size Amount of data to be received
0795   * @param  Timeout Timeout duration
0796   * @retval HAL status
0797   */
0798 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size,
0799                                               uint32_t Timeout)
0800 {
0801   uint32_t tickstart;
0802   uint16_t sizeCounter = Size;
0803   uint32_t *pTmpBuf = pData;
0804
0805   if ((pData == NULL) || (Size == 0U))
0806   {
0807     return  HAL_ERROR;
0808   }
0809
0810   if (hspdif->State == HAL_SPDIFRX_STATE_READY)
0811   {
0812     /* Process Locked */
0813     __HAL_LOCK(hspdif);
0814
0815     hspdif->State = HAL_SPDIFRX_STATE_BUSY;
0816
0817     /* Start synchronization */
0818     __HAL_SPDIFRX_SYNC(hspdif);
0819
0820     /* Get tick */
0821     tickstart = HAL_GetTick();
0822
0823     /* Wait until SYNCD flag is set */
0824     if (SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout, tickstart) != HAL_OK)
0825     {
0826       return HAL_TIMEOUT;
0827     }
0828
0829     /* Start reception */
0830     __HAL_SPDIFRX_RCV(hspdif);
0831
0832     /* Receive control flow */
0833     while (sizeCounter > 0U)
0834     {
0835       /* Get tick */
0836       tickstart = HAL_GetTick();
0837
0838       /* Wait until CSRNE flag is set */
0839       if (SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_CSRNE, RESET, Timeout, tickstart) != HAL_OK)
0840       {
0841         return HAL_TIMEOUT;
0842       }
0843
0844       (*pTmpBuf) = hspdif->Instance->CSR;
0845       pTmpBuf++;
0846       sizeCounter--;
0847     }
0848
0849     /* SPDIFRX ready */
0850     hspdif->State = HAL_SPDIFRX_STATE_READY;
0851
0852     /* Process Unlocked */
0853     __HAL_UNLOCK(hspdif);
0854
0855     return HAL_OK;
0856   }
0857   else
0858   {
0859     return HAL_BUSY;
0860   }
0861 }
0862
0863 /**
0864   * @brief Receive an amount of data (Data Flow) in non-blocking mode with Interrupt
0865   * @param hspdif SPDIFRX handle
0866   * @param pData a 32-bit pointer to the Receive data buffer.
0867   * @param Size number of data sample to be received .
0868   * @retval HAL status
0869   */
0870 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
0871 {
0872   uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
0873
0874   const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
0875
0876   if ((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_CX))
0877   {
0878     if ((pData == NULL) || (Size == 0U))
0879     {
0880       return HAL_ERROR;
0881     }
0882
0883     /* Process Locked */
0884     __HAL_LOCK(hspdif);
0885
0886     hspdif->pRxBuffPtr = pData;
0887     hspdif->RxXferSize = Size;
0888     hspdif->RxXferCount = Size;
0889
0890     hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
0891
0892     /* Check if a receive process is ongoing or not */
0893     hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
0894
0895     /* Enable the SPDIFRX  PE Error Interrupt */
0896     __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
0897
0898     /* Enable the SPDIFRX  OVR Error Interrupt */
0899     __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
0900
0901     /* Enable the SPDIFRX RXNE interrupt */
0902     __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_RXNE);
0903
0904     if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
0905     {
0906       /* Start synchronization */
0907       __HAL_SPDIFRX_SYNC(hspdif);
0908
0909       /* Wait until SYNCD flag is set */
0910       do
0911       {
0912         if (count == 0U)
0913         {
0914           /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt
0915              process */
0916           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
0917           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
0918           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
0919           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
0920           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
0921           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
0922           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
0923
0924           hspdif->State = HAL_SPDIFRX_STATE_READY;
0925
0926           /* Process Unlocked */
0927           __HAL_UNLOCK(hspdif);
0928
0929           return HAL_TIMEOUT;
0930         }
0931         count--;
0932       } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
0933
0934       /* Start reception */
0935       __HAL_SPDIFRX_RCV(hspdif);
0936     }
0937
0938     /* Process Unlocked */
0939     __HAL_UNLOCK(hspdif);
0940
0941     return HAL_OK;
0942   }
0943   else
0944   {
0945     return HAL_BUSY;
0946   }
0947 }
0948
0949 /**
0950   * @brief Receive an amount of data (Control Flow) with Interrupt
0951   * @param hspdif SPDIFRX handle
0952   * @param pData a 32-bit pointer to the Receive data buffer.
0953   * @param Size number of data sample (Control Flow) to be received
0954   * @retval HAL status
0955   */
0956 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
0957 {
0958   uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
0959
0960   const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
0961
0962   if ((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_RX))
0963   {
0964     if ((pData == NULL) || (Size == 0U))
0965     {
0966       return HAL_ERROR;
0967     }
0968
0969     /* Process Locked */
0970     __HAL_LOCK(hspdif);
0971
0972     hspdif->pCsBuffPtr = pData;
0973     hspdif->CsXferSize = Size;
0974     hspdif->CsXferCount = Size;
0975
0976     hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
0977
0978     /* Check if a receive process is ongoing or not */
0979     hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
0980
0981     /* Enable the SPDIFRX PE Error Interrupt */
0982     __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
0983
0984     /* Enable the SPDIFRX OVR Error Interrupt */
0985     __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
0986
0987     /* Enable the SPDIFRX CSRNE interrupt */
0988     __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
0989
0990     if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
0991     {
0992       /* Start synchronization */
0993       __HAL_SPDIFRX_SYNC(hspdif);
0994
0995       /* Wait until SYNCD flag is set */
0996       do
0997       {
0998         if (count == 0U)
0999         {
1000           /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt
1001              process */
1002           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
1003           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1004           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
1005           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
1006           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
1007           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
1008           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
1009
1010           hspdif->State = HAL_SPDIFRX_STATE_READY;
1011
1012           /* Process Unlocked */
1013           __HAL_UNLOCK(hspdif);
1014
1015           return HAL_TIMEOUT;
1016         }
1017         count--;
1018       } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
1019
1020       /* Start reception */
1021       __HAL_SPDIFRX_RCV(hspdif);
1022     }
1023
1024     /* Process Unlocked */
1025     __HAL_UNLOCK(hspdif);
1026
1027     return HAL_OK;
1028   }
1029   else
1030   {
1031     return HAL_BUSY;
1032   }
1033 }
1034
1035 /**
1036   * @brief Receive an amount of data (Data Flow) mode with DMA
1037   * @param hspdif SPDIFRX handle
1038   * @param pData a 32-bit pointer to the Receive data buffer.
1039   * @param Size number of data sample to be received
1040   * @retval HAL status
1041   */
1042 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
1043 {
1044   uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
1045
1046   const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
1047
1048   if ((pData == NULL) || (Size == 0U))
1049   {
1050     return  HAL_ERROR;
1051   }
1052
1053   if ((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_CX))
1054   {
1055     /* Process Locked */
1056     __HAL_LOCK(hspdif);
1057
1058     hspdif->pRxBuffPtr = pData;
1059     hspdif->RxXferSize = Size;
1060     hspdif->RxXferCount = Size;
1061
1062     hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
1063     hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
1064
1065     /* Set the SPDIFRX Rx DMA Half transfer complete callback */
1066     hspdif->hdmaDrRx->XferHalfCpltCallback = SPDIFRX_DMARxHalfCplt;
1067
1068     /* Set the SPDIFRX Rx DMA transfer complete callback */
1069     hspdif->hdmaDrRx->XferCpltCallback = SPDIFRX_DMARxCplt;
1070
1071     /* Set the DMA error callback */
1072     hspdif->hdmaDrRx->XferErrorCallback = SPDIFRX_DMAError;
1073
1074     /* Enable the DMA request */
1075     if (HAL_DMA_Start_IT(hspdif->hdmaDrRx, (uint32_t)&hspdif->Instance->DR, (uint32_t)hspdif->pRxBuffPtr, Size) !=
1076         HAL_OK)
1077     {
1078       /* Set SPDIFRX error */
1079       hspdif->ErrorCode = HAL_SPDIFRX_ERROR_DMA;
1080
1081       /* Set SPDIFRX state */
1082       hspdif->State = HAL_SPDIFRX_STATE_ERROR;
1083
1084       /* Process Unlocked */
1085       __HAL_UNLOCK(hspdif);
1086
1087       return HAL_ERROR;
1088     }
1089
1090     /* Enable RXDMAEN bit in SPDIFRX CR register for data flow reception*/
1091     hspdif->Instance->CR |= SPDIFRX_CR_RXDMAEN;
1092
1093     if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
1094     {
1095       /* Start synchronization */
1096       __HAL_SPDIFRX_SYNC(hspdif);
1097
1098       /* Wait until SYNCD flag is set */
1099       do
1100       {
1101         if (count == 0U)
1102         {
1103           /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt
1104              process */
1105           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
1106           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1107           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
1108           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
1109           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
1110           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
1111           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
1112
1113           hspdif->State = HAL_SPDIFRX_STATE_READY;
1114
1115           /* Process Unlocked */
1116           __HAL_UNLOCK(hspdif);
1117
1118           return HAL_TIMEOUT;
1119         }
1120         count--;
1121       } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
1122
1123       /* Start reception */
1124       __HAL_SPDIFRX_RCV(hspdif);
1125     }
1126
1127     /* Process Unlocked */
1128     __HAL_UNLOCK(hspdif);
1129
1130     return HAL_OK;
1131   }
1132   else
1133   {
1134     return HAL_BUSY;
1135   }
1136 }
1137
1138 /**
1139   * @brief Receive an amount of data (Control Flow) with DMA
1140   * @param hspdif SPDIFRX handle
1141   * @param pData a 32-bit pointer to the Receive data buffer.
1142   * @param Size number of data (Control Flow) sample to be received
1143   * @retval HAL status
1144   */
1145 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
1146 {
1147   uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
1148
1149   const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
1150
1151   if ((pData == NULL) || (Size == 0U))
1152   {
1153     return  HAL_ERROR;
1154   }
1155
1156   if ((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_RX))
1157   {
1158     hspdif->pCsBuffPtr = pData;
1159     hspdif->CsXferSize = Size;
1160     hspdif->CsXferCount = Size;
1161
1162     /* Process Locked */
1163     __HAL_LOCK(hspdif);
1164
1165     hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
1166     hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
1167
1168     /* Set the SPDIFRX Rx DMA Half transfer complete callback */
1169     hspdif->hdmaCsRx->XferHalfCpltCallback = SPDIFRX_DMACxHalfCplt;
1170
1171     /* Set the SPDIFRX Rx DMA transfer complete callback */
1172     hspdif->hdmaCsRx->XferCpltCallback = SPDIFRX_DMACxCplt;
1173
1174     /* Set the DMA error callback */
1175     hspdif->hdmaCsRx->XferErrorCallback = SPDIFRX_DMAError;
1176
1177     /* Enable the DMA request */
1178     if (HAL_DMA_Start_IT(hspdif->hdmaCsRx, (uint32_t)&hspdif->Instance->CSR, (uint32_t)hspdif->pCsBuffPtr, Size) !=
1179         HAL_OK)
1180     {
1181       /* Set SPDIFRX error */
1182       hspdif->ErrorCode = HAL_SPDIFRX_ERROR_DMA;
1183
1184       /* Set SPDIFRX state */
1185       hspdif->State = HAL_SPDIFRX_STATE_ERROR;
1186
1187       /* Process Unlocked */
1188       __HAL_UNLOCK(hspdif);
1189
1190       return HAL_ERROR;
1191     }
1192
1193     /* Enable CBDMAEN bit in SPDIFRX CR register for control flow reception*/
1194     hspdif->Instance->CR |= SPDIFRX_CR_CBDMAEN;
1195
1196     if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
1197     {
1198       /* Start synchronization */
1199       __HAL_SPDIFRX_SYNC(hspdif);
1200
1201       /* Wait until SYNCD flag is set */
1202       do
1203       {
1204         if (count == 0U)
1205         {
1206           /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt
1207              process */
1208           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
1209           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1210           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
1211           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
1212           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
1213           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
1214           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
1215
1216           hspdif->State = HAL_SPDIFRX_STATE_READY;
1217
1218           /* Process Unlocked */
1219           __HAL_UNLOCK(hspdif);
1220
1221           return HAL_TIMEOUT;
1222         }
1223         count--;
1224       } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
1225
1226       /* Start reception */
1227       __HAL_SPDIFRX_RCV(hspdif);
1228     }
1229
1230     /* Process Unlocked */
1231     __HAL_UNLOCK(hspdif);
1232
1233     return HAL_OK;
1234   }
1235   else
1236   {
1237     return HAL_BUSY;
1238   }
1239 }
1240
1241 /**
1242   * @brief stop the audio stream receive from the Media.
1243   * @param hspdif SPDIFRX handle
1244   * @retval None
1245   */
1246 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif)
1247 {
1248   /* Process Locked */
1249   __HAL_LOCK(hspdif);
1250
1251   /* Disable the SPDIFRX DMA requests */
1252   hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
1253   hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
1254
1255   /* Disable the SPDIFRX DMA channel */
1256   if (hspdif->hdmaDrRx != NULL)
1257   {
1258     __HAL_DMA_DISABLE(hspdif->hdmaDrRx);
1259   }
1260   if (hspdif->hdmaCsRx != NULL)
1261   {
1262     __HAL_DMA_DISABLE(hspdif->hdmaCsRx);
1263   }
1264
1265   /* Disable SPDIFRX peripheral */
1266   __HAL_SPDIFRX_IDLE(hspdif);
1267
1268   hspdif->State = HAL_SPDIFRX_STATE_READY;
1269
1270   /* Process Unlocked */
1271   __HAL_UNLOCK(hspdif);
1272
1273   return HAL_OK;
1274 }
1275
1276 /**
1277   * @brief  This function handles SPDIFRX interrupt request.
1278   * @param  hspdif SPDIFRX handle
1279   * @retval HAL status
1280   */
1281 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif)
1282 {
1283   uint32_t itFlag   = hspdif->Instance->SR;
1284   uint32_t itSource = hspdif->Instance->IMR;
1285
1286   /* SPDIFRX in mode Data Flow Reception */
1287   if (((itFlag & SPDIFRX_FLAG_RXNE) == SPDIFRX_FLAG_RXNE) && ((itSource &  SPDIFRX_IT_RXNE) == SPDIFRX_IT_RXNE))
1288   {
1289     __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_RXNE);
1290     SPDIFRX_ReceiveDataFlow_IT(hspdif);
1291   }
1292
1293   /* SPDIFRX in mode Control Flow Reception */
1294   if (((itFlag & SPDIFRX_FLAG_CSRNE) == SPDIFRX_FLAG_CSRNE) && ((itSource &  SPDIFRX_IT_CSRNE) == SPDIFRX_IT_CSRNE))
1295   {
1296     __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_CSRNE);
1297     SPDIFRX_ReceiveControlFlow_IT(hspdif);
1298   }
1299
1300   /* SPDIFRX Overrun error interrupt occurred */
1301   if (((itFlag & SPDIFRX_FLAG_OVR) == SPDIFRX_FLAG_OVR) && ((itSource &  SPDIFRX_IT_OVRIE) == SPDIFRX_IT_OVRIE))
1302   {
1303     __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_OVRIE);
1304
1305     /* Change the SPDIFRX error code */
1306     hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_OVR;
1307
1308     /* the transfer is not stopped */
1309     HAL_SPDIFRX_ErrorCallback(hspdif);
1310   }
1311
1312   /* SPDIFRX Parity error interrupt occurred */
1313   if (((itFlag & SPDIFRX_FLAG_PERR) == SPDIFRX_FLAG_PERR) && ((itSource &  SPDIFRX_IT_PERRIE) == SPDIFRX_IT_PERRIE))
1314   {
1315     __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_PERRIE);
1316
1317     /* Change the SPDIFRX error code */
1318     hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_PE;
1319
1320     /* the transfer is not stopped */
1321     HAL_SPDIFRX_ErrorCallback(hspdif);
1322   }
1323 }
1324
1325 /**
1326   * @brief Rx Transfer (Data flow) half completed callbacks
1327   * @param hspdif SPDIFRX handle
1328   * @retval None
1329   */
1330 __weak void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
1331 {
1332   /* Prevent unused argument(s) compilation warning */
1333   UNUSED(hspdif);
1334
1335   /* NOTE : This function Should not be modified, when the callback is needed,
1336             the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
1337   */
1338 }
1339
1340 /**
1341   * @brief Rx Transfer (Data flow) completed callbacks
1342   * @param hspdif SPDIFRX handle
1343   * @retval None
1344   */
1345 __weak void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
1346 {
1347   /* Prevent unused argument(s) compilation warning */
1348   UNUSED(hspdif);
1349
1350   /* NOTE : This function Should not be modified, when the callback is needed,
1351             the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
1352   */
1353 }
1354
1355 /**
1356   * @brief Rx (Control flow) Transfer half completed callbacks
1357   * @param hspdif SPDIFRX handle
1358   * @retval None
1359   */
1360 __weak void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
1361 {
1362   /* Prevent unused argument(s) compilation warning */
1363   UNUSED(hspdif);
1364
1365   /* NOTE : This function Should not be modified, when the callback is needed,
1366             the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
1367   */
1368 }
1369
1370 /**
1371   * @brief Rx Transfer (Control flow) completed callbacks
1372   * @param hspdif SPDIFRX handle
1373   * @retval None
1374   */
1375 __weak void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
1376 {
1377   /* Prevent unused argument(s) compilation warning */
1378   UNUSED(hspdif);
1379
1380   /* NOTE : This function Should not be modified, when the callback is needed,
1381             the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
1382   */
1383 }
1384
1385 /**
1386   * @brief SPDIFRX error callbacks
1387   * @param hspdif SPDIFRX handle
1388   * @retval None
1389   */
1390 __weak void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif)
1391 {
1392   /* Prevent unused argument(s) compilation warning */
1393   UNUSED(hspdif);
1394
1395   /* NOTE : This function Should not be modified, when the callback is needed,
1396             the HAL_SPDIFRX_ErrorCallback could be implemented in the user file
1397   */
1398 }
1399
1400 /**
1401   * @}
1402   */
1403
1404 /** @defgroup SPDIFRX_Exported_Functions_Group3 Peripheral State and Errors functions
1405   * @ingroup RTEMSBSPsARMSTM32H7
1406   *  @brief   Peripheral State functions
1407   *
1408 @verbatim
1409 ===============================================================================
1410 ##### Peripheral State and Errors functions #####
1411 ===============================================================================
1412 [..]
1413 This subsection permit to get in run-time the status of the peripheral
1414 and the data flow.
1415
1416 @endverbatim
1417   * @{
1418   */
1419
1420 /**
1421   * @brief  Return the SPDIFRX state
1422   * @param  hspdif SPDIFRX handle
1423   * @retval HAL state
1424   */
1425 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef const *const hspdif)
1426 {
1427   return hspdif->State;
1428 }
1429
1430 /**
1431   * @brief  Return the SPDIFRX error code
1432   * @param  hspdif SPDIFRX handle
1433   * @retval SPDIFRX Error Code
1434   */
1435 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef const *const hspdif)
1436 {
1437   return hspdif->ErrorCode;
1438 }
1439
1440 /**
1441   * @}
1442   */
1443
1444 /**
1445   * @brief DMA SPDIFRX receive process (Data flow) complete callback
1446   * @param hdma DMA handle
1447   * @retval None
1448   */
1449 static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma)
1450 {
1451   SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1452
1453   /* Disable Rx DMA Request */
1454   if (hdma->Init.Mode != DMA_CIRCULAR)
1455   {
1456     hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
1457     hspdif->RxXferCount = 0;
1458     hspdif->State = HAL_SPDIFRX_STATE_READY;
1459   }
1460 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1461   hspdif->RxCpltCallback(hspdif);
1462 #else
1463   HAL_SPDIFRX_RxCpltCallback(hspdif);
1464 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1465 }
1466
1467 /**
1468   * @brief DMA SPDIFRX receive process (Data flow) half complete callback
1469   * @param hdma DMA handle
1470   * @retval None
1471   */
1472 static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
1473 {
1474   SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1475
1476 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1477   hspdif->RxHalfCpltCallback(hspdif);
1478 #else
1479   HAL_SPDIFRX_RxHalfCpltCallback(hspdif);
1480 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1481 }
1482
1483
1484 /**
1485   * @brief DMA SPDIFRX receive process (Control flow) complete callback
1486   * @param hdma DMA handle
1487   * @retval None
1488   */
1489 static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma)
1490 {
1491   SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1492
1493   /* Disable Cb DMA Request */
1494   hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
1495   hspdif->CsXferCount = 0;
1496
1497   hspdif->State = HAL_SPDIFRX_STATE_READY;
1498 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1499   hspdif->CxCpltCallback(hspdif);
1500 #else
1501   HAL_SPDIFRX_CxCpltCallback(hspdif);
1502 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1503 }
1504
1505 /**
1506   * @brief DMA SPDIFRX receive process (Control flow) half complete callback
1507   * @param hdma DMA handle
1508   * @retval None
1509   */
1510 static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma)
1511 {
1512   SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1513
1514 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1515   hspdif->CxHalfCpltCallback(hspdif);
1516 #else
1517   HAL_SPDIFRX_CxHalfCpltCallback(hspdif);
1518 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1519 }
1520
1521 /**
1522   * @brief DMA SPDIFRX communication error callback
1523   * @param hdma DMA handle
1524   * @retval None
1525   */
1526 static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma)
1527 {
1528   SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1529
1530   /* Disable Rx and Cb DMA Request */
1531   hspdif->Instance->CR &= (uint16_t)(~(SPDIFRX_CR_RXDMAEN | SPDIFRX_CR_CBDMAEN));
1532   hspdif->RxXferCount = 0;
1533
1534   hspdif->State = HAL_SPDIFRX_STATE_READY;
1535
1536   /* Set the error code and execute error callback*/
1537   hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_DMA;
1538
1539 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1540   /* The transfer is not stopped */
1541   hspdif->ErrorCallback(hspdif);
1542 #else
1543   /* The transfer is not stopped */
1544   HAL_SPDIFRX_ErrorCallback(hspdif);
1545 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1546 }
1547
1548 /**
1549   * @brief Receive an amount of data (Data Flow) with Interrupt
1550   * @param hspdif SPDIFRX handle
1551   * @retval None
1552   */
1553 static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
1554 {
1555   /* Receive data */
1556   (*hspdif->pRxBuffPtr) = hspdif->Instance->DR;
1557   hspdif->pRxBuffPtr++;
1558   hspdif->RxXferCount--;
1559
1560   if (hspdif->RxXferCount == 0U)
1561   {
1562     /* Disable RXNE/PE and OVR interrupts */
1563     __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE | SPDIFRX_IT_PERRIE | SPDIFRX_IT_RXNE);
1564
1565     hspdif->State = HAL_SPDIFRX_STATE_READY;
1566
1567     /* Process Unlocked */
1568     __HAL_UNLOCK(hspdif);
1569
1570 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1571     hspdif->RxCpltCallback(hspdif);
1572 #else
1573     HAL_SPDIFRX_RxCpltCallback(hspdif);
1574 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1575   }
1576 }
1577
1578 /**
1579   * @brief Receive an amount of data (Control Flow) with Interrupt
1580   * @param hspdif SPDIFRX handle
1581   * @retval None
1582   */
1583 static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
1584 {
1585   /* Receive data */
1586   (*hspdif->pCsBuffPtr) = hspdif->Instance->CSR;
1587   hspdif->pCsBuffPtr++;
1588   hspdif->CsXferCount--;
1589
1590   if (hspdif->CsXferCount == 0U)
1591   {
1592     /* Disable CSRNE interrupt */
1593     __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1594
1595     hspdif->State = HAL_SPDIFRX_STATE_READY;
1596
1597     /* Process Unlocked */
1598     __HAL_UNLOCK(hspdif);
1599
1600 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1601     hspdif->CxCpltCallback(hspdif);
1602 #else
1603     HAL_SPDIFRX_CxCpltCallback(hspdif);
1604 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1605   }
1606 }
1607
1608 /**
1609   * @brief This function handles SPDIFRX Communication Timeout.
1610   * @param hspdif SPDIFRX handle
1611   * @param Flag Flag checked
1612   * @param Status Value of the flag expected
1613   * @param Timeout Duration of the timeout
1614   * @param tickstart Tick start value
1615   * @retval HAL status
1616   */
1617 static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag,
1618                                                         FlagStatus Status, uint32_t Timeout, uint32_t tickstart)
1619 {
1620   /* Wait until flag is set */
1621   while (__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) == Status)
1622   {
1623     /* Check for the Timeout */
1624     if (Timeout != HAL_MAX_DELAY)
1625     {
1626       if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
1627       {
1628         /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt
1629            process */
1630         __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
1631         __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1632         __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
1633         __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
1634         __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
1635         __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
1636         __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
1637
1638         hspdif->State = HAL_SPDIFRX_STATE_READY;
1639
1640         /* Process Unlocked */
1641         __HAL_UNLOCK(hspdif);
1642
1643         return HAL_TIMEOUT;
1644       }
1645     }
1646   }
1647
1648   return HAL_OK;
1649 }
1650
1651 /**
1652   * @}
1653   */
1654
1655
1656 #endif /* SPDIFRX */
1657 #endif /* HAL_SPDIFRX_MODULE_ENABLED */
1658 /**
1659   * @}
1660   */
1661
1662 /**
1663   * @}
1664   */