File indexing completed on 2025-05-11 08:23:08
0001
0002
0003
0004
0005
0006
0007
0008
0009
0010
0011
0012
0013
0014
0015
0016
0017
0018
0019
0020
0021
0022
0023
0024
0025
0026
0027
0028
0029
0030
0031
0032
0033
0034
0035
0036
0037
0038
0039
0040
0041
0042
0043
0044
0045
0046
0047
0048
0049
0050
0051
0052
0053
0054
0055
0056
0057
0058
0059
0060
0061
0062
0063
0064
0065
0066
0067
0068
0069
0070
0071
0072
0073
0074
0075
0076
0077
0078
0079
0080
0081
0082
0083
0084
0085
0086
0087
0088
0089
0090
0091
0092
0093
0094
0095
0096
0097
0098
0099
0100
0101
0102
0103 #include "stm32h7xx_hal.h"
0104
0105
0106
0107
0108
0109
0110
0111
0112
0113
0114 #ifdef HAL_RTC_MODULE_ENABLED
0115
0116
0117
0118 #define TAMP_ALL (TAMP_CR1_TAMP1E | TAMP_CR1_TAMP2E | TAMP_CR1_TAMP3E)
0119
0120
0121
0122
0123
0124
0125
0126
0127
0128
0129
0130
0131
0132
0133
0134
0135
0136
0137
0138
0139
0140
0141
0142
0143
0144
0145
0146
0147
0148
0149
0150
0151
0152
0153
0154
0155
0156
0157
0158
0159
0160
0161
0162 HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin)
0163 {
0164 uint32_t tmpreg;
0165
0166
0167 assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge));
0168 assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin));
0169
0170
0171 UNUSED(RTC_TimeStampPin);
0172
0173
0174 __HAL_LOCK(hrtc);
0175
0176 hrtc->State = HAL_RTC_STATE_BUSY;
0177
0178
0179 tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
0180
0181 tmpreg |= TimeStampEdge;
0182
0183
0184 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
0185
0186
0187 hrtc->Instance->CR = (uint32_t)tmpreg;
0188
0189 __HAL_RTC_TIMESTAMP_ENABLE(hrtc);
0190
0191
0192 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
0193
0194
0195 hrtc->State = HAL_RTC_STATE_READY;
0196
0197
0198 __HAL_UNLOCK(hrtc);
0199
0200 return HAL_OK;
0201 }
0202
0203
0204
0205
0206
0207
0208
0209
0210
0211
0212
0213
0214
0215
0216
0217
0218
0219
0220
0221 HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin)
0222 {
0223 uint32_t tmpreg;
0224
0225
0226 assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge));
0227 assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin));
0228
0229
0230 UNUSED(RTC_TimeStampPin);
0231
0232
0233 __HAL_LOCK(hrtc);
0234
0235 hrtc->State = HAL_RTC_STATE_BUSY;
0236
0237
0238 tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
0239
0240 tmpreg |= TimeStampEdge;
0241
0242
0243 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
0244
0245
0246 hrtc->Instance->CR = (uint32_t)tmpreg;
0247
0248 __HAL_RTC_TIMESTAMP_ENABLE(hrtc);
0249
0250
0251 __HAL_RTC_TIMESTAMP_ENABLE_IT(hrtc, RTC_IT_TS);
0252
0253
0254 #if defined(DUAL_CORE)
0255 if (HAL_GetCurrentCPUID() == CM7_CPUID)
0256 {
0257 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
0258 }
0259 else
0260 {
0261 __HAL_RTC_TAMPER_TIMESTAMP_EXTID2_ENABLE_IT();
0262 }
0263 #else
0264 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
0265 #endif
0266
0267 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE();
0268
0269
0270 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
0271
0272 hrtc->State = HAL_RTC_STATE_READY;
0273
0274
0275 __HAL_UNLOCK(hrtc);
0276
0277 return HAL_OK;
0278 }
0279
0280
0281
0282
0283
0284
0285 HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc)
0286 {
0287 uint32_t tmpreg;
0288
0289
0290 __HAL_LOCK(hrtc);
0291
0292 hrtc->State = HAL_RTC_STATE_BUSY;
0293
0294
0295 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
0296
0297
0298 __HAL_RTC_TIMESTAMP_DISABLE_IT(hrtc, RTC_IT_TS);
0299
0300
0301 tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
0302
0303
0304 hrtc->Instance->CR = (uint32_t)tmpreg;
0305
0306
0307 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
0308
0309 hrtc->State = HAL_RTC_STATE_READY;
0310
0311
0312 __HAL_UNLOCK(hrtc);
0313
0314 return HAL_OK;
0315 }
0316
0317
0318
0319
0320
0321
0322
0323 HAL_StatusTypeDef HAL_RTCEx_SetInternalTimeStamp(RTC_HandleTypeDef *hrtc)
0324 {
0325
0326 __HAL_LOCK(hrtc);
0327
0328 hrtc->State = HAL_RTC_STATE_BUSY;
0329
0330
0331 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
0332
0333
0334 __HAL_RTC_INTERNAL_TIMESTAMP_ENABLE(hrtc);
0335
0336
0337 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
0338
0339
0340 hrtc->State = HAL_RTC_STATE_READY;
0341
0342
0343 __HAL_UNLOCK(hrtc);
0344
0345 return HAL_OK;
0346 }
0347
0348
0349
0350
0351
0352
0353 HAL_StatusTypeDef HAL_RTCEx_DeactivateInternalTimeStamp(RTC_HandleTypeDef *hrtc)
0354 {
0355
0356 __HAL_LOCK(hrtc);
0357
0358 hrtc->State = HAL_RTC_STATE_BUSY;
0359
0360
0361 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
0362
0363
0364 __HAL_RTC_INTERNAL_TIMESTAMP_DISABLE(hrtc);
0365
0366
0367 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
0368
0369 hrtc->State = HAL_RTC_STATE_READY;
0370
0371
0372 __HAL_UNLOCK(hrtc);
0373
0374 return HAL_OK;
0375 }
0376
0377
0378
0379
0380
0381
0382
0383
0384
0385
0386
0387
0388 HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTimeStamp, RTC_DateTypeDef *sTimeStampDate, uint32_t Format)
0389 {
0390 uint32_t tmptime;
0391 uint32_t tmpdate;
0392
0393
0394 assert_param(IS_RTC_FORMAT(Format));
0395
0396
0397 tmptime = (uint32_t)(hrtc->Instance->TSTR & RTC_TR_RESERVED_MASK);
0398 tmpdate = (uint32_t)(hrtc->Instance->TSDR & RTC_DR_RESERVED_MASK);
0399
0400
0401 sTimeStamp->Hours = (uint8_t)((tmptime & (RTC_TSTR_HT | RTC_TSTR_HU)) >> RTC_TSTR_HU_Pos);
0402 sTimeStamp->Minutes = (uint8_t)((tmptime & (RTC_TSTR_MNT | RTC_TSTR_MNU)) >> RTC_TSTR_MNU_Pos);
0403 sTimeStamp->Seconds = (uint8_t)((tmptime & (RTC_TSTR_ST | RTC_TSTR_SU)) >> RTC_TSTR_SU_Pos);
0404 sTimeStamp->TimeFormat = (uint8_t)((tmptime & (RTC_TSTR_PM)) >> RTC_TSTR_PM_Pos);
0405 sTimeStamp->SubSeconds = (uint32_t) hrtc->Instance->TSSSR;
0406
0407
0408 sTimeStampDate->Year = 0U;
0409 sTimeStampDate->Month = (uint8_t)((tmpdate & (RTC_TSDR_MT | RTC_TSDR_MU)) >> RTC_TSDR_MU_Pos);
0410 sTimeStampDate->Date = (uint8_t)((tmpdate & (RTC_TSDR_DT | RTC_TSDR_DU)) >> RTC_TSDR_DU_Pos);
0411 sTimeStampDate->WeekDay = (uint8_t)((tmpdate & (RTC_TSDR_WDU)) >> RTC_TSDR_WDU_Pos);
0412
0413
0414 if (Format == RTC_FORMAT_BIN)
0415 {
0416
0417 sTimeStamp->Hours = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Hours);
0418 sTimeStamp->Minutes = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Minutes);
0419 sTimeStamp->Seconds = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Seconds);
0420
0421
0422 sTimeStampDate->Month = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Month);
0423 sTimeStampDate->Date = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Date);
0424 sTimeStampDate->WeekDay = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->WeekDay);
0425 }
0426
0427
0428 __HAL_RTC_INTERNAL_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_ITSF);
0429 __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF);
0430
0431 return HAL_OK;
0432 }
0433
0434
0435
0436
0437
0438
0439
0440
0441
0442
0443
0444
0445
0446
0447
0448
0449
0450
0451
0452
0453
0454
0455
0456
0457
0458
0459
0460
0461
0462
0463
0464
0465 #if defined(TAMP)
0466
0467
0468
0469
0470
0471
0472 HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef * hrtc, RTC_TamperTypeDef * sTamper)
0473 {
0474 uint32_t tmpreg;
0475
0476
0477 TAMP_TypeDef *tamp = (TAMP_TypeDef *)((uint32_t)hrtc->Instance + TAMP_OFFSET);
0478
0479
0480 assert_param(IS_RTC_TAMPER(sTamper->Tamper));
0481 assert_param(IS_RTC_TAMPER_TRIGGER(sTamper->Trigger));
0482 assert_param(IS_RTC_TAMPER_ERASE_MODE(sTamper->NoErase));
0483 assert_param(IS_RTC_TAMPER_MASKFLAG_STATE(sTamper->MaskFlag));
0484 assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection));
0485 assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter));
0486 assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency));
0487 assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration));
0488 assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp));
0489 assert_param(IS_RTC_TAMPER_FILTER_CONFIG_CORRECT(sTamper->Filter, sTamper->Trigger));
0490
0491
0492 tmpreg = tamp->CR2;
0493 tmpreg &= ~((sTamper->Tamper << TAMP_CR2_TAMP1TRG_Pos) | (sTamper->Tamper << TAMP_CR2_TAMP1MSK_Pos) | (sTamper->Tamper << TAMP_CR2_TAMP1NOERASE_Pos));
0494
0495
0496 if ((sTamper->Trigger == RTC_TAMPERTRIGGER_HIGHLEVEL) || (sTamper->Trigger == RTC_TAMPERTRIGGER_FALLINGEDGE))
0497 {
0498 tmpreg |= (sTamper->Tamper << TAMP_CR2_TAMP1TRG_Pos);
0499 }
0500
0501
0502 if (sTamper->MaskFlag != RTC_TAMPERMASK_FLAG_DISABLE)
0503 {
0504 tmpreg |= (sTamper->Tamper << TAMP_CR2_TAMP1MSK_Pos);
0505 }
0506
0507
0508 if (sTamper->NoErase != RTC_TAMPER_ERASE_BACKUP_ENABLE)
0509 {
0510 tmpreg |= (sTamper->Tamper << TAMP_CR2_TAMP1NOERASE_Pos);
0511 }
0512 tamp->CR2 = tmpreg;
0513
0514
0515 tamp->FLTCR = (sTamper->Filter) | (sTamper->SamplingFrequency) | \
0516 (sTamper->PrechargeDuration) | (sTamper->TamperPullUp);
0517
0518
0519 if ((hrtc->Instance->CR & RTC_CR_TAMPTS) != (sTamper->TimeStampOnTamperDetection))
0520 {
0521 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
0522 tmpreg = (hrtc->Instance->CR & ~RTC_CR_TAMPTS);
0523 hrtc->Instance->CR = (tmpreg | (sTamper->TimeStampOnTamperDetection));
0524 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
0525 }
0526
0527
0528 tamp->CR1 |= (sTamper->Tamper);
0529
0530 return HAL_OK;
0531 }
0532 #else
0533
0534
0535
0536
0537
0538
0539
0540 HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef * hrtc, RTC_TamperTypeDef * sTamper)
0541 {
0542 uint32_t tmpreg;
0543
0544
0545 assert_param(IS_RTC_TAMPER(sTamper->Tamper));
0546 assert_param(IS_RTC_TAMPER_TRIGGER(sTamper->Trigger));
0547 assert_param(IS_RTC_TAMPER_ERASE_MODE(sTamper->NoErase));
0548 assert_param(IS_RTC_TAMPER_MASKFLAG_STATE(sTamper->MaskFlag));
0549 assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter));
0550 assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency));
0551 assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration));
0552 assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp));
0553 assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection));
0554 assert_param(IS_RTC_TAMPER_FILTER_CONFIG_CORRECT(sTamper->Filter, sTamper->Trigger));
0555
0556
0557 __HAL_LOCK(hrtc);
0558
0559 hrtc->State = HAL_RTC_STATE_BUSY;
0560
0561
0562 tmpreg = hrtc->Instance->TAMPCR;
0563
0564
0565 tmpreg |= (sTamper->Tamper);
0566
0567
0568 if ((sTamper->Trigger == RTC_TAMPERTRIGGER_HIGHLEVEL) || (sTamper->Trigger == RTC_TAMPERTRIGGER_FALLINGEDGE))
0569 {
0570
0571 tmpreg |= (uint32_t)(sTamper->Tamper << 1U);
0572 }
0573 else
0574 {
0575
0576 tmpreg &= (uint32_t)~(sTamper->Tamper << 1U);
0577 }
0578
0579
0580 if (sTamper->NoErase != RTC_TAMPER_ERASE_BACKUP_ENABLE)
0581 {
0582 if ((sTamper->Tamper & RTC_TAMPER_1) != 0U)
0583 {
0584 tmpreg |= (uint32_t)(RTC_TAMPCR_TAMP1NOERASE);
0585 }
0586 if ((sTamper->Tamper & RTC_TAMPER_2) != 0U)
0587 {
0588 tmpreg |= (uint32_t)(RTC_TAMPCR_TAMP2NOERASE);
0589 }
0590 if ((sTamper->Tamper & RTC_TAMPER_3) != 0U)
0591 {
0592 tmpreg |= (uint32_t)(RTC_TAMPCR_TAMP3NOERASE);
0593 }
0594 }
0595 else
0596 {
0597 if ((sTamper->Tamper & RTC_TAMPER_1) != 0U)
0598 {
0599 tmpreg &= (uint32_t)~(RTC_TAMPCR_TAMP1NOERASE);
0600 }
0601 if ((sTamper->Tamper & RTC_TAMPER_2) != 0U)
0602 {
0603 tmpreg &= (uint32_t)~(RTC_TAMPCR_TAMP2NOERASE);
0604 }
0605 if ((sTamper->Tamper & RTC_TAMPER_3) != 0U)
0606 {
0607 tmpreg &= (uint32_t)~(RTC_TAMPCR_TAMP3NOERASE);
0608 }
0609 }
0610
0611
0612 if (sTamper->MaskFlag != RTC_TAMPERMASK_FLAG_DISABLE)
0613 {
0614 if ((sTamper->Tamper & RTC_TAMPER_1) != 0U)
0615 {
0616 tmpreg |= (uint32_t)(RTC_TAMPCR_TAMP1MF);
0617 }
0618 if ((sTamper->Tamper & RTC_TAMPER_2) != 0U)
0619 {
0620 tmpreg |= (uint32_t)(RTC_TAMPCR_TAMP2MF);
0621 }
0622 if ((sTamper->Tamper & RTC_TAMPER_3) != 0U)
0623 {
0624 tmpreg |= (uint32_t)(RTC_TAMPCR_TAMP3MF);
0625 }
0626 }
0627 else
0628 {
0629 if ((sTamper->Tamper & RTC_TAMPER_1) != 0U)
0630 {
0631 tmpreg &= (uint32_t)~(RTC_TAMPCR_TAMP1MF);
0632 }
0633 if ((sTamper->Tamper & RTC_TAMPER_2) != 0U)
0634 {
0635 tmpreg &= (uint32_t)~(RTC_TAMPCR_TAMP2MF);
0636 }
0637 if ((sTamper->Tamper & RTC_TAMPER_3) != 0U)
0638 {
0639 tmpreg &= (uint32_t)~(RTC_TAMPCR_TAMP3MF);
0640 }
0641 }
0642
0643
0644 tmpreg &= ~(RTC_TAMPERFILTER_MASK | RTC_TAMPERSAMPLINGFREQ_RTCCLK_MASK | \
0645 RTC_TAMPERPRECHARGEDURATION_MASK | RTC_TAMPER_PULLUP_MASK | \
0646 RTC_TIMESTAMPONTAMPERDETECTION_MASK);
0647
0648
0649 tmpreg |= ((uint32_t)sTamper->Filter | \
0650 (uint32_t)sTamper->SamplingFrequency | \
0651 (uint32_t)sTamper->PrechargeDuration | \
0652 (uint32_t)sTamper->TamperPullUp | \
0653 (uint32_t)sTamper->TimeStampOnTamperDetection);
0654
0655
0656 hrtc->Instance->TAMPCR = tmpreg;
0657
0658 hrtc->State = HAL_RTC_STATE_READY;
0659
0660
0661 __HAL_UNLOCK(hrtc);
0662
0663 return HAL_OK;
0664 }
0665 #endif
0666
0667 #if defined(TAMP)
0668
0669
0670
0671
0672
0673
0674 HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef * hrtc, RTC_TamperTypeDef * sTamper)
0675 {
0676 uint32_t tmpreg;
0677
0678
0679 TAMP_TypeDef *tamp = (TAMP_TypeDef *)((uint32_t)hrtc->Instance + TAMP_OFFSET);
0680
0681
0682 assert_param(IS_RTC_TAMPER(sTamper->Tamper));
0683 assert_param(IS_RTC_TAMPER_TRIGGER(sTamper->Trigger));
0684 assert_param(IS_RTC_TAMPER_ERASE_MODE(sTamper->NoErase));
0685 assert_param(IS_RTC_TAMPER_MASKFLAG_STATE(sTamper->MaskFlag));
0686 assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter));
0687 assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency));
0688 assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration));
0689 assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp));
0690 assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection));
0691 assert_param(IS_RTC_TAMPER_FILTER_CONFIG_CORRECT(sTamper->Filter, sTamper->Trigger));
0692
0693
0694 tmpreg = tamp->CR2;
0695
0696
0697 tmpreg &= ~((sTamper->Tamper << TAMP_CR2_TAMP1TRG_Pos) | (sTamper->Tamper << TAMP_CR2_TAMP1MSK_Pos) | (sTamper->Tamper << TAMP_CR2_TAMP1NOERASE_Pos));
0698
0699
0700 if ((sTamper->Trigger == RTC_TAMPERTRIGGER_HIGHLEVEL) || (sTamper->Trigger == RTC_TAMPERTRIGGER_FALLINGEDGE))
0701 {
0702 tmpreg |= (sTamper->Tamper << TAMP_CR2_TAMP1TRG_Pos);
0703 }
0704
0705
0706 if (sTamper->MaskFlag != RTC_TAMPERMASK_FLAG_DISABLE)
0707 {
0708 tmpreg |= (sTamper->Tamper << TAMP_CR2_TAMP1MSK_Pos);
0709 }
0710
0711
0712 if (sTamper->NoErase != RTC_TAMPER_ERASE_BACKUP_ENABLE)
0713 {
0714 tmpreg |= (sTamper->Tamper << TAMP_CR2_TAMP1NOERASE_Pos);
0715 }
0716 tamp->CR2 = tmpreg;
0717
0718
0719 tamp->FLTCR = (sTamper->Filter) | (sTamper->SamplingFrequency) | \
0720 (sTamper->PrechargeDuration) | (sTamper->TamperPullUp);
0721
0722
0723 if ((hrtc->Instance->CR & RTC_CR_TAMPTS) != (sTamper->TimeStampOnTamperDetection))
0724 {
0725 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
0726 tmpreg = (hrtc->Instance->CR & ~RTC_CR_TAMPTS);
0727 hrtc->Instance->CR = (tmpreg | (sTamper->TimeStampOnTamperDetection));
0728 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
0729 }
0730
0731
0732 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
0733 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_FALLING_EDGE();
0734
0735
0736 tamp->IER |= sTamper->Tamper;
0737
0738
0739 tamp->CR1 |= sTamper->Tamper;
0740
0741 return HAL_OK;
0742 }
0743 #else
0744
0745
0746
0747
0748
0749
0750
0751 HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef * hrtc, RTC_TamperTypeDef * sTamper)
0752 {
0753 uint32_t tmpreg;
0754
0755
0756 assert_param(IS_RTC_TAMPER(sTamper->Tamper));
0757 assert_param(IS_RTC_TAMPER_INTERRUPT(sTamper->Interrupt));
0758 assert_param(IS_RTC_TAMPER_TRIGGER(sTamper->Trigger));
0759 assert_param(IS_RTC_TAMPER_ERASE_MODE(sTamper->NoErase));
0760 assert_param(IS_RTC_TAMPER_MASKFLAG_STATE(sTamper->MaskFlag));
0761 assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter));
0762 assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency));
0763 assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration));
0764 assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp));
0765 assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection));
0766 assert_param(IS_RTC_TAMPER_FILTER_CONFIG_CORRECT(sTamper->Filter, sTamper->Trigger));
0767
0768
0769 __HAL_LOCK(hrtc);
0770
0771 hrtc->State = HAL_RTC_STATE_BUSY;
0772
0773
0774 tmpreg = hrtc->Instance->TAMPCR;
0775
0776
0777 tmpreg |= (sTamper->Tamper);
0778
0779
0780 if ((sTamper->Trigger == RTC_TAMPERTRIGGER_HIGHLEVEL) || (sTamper->Trigger == RTC_TAMPERTRIGGER_FALLINGEDGE))
0781 {
0782
0783 tmpreg |= (uint32_t)(sTamper->Tamper << 1U);
0784 }
0785 else
0786 {
0787
0788 tmpreg &= (uint32_t)~(sTamper->Tamper << 1U);
0789 }
0790
0791
0792 if (sTamper->NoErase != RTC_TAMPER_ERASE_BACKUP_ENABLE)
0793 {
0794 if ((sTamper->Tamper & RTC_TAMPER_1) != 0U)
0795 {
0796 tmpreg |= (uint32_t)(RTC_TAMPCR_TAMP1NOERASE);
0797 }
0798 if ((sTamper->Tamper & RTC_TAMPER_2) != 0U)
0799 {
0800 tmpreg |= (uint32_t)(RTC_TAMPCR_TAMP2NOERASE);
0801 }
0802 if ((sTamper->Tamper & RTC_TAMPER_3) != 0U)
0803 {
0804 tmpreg |= (uint32_t)(RTC_TAMPCR_TAMP3NOERASE);
0805 }
0806 }
0807 else
0808 {
0809 if ((sTamper->Tamper & RTC_TAMPER_1) != 0U)
0810 {
0811 tmpreg &= (uint32_t)~(RTC_TAMPCR_TAMP1NOERASE);
0812 }
0813 if ((sTamper->Tamper & RTC_TAMPER_2) != 0U)
0814 {
0815 tmpreg &= (uint32_t)~(RTC_TAMPCR_TAMP2NOERASE);
0816 }
0817 if ((sTamper->Tamper & RTC_TAMPER_3) != 0U)
0818 {
0819 tmpreg &= (uint32_t)~(RTC_TAMPCR_TAMP3NOERASE);
0820 }
0821 }
0822
0823
0824 if (sTamper->MaskFlag != RTC_TAMPERMASK_FLAG_DISABLE)
0825 {
0826 if ((sTamper->Tamper & RTC_TAMPER_1) != 0U)
0827 {
0828 tmpreg |= (uint32_t)(RTC_TAMPCR_TAMP1MF);
0829 }
0830 if ((sTamper->Tamper & RTC_TAMPER_2) != 0U)
0831 {
0832 tmpreg |= (uint32_t)(RTC_TAMPCR_TAMP2MF);
0833 }
0834 if ((sTamper->Tamper & RTC_TAMPER_3) != 0U)
0835 {
0836 tmpreg |= (uint32_t)(RTC_TAMPCR_TAMP3MF);
0837 }
0838 }
0839 else
0840 {
0841 if ((sTamper->Tamper & RTC_TAMPER_1) != 0U)
0842 {
0843 tmpreg &= (uint32_t)~(RTC_TAMPCR_TAMP1MF);
0844 }
0845 if ((sTamper->Tamper & RTC_TAMPER_2) != 0U)
0846 {
0847 tmpreg &= (uint32_t)~(RTC_TAMPCR_TAMP2MF);
0848 }
0849 if ((sTamper->Tamper & RTC_TAMPER_3) != 0U)
0850 {
0851 tmpreg &= (uint32_t)~(RTC_TAMPCR_TAMP3MF);
0852 }
0853 }
0854
0855
0856 tmpreg &= ~(RTC_TAMPERFILTER_MASK | RTC_TAMPERSAMPLINGFREQ_RTCCLK_MASK | \
0857 RTC_TAMPERPRECHARGEDURATION_MASK | RTC_TAMPER_PULLUP_MASK | \
0858 RTC_TIMESTAMPONTAMPERDETECTION_MASK);
0859
0860
0861 tmpreg |= ((uint32_t)sTamper->Filter | \
0862 (uint32_t)sTamper->SamplingFrequency | \
0863 (uint32_t)sTamper->PrechargeDuration | \
0864 (uint32_t)sTamper->TamperPullUp | \
0865 (uint32_t)sTamper->TimeStampOnTamperDetection);
0866
0867
0868 tmpreg |= (uint32_t)sTamper->Interrupt;
0869
0870
0871 hrtc->Instance->TAMPCR = tmpreg;
0872
0873
0874 #if defined(DUAL_CORE)
0875 if (HAL_GetCurrentCPUID() == CM7_CPUID)
0876 {
0877 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
0878 }
0879 else
0880 {
0881 __HAL_RTC_TAMPER_TIMESTAMP_EXTID2_ENABLE_IT();
0882 }
0883 #else
0884 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
0885 #endif
0886
0887 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE();
0888
0889 hrtc->State = HAL_RTC_STATE_READY;
0890
0891
0892 __HAL_UNLOCK(hrtc);
0893
0894 return HAL_OK;
0895 }
0896 #endif
0897
0898 #if defined(TAMP)
0899
0900
0901
0902
0903
0904
0905
0906
0907
0908 HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef * hrtc, uint32_t Tamper)
0909 {
0910
0911 TAMP_TypeDef *tamp = (TAMP_TypeDef *)((uint32_t)hrtc->Instance + TAMP_OFFSET);
0912
0913 assert_param(IS_RTC_TAMPER(Tamper));
0914
0915
0916 tamp->CR1 &= ~Tamper;
0917
0918
0919 tamp->IER &= ~Tamper;
0920
0921
0922 tamp->SCR = Tamper;
0923
0924
0925 tamp->CR2 &= ~((Tamper << TAMP_CR2_TAMP1TRG_Pos) | (Tamper << TAMP_CR2_TAMP1MSK_Pos) | (Tamper << TAMP_CR2_TAMP1NOERASE_Pos));
0926
0927 return HAL_OK;
0928 }
0929 #else
0930
0931
0932
0933
0934
0935
0936
0937
0938
0939
0940 HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef * hrtc, uint32_t Tamper)
0941 {
0942 assert_param(IS_RTC_TAMPER(Tamper));
0943
0944
0945 __HAL_LOCK(hrtc);
0946
0947 hrtc->State = HAL_RTC_STATE_BUSY;
0948
0949
0950 hrtc->Instance->TAMPCR &= ((uint32_t)~Tamper);
0951
0952
0953 if ((Tamper & RTC_TAMPER_1) != 0U)
0954 {
0955 hrtc->Instance->TAMPCR &= ((uint32_t)~(RTC_IT_TAMP | RTC_IT_TAMP1));
0956 }
0957
0958 if ((Tamper & RTC_TAMPER_2) != 0U)
0959 {
0960 hrtc->Instance->TAMPCR &= ((uint32_t)~(RTC_IT_TAMP | RTC_IT_TAMP2));
0961 }
0962
0963 if ((Tamper & RTC_TAMPER_3) != 0U)
0964 {
0965 hrtc->Instance->TAMPCR &= ((uint32_t)~(RTC_IT_TAMP | RTC_IT_TAMP3));
0966 }
0967
0968 hrtc->State = HAL_RTC_STATE_READY;
0969
0970
0971 __HAL_UNLOCK(hrtc);
0972
0973 return HAL_OK;
0974 }
0975 #endif
0976
0977 #if defined(TAMP)
0978
0979
0980
0981
0982
0983
0984 HAL_StatusTypeDef HAL_RTCEx_SetInternalTamper(RTC_HandleTypeDef *hrtc, RTC_InternalTamperTypeDef *sIntTamper)
0985 {
0986
0987 assert_param(IS_RTC_INTERNAL_TAMPER(sIntTamper->IntTamper));
0988 assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sIntTamper->TimeStampOnTamperDetection));
0989
0990
0991 if (READ_BIT(RTC->CR, RTC_CR_TAMPTS) != sIntTamper->TimeStampOnTamperDetection)
0992 {
0993 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
0994 MODIFY_REG(RTC->CR, RTC_CR_TAMPTS, sIntTamper->TimeStampOnTamperDetection);
0995 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
0996 }
0997
0998
0999 SET_BIT(TAMP->CR1, sIntTamper->IntTamper);
1000
1001 return HAL_OK;
1002 }
1003
1004
1005
1006
1007
1008
1009
1010 HAL_StatusTypeDef HAL_RTCEx_SetInternalTamper_IT(RTC_HandleTypeDef *hrtc, RTC_InternalTamperTypeDef *sIntTamper)
1011 {
1012
1013 assert_param(IS_RTC_INTERNAL_TAMPER(sIntTamper->IntTamper));
1014 assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sIntTamper->TimeStampOnTamperDetection));
1015
1016
1017 if (READ_BIT(RTC->CR, RTC_CR_TAMPTS) != sIntTamper->TimeStampOnTamperDetection)
1018 {
1019 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
1020 MODIFY_REG(RTC->CR, RTC_CR_TAMPTS, sIntTamper->TimeStampOnTamperDetection);
1021 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
1022 }
1023
1024
1025 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
1026 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_FALLING_EDGE();
1027
1028 SET_BIT(TAMP->IER, sIntTamper->IntTamper);
1029
1030
1031 SET_BIT(TAMP->CR1, sIntTamper->IntTamper);
1032
1033 return HAL_OK;
1034 }
1035
1036
1037
1038
1039
1040
1041
1042
1043 HAL_StatusTypeDef HAL_RTCEx_DeactivateInternalTamper(RTC_HandleTypeDef *hrtc, uint32_t IntTamper)
1044 {
1045 UNUSED(hrtc);
1046 assert_param(IS_RTC_INTERNAL_TAMPER(IntTamper));
1047
1048
1049 CLEAR_BIT(TAMP->CR1, IntTamper);
1050
1051
1052 CLEAR_BIT(TAMP->IER, IntTamper);
1053
1054
1055 WRITE_REG(TAMP->SCR, IntTamper);
1056
1057 return HAL_OK;
1058 }
1059
1060
1061
1062
1063
1064
1065
1066 HAL_StatusTypeDef HAL_RTCEx_SetActiveTampers(RTC_HandleTypeDef *hrtc, RTC_ActiveTampersTypeDef *sAllTamper)
1067 {
1068 uint32_t IER, CR1, CR2, ATCR1, CR, i, tickstart;
1069
1070 #ifdef USE_FULL_ASSERT
1071 for (i = 0; i < RTC_TAMP_NB; i++)
1072 {
1073 assert_param(IS_RTC_TAMPER_ERASE_MODE(sAllTamper->TampInput[i].NoErase));
1074 assert_param(IS_RTC_TAMPER_MASKFLAG_STATE(sAllTamper->TampInput[i].MaskFlag));
1075
1076 assert_param(!((sAllTamper->TampInput[i].MaskFlag != RTC_TAMPERMASK_FLAG_DISABLE) && (i > RTC_TAMPER_3)));
1077 }
1078
1079 assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sAllTamper->TimeStampOnTamperDetection));
1080 #endif
1081
1082
1083 if (READ_BIT(TAMP->ATOR, TAMP_ATOR_INITS) != 0U)
1084 {
1085
1086 if (HAL_RTCEx_DeactivateActiveTampers(hrtc) != HAL_OK)
1087 {
1088 return HAL_ERROR;
1089 }
1090 }
1091
1092
1093 CR = READ_REG(RTC->CR);
1094 if ((CR & RTC_CR_TAMPTS) != (sAllTamper->TimeStampOnTamperDetection))
1095 {
1096 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
1097 MODIFY_REG(RTC->CR, RTC_CR_TAMPTS, sAllTamper->TimeStampOnTamperDetection);
1098 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
1099 }
1100
1101 CR1 = READ_REG(TAMP->CR1);
1102 CR2 = READ_REG(TAMP->CR2);
1103 IER = READ_REG(TAMP->IER);
1104
1105
1106 ATCR1 = (sAllTamper->ActiveFilter | (sAllTamper->ActiveOutputChangePeriod << TAMP_ATCR1_ATPER_Pos) | sAllTamper->ActiveAsyncPrescaler);
1107
1108
1109 for (i = 0; i < RTC_TAMP_NB; i++)
1110 {
1111 if (sAllTamper->TampInput[i].Enable != RTC_ATAMP_DISABLE)
1112 {
1113 CR1 |= (TAMP_CR1_TAMP1E << i);
1114 ATCR1 |= (TAMP_ATCR1_TAMP1AM << i);
1115
1116 if (sAllTamper->TampInput[i].Interrupt != RTC_ATAMP_INTERRUPT_DISABLE)
1117 {
1118
1119 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
1120 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE();
1121
1122
1123 IER |= (TAMP_IER_TAMP1IE << i);
1124 }
1125
1126 if (sAllTamper->TampInput[i].MaskFlag != RTC_TAMPERMASK_FLAG_DISABLE)
1127 {
1128 CR2 |= (TAMP_CR2_TAMP1MSK << i);
1129 }
1130
1131 if (sAllTamper->TampInput[i].NoErase != RTC_TAMPER_ERASE_BACKUP_ENABLE)
1132 {
1133 CR2 |= (TAMP_CR2_TAMP1NOERASE << i);
1134 }
1135
1136
1137 if (sAllTamper->TampInput[i].Output != i)
1138 {
1139 ATCR1 |= TAMP_ATCR1_ATOSHARE;
1140 ATCR1 |= sAllTamper->TampInput[i].Output << ((2u * i) + TAMP_ATCR1_ATOSEL1_Pos);
1141 }
1142 }
1143 }
1144
1145 WRITE_REG(TAMP->IER, IER);
1146 WRITE_REG(TAMP->IER, IER);
1147 WRITE_REG(TAMP->ATCR1, ATCR1);
1148 #if defined(TAMP_ATCR2_ATOSEL1)
1149 WRITE_REG(TAMP->ATCR2, ATCR2);
1150 #endif
1151 WRITE_REG(TAMP->CR2, CR2);
1152 WRITE_REG(TAMP->CR1, CR1);
1153
1154
1155 for (i = 0; i < RTC_ATAMP_SEED_NB_UINT32; i++)
1156 {
1157 WRITE_REG(TAMP->ATSEEDR, sAllTamper->Seed[i]);
1158 }
1159
1160
1161 tickstart = HAL_GetTick();
1162 while (READ_BIT(TAMP->ATOR, TAMP_ATOR_SEEDF) != 0u)
1163 {
1164 if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
1165 {
1166 hrtc->State = HAL_RTC_STATE_TIMEOUT;
1167 return HAL_TIMEOUT;
1168 }
1169 }
1170
1171 return HAL_OK;
1172 }
1173
1174
1175
1176
1177
1178
1179
1180 HAL_StatusTypeDef HAL_RTCEx_SetActiveSeed(RTC_HandleTypeDef *hrtc, uint32_t *pSeed)
1181 {
1182 uint32_t i, tickstart;
1183
1184
1185 if (READ_BIT(TAMP->ATOR, TAMP_ATOR_INITS) == 0U)
1186 {
1187 return HAL_ERROR;
1188 }
1189
1190 for (i = 0; i < RTC_ATAMP_SEED_NB_UINT32; i++)
1191 {
1192 WRITE_REG(TAMP->ATSEEDR, pSeed[i]);
1193 }
1194
1195
1196 tickstart = HAL_GetTick();
1197 while (READ_BIT(TAMP->ATOR, TAMP_ATOR_SEEDF) != 0U)
1198 {
1199 if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
1200 {
1201 hrtc->State = HAL_RTC_STATE_TIMEOUT;
1202 return HAL_TIMEOUT;
1203 }
1204 }
1205
1206 return HAL_OK;
1207 }
1208
1209
1210
1211
1212
1213
1214 HAL_StatusTypeDef HAL_RTCEx_DeactivateActiveTampers(RTC_HandleTypeDef *hrtc)
1215 {
1216
1217 uint32_t ATamp_mask = READ_BIT(TAMP->ATCR1, TAMP_ALL);
1218
1219 UNUSED(hrtc);
1220
1221 CLEAR_BIT(TAMP->CR1, ATamp_mask);
1222
1223 CLEAR_BIT(TAMP->CR2, (ATamp_mask | ((ATamp_mask & (TAMP_ATCR1_TAMP1AM | TAMP_ATCR1_TAMP2AM | TAMP_ATCR1_TAMP3AM)) << TAMP_CR2_TAMP1MSK_Pos)));
1224
1225
1226 WRITE_REG(TAMP->SCR, ATamp_mask);
1227
1228
1229 CLEAR_BIT(TAMP->IER, ATamp_mask);
1230
1231 CLEAR_BIT(TAMP->ATCR1, TAMP_ALL | TAMP_ATCR1_ATCKSEL | TAMP_ATCR1_ATPER | \
1232 TAMP_ATCR1_ATOSHARE | TAMP_ATCR1_FLTEN);
1233
1234 #if defined(TAMP_ATCR2_ATOSEL1)
1235 CLEAR_BIT(TAMP->ATCR2, TAMP_ATCR2_ATOSEL1 | TAMP_ATCR2_ATOSEL2 | TAMP_ATCR2_ATOSEL3 | TAMP_ATCR2_ATOSEL4 |
1236 TAMP_ATCR2_ATOSEL5 | TAMP_ATCR2_ATOSEL6 | TAMP_ATCR2_ATOSEL7 | TAMP_ATCR2_ATOSEL8);
1237 #endif
1238
1239 return HAL_OK;
1240 }
1241 #endif
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258 #if defined(TAMP)
1259 void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc)
1260 {
1261
1262
1263 TAMP_TypeDef *tamp = (TAMP_TypeDef *)((uint32_t)hrtc->Instance + TAMP_OFFSET);
1264
1265
1266 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG();
1267
1268 if ((hrtc->Instance->MISR & RTC_MISR_TSMF) != 0u)
1269 {
1270 #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
1271
1272 hrtc->TimeStampEventCallback(hrtc);
1273 #else
1274 HAL_RTCEx_TimeStampEventCallback(hrtc);
1275 #endif
1276
1277 hrtc->Instance->SCR = RTC_SCR_CTSF;
1278 }
1279
1280
1281 uint32_t tmp = tamp->MISR;
1282
1283
1284 tamp->SCR = tmp;
1285
1286
1287 if ((tmp & RTC_TAMPER_1) == RTC_TAMPER_1)
1288 {
1289 #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
1290
1291 hrtc->Tamper1EventCallback(hrtc);
1292 #else
1293
1294 HAL_RTCEx_Tamper1EventCallback(hrtc);
1295 #endif
1296 }
1297
1298
1299 if ((tmp & RTC_TAMPER_2) == RTC_TAMPER_2)
1300 {
1301 #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
1302
1303 hrtc->Tamper2EventCallback(hrtc);
1304 #else
1305
1306 HAL_RTCEx_Tamper2EventCallback(hrtc);
1307 #endif
1308 }
1309
1310
1311 if ((tmp & RTC_TAMPER_3) == RTC_TAMPER_3)
1312 {
1313 #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
1314
1315 hrtc->Tamper3EventCallback(hrtc);
1316 #else
1317
1318 HAL_RTCEx_Tamper3EventCallback(hrtc);
1319 #endif
1320 }
1321
1322
1323 if ((tmp & RTC_INT_TAMPER_1) == RTC_INT_TAMPER_1)
1324 {
1325 #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
1326
1327 hrtc->InternalTamper1EventCallback(hrtc);
1328 #else
1329
1330 HAL_RTCEx_InternalTamper1EventCallback(hrtc);
1331 #endif
1332 }
1333
1334
1335 if ((tmp & RTC_INT_TAMPER_2) == RTC_INT_TAMPER_2)
1336 {
1337 #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
1338
1339 hrtc->InternalTamper2EventCallback(hrtc);
1340 #else
1341
1342 HAL_RTCEx_InternalTamper2EventCallback(hrtc);
1343 #endif
1344 }
1345
1346
1347 if ((tmp & RTC_INT_TAMPER_3) == RTC_INT_TAMPER_3)
1348 {
1349 #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
1350
1351 hrtc->InternalTamper3EventCallback(hrtc);
1352 #else
1353
1354 HAL_RTCEx_InternalTamper3EventCallback(hrtc);
1355 #endif
1356 }
1357
1358
1359 if ((tmp & RTC_INT_TAMPER_4) == RTC_INT_TAMPER_4)
1360 {
1361 #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
1362
1363 hrtc->InternalTamper4EventCallback(hrtc);
1364 #else
1365
1366 HAL_RTCEx_InternalTamper4EventCallback(hrtc);
1367 #endif
1368 }
1369
1370
1371 if ((tmp & RTC_INT_TAMPER_5) == RTC_INT_TAMPER_5)
1372 {
1373 #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
1374
1375 hrtc->InternalTamper5EventCallback(hrtc);
1376 #else
1377
1378 HAL_RTCEx_InternalTamper5EventCallback(hrtc);
1379 #endif
1380 }
1381
1382
1383 if ((tmp & RTC_INT_TAMPER_6) == RTC_INT_TAMPER_6)
1384 {
1385 #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
1386
1387 hrtc->InternalTamper6EventCallback(hrtc);
1388 #else
1389
1390 HAL_RTCEx_InternalTamper6EventCallback(hrtc);
1391 #endif
1392 }
1393
1394
1395 if ((tmp & RTC_INT_TAMPER_8) == RTC_INT_TAMPER_8)
1396 {
1397 #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
1398
1399 hrtc->InternalTamper8EventCallback(hrtc);
1400 #else
1401
1402 HAL_RTCEx_InternalTamper8EventCallback(hrtc);
1403 #endif
1404 }
1405
1406
1407 hrtc->State = HAL_RTC_STATE_READY;
1408 }
1409 #else
1410 void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc)
1411 {
1412
1413 #if defined(DUAL_CORE)
1414 if (HAL_GetCurrentCPUID() == CM7_CPUID)
1415 {
1416 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG();
1417 }
1418 else
1419 {
1420 __HAL_RTC_TAMPER_TIMESTAMP_EXTID2_CLEAR_FLAG();
1421 }
1422 #else
1423 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG();
1424 #endif
1425
1426
1427 if (__HAL_RTC_TIMESTAMP_GET_IT_SOURCE(hrtc, RTC_IT_TS) != 0U)
1428 {
1429
1430 if (__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) != 0U)
1431 {
1432
1433 #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
1434 hrtc->TimeStampEventCallback(hrtc);
1435 #else
1436 HAL_RTCEx_TimeStampEventCallback(hrtc);
1437 #endif
1438
1439
1440 __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF);
1441 }
1442 }
1443
1444
1445 if (__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP1) != 0U)
1446 {
1447
1448 if (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F) != 0U)
1449 {
1450
1451 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP1F);
1452
1453
1454 #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
1455 hrtc->Tamper1EventCallback(hrtc);
1456 #else
1457 HAL_RTCEx_Tamper1EventCallback(hrtc);
1458 #endif
1459 }
1460 }
1461
1462
1463 if (__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP2) != 0U)
1464 {
1465
1466 if (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP2F) != 0U)
1467 {
1468
1469 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP2F);
1470
1471
1472 #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
1473 hrtc->Tamper2EventCallback(hrtc);
1474 #else
1475 HAL_RTCEx_Tamper2EventCallback(hrtc);
1476 #endif
1477 }
1478 }
1479
1480
1481 if (__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP3) != 0U)
1482 {
1483
1484 if (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP3F) != 0U)
1485 {
1486
1487 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP3F);
1488
1489
1490 #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
1491 hrtc->Tamper3EventCallback(hrtc);
1492 #else
1493 HAL_RTCEx_Tamper3EventCallback(hrtc);
1494 #endif
1495 }
1496 }
1497
1498
1499 hrtc->State = HAL_RTC_STATE_READY;
1500 }
1501 #endif
1502
1503
1504
1505
1506
1507
1508 __weak void HAL_RTCEx_TimeStampEventCallback(RTC_HandleTypeDef *hrtc)
1509 {
1510
1511 UNUSED(hrtc);
1512
1513
1514
1515
1516 }
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533 __weak void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef * hrtc)
1534 {
1535
1536 UNUSED(hrtc);
1537
1538
1539
1540
1541 }
1542
1543
1544
1545
1546
1547
1548 __weak void HAL_RTCEx_Tamper2EventCallback(RTC_HandleTypeDef * hrtc)
1549 {
1550
1551 UNUSED(hrtc);
1552
1553
1554
1555
1556 }
1557
1558
1559
1560
1561
1562
1563 __weak void HAL_RTCEx_Tamper3EventCallback(RTC_HandleTypeDef * hrtc)
1564 {
1565
1566 UNUSED(hrtc);
1567
1568
1569
1570
1571 }
1572
1573 #if defined(TAMP)
1574
1575
1576
1577
1578
1579 __weak void HAL_RTCEx_InternalTamper1EventCallback(RTC_HandleTypeDef *hrtc)
1580 {
1581
1582 UNUSED(hrtc);
1583
1584
1585
1586
1587 }
1588
1589
1590
1591
1592
1593
1594 __weak void HAL_RTCEx_InternalTamper2EventCallback(RTC_HandleTypeDef *hrtc)
1595 {
1596
1597 UNUSED(hrtc);
1598
1599
1600
1601
1602 }
1603
1604
1605
1606
1607
1608
1609 __weak void HAL_RTCEx_InternalTamper3EventCallback(RTC_HandleTypeDef *hrtc)
1610 {
1611
1612 UNUSED(hrtc);
1613
1614
1615
1616
1617 }
1618
1619
1620
1621
1622
1623
1624 __weak void HAL_RTCEx_InternalTamper4EventCallback(RTC_HandleTypeDef *hrtc)
1625 {
1626
1627 UNUSED(hrtc);
1628
1629
1630
1631
1632 }
1633
1634
1635
1636
1637
1638
1639 __weak void HAL_RTCEx_InternalTamper5EventCallback(RTC_HandleTypeDef *hrtc)
1640 {
1641
1642 UNUSED(hrtc);
1643
1644
1645
1646
1647 }
1648
1649
1650
1651
1652
1653
1654 __weak void HAL_RTCEx_InternalTamper6EventCallback(RTC_HandleTypeDef *hrtc)
1655 {
1656
1657 UNUSED(hrtc);
1658
1659
1660
1661
1662 }
1663
1664
1665
1666
1667
1668
1669 __weak void HAL_RTCEx_InternalTamper8EventCallback(RTC_HandleTypeDef *hrtc)
1670 {
1671
1672 UNUSED(hrtc);
1673
1674
1675
1676
1677 }
1678 #endif
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696 HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
1697 {
1698 uint32_t tickstart = HAL_GetTick();
1699
1700 while (__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) == 0U)
1701 {
1702 if (__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSOVF) != 0U)
1703 {
1704
1705 __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSOVF);
1706
1707
1708 hrtc->State = HAL_RTC_STATE_ERROR;
1709
1710 return HAL_ERROR;
1711 }
1712
1713 if (Timeout != HAL_MAX_DELAY)
1714 {
1715 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
1716 {
1717 hrtc->State = HAL_RTC_STATE_TIMEOUT;
1718 return HAL_TIMEOUT;
1719 }
1720 }
1721 }
1722
1723
1724 hrtc->State = HAL_RTC_STATE_READY;
1725
1726 return HAL_OK;
1727 }
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745 HAL_StatusTypeDef HAL_RTCEx_PollForTamper1Event(RTC_HandleTypeDef * hrtc, uint32_t Timeout)
1746 {
1747 uint32_t tickstart = HAL_GetTick();
1748
1749
1750 while (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F) == 0U)
1751 {
1752 if (Timeout != HAL_MAX_DELAY)
1753 {
1754 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
1755 {
1756 hrtc->State = HAL_RTC_STATE_TIMEOUT;
1757 return HAL_TIMEOUT;
1758 }
1759 }
1760 }
1761
1762
1763 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP1F);
1764
1765
1766 hrtc->State = HAL_RTC_STATE_READY;
1767
1768 return HAL_OK;
1769 }
1770
1771
1772
1773
1774
1775
1776
1777 HAL_StatusTypeDef HAL_RTCEx_PollForTamper2Event(RTC_HandleTypeDef * hrtc, uint32_t Timeout)
1778 {
1779 uint32_t tickstart = HAL_GetTick();
1780
1781
1782 while (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP2F) == 0U)
1783 {
1784 if (Timeout != HAL_MAX_DELAY)
1785 {
1786 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
1787 {
1788 hrtc->State = HAL_RTC_STATE_TIMEOUT;
1789 return HAL_TIMEOUT;
1790 }
1791 }
1792 }
1793
1794
1795 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP2F);
1796
1797
1798 hrtc->State = HAL_RTC_STATE_READY;
1799
1800 return HAL_OK;
1801 }
1802
1803
1804
1805
1806
1807
1808
1809 HAL_StatusTypeDef HAL_RTCEx_PollForTamper3Event(RTC_HandleTypeDef * hrtc, uint32_t Timeout)
1810 {
1811 uint32_t tickstart = HAL_GetTick();
1812
1813
1814 while (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP3F) == 0U)
1815 {
1816 if (Timeout != HAL_MAX_DELAY)
1817 {
1818 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
1819 {
1820 hrtc->State = HAL_RTC_STATE_TIMEOUT;
1821 return HAL_TIMEOUT;
1822 }
1823 }
1824 }
1825
1826
1827 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP3F);
1828
1829
1830 hrtc->State = HAL_RTC_STATE_READY;
1831
1832 return HAL_OK;
1833 }
1834
1835 #if defined(TAMP)
1836
1837
1838
1839
1840
1841
1842
1843
1844 HAL_StatusTypeDef HAL_RTCEx_PollForInternalTamperEvent(RTC_HandleTypeDef *hrtc, uint32_t IntTamper, uint32_t Timeout)
1845 {
1846 UNUSED(hrtc);
1847 assert_param(IS_RTC_INTERNAL_TAMPER(IntTamper));
1848
1849 uint32_t tickstart = HAL_GetTick();
1850
1851
1852 while (READ_BIT(TAMP->SR, IntTamper) != IntTamper)
1853 {
1854 if (Timeout != HAL_MAX_DELAY)
1855 {
1856 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
1857 {
1858 return HAL_TIMEOUT;
1859 }
1860 }
1861 }
1862
1863
1864 WRITE_REG(TAMP->SCR, IntTamper);
1865
1866 return HAL_OK;
1867 }
1868 #endif
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895 HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock)
1896 {
1897 uint32_t tickstart;
1898
1899
1900 assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock));
1901 assert_param(IS_RTC_WAKEUP_COUNTER(WakeUpCounter));
1902
1903
1904 __HAL_LOCK(hrtc);
1905
1906 hrtc->State = HAL_RTC_STATE_BUSY;
1907
1908
1909 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
1910
1911
1912 CLEAR_BIT(RTC->CR, RTC_CR_WUTE);
1913
1914
1915
1916
1917 #if defined(TAMP)
1918 if (READ_BIT(RTC->ICSR, RTC_ICSR_INITF) == 0U)
1919 {
1920 tickstart = HAL_GetTick();
1921
1922 while (READ_BIT(hrtc->Instance->ICSR, RTC_FLAG_WUTWF) == 0U)
1923 #else
1924 if (READ_BIT(RTC->ISR, RTC_ISR_INITF) == 0U)
1925 {
1926 tickstart = HAL_GetTick();
1927
1928 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == 0U)
1929 #endif
1930 {
1931 if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
1932 {
1933
1934 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
1935
1936 hrtc->State = HAL_RTC_STATE_TIMEOUT;
1937
1938
1939 __HAL_UNLOCK(hrtc);
1940
1941 return HAL_TIMEOUT;
1942 }
1943 }
1944 }
1945
1946
1947 uint32_t CR_tmp = hrtc->Instance->CR;
1948 CR_tmp &= (uint32_t)~RTC_CR_WUCKSEL;
1949 CR_tmp |= (uint32_t)WakeUpClock;
1950 hrtc->Instance->CR = CR_tmp;
1951
1952
1953 hrtc->Instance->WUTR = (uint32_t)WakeUpCounter;
1954
1955
1956 __HAL_RTC_WAKEUPTIMER_ENABLE(hrtc);
1957
1958
1959 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
1960
1961 hrtc->State = HAL_RTC_STATE_READY;
1962
1963
1964 __HAL_UNLOCK(hrtc);
1965
1966 return HAL_OK;
1967 }
1968
1969
1970
1971
1972
1973
1974
1975
1976 HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock)
1977 {
1978 uint32_t tickstart;
1979
1980
1981 assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock));
1982 assert_param(IS_RTC_WAKEUP_COUNTER(WakeUpCounter));
1983
1984
1985 __HAL_LOCK(hrtc);
1986
1987 hrtc->State = HAL_RTC_STATE_BUSY;
1988
1989
1990 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
1991
1992
1993 CLEAR_BIT(RTC->CR, RTC_CR_WUTE);
1994
1995
1996
1997
1998 #if defined(TAMP)
1999 if (READ_BIT(RTC->ICSR, RTC_ICSR_INITF) == 0U)
2000 {
2001 tickstart = HAL_GetTick();
2002
2003 while (READ_BIT(hrtc->Instance->ICSR, RTC_FLAG_WUTWF) == 0U)
2004 #else
2005 if (READ_BIT(RTC->ISR, RTC_ISR_INITF) == 0U)
2006 {
2007 tickstart = HAL_GetTick();
2008
2009 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == 0U)
2010 #endif
2011 {
2012 if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
2013 {
2014
2015 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
2016
2017 hrtc->State = HAL_RTC_STATE_TIMEOUT;
2018
2019
2020 __HAL_UNLOCK(hrtc);
2021
2022 return HAL_TIMEOUT;
2023 }
2024 }
2025 }
2026
2027
2028 hrtc->Instance->WUTR = (uint32_t)WakeUpCounter;
2029
2030
2031 {
2032 uint32_t CR_tmp = hrtc->Instance->CR;
2033 CR_tmp &= (uint32_t)~RTC_CR_WUCKSEL;
2034 CR_tmp |= (uint32_t)WakeUpClock;
2035 hrtc->Instance->CR = CR_tmp;
2036 }
2037
2038
2039 #if defined(DUAL_CORE)
2040 if (HAL_GetCurrentCPUID() == CM7_CPUID)
2041 {
2042 __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT();
2043 }
2044 else
2045 {
2046 __HAL_RTC_WAKEUPTIMER_EXTID2_ENABLE_IT();
2047 }
2048 #else
2049 __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT();
2050 #endif
2051
2052 __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
2053
2054
2055 __HAL_RTC_WAKEUPTIMER_ENABLE_IT(hrtc, RTC_IT_WUT);
2056
2057
2058 __HAL_RTC_WAKEUPTIMER_ENABLE(hrtc);
2059
2060
2061 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
2062
2063 hrtc->State = HAL_RTC_STATE_READY;
2064
2065
2066 __HAL_UNLOCK(hrtc);
2067
2068 return HAL_OK;
2069 }
2070
2071
2072
2073
2074
2075
2076 HAL_StatusTypeDef HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc)
2077 {
2078 uint32_t tickstart;
2079
2080
2081 __HAL_LOCK(hrtc);
2082
2083 hrtc->State = HAL_RTC_STATE_BUSY;
2084
2085
2086 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
2087
2088
2089 __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
2090
2091
2092 __HAL_RTC_WAKEUPTIMER_DISABLE_IT(hrtc, RTC_IT_WUT);
2093
2094 tickstart = HAL_GetTick();
2095
2096 #if defined(TAMP)
2097 while (READ_BIT(hrtc->Instance->ICSR, RTC_FLAG_WUTWF) == 0U)
2098 #else
2099 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == 0U)
2100 #endif
2101 {
2102 if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
2103 {
2104
2105 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
2106
2107 hrtc->State = HAL_RTC_STATE_TIMEOUT;
2108
2109
2110 __HAL_UNLOCK(hrtc);
2111
2112 return HAL_TIMEOUT;
2113 }
2114 }
2115
2116
2117 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
2118
2119 hrtc->State = HAL_RTC_STATE_READY;
2120
2121
2122 __HAL_UNLOCK(hrtc);
2123
2124 return HAL_OK;
2125 }
2126
2127
2128
2129
2130
2131
2132 uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc)
2133 {
2134
2135 return ((uint32_t)(hrtc->Instance->WUTR & RTC_WUTR_WUT));
2136 }
2137
2138
2139
2140
2141
2142
2143 void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc)
2144 {
2145
2146 #if defined(DUAL_CORE)
2147 if (HAL_GetCurrentCPUID() == CM7_CPUID)
2148 {
2149 __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG();
2150 }
2151 else
2152 {
2153 __HAL_RTC_WAKEUPTIMER_EXTID2_CLEAR_FLAG();
2154 }
2155 #else
2156 __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG();
2157 #endif
2158
2159 #if defined(TAMP)
2160
2161 if ((hrtc->Instance->MISR & RTC_MISR_WUTMF) != 0u)
2162 {
2163
2164 hrtc->Instance->SCR = RTC_SCR_CWUTF;
2165
2166
2167 #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
2168
2169 hrtc->WakeUpTimerEventCallback(hrtc);
2170 #else
2171 HAL_RTCEx_WakeUpTimerEventCallback(hrtc);
2172 #endif
2173 }
2174 #else
2175
2176 if (__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) != 0U)
2177 {
2178
2179 __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
2180
2181
2182 #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
2183
2184 hrtc->WakeUpTimerEventCallback(hrtc);
2185 #else
2186 HAL_RTCEx_WakeUpTimerEventCallback(hrtc);
2187 #endif
2188 }
2189 #endif
2190
2191
2192 hrtc->State = HAL_RTC_STATE_READY;
2193 }
2194
2195
2196
2197
2198
2199
2200 __weak void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef * hrtc)
2201 {
2202
2203 UNUSED(hrtc);
2204
2205
2206
2207
2208 }
2209
2210
2211
2212
2213
2214
2215
2216
2217 HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef * hrtc, uint32_t Timeout)
2218 {
2219 uint32_t tickstart = HAL_GetTick();
2220
2221 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) == 0U)
2222 {
2223 if (Timeout != HAL_MAX_DELAY)
2224 {
2225 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
2226 {
2227 hrtc->State = HAL_RTC_STATE_TIMEOUT;
2228 return HAL_TIMEOUT;
2229 }
2230 }
2231 }
2232
2233
2234 __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
2235
2236
2237 hrtc->State = HAL_RTC_STATE_READY;
2238
2239 return HAL_OK;
2240 }
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273
2274
2275
2276 void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef * hrtc, uint32_t BackupRegister, uint32_t Data)
2277 {
2278 uint32_t tmp;
2279
2280
2281 assert_param(IS_RTC_BKP(BackupRegister));
2282
2283
2284 #if defined(TAMP)
2285 tmp = (uint32_t) & (((TAMP_TypeDef *)((uint32_t)hrtc->Instance + TAMP_OFFSET))->BKP0R);
2286 #else
2287 tmp = (uint32_t) & (hrtc->Instance->BKP0R);
2288 #endif
2289
2290 tmp += (BackupRegister * 4U);
2291
2292
2293 *(__IO uint32_t *)tmp = (uint32_t)Data;
2294 }
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304
2305 uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef * hrtc, uint32_t BackupRegister)
2306 {
2307 uint32_t tmp;
2308
2309
2310 assert_param(IS_RTC_BKP(BackupRegister));
2311
2312
2313 #if defined(TAMP)
2314 tmp = (uint32_t) & (((TAMP_TypeDef *)((uint32_t)hrtc->Instance + TAMP_OFFSET))->BKP0R);
2315 #else
2316 tmp = (uint32_t) & (hrtc->Instance->BKP0R);
2317 #endif
2318
2319 tmp += (BackupRegister * 4U);
2320
2321
2322 return (*(__IO uint32_t *)tmp);
2323 }
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373
2374
2375
2376 HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef * hrtc, uint32_t SmoothCalibPeriod, uint32_t SmoothCalibPlusPulses, uint32_t SmoothCalibMinusPulsesValue)
2377 {
2378 uint32_t tickstart;
2379
2380
2381 assert_param(IS_RTC_SMOOTH_CALIB_PERIOD(SmoothCalibPeriod));
2382 assert_param(IS_RTC_SMOOTH_CALIB_PLUS(SmoothCalibPlusPulses));
2383 assert_param(IS_RTC_SMOOTH_CALIB_MINUS(SmoothCalibMinusPulsesValue));
2384
2385
2386 __HAL_LOCK(hrtc);
2387
2388 hrtc->State = HAL_RTC_STATE_BUSY;
2389
2390
2391 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
2392
2393 #if defined(TAMP)
2394
2395 if ((hrtc->Instance->ICSR & RTC_ICSR_RECALPF) != 0U)
2396 {
2397 tickstart = HAL_GetTick();
2398
2399
2400 while ((hrtc->Instance->ICSR & RTC_ICSR_RECALPF) != 0U)
2401 #else
2402
2403 if ((hrtc->Instance->ISR & RTC_ISR_RECALPF) != 0U)
2404 {
2405 tickstart = HAL_GetTick();
2406
2407
2408 while ((hrtc->Instance->ISR & RTC_ISR_RECALPF) != 0U)
2409 #endif
2410 {
2411 if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
2412 {
2413
2414 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
2415
2416
2417 hrtc->State = HAL_RTC_STATE_TIMEOUT;
2418
2419
2420 __HAL_UNLOCK(hrtc);
2421
2422 return HAL_TIMEOUT;
2423 }
2424 }
2425 }
2426
2427
2428 MODIFY_REG(hrtc->Instance->CALR, (RTC_CALR_CALP | RTC_CALR_CALW8 | RTC_CALR_CALW16 | RTC_CALR_CALM), (uint32_t)(SmoothCalibPeriod | SmoothCalibPlusPulses | SmoothCalibMinusPulsesValue));
2429
2430
2431 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
2432
2433
2434 hrtc->State = HAL_RTC_STATE_READY;
2435
2436
2437 __HAL_UNLOCK(hrtc);
2438
2439 return HAL_OK;
2440 }
2441
2442
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454 HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef * hrtc, uint32_t ShiftAdd1S, uint32_t ShiftSubFS)
2455 {
2456 uint32_t tickstart;
2457
2458
2459 assert_param(IS_RTC_SHIFT_ADD1S(ShiftAdd1S));
2460 assert_param(IS_RTC_SHIFT_SUBFS(ShiftSubFS));
2461
2462
2463 __HAL_LOCK(hrtc);
2464
2465 hrtc->State = HAL_RTC_STATE_BUSY;
2466
2467
2468 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
2469
2470 tickstart = HAL_GetTick();
2471
2472
2473 #if defined(TAMP)
2474 while ((hrtc->Instance->ICSR & RTC_ICSR_SHPF) != 0U)
2475 #else
2476 while ((hrtc->Instance->ISR & RTC_ISR_SHPF) != 0U)
2477 #endif
2478 {
2479 if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
2480 {
2481
2482 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
2483
2484 hrtc->State = HAL_RTC_STATE_TIMEOUT;
2485
2486
2487 __HAL_UNLOCK(hrtc);
2488
2489 return HAL_TIMEOUT;
2490 }
2491 }
2492
2493
2494 if ((hrtc->Instance->CR & RTC_CR_REFCKON) == 0U)
2495 {
2496
2497 hrtc->Instance->SHIFTR = (uint32_t)(uint32_t)(ShiftSubFS) | (uint32_t)(ShiftAdd1S);
2498
2499
2500 if ((hrtc->Instance->CR & RTC_CR_BYPSHAD) == 0U)
2501 {
2502 if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
2503 {
2504
2505 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
2506
2507 hrtc->State = HAL_RTC_STATE_ERROR;
2508
2509
2510 __HAL_UNLOCK(hrtc);
2511
2512 return HAL_ERROR;
2513 }
2514 }
2515 }
2516 else
2517 {
2518
2519 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
2520
2521
2522 hrtc->State = HAL_RTC_STATE_ERROR;
2523
2524
2525 __HAL_UNLOCK(hrtc);
2526
2527 return HAL_ERROR;
2528 }
2529
2530
2531 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
2532
2533
2534 hrtc->State = HAL_RTC_STATE_READY;
2535
2536
2537 __HAL_UNLOCK(hrtc);
2538
2539 return HAL_OK;
2540 }
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551 HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef * hrtc, uint32_t CalibOutput)
2552 {
2553
2554 assert_param(IS_RTC_CALIB_OUTPUT(CalibOutput));
2555
2556
2557 __HAL_LOCK(hrtc);
2558
2559 hrtc->State = HAL_RTC_STATE_BUSY;
2560
2561
2562 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
2563
2564
2565 hrtc->Instance->CR &= (uint32_t)~RTC_CR_COSEL;
2566
2567
2568 hrtc->Instance->CR |= (uint32_t)CalibOutput;
2569
2570 __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(hrtc);
2571
2572
2573 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
2574
2575
2576 hrtc->State = HAL_RTC_STATE_READY;
2577
2578
2579 __HAL_UNLOCK(hrtc);
2580
2581 return HAL_OK;
2582 }
2583
2584
2585
2586
2587
2588
2589 HAL_StatusTypeDef HAL_RTCEx_DeactivateCalibrationOutPut(RTC_HandleTypeDef * hrtc)
2590 {
2591
2592 __HAL_LOCK(hrtc);
2593
2594 hrtc->State = HAL_RTC_STATE_BUSY;
2595
2596
2597 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
2598
2599 __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(hrtc);
2600
2601
2602 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
2603
2604
2605 hrtc->State = HAL_RTC_STATE_READY;
2606
2607
2608 __HAL_UNLOCK(hrtc);
2609
2610 return HAL_OK;
2611 }
2612
2613
2614
2615
2616
2617
2618 HAL_StatusTypeDef HAL_RTCEx_SetRefClock(RTC_HandleTypeDef * hrtc)
2619 {
2620 HAL_StatusTypeDef status;
2621
2622 __HAL_LOCK(hrtc);
2623
2624 hrtc->State = HAL_RTC_STATE_BUSY;
2625
2626
2627 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
2628
2629
2630 status = RTC_EnterInitMode(hrtc);
2631 if (status == HAL_OK)
2632 {
2633 __HAL_RTC_CLOCKREF_DETECTION_ENABLE(hrtc);
2634
2635
2636 status = RTC_ExitInitMode(hrtc);
2637 }
2638
2639
2640 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
2641 if (status == HAL_OK)
2642 {
2643
2644 hrtc->State = HAL_RTC_STATE_READY;
2645 }
2646
2647 __HAL_UNLOCK(hrtc);
2648
2649 return HAL_OK;
2650 }
2651
2652
2653
2654
2655
2656
2657 HAL_StatusTypeDef HAL_RTCEx_DeactivateRefClock(RTC_HandleTypeDef * hrtc)
2658 {
2659 HAL_StatusTypeDef status;
2660
2661 __HAL_LOCK(hrtc);
2662
2663 hrtc->State = HAL_RTC_STATE_BUSY;
2664
2665
2666 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
2667
2668
2669 status = RTC_EnterInitMode(hrtc);
2670 if (status == HAL_OK)
2671 {
2672 __HAL_RTC_CLOCKREF_DETECTION_DISABLE(hrtc);
2673
2674
2675 status = RTC_ExitInitMode(hrtc);
2676 }
2677
2678
2679 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
2680
2681 if (status == HAL_OK)
2682 {
2683
2684 hrtc->State = HAL_RTC_STATE_READY;
2685
2686 }
2687
2688
2689 __HAL_UNLOCK(hrtc);
2690
2691 return HAL_OK;
2692 }
2693
2694
2695
2696
2697
2698
2699
2700
2701 HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef * hrtc)
2702 {
2703
2704 __HAL_LOCK(hrtc);
2705
2706 hrtc->State = HAL_RTC_STATE_BUSY;
2707
2708
2709 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
2710
2711
2712 hrtc->Instance->CR |= (uint8_t)RTC_CR_BYPSHAD;
2713
2714
2715 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
2716
2717
2718 hrtc->State = HAL_RTC_STATE_READY;
2719
2720
2721 __HAL_UNLOCK(hrtc);
2722
2723 return HAL_OK;
2724 }
2725
2726
2727
2728
2729
2730
2731
2732
2733 HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef * hrtc)
2734 {
2735
2736 __HAL_LOCK(hrtc);
2737
2738 hrtc->State = HAL_RTC_STATE_BUSY;
2739
2740
2741 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
2742
2743
2744 hrtc->Instance->CR &= ((uint8_t)~RTC_CR_BYPSHAD);
2745
2746
2747 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
2748
2749
2750 hrtc->State = HAL_RTC_STATE_READY;
2751
2752
2753 __HAL_UNLOCK(hrtc);
2754
2755 return HAL_OK;
2756 }
2757
2758 #if defined(TAMP)
2759
2760
2761
2762
2763
2764
2765
2766
2767 HAL_StatusTypeDef HAL_RTCEx_MonotonicCounterIncrement(RTC_HandleTypeDef *hrtc, uint32_t Instance)
2768 {
2769 UNUSED(hrtc);
2770 UNUSED(Instance);
2771
2772
2773 CLEAR_REG(TAMP->COUNTR);
2774
2775 return HAL_OK;
2776 }
2777
2778
2779
2780
2781
2782
2783
2784
2785
2786
2787 HAL_StatusTypeDef HAL_RTCEx_MonotonicCounterGet(RTC_HandleTypeDef *hrtc, uint32_t *Counter, uint32_t Instance)
2788 {
2789 UNUSED(hrtc);
2790 UNUSED(Instance);
2791
2792
2793 *Counter = READ_REG(TAMP->COUNTR);
2794
2795 return HAL_OK;
2796 }
2797 #endif
2798
2799
2800
2801
2802
2803
2804
2805
2806
2807
2808
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818
2819
2820
2821
2822
2823 __weak void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef * hrtc)
2824 {
2825
2826 UNUSED(hrtc);
2827
2828
2829
2830
2831 }
2832
2833
2834
2835
2836
2837
2838
2839 HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef * hrtc, uint32_t Timeout)
2840 {
2841 uint32_t tickstart = HAL_GetTick();
2842
2843 while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBF) == 0U)
2844 {
2845 if (Timeout != HAL_MAX_DELAY)
2846 {
2847 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
2848 {
2849 hrtc->State = HAL_RTC_STATE_TIMEOUT;
2850 return HAL_TIMEOUT;
2851 }
2852 }
2853 }
2854
2855
2856 __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF);
2857
2858
2859 hrtc->State = HAL_RTC_STATE_READY;
2860
2861 return HAL_OK;
2862 }
2863
2864
2865
2866
2867
2868
2869
2870
2871
2872
2873 #endif
2874
2875
2876
2877
2878
2879
2880
2881
2882