stm32h7/hal/stm32h7xx_hal_iwdg.c

0001 /**
0002   ******************************************************************************
0003   * @file    stm32h7xx_hal_iwdg.c
0004   * @author  MCD Application Team
0005   * @brief   IWDG HAL module driver.
0006   *          This file provides firmware functions to manage the following
0007   *          functionalities of the Independent Watchdog (IWDG) peripheral:
0008   *           + Initialization and Start functions
0009   *           + IO operation functions
0010   *
0011   ******************************************************************************
0012   * @attention
0013   *
0014   * Copyright (c) 2017 STMicroelectronics.
0015   * All rights reserved.
0016   *
0017   * This software is licensed under terms that can be found in the LICENSE file
0018   * in the root directory of this software component.
0019   * If no LICENSE file comes with this software, it is provided AS-IS.
0020   *
0021   ******************************************************************************
0022   @verbatim
0023   ==============================================================================
0024                     ##### IWDG Generic features #####
0025   ==============================================================================
0026   [..]
0027     (+) The IWDG can be started by either software or hardware (configurable
0028         through option byte).
0029
0030     (+) The IWDG is clocked by the Low-Speed Internal clock (LSI) and thus stays
0031         active even if the main clock fails.
0032
0033     (+) Once the IWDG is started, the LSI is forced ON and both cannot be
0034         disabled. The counter starts counting down from the reset value (0xFFF).
0035         When it reaches the end of count value (0x000) a reset signal is
0036         generated (IWDG reset).
0037
0038     (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
0039         the IWDG_RLR value is reloaded into the counter and the watchdog reset
0040         is prevented.
0041
0042     (+) The IWDG is implemented in the VDD voltage domain that is still functional
0043         in STOP and STANDBY mode (IWDG reset can wake up the CPU from STANDBY).
0044         IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
0045         reset occurs.
0046
0047     (+) Debug mode: When the microcontroller enters debug mode (core halted),
0048         the IWDG counter either continues to work normally or stops, depending
0049         on DBG_IWDG_STOP configuration bit in DBG module, accessible through
0050         __HAL_DBGMCU_FREEZE_IWDG1() or __HAL_DBGMCU_FREEZE2_IWDG2() and
0051         __HAL_DBGMCU_UnFreeze_IWDG1 or __HAL_DBGMCU_UnFreeze2_IWDG2() macros.
0052
0053     [..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
0054          The IWDG timeout may vary due to LSI clock frequency dispersion.
0055          STM32H7xx devices provide the capability to measure the LSI clock
0056          frequency (LSI clock is internally connected to TIM16 CH1 input capture).
0057          The measured value can be used to have an IWDG timeout with an
0058          acceptable accuracy.
0059
0060     [..] Default timeout value (necessary for IWDG_SR status register update):
0061          Constant LSI_VALUE is defined based on the nominal LSI clock frequency.
0062          This frequency being subject to variations as mentioned above, the
0063          default timeout value (defined through constant HAL_IWDG_DEFAULT_TIMEOUT
0064          below) may become too short or too long.
0065          In such cases, this default timeout value can be tuned by redefining
0066          the constant LSI_VALUE at user-application level (based, for instance,
0067          on the measured LSI clock frequency as explained above).
0068
0069                      ##### How to use this driver #####
0070   ==============================================================================
0071   [..]
0072     (#) Use IWDG using HAL_IWDG_Init() function to :
0073       (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
0074            clock is forced ON and IWDG counter starts counting down.
0075       (++) Enable write access to configuration registers:
0076           IWDG_PR, IWDG_RLR and IWDG_WINR.
0077       (++) Configure the IWDG prescaler and counter reload value. This reload
0078            value will be loaded in the IWDG counter each time the watchdog is
0079            reloaded, then the IWDG will start counting down from this value.
0080       (++) Depending on window parameter:
0081         (+++) If Window Init parameter is same as Window register value,
0082              nothing more is done but reload counter value in order to exit
0083              function with exact time base.
0084         (+++) Else modify Window register. This will automatically reload
0085              watchdog counter.
0086       (++) Wait for status flags to be reset.
0087
0088     (#) Then the application program must refresh the IWDG counter at regular
0089         intervals during normal operation to prevent an MCU reset, using
0090         HAL_IWDG_Refresh() function.
0091
0092      *** IWDG HAL driver macros list ***
0093      ====================================
0094      [..]
0095        Below the list of most used macros in IWDG HAL driver:
0096       (+) __HAL_IWDG_START: Enable the IWDG peripheral
0097       (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
0098           the reload register
0099
0100   @endverbatim
0101   */
0102
0103 /* Includes ------------------------------------------------------------------*/
0104 #include "stm32h7xx_hal.h"
0105
0106 /** @addtogroup STM32H7xx_HAL_Driver
0107   * @{
0108   */
0109
0110 #ifdef HAL_IWDG_MODULE_ENABLED
0111 /** @addtogroup IWDG
0112   * @brief IWDG HAL module driver.
0113   * @{
0114   */
0115
0116 /* Private typedef -----------------------------------------------------------*/
0117 /* Private define ------------------------------------------------------------*/
0118 /** @defgroup IWDG_Private_Defines IWDG Private Defines
0119   * @ingroup RTEMSBSPsARMSTM32H7
0120   * @{
0121   */
0122 /* Status register needs up to 5 LSI clock periods divided by the clock
0123    prescaler to be updated. The number of LSI clock periods is upper-rounded to
0124    6 for the timeout value calculation.
0125    The timeout value is calculated using the highest prescaler (256) and
0126    the LSI_VALUE constant. The value of this constant can be changed by the user
0127    to take into account possible LSI clock period variations.
0128    The timeout value is multiplied by 1000 to be converted in milliseconds.
0129    LSI startup time is also considered here by adding LSI_STARTUP_TIME
0130    converted in milliseconds. */
0131 #define HAL_IWDG_DEFAULT_TIMEOUT        (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL))
0132 #define IWDG_KERNEL_UPDATE_FLAGS        (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU)
0133 /**
0134   * @}
0135   */
0136
0137 /* Private macro -------------------------------------------------------------*/
0138 /* Private variables ---------------------------------------------------------*/
0139 /* Private function prototypes -----------------------------------------------*/
0140 /* Exported functions --------------------------------------------------------*/
0141
0142 /** @addtogroup IWDG_Exported_Functions
0143   * @{
0144   */
0145
0146 /** @addtogroup IWDG_Exported_Functions_Group1
0147   *  @brief    Initialization and Start functions.
0148   *
0149 @verbatim
0150  ===============================================================================
0151           ##### Initialization and Start functions #####
0152  ===============================================================================
0153  [..]  This section provides functions allowing to:
0154       (+) Initialize the IWDG according to the specified parameters in the
0155           IWDG_InitTypeDef of associated handle.
0156       (+) Manage Window option.
0157       (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
0158           is reloaded in order to exit function with correct time base.
0159
0160 @endverbatim
0161   * @{
0162   */
0163
0164 /**
0165   * @brief  Initialize the IWDG according to the specified parameters in the
0166   *         IWDG_InitTypeDef and start watchdog. Before exiting function,
0167   *         watchdog is refreshed in order to have correct time base.
0168   * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
0169   *                the configuration information for the specified IWDG module.
0170   * @retval HAL status
0171   */
0172 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
0173 {
0174   uint32_t tickstart;
0175
0176   /* Check the IWDG handle allocation */
0177   if (hiwdg == NULL)
0178   {
0179     return HAL_ERROR;
0180   }
0181
0182   /* Check the parameters */
0183   assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
0184   assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
0185   assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
0186   assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window));
0187
0188   /* Enable IWDG. LSI is turned on automatically */
0189   __HAL_IWDG_START(hiwdg);
0190
0191   /* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers by writing
0192   0x5555 in KR */
0193   IWDG_ENABLE_WRITE_ACCESS(hiwdg);
0194
0195   /* Write to IWDG registers the Prescaler & Reload values to work with */
0196   hiwdg->Instance->PR = hiwdg->Init.Prescaler;
0197   hiwdg->Instance->RLR = hiwdg->Init.Reload;
0198
0199   /* Check pending flag, if previous update not done, return timeout */
0200   tickstart = HAL_GetTick();
0201
0202   /* Wait for register to be updated */
0203   while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
0204   {
0205     if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
0206     {
0207       if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
0208       {
0209         return HAL_TIMEOUT;
0210       }
0211     }
0212   }
0213
0214   /* If window parameter is different than current value, modify window
0215   register */
0216   if (hiwdg->Instance->WINR != hiwdg->Init.Window)
0217   {
0218     /* Write to IWDG WINR the IWDG_Window value to compare with. In any case,
0219     even if window feature is disabled, Watchdog will be reloaded by writing
0220     windows register */
0221     hiwdg->Instance->WINR = hiwdg->Init.Window;
0222   }
0223   else
0224   {
0225     /* Reload IWDG counter with value defined in the reload register */
0226     __HAL_IWDG_RELOAD_COUNTER(hiwdg);
0227   }
0228
0229   /* Return function status */
0230   return HAL_OK;
0231 }
0232
0233
0234 /**
0235   * @}
0236   */
0237
0238
0239 /** @addtogroup IWDG_Exported_Functions_Group2
0240   *  @brief   IO operation functions
0241   *
0242 @verbatim
0243  ===============================================================================
0244                       ##### IO operation functions #####
0245  ===============================================================================
0246  [..]  This section provides functions allowing to:
0247       (+) Refresh the IWDG.
0248
0249 @endverbatim
0250   * @{
0251   */
0252
0253 /**
0254   * @brief  Refresh the IWDG.
0255   * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
0256   *                the configuration information for the specified IWDG module.
0257   * @retval HAL status
0258   */
0259 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
0260 {
0261   /* Reload IWDG counter with value defined in the reload register */
0262   __HAL_IWDG_RELOAD_COUNTER(hiwdg);
0263
0264   /* Return function status */
0265   return HAL_OK;
0266 }
0267
0268
0269 /**
0270   * @}
0271   */
0272
0273 /**
0274   * @}
0275   */
0276
0277 #endif /* HAL_IWDG_MODULE_ENABLED */
0278 /**
0279   * @}
0280   */
0281
0282 /**
0283   * @}
0284   */