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0001 /**
0002   ******************************************************************************
0003   * @file    stm32h7xx_hal_hrtim.c
0004   * @author  MCD Application Team
0005   * @brief   TIM HAL module driver.
0006   *          This file provides firmware functions to manage the following
0007   *          functionalities of the High Resolution Timer (HRTIM) peripheral:
0008   *           + HRTIM Initialization
0009   *           + Timer Time Base Unit Configuration
0010   *           + Simple Time Base Start/Stop
0011   *           + Simple Time Base Start/Stop Interrupt
0012   *           + Simple Time Base Start/Stop DMA Request
0013   *           + Simple Output Compare/PWM Channel Configuration
0014   *           + Simple Output Compare/PWM Channel Start/Stop Interrupt
0015   *           + Simple Output Compare/PWM Channel Start/Stop DMA Request
0016   *           + Simple Input Capture Channel Configuration
0017   *           + Simple Input Capture Channel Start/Stop Interrupt
0018   *           + Simple Input Capture Channel Start/Stop DMA Request
0019   *           + Simple One Pulse Channel Configuration
0020   *           + Simple One Pulse Channel Start/Stop Interrupt
0021   *           + HRTIM External Synchronization Configuration
0022   *           + HRTIM Burst Mode Controller Configuration
0023   *           + HRTIM Burst Mode Controller Enabling
0024   *           + HRTIM External Events Conditioning Configuration
0025   *           + HRTIM Faults Conditioning Configuration
0026   *           + HRTIM Faults Enabling
0027   *           + HRTIM ADC trigger Configuration
0028   *           + Waveform Timer Configuration
0029   *           + Waveform Event Filtering Configuration
0030   *           + Waveform Dead Time Insertion Configuration
0031   *           + Waveform Chopper Mode Configuration
0032   *           + Waveform Compare Unit Configuration
0033   *           + Waveform Capture Unit Configuration
0034   *           + Waveform Output Configuration
0035   *           + Waveform Counter Start/Stop
0036   *           + Waveform Counter Start/Stop Interrupt
0037   *           + Waveform Counter Start/Stop DMA Request
0038   *           + Waveform Output Enabling
0039   *           + Waveform Output Level Set/Get
0040   *           + Waveform Output State Get
0041   *           + Waveform Burst DMA Operation Configuration
0042   *           + Waveform Burst DMA Operation Start
0043   *           + Waveform Timer Counter Software Reset
0044   *           + Waveform Capture Software Trigger
0045   *           + Waveform Burst Mode Controller Software Trigger
0046   *           + Waveform Timer Pre-loadable Registers Update Enabling
0047   *           + Waveform Timer Pre-loadable Registers Software Update
0048   *           + Waveform Timer Delayed Protection Status Get
0049   *           + Waveform Timer Burst Status Get
0050   *           + Waveform Timer Push-Pull Status Get
0051   *           + Peripheral State Get
0052   *
0053   ******************************************************************************
0054   * @attention
0055   *
0056   * Copyright (c) 2017 STMicroelectronics.
0057   * All rights reserved.
0058   *
0059   * This software is licensed under terms that can be found in the LICENSE file
0060   * in the root directory of this software component.
0061   * If no LICENSE file comes with this software, it is provided AS-IS.
0062   *
0063   ******************************************************************************
0064   @verbatim
0065 ==============================================================================
0066                       ##### Simple mode v.s. waveform mode #####
0067 ==============================================================================
0068   [..] The HRTIM HAL API is split into 2 categories:
0069     (#)Simple functions: these functions allow for using a HRTIM timer as a
0070        general purpose timer with high resolution capabilities.
0071        HRTIM simple modes are managed through the set of functions named
0072        HAL_HRTIM_Simple<Function>. These functions are similar in name and usage
0073        to the one defined for the TIM peripheral. When a HRTIM timer operates in
0074        simple mode, only a very limited set of HRTIM features are used.
0075        Following simple modes are proposed:
0076          (++)Output compare mode,
0077          (++)PWM output mode,
0078          (++)Input capture mode,
0079          (++)One pulse mode.
0080     (#)Waveform functions: These functions allow taking advantage of the HRTIM
0081        flexibility to produce numerous types of control signal. When a HRTIM timer
0082        operates in waveform mode, all the HRTIM features are accessible without
0083        any restriction. HRTIM waveform modes are managed through the set of
0084        functions named HAL_HRTIM_Waveform<Function>
0085 
0086 ==============================================================================
0087                       ##### How to use this driver #####
0088 ==============================================================================
0089     [..]
0090      (#)Initialize the HRTIM low level resources by implementing the
0091         HAL_HRTIM_MspInit() function:
0092         (##)Enable the HRTIM clock source using __HRTIMx_CLK_ENABLE()
0093         (##)Connect HRTIM pins to MCU I/Os
0094             (+++) Enable the clock for the HRTIM GPIOs using the following
0095                   function: __HAL_RCC_GPIOx_CLK_ENABLE()
0096             (+++) Configure these GPIO pins in Alternate Function mode using
0097                   HAL_GPIO_Init()
0098         (##)When using DMA to control data transfer (e.g HAL_HRTIM_SimpleBaseStart_DMA())
0099             (+++)Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
0100             (+++)Initialize the DMA handle
0101             (+++)Associate the initialized DMA handle to the appropriate DMA
0102                  handle of the HRTIM handle using __HAL_LINKDMA()
0103             (+++)Initialize the DMA channel using HAL_DMA_Init()
0104             (+++)Configure the priority and enable the NVIC for the transfer
0105                  complete interrupt on the DMA channel using HAL_NVIC_SetPriority()
0106                  and HAL_NVIC_EnableIRQ()
0107         (##)In case of using interrupt mode (e.g HAL_HRTIM_SimpleBaseStart_IT())
0108             (+++)Configure the priority and enable the NVIC for the concerned
0109                  HRTIM interrupt using HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
0110 
0111     (#)Initialize the HRTIM HAL using HAL_HRTIM_Init(). The HRTIM configuration
0112        structure (field of the HRTIM handle) specifies which global interrupt of
0113        whole HRTIM must be enabled (Burst mode period, System fault, Faults).
0114        It also contains the HRTIM external synchronization configuration. HRTIM
0115        can act as a master (generating a synchronization signal) or as a slave
0116        (waiting for a trigger to be synchronized).
0117 
0118      (#) Configure HRTIM resources shared by all HRTIM timers
0119         (##)Burst Mode Controller:
0120                 (+++)HAL_HRTIM_BurstModeConfig(): configures the HRTIM burst mode
0121                      controller: operating mode (continuous or one-shot mode), clock
0122                      (source, prescaler) , trigger(s), period, idle duration.
0123         (##)External Events Conditioning:
0124                 (+++)HAL_HRTIM_EventConfig(): configures the conditioning of an
0125                      external event channel: source, polarity, edge-sensitivity.
0126                      External event can be used as triggers (timer reset, input
0127                      capture, burst mode, ADC triggers, delayed protection)
0128                      They can also be used to set or reset timer outputs. Up to
0129                      10 event channels are available.
0130                 (+++)HAL_HRTIM_EventPrescalerConfig(): configures the external
0131                      event sampling clock (used for digital filtering).
0132         (##)Fault Conditioning:
0133                 (+++)HAL_HRTIM_FaultConfig(): configures the conditioning of a
0134                      fault channel: source, polarity, edge-sensitivity. Fault
0135                      channels are used to disable the outputs in case of an
0136                      abnormal operation. Up to 5 fault channels are available.
0137                 (+++)HAL_HRTIM_FaultPrescalerConfig(): configures the fault
0138                      sampling clock (used for digital filtering).
0139                 (+++)HAL_HRTIM_FaultModeCtl(): Enables or disables fault input(s)
0140                      circuitry. By default all fault inputs are disabled.
0141         (##)ADC trigger:
0142                 (+++)HAL_HRTIM_ADCTriggerConfig(): configures the source triggering
0143                      the update of the ADC trigger register and the ADC trigger.
0144                      4 independent triggers are available to start both the regular
0145                      and the injected sequencers of the 2 ADCs
0146 
0147      (#) Configure HRTIM timer time base using HAL_HRTIM_TimeBaseConfig(). This
0148          function must be called whatever the HRTIM timer operating mode is
0149          (simple v.s. waveform). It configures mainly:
0150         (##)The HRTIM  timer counter operating mode (continuous v.s. one shot)
0151         (##)The HRTIM  timer clock prescaler
0152         (##)The HRTIM  timer period
0153         (##)The HRTIM  timer repetition counter
0154 
0155      *** If the HRTIM timer operates in simple mode ***
0156      ===================================================
0157      [..]
0158      (#) Start or Stop simple timers
0159               (++)Simple time base: HAL_HRTIM_SimpleBaseStart(),HAL_HRTIM_SimpleBaseStop(),
0160                   HAL_HRTIM_SimpleBaseStart_IT(),HAL_HRTIM_SimpleBaseStop_IT(),
0161                   HAL_HRTIM_SimpleBaseStart_DMA(),HAL_HRTIM_SimpleBaseStop_DMA().
0162               (++)Simple output compare: HAL_HRTIM_SimpleOCChannelConfig(),
0163                   HAL_HRTIM_SimpleOCStart(),HAL_HRTIM_SimpleOCStop(),
0164                   HAL_HRTIM_SimpleOCStart_IT(),HAL_HRTIM_SimpleOCStop_IT(),
0165                   HAL_HRTIM_SimpleOCStart_DMA(),HAL_HRTIM_SimpleOCStop_DMA(),
0166               (++)Simple PWM output: HAL_HRTIM_SimplePWMChannelConfig(),
0167                   HAL_HRTIM_SimplePWMStart(),HAL_HRTIM_SimplePWMStop(),
0168                   HAL_HRTIM_SimplePWMStart_IT(),HAL_HRTIM_SimplePWMStop_IT(),
0169                   HAL_HRTIM_SimplePWMStart_DMA(),HAL_HRTIM_SimplePWMStop_DMA(),
0170               (++)Simple input capture: HAL_HRTIM_SimpleCaptureChannelConfig(),
0171                   HAL_HRTIM_SimpleCaptureStart(),HAL_HRTIM_SimpleCaptureStop(),
0172                   HAL_HRTIM_SimpleCaptureStart_IT(),HAL_HRTIM_SimpleCaptureStop_IT(),
0173                   HAL_HRTIM_SimpleCaptureStart_DMA(),HAL_HRTIM_SimpleCaptureStop_DMA().
0174               (++)Simple one pulse: HAL_HRTIM_SimpleOnePulseChannelConfig(),
0175                   HAL_HRTIM_SimpleOnePulseStart(),HAL_HRTIM_SimpleOnePulseStop(),
0176                   HAL_HRTIM_SimpleOnePulseStart_IT(),HAL_HRTIM_SimpleOnePulseStop_It().
0177 
0178      *** If the HRTIM timer operates in waveform mode ***
0179      ====================================================
0180      [..]
0181      (#) Completes waveform timer configuration
0182               (++)HAL_HRTIM_WaveformTimerConfig(): configuration of a HRTIM timer
0183                   operating in wave form mode mainly consists in:
0184                 (+++)Enabling the HRTIM timer interrupts and DMA requests.
0185                 (+++)Enabling the half mode for the HRTIM timer.
0186                 (+++)Defining how the HRTIM timer reacts to external synchronization input.
0187                 (+++)Enabling the push-pull mode for the HRTIM timer.
0188                 (+++)Enabling the fault channels for the HRTIM timer.
0189                 (+++)Enabling the dead-time insertion for the HRTIM timer.
0190                 (+++)Setting the delayed protection mode for the HRTIM timer (source and outputs
0191                      on which the delayed protection are applied).
0192                 (+++)Specifying the HRTIM timer update and reset triggers.
0193                 (+++)Specifying the HRTIM timer registers update policy (e.g. pre-load enabling).
0194               (++)HAL_HRTIM_TimerEventFilteringConfig(): configures external
0195                   event blanking and windowing circuitry of a HRTIM timer:
0196                 (+++)Blanking:  to mask external events during a defined  time period a defined time period
0197                 (+++)Windowing, to enable external events only during a defined time period
0198               (++)HAL_HRTIM_DeadTimeConfig(): configures the dead-time insertion
0199                   unit for a HRTIM timer. Allows to generate a couple of
0200                   complementary signals from a single reference waveform,
0201                   with programmable delays between active state.
0202               (++)HAL_HRTIM_ChopperModeConfig(): configures the parameters of
0203                   the high-frequency carrier signal added on top of the timing
0204                   unit output. Chopper mode can be enabled or disabled for each
0205                    timer output separately (see  HAL_HRTIM_WaveformOutputConfig()).
0206               (++)HAL_HRTIM_BurstDMAConfig(): configures the burst DMA burst
0207                   controller. Allows having multiple HRTIM registers updated
0208                   with a single DMA request. The burst DMA operation is started
0209                   by calling HAL_HRTIM_BurstDMATransfer().
0210               (++)HAL_HRTIM_WaveformCompareConfig():configures the compare unit
0211                   of a HRTIM timer. This operation consists in setting the
0212                   compare value and possibly specifying the auto delayed mode
0213                   for compare units 2 and 4 (allows to have compare events
0214                   generated relatively to capture events). Note that when auto
0215                   delayed mode is needed, the capture unit associated to the
0216                   compare unit must be configured separately.
0217               (++)HAL_HRTIM_WaveformCaptureConfig(): configures the capture unit
0218                   of a HRTIM timer. This operation consists in specifying the
0219                   source(s)  triggering the capture (timer register update event,
0220                   external event, timer output set/reset event, other HRTIM
0221                   timer related events).
0222               (++)HAL_HRTIM_WaveformOutputConfig(): configuration of a HRTIM timer
0223                   output mainly consists in:
0224                 (+++)Setting the output polarity (active high or active low),
0225                 (+++)Defining the set/reset crossbar for the output,
0226                 (+++)Specifying the fault level (active or inactive) in IDLE and FAULT states.,
0227 
0228      (#) Set waveform timer output(s) level
0229               (++)HAL_HRTIM_WaveformSetOutputLevel(): forces the output to its
0230                   active or inactive level. For example, when deadtime insertion
0231                   is enabled it is necessary to force the output level by software
0232                   to have the outputs in a complementary state as soon as the RUN mode is entered.
0233 
0234      (#) Enable or Disable waveform timer output(s)
0235               (++)HAL_HRTIM_WaveformOutputStart(),HAL_HRTIM_WaveformOutputStop().
0236 
0237      (#) Start or Stop waveform HRTIM timer(s).
0238               (++)HAL_HRTIM_WaveformCountStart(),HAL_HRTIM_WaveformCountStop(),
0239               (++)HAL_HRTIM_WaveformCountStart_IT(),HAL_HRTIM_WaveformCountStop_IT(),
0240               (++)HAL_HRTIM_WaveformCountStart_DMA(),HAL_HRTIM_WaveformCountStop_DMA(),
0241      (#) Burst mode controller enabling:
0242               (++)HAL_HRTIM_BurstModeCtl(): activates or de-activates the
0243                   burst mode controller.
0244 
0245      (#) Some HRTIM operations can be triggered by software:
0246               (++)HAL_HRTIM_BurstModeSoftwareTrigger(): calling this function
0247                   trigs the burst operation.
0248               (++)HAL_HRTIM_SoftwareCapture(): calling this function trigs the
0249                   capture of the HRTIM timer counter.
0250               (++)HAL_HRTIM_SoftwareUpdate(): calling this function trigs the
0251                   update of the pre-loadable registers of the HRTIM timer
0252               (++)HAL_HRTIM_SoftwareReset():calling this function resets the
0253                   HRTIM timer counter.
0254 
0255      (#) Some functions can be used any time to retrieve HRTIM timer related
0256             information
0257               (++)HAL_HRTIM_GetCapturedValue(): returns actual value of the
0258                   capture register of the designated capture unit.
0259               (++)HAL_HRTIM_WaveformGetOutputLevel(): returns actual level
0260                  (ACTIVE/INACTIVE) of the designated timer output.
0261               (++)HAL_HRTIM_WaveformGetOutputState():returns actual state
0262                  (IDLE/RUN/FAULT) of the designated timer output.
0263               (++)HAL_HRTIM_GetDelayedProtectionStatus():returns actual level
0264                  (ACTIVE/INACTIVE) of the designated output when the delayed
0265                   protection was triggered.
0266               (++)HAL_HRTIM_GetBurstStatus(): returns the actual status
0267                  (ACTIVE/INACTIVE) of the burst mode controller.
0268               (++)HAL_HRTIM_GetCurrentPushPullStatus(): when the push-pull mode
0269                  is enabled for the HRTIM timer (see HAL_HRTIM_WaveformTimerConfig()),
0270                  the push-pull status indicates on which output the signal is currently
0271                  active (e.g signal applied on output 1 and output 2 forced
0272                  inactive or vice versa).
0273              (++)HAL_HRTIM_GetIdlePushPullStatus(): when the push-pull mode
0274                  is enabled for the HRTIM timer (see HAL_HRTIM_WaveformTimerConfig()),
0275                  the idle push-pull status indicates during which period the
0276                  delayed protection request occurred (e.g. protection occurred
0277                  when the output 1 was active and output 2 forced inactive or
0278                  vice versa).
0279 
0280      (#) Some functions can be used any time to retrieve actual HRTIM status
0281              (++)HAL_HRTIM_GetState(): returns actual HRTIM instance HAL state.
0282 
0283      *** Callback registration ***
0284      =============================
0285      [..]
0286      The compilation flag USE_HAL_HRTIM_REGISTER_CALLBACKS when set to 1
0287      allows the user to configure dynamically the driver callbacks.
0288      Use Functions HAL_HRTIM_RegisterCallback() or HAL_HRTIM_TIMxRegisterCallback()
0289      to register an interrupt callback.
0290 
0291      [..]
0292      Function HAL_HRTIM_RegisterCallback() allows to register following callbacks:
0293        (+) Fault1Callback               : Fault 1 interrupt callback function
0294        (+) Fault2Callback               : Fault 2 interrupt callback function
0295        (+) Fault3Callback               : Fault 3 interrupt callback function
0296        (+) Fault4Callback               : Fault 4 interrupt callback function
0297        (+) Fault5Callback               : Fault 5 interrupt callback function
0298        (+) SystemFaultCallback          : System fault interrupt callback function
0299        (+) BurstModePeriodCallback      : Burst mode period interrupt callback function
0300        (+) SynchronizationEventCallback : Sync Input interrupt callback function
0301        (+) ErrorCallback                : DMA error callback function
0302        (+) MspInitCallback              : HRTIM MspInit callback function
0303        (+) MspDeInitCallback            : HRTIM MspInit callback function
0304 
0305      [..]
0306      Function HAL_HRTIM_TIMxRegisterCallback() allows to register following callbacks:
0307        (+) RegistersUpdateCallback   : Timer x Update interrupt callback function
0308        (+) RepetitionEventCallback   : Timer x Repetition interrupt callback function
0309        (+) Compare1EventCallback     : Timer x Compare 1 match interrupt callback function
0310        (+) Compare2EventCallback     : Timer x Compare 2 match interrupt callback function
0311        (+) Compare3EventCallback     : Timer x Compare 3 match interrupt callback function
0312        (+) Compare4EventCallback     : Timer x Compare 4 match interrupt callback function
0313        (+) Capture1EventCallback     : Timer x Capture 1 interrupts callback function
0314        (+) Capture2EventCallback     : Timer x Capture 2 interrupts callback function
0315        (+) DelayedProtectionCallback : Timer x Delayed protection interrupt callback function
0316        (+) CounterResetCallback      : Timer x counter reset/roll-over interrupt callback function
0317        (+) Output1SetCallback        : Timer x output 1 set interrupt callback function
0318        (+) Output1ResetCallback      : Timer x output 1 reset interrupt callback function
0319        (+) Output2SetCallback        : Timer x output 2 set interrupt callback function
0320        (+) Output2ResetCallback      : Timer x output 2 reset interrupt callback function
0321        (+) BurstDMATransferCallback  : Timer x Burst DMA completed interrupt callback function
0322 
0323      [..]
0324      Both functions take as parameters the HAL peripheral handle, the Callback ID
0325      and a pointer to the user callback function.
0326 
0327      [..]
0328      Use function HAL_HRTIM_UnRegisterCallback or HAL_HRTIM_TIMxUnRegisterCallback
0329      to reset a callback to the default weak function. Both functions take  as parameters
0330      the HAL peripheral handle and the Callback ID.
0331 
0332      [..]
0333      By default, after the HAL_HRTIM_Init() and when the state is HAL_HRTIM_STATE_RESET
0334      all callbacks are set to the corresponding weak functions (e.g HAL_HRTIM_Fault1Callback)
0335      Exception done for MspInit and MspDeInit functions that are reset to the legacy
0336      weak functions in the HAL_HRTIM_Init()/ HAL_HRTIM_DeInit() only when these
0337      callbacks are null (not registered beforehand). If MspInit or MspDeInit are
0338      not null, the HAL_HRTIM_Init()/ HAL_HRTIM_DeInit() keep and use the user
0339      MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
0340 
0341      [..]
0342      Callbacks can be registered/unregistered in HAL_HRTIM_STATE_READY state only.
0343      Exception done MspInit/MspDeInit functions that can be registered/unregistered
0344      in HAL_HRTIM_STATE_READY or HAL_HRTIM_STATE_RESET states, thus registered
0345      (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
0346      Then, the user first registers the MspInit/MspDeInit user callbacks
0347      using HAL_HRTIM_RegisterCallback() before calling HAL_HRTIM_DeInit()
0348      or HAL_HRTIM_Init() function.
0349 
0350      [..]
0351      When the compilation flag USE_HAL_HRTIM_REGISTER_CALLBACKS is set to 0 or
0352      not defined, the callback registration feature is not available and all
0353      callbacks are set to the corresponding weak functions.
0354 
0355   @endverbatim
0356   ******************************************************************************
0357   */
0358 
0359 /* Includes ------------------------------------------------------------------*/
0360 #include "stm32h7xx_hal.h"
0361 
0362 /** @addtogroup STM32H7xx_HAL_Driver
0363   * @{
0364   */
0365 
0366 #ifdef HAL_HRTIM_MODULE_ENABLED
0367 
0368 #if defined(HRTIM1)
0369 
0370 /** @defgroup HRTIM HRTIM
0371   * @ingroup RTEMSBSPsARMSTM32H7
0372   * @brief HRTIM HAL module driver
0373   * @{
0374   */
0375 
0376 /* Private typedef -----------------------------------------------------------*/
0377 /* Private define ------------------------------------------------------------*/
0378 /** @defgroup HRTIM_Private_Defines HRTIM Private Define
0379   * @ingroup RTEMSBSPsARMSTM32H7
0380   * @{
0381   */
0382 #define HRTIM_FLTR_FLTxEN (HRTIM_FLTR_FLT1EN |\
0383                            HRTIM_FLTR_FLT2EN |\
0384                            HRTIM_FLTR_FLT3EN |\
0385                            HRTIM_FLTR_FLT4EN | \
0386                            HRTIM_FLTR_FLT5EN)
0387 
0388 #define HRTIM_TIMCR_TIMUPDATETRIGGER (HRTIM_TIMUPDATETRIGGER_MASTER  |\
0389                                       HRTIM_TIMUPDATETRIGGER_TIMER_A |\
0390                                       HRTIM_TIMUPDATETRIGGER_TIMER_B |\
0391                                       HRTIM_TIMUPDATETRIGGER_TIMER_C |\
0392                                       HRTIM_TIMUPDATETRIGGER_TIMER_D |\
0393                                       HRTIM_TIMUPDATETRIGGER_TIMER_E)
0394 
0395 #define HRTIM_FLTINR1_FLTxLCK ((HRTIM_FAULTLOCK_READONLY)        | \
0396                                (HRTIM_FAULTLOCK_READONLY << 8U)  | \
0397                                (HRTIM_FAULTLOCK_READONLY << 16U) | \
0398                                (HRTIM_FAULTLOCK_READONLY << 24U))
0399 
0400 #define HRTIM_FLTINR2_FLTxLCK ((HRTIM_FAULTLOCK_READONLY)        | \
0401                                (HRTIM_FAULTLOCK_READONLY << 8U))
0402 /**
0403   * @}
0404   */
0405 
0406 /* Private macro -------------------------------------------------------------*/
0407 /* Private variables ---------------------------------------------------------*/
0408 /** @defgroup HRTIM_Private_Variables HRTIM Private Variables
0409   * @ingroup RTEMSBSPsARMSTM32H7
0410   * @{
0411   */
0412 static uint32_t TimerIdxToTimerId[] =
0413 {
0414   HRTIM_TIMERID_TIMER_A,
0415   HRTIM_TIMERID_TIMER_B,
0416   HRTIM_TIMERID_TIMER_C,
0417   HRTIM_TIMERID_TIMER_D,
0418   HRTIM_TIMERID_TIMER_E,
0419   HRTIM_TIMERID_MASTER,
0420 };
0421 /**
0422   * @}
0423   */
0424 
0425 /* Private function prototypes -----------------------------------------------*/
0426 /** @defgroup HRTIM_Private_Functions HRTIM Private Functions
0427   * @ingroup RTEMSBSPsARMSTM32H7
0428   * @{
0429   */
0430 static void HRTIM_MasterBase_Config(HRTIM_HandleTypeDef * hhrtim,
0431                                     const HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg);
0432 
0433 static void HRTIM_TimingUnitBase_Config(HRTIM_HandleTypeDef * hhrtim,
0434                                         uint32_t TimerIdx,
0435                                         const HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg);
0436 
0437 static void HRTIM_MasterWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
0438                                         const HRTIM_TimerCfgTypeDef * pTimerCfg);
0439 
0440 static void HRTIM_TimingUnitWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
0441                                             uint32_t TimerIdx,
0442                                             const HRTIM_TimerCfgTypeDef * pTimerCfg);
0443 
0444 
0445 static void HRTIM_CaptureUnitConfig(HRTIM_HandleTypeDef * hhrtim,
0446                                     uint32_t TimerIdx,
0447                                     uint32_t CaptureUnit,
0448                                     uint32_t Event);
0449 
0450 static void HRTIM_OutputConfig(HRTIM_HandleTypeDef * hhrtim,
0451                                 uint32_t TimerIdx,
0452                                 uint32_t Output,
0453                                 const HRTIM_OutputCfgTypeDef * pOutputCfg);
0454 
0455 static void HRTIM_EventConfig(HRTIM_HandleTypeDef * hhrtim,
0456                               uint32_t Event,
0457                               const HRTIM_EventCfgTypeDef * pEventCfg);
0458 
0459 static void HRTIM_TIM_ResetConfig(HRTIM_HandleTypeDef * hhrtim,
0460                                   uint32_t TimerIdx,
0461                                   uint32_t Event);
0462 
0463 static uint32_t HRTIM_GetITFromOCMode(const HRTIM_HandleTypeDef * hhrtim,
0464                                       uint32_t TimerIdx,
0465                                       uint32_t OCChannel);
0466 
0467 static uint32_t HRTIM_GetDMAFromOCMode(const HRTIM_HandleTypeDef * hhrtim,
0468                                        uint32_t TimerIdx,
0469                                        uint32_t OCChannel);
0470 
0471 static DMA_HandleTypeDef * HRTIM_GetDMAHandleFromTimerIdx(const HRTIM_HandleTypeDef * hhrtim,
0472                                                           uint32_t TimerIdx);
0473 
0474 static uint32_t GetTimerIdxFromDMAHandle(const HRTIM_HandleTypeDef * hhrtim,
0475                                          const DMA_HandleTypeDef * hdma);
0476 
0477 static void HRTIM_ForceRegistersUpdate(HRTIM_HandleTypeDef * hhrtim,
0478                                       uint32_t TimerIdx);
0479 
0480 static void HRTIM_HRTIM_ISR(HRTIM_HandleTypeDef * hhrtim);
0481 
0482 static void HRTIM_Master_ISR(HRTIM_HandleTypeDef * hhrtim);
0483 
0484 static void HRTIM_Timer_ISR(HRTIM_HandleTypeDef * hhrtim,
0485                                        uint32_t TimerIdx);
0486 
0487 static void HRTIM_DMAMasterCplt(DMA_HandleTypeDef *hdma);
0488 
0489 static void HRTIM_DMATimerxCplt(DMA_HandleTypeDef *hdma);
0490 
0491 static void HRTIM_DMAError(DMA_HandleTypeDef *hdma);
0492 
0493 static void HRTIM_BurstDMACplt(DMA_HandleTypeDef *hdma);
0494 /**
0495   * @}
0496   */
0497 
0498 /* Exported functions ---------------------------------------------------------*/
0499 /** @defgroup HRTIM_Exported_Functions HRTIM Exported Functions
0500   * @ingroup RTEMSBSPsARMSTM32H7
0501   * @{
0502   */
0503 
0504 /** @defgroup HRTIM_Exported_Functions_Group1 Initialization and de-initialization functions
0505   * @ingroup RTEMSBSPsARMSTM32H7
0506  *  @brief    Initialization and Configuration functions
0507 @verbatim
0508  ===============================================================================
0509               ##### Initialization and Time Base Configuration functions #####
0510  ===============================================================================
0511     [..]  This section provides functions allowing to:
0512       (+) Initialize a HRTIM instance
0513       (+) De-initialize a HRTIM instance
0514       (+) Initialize the HRTIM MSP
0515       (+) De-initialize the HRTIM MSP
0516       (+) Configure the time base unit of a HRTIM timer
0517 
0518 @endverbatim
0519   * @{
0520   */
0521 
0522 /**
0523   * @brief  Initialize a HRTIM instance
0524   * @param  hhrtim pointer to HAL HRTIM handle
0525   * @retval HAL status
0526   */
0527 HAL_StatusTypeDef HAL_HRTIM_Init(HRTIM_HandleTypeDef * hhrtim)
0528 {
0529   uint8_t timer_idx;
0530   uint32_t hrtim_mcr;
0531 
0532   /* Check the HRTIM handle allocation */
0533   if(hhrtim == NULL)
0534   {
0535     return HAL_ERROR;
0536   }
0537 
0538   /* Check the parameters */
0539   assert_param(IS_HRTIM_ALL_INSTANCE(hhrtim->Instance));
0540   assert_param(IS_HRTIM_IT(hhrtim->Init.HRTIMInterruptResquests));
0541 
0542 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
0543   if (hhrtim->State == HAL_HRTIM_STATE_RESET)
0544   {
0545     /* Initialize callback function pointers to their default values */
0546     hhrtim->Fault1Callback               = HAL_HRTIM_Fault1Callback;
0547     hhrtim->Fault2Callback               = HAL_HRTIM_Fault2Callback;
0548     hhrtim->Fault3Callback               = HAL_HRTIM_Fault3Callback;
0549     hhrtim->Fault4Callback               = HAL_HRTIM_Fault4Callback;
0550     hhrtim->Fault5Callback               = HAL_HRTIM_Fault5Callback;
0551     hhrtim->SystemFaultCallback          = HAL_HRTIM_SystemFaultCallback;
0552     hhrtim->BurstModePeriodCallback      = HAL_HRTIM_BurstModePeriodCallback;
0553     hhrtim->SynchronizationEventCallback = HAL_HRTIM_SynchronizationEventCallback;
0554     hhrtim->ErrorCallback                = HAL_HRTIM_ErrorCallback;
0555     hhrtim->RegistersUpdateCallback      = HAL_HRTIM_RegistersUpdateCallback;
0556     hhrtim->RepetitionEventCallback      = HAL_HRTIM_RepetitionEventCallback;
0557     hhrtim->Compare1EventCallback        = HAL_HRTIM_Compare1EventCallback;
0558     hhrtim->Compare2EventCallback        = HAL_HRTIM_Compare2EventCallback;
0559     hhrtim->Compare3EventCallback        = HAL_HRTIM_Compare3EventCallback;
0560     hhrtim->Compare4EventCallback        = HAL_HRTIM_Compare4EventCallback;
0561     hhrtim->Capture1EventCallback        = HAL_HRTIM_Capture1EventCallback;
0562     hhrtim->Capture2EventCallback        = HAL_HRTIM_Capture2EventCallback;
0563     hhrtim->DelayedProtectionCallback    = HAL_HRTIM_DelayedProtectionCallback;
0564     hhrtim->CounterResetCallback         = HAL_HRTIM_CounterResetCallback;
0565     hhrtim->Output1SetCallback           = HAL_HRTIM_Output1SetCallback;
0566     hhrtim->Output1ResetCallback         = HAL_HRTIM_Output1ResetCallback;
0567     hhrtim->Output2SetCallback           = HAL_HRTIM_Output2SetCallback;
0568     hhrtim->Output2ResetCallback         = HAL_HRTIM_Output2ResetCallback;
0569     hhrtim->BurstDMATransferCallback     = HAL_HRTIM_BurstDMATransferCallback;
0570 
0571     if (hhrtim->MspInitCallback == NULL)
0572     {
0573       hhrtim->MspInitCallback = HAL_HRTIM_MspInit;
0574     }
0575   }
0576 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
0577 
0578   /* Set the HRTIM state */
0579   hhrtim->State = HAL_HRTIM_STATE_BUSY;
0580 
0581   /* Initialize the DMA handles */
0582   hhrtim->hdmaMaster = (DMA_HandleTypeDef *)NULL;
0583   hhrtim->hdmaTimerA = (DMA_HandleTypeDef *)NULL;
0584   hhrtim->hdmaTimerB = (DMA_HandleTypeDef *)NULL;
0585   hhrtim->hdmaTimerC = (DMA_HandleTypeDef *)NULL;
0586   hhrtim->hdmaTimerD = (DMA_HandleTypeDef *)NULL;
0587   hhrtim->hdmaTimerE = (DMA_HandleTypeDef *)NULL;
0588 
0589   /* HRTIM output synchronization configuration (if required) */
0590   if ((hhrtim->Init.SyncOptions & HRTIM_SYNCOPTION_MASTER) != (uint32_t)RESET)
0591   {
0592     /* Check parameters */
0593     assert_param(IS_HRTIM_SYNCOUTPUTSOURCE(hhrtim->Init.SyncOutputSource));
0594     assert_param(IS_HRTIM_SYNCOUTPUTPOLARITY(hhrtim->Init.SyncOutputPolarity));
0595 
0596     /* The synchronization output initialization procedure must be done prior
0597        to the configuration of the MCU outputs (done within HAL_HRTIM_MspInit)
0598     */
0599     if (hhrtim->Instance == HRTIM1)
0600     {
0601       /* Enable the HRTIM peripheral clock */
0602       __HAL_RCC_HRTIM1_CLK_ENABLE();
0603     }
0604 
0605     hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
0606 
0607     /* Set the event to be sent on the synchronization output */
0608     hrtim_mcr &= ~(HRTIM_MCR_SYNC_SRC);
0609     hrtim_mcr |= (hhrtim->Init.SyncOutputSource & HRTIM_MCR_SYNC_SRC);
0610 
0611     /* Set the polarity of the synchronization output */
0612     hrtim_mcr &= ~(HRTIM_MCR_SYNC_OUT);
0613     hrtim_mcr |= (hhrtim->Init.SyncOutputPolarity & HRTIM_MCR_SYNC_OUT);
0614 
0615     /* Update the HRTIM registers */
0616     hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
0617   }
0618 
0619   /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
0620 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
0621   hhrtim->MspInitCallback(hhrtim);
0622 #else
0623   HAL_HRTIM_MspInit(hhrtim);
0624 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
0625 
0626   /* HRTIM input synchronization configuration (if required) */
0627   if ((hhrtim->Init.SyncOptions & HRTIM_SYNCOPTION_SLAVE) != (uint32_t)RESET)
0628   {
0629     /* Check parameters */
0630     assert_param(IS_HRTIM_SYNCINPUTSOURCE(hhrtim->Init.SyncInputSource));
0631 
0632     hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
0633 
0634     /* Set the synchronization input source */
0635     hrtim_mcr &= ~(HRTIM_MCR_SYNC_IN);
0636     hrtim_mcr |= (hhrtim->Init.SyncInputSource & HRTIM_MCR_SYNC_IN);
0637 
0638     /* Update the HRTIM registers */
0639     hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
0640   }
0641 
0642   /* Initialize the HRTIM state*/
0643   hhrtim->State = HAL_HRTIM_STATE_READY;
0644 
0645   /* Initialize the lock status of the HRTIM HAL API */
0646   __HAL_UNLOCK(hhrtim);
0647 
0648   /* Initialize timer related parameters */
0649   for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
0650        timer_idx <= HRTIM_TIMERINDEX_MASTER ;
0651        timer_idx++)
0652   {
0653     hhrtim->TimerParam[timer_idx].CaptureTrigger1 = HRTIM_CAPTURETRIGGER_NONE;
0654     hhrtim->TimerParam[timer_idx].CaptureTrigger2 = HRTIM_CAPTURETRIGGER_NONE;
0655     hhrtim->TimerParam[timer_idx].InterruptRequests = HRTIM_IT_NONE;
0656     hhrtim->TimerParam[timer_idx].DMARequests = HRTIM_IT_NONE;
0657     hhrtim->TimerParam[timer_idx].DMASrcAddress = 0U;
0658     hhrtim->TimerParam[timer_idx].DMASize = 0U;
0659   }
0660 
0661   return HAL_OK;
0662 }
0663 
0664 /**
0665   * @brief  De-initialize a HRTIM instance
0666   * @param  hhrtim pointer to HAL HRTIM handle
0667   * @retval HAL status
0668   */
0669 HAL_StatusTypeDef HAL_HRTIM_DeInit (HRTIM_HandleTypeDef * hhrtim)
0670 {
0671   /* Check the HRTIM handle allocation */
0672   if(hhrtim == NULL)
0673   {
0674     return HAL_ERROR;
0675   }
0676 
0677   /* Check the parameters */
0678   assert_param(IS_HRTIM_ALL_INSTANCE(hhrtim->Instance));
0679 
0680   /* Set the HRTIM state */
0681   hhrtim->State = HAL_HRTIM_STATE_BUSY;
0682 
0683   /* DeInit the low level hardware */
0684 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
0685   if (hhrtim->MspDeInitCallback == NULL)
0686   {
0687     hhrtim->MspDeInitCallback = HAL_HRTIM_MspDeInit;
0688   }
0689 
0690   hhrtim->MspDeInitCallback(hhrtim);
0691 #else
0692   HAL_HRTIM_MspDeInit(hhrtim);
0693 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
0694 
0695   hhrtim->State = HAL_HRTIM_STATE_READY;
0696 
0697   return HAL_OK;
0698 }
0699 
0700 /**
0701   * @brief  MSP initialization for a HRTIM instance
0702   * @param  hhrtim pointer to HAL HRTIM handle
0703   * @retval None
0704   */
0705 __weak void HAL_HRTIM_MspInit(HRTIM_HandleTypeDef * hhrtim)
0706 {
0707   /* Prevent unused argument(s) compilation warning */
0708   UNUSED(hhrtim);
0709 
0710   /* NOTE: This function should not be modified, when the callback is needed,
0711            the HAL_HRTIM_MspInit could be implemented in the user file
0712    */
0713 }
0714 
0715 /**
0716   * @brief  MSP de-initialization of a HRTIM instance
0717   * @param  hhrtim pointer to HAL HRTIM handle
0718   * @retval None
0719   */
0720 __weak void HAL_HRTIM_MspDeInit(HRTIM_HandleTypeDef * hhrtim)
0721 {
0722   /* Prevent unused argument(s) compilation warning */
0723   UNUSED(hhrtim);
0724 
0725   /* NOTE: This function should not be modified, when the callback is needed,
0726            the HAL_HRTIM_MspDeInit could be implemented in the user file
0727    */
0728 }
0729 
0730 /**
0731   * @brief  Configure the time base unit of a timer
0732   * @param  hhrtim pointer to HAL HRTIM handle
0733   * @param  TimerIdx Timer index
0734   *                   This parameter can be one of the following values:
0735   *                   @arg HRTIM_TIMERINDEX_MASTER for master timer
0736   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
0737   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
0738   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
0739   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
0740   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
0741   * @param  pTimeBaseCfg pointer to the time base configuration structure
0742   * @note This function must be called prior starting the timer
0743   * @note   The time-base unit initialization parameters specify:
0744   *           The timer counter operating mode (continuous, one shot),
0745   *           The timer clock prescaler,
0746   *           The timer period,
0747   *           The timer repetition counter.
0748   * @retval HAL status
0749   */
0750 HAL_StatusTypeDef HAL_HRTIM_TimeBaseConfig(HRTIM_HandleTypeDef *hhrtim,
0751                                            uint32_t TimerIdx,
0752                                            const HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg)
0753 {
0754   /* Check the parameters */
0755   assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
0756   assert_param(IS_HRTIM_PRESCALERRATIO(pTimeBaseCfg->PrescalerRatio));
0757   assert_param(IS_HRTIM_MODE(pTimeBaseCfg->Mode));
0758 
0759   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
0760   {
0761      return HAL_BUSY;
0762   }
0763 
0764   /* Set the HRTIM state */
0765   hhrtim->State = HAL_HRTIM_STATE_BUSY;
0766 
0767   if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
0768   {
0769     /* Configure master timer time base unit */
0770     HRTIM_MasterBase_Config(hhrtim, pTimeBaseCfg);
0771   }
0772   else
0773   {
0774     /* Configure timing unit time base unit */
0775     HRTIM_TimingUnitBase_Config(hhrtim, TimerIdx, pTimeBaseCfg);
0776   }
0777 
0778   /* Set HRTIM state */
0779   hhrtim->State = HAL_HRTIM_STATE_READY;
0780 
0781   return HAL_OK;
0782 }
0783 
0784 /**
0785   * @}
0786   */
0787 
0788 /** @defgroup HRTIM_Exported_Functions_Group2 Simple time base mode functions
0789   * @ingroup RTEMSBSPsARMSTM32H7
0790  *  @brief    Simple time base mode functions.
0791 @verbatim
0792  ===============================================================================
0793               ##### Simple time base mode functions #####
0794  ===============================================================================
0795     [..]  This section provides functions allowing to:
0796       (+) Start simple time base
0797       (+) Stop simple time base
0798       (+) Start simple time base and enable interrupt
0799       (+) Stop simple time base and disable interrupt
0800       (+) Start simple time base and enable DMA transfer
0801       (+) Stop simple time base and disable DMA transfer
0802       -@-  When a HRTIM timer operates in simple time base mode, the timer
0803            counter counts from 0 to the period value.
0804 
0805 @endverbatim
0806   * @{
0807   */
0808 
0809 /**
0810   * @brief  Start the counter of a timer operating in simple time base mode.
0811   * @param  hhrtim pointer to HAL HRTIM handle
0812   * @param  TimerIdx Timer index.
0813   *                   This parameter can be one of the following values:
0814   *                   @arg HRTIM_TIMERINDEX_MASTER  for master timer
0815   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
0816   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
0817   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
0818   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
0819   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
0820   * @retval HAL status
0821   */
0822 HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart(HRTIM_HandleTypeDef * hhrtim,
0823                                            uint32_t TimerIdx)
0824 {
0825    /* Check the parameters */
0826   assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
0827 
0828   /* Process Locked */
0829   __HAL_LOCK(hhrtim);
0830 
0831   hhrtim->State = HAL_HRTIM_STATE_BUSY;
0832 
0833   /* Enable the timer counter */
0834   __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
0835 
0836   hhrtim->State = HAL_HRTIM_STATE_READY;
0837 
0838   /* Process Unlocked */
0839   __HAL_UNLOCK(hhrtim);
0840 
0841   return HAL_OK;
0842 }
0843 
0844 /**
0845   * @brief  Stop the counter of a timer operating in simple time base mode.
0846   * @param  hhrtim pointer to HAL HRTIM handle
0847   * @param  TimerIdx Timer index.
0848   *                   This parameter can be one of the following values:
0849   *                   @arg HRTIM_TIMERINDEX_MASTER  for master timer
0850   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
0851   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
0852   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
0853   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
0854   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
0855   * @retval HAL status
0856   */
0857 HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop(HRTIM_HandleTypeDef * hhrtim,
0858                                           uint32_t TimerIdx)
0859 {
0860    /* Check the parameters */
0861   assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
0862 
0863   /* Process Locked */
0864   __HAL_LOCK(hhrtim);
0865 
0866   hhrtim->State = HAL_HRTIM_STATE_BUSY;
0867 
0868   /* Disable the timer counter */
0869   __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
0870 
0871   hhrtim->State = HAL_HRTIM_STATE_READY;
0872 
0873   /* Process Unlocked */
0874   __HAL_UNLOCK(hhrtim);
0875 
0876   return HAL_OK;
0877 }
0878 
0879 /**
0880   * @brief  Start the counter of a timer operating in simple time base mode
0881   *         (Timer repetition interrupt is enabled).
0882   * @param  hhrtim pointer to HAL HRTIM handle
0883   * @param  TimerIdx Timer index.
0884   *                   This parameter can be one of the following values:
0885   *                   @arg HRTIM_TIMERINDEX_MASTER  for master timer
0886   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
0887   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
0888   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
0889   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
0890   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
0891   * @retval HAL status
0892   */
0893 HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_IT(HRTIM_HandleTypeDef * hhrtim,
0894                                               uint32_t TimerIdx)
0895 {
0896    /* Check the parameters */
0897   assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
0898 
0899   /* Process Locked */
0900   __HAL_LOCK(hhrtim);
0901 
0902   hhrtim->State = HAL_HRTIM_STATE_BUSY;
0903 
0904   /* Enable the repetition interrupt */
0905   if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
0906   {
0907     __HAL_HRTIM_MASTER_ENABLE_IT(hhrtim, HRTIM_MASTER_IT_MREP);
0908   }
0909   else
0910   {
0911     __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP);
0912   }
0913 
0914   /* Enable the timer counter */
0915   __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
0916 
0917   hhrtim->State = HAL_HRTIM_STATE_READY;
0918 
0919   /* Process Unlocked */
0920   __HAL_UNLOCK(hhrtim);
0921 
0922   return HAL_OK;
0923 }
0924 
0925 /**
0926   * @brief  Stop the counter of a timer operating in simple time base mode
0927   *         (Timer repetition interrupt is disabled).
0928   * @param  hhrtim pointer to HAL HRTIM handle
0929   * @param  TimerIdx Timer index.
0930   *                   This parameter can be one of the following values:
0931   *                   @arg HRTIM_TIMERINDEX_MASTER  for master timer
0932   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
0933   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
0934   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
0935   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
0936   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
0937   * @retval HAL status
0938   */
0939 HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_IT(HRTIM_HandleTypeDef * hhrtim,
0940                                              uint32_t TimerIdx)
0941 {
0942    /* Check the parameters */
0943   assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
0944 
0945   /* Process Locked */
0946   __HAL_LOCK(hhrtim);
0947 
0948   hhrtim->State = HAL_HRTIM_STATE_BUSY;
0949 
0950   /* Disable the repetition interrupt */
0951   if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
0952   {
0953     __HAL_HRTIM_MASTER_DISABLE_IT(hhrtim, HRTIM_MASTER_IT_MREP);
0954   }
0955   else
0956   {
0957     __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP);
0958   }
0959 
0960   /* Disable the timer counter */
0961   __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
0962 
0963   hhrtim->State = HAL_HRTIM_STATE_READY;
0964 
0965   /* Process Unlocked */
0966   __HAL_UNLOCK(hhrtim);
0967 
0968   return HAL_OK;
0969 }
0970 
0971 /**
0972   * @brief  Start the counter of a timer operating in simple time base mode
0973   *         (Timer repetition DMA request is enabled).
0974   * @param  hhrtim pointer to HAL HRTIM handle
0975   * @param  TimerIdx Timer index.
0976   *                   This parameter can be one of the following values:
0977   *                    @arg HRTIM_TIMERINDEX_MASTER  for master timer
0978   *                    @arg HRTIM_TIMERINDEX_TIMER_A for timer A
0979   *                    @arg HRTIM_TIMERINDEX_TIMER_B for timer B
0980   *                    @arg HRTIM_TIMERINDEX_TIMER_C for timer C
0981   *                    @arg HRTIM_TIMERINDEX_TIMER_D for timer D
0982   *                    @arg HRTIM_TIMERINDEX_TIMER_E for timer E
0983   * @param  SrcAddr DMA transfer source address
0984   * @param  DestAddr DMA transfer destination address
0985   * @param  Length The length of data items (data size) to be transferred
0986   *                     from source to destination
0987   */
0988 HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_DMA(HRTIM_HandleTypeDef * hhrtim,
0989                                                uint32_t TimerIdx,
0990                                                uint32_t SrcAddr,
0991                                                uint32_t DestAddr,
0992                                                uint32_t Length)
0993 {
0994   DMA_HandleTypeDef * hdma;
0995 
0996   /* Check the parameters */
0997   assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
0998 
0999   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
1000   {
1001      return HAL_BUSY;
1002   }
1003   if(hhrtim->State == HAL_HRTIM_STATE_READY)
1004   {
1005     if((SrcAddr == 0U ) || (DestAddr == 0U ) || (Length == 0U))
1006     {
1007       return HAL_ERROR;
1008     }
1009     else
1010     {
1011       hhrtim->State = HAL_HRTIM_STATE_BUSY;
1012     }
1013   }
1014 
1015   /* Process Locked */
1016   __HAL_LOCK(hhrtim);
1017 
1018   /* Get the timer DMA handler */
1019   hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
1020 
1021   if (hdma == NULL)
1022   {
1023    hhrtim->State = HAL_HRTIM_STATE_ERROR;
1024 
1025    /* Process Unlocked */
1026    __HAL_UNLOCK(hhrtim);
1027 
1028    return HAL_ERROR;
1029   }
1030 
1031   /* Set the DMA transfer completed callback */
1032   if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
1033   {
1034     hdma->XferCpltCallback = HRTIM_DMAMasterCplt;
1035   }
1036   else
1037   {
1038     hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
1039   }
1040 
1041   /* Set the DMA error callback */
1042   hdma->XferErrorCallback = HRTIM_DMAError ;
1043 
1044   /* Enable the DMA channel */
1045   if (HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length) != HAL_OK)
1046     {
1047         hhrtim->State = HAL_HRTIM_STATE_ERROR;
1048 
1049         /* Process Unlocked */
1050         __HAL_UNLOCK(hhrtim);
1051 
1052         return HAL_ERROR;
1053     }
1054 
1055   /* Enable the timer repetition DMA request */
1056   if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
1057   {
1058     __HAL_HRTIM_MASTER_ENABLE_DMA(hhrtim, HRTIM_MASTER_DMA_MREP);
1059   }
1060   else
1061   {
1062     __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_REP);
1063   }
1064 
1065   /* Enable the timer counter */
1066   __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
1067 
1068   hhrtim->State = HAL_HRTIM_STATE_READY;
1069 
1070   /* Process Unlocked */
1071   __HAL_UNLOCK(hhrtim);
1072 
1073   return HAL_OK;
1074 }
1075 
1076 /**
1077   * @brief  Stop the counter of a timer operating in simple time base mode
1078   *         (Timer repetition DMA request is disabled).
1079   * @param  hhrtim pointer to HAL HRTIM handle
1080   * @param  TimerIdx Timer index.
1081   *                   This parameter can be one of the following values:
1082   *                   @arg HRTIM_TIMERINDEX_MASTER  for master timer
1083   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
1084   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
1085   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
1086   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
1087   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
1088   * @retval HAL status
1089   */
1090 HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_DMA(HRTIM_HandleTypeDef * hhrtim,
1091                                               uint32_t TimerIdx)
1092 {
1093   DMA_HandleTypeDef * hdma;
1094 
1095   /* Check the parameters */
1096   assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
1097 
1098   /* Process Locked */
1099   __HAL_LOCK(hhrtim);
1100 
1101   if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
1102   {
1103     hhrtim->State = HAL_HRTIM_STATE_READY;
1104 
1105     /* Disable the DMA */
1106     if (HAL_DMA_Abort(hhrtim->hdmaMaster) != HAL_OK)
1107     {
1108         hhrtim->State = HAL_HRTIM_STATE_ERROR;
1109     }
1110     /* Disable the timer repetition DMA request */
1111     __HAL_HRTIM_MASTER_DISABLE_DMA(hhrtim, HRTIM_MASTER_DMA_MREP);
1112   }
1113   else
1114   {
1115     /* Get the timer DMA handler */
1116     hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
1117 
1118     if (hdma == NULL)
1119     {
1120       hhrtim->State = HAL_HRTIM_STATE_ERROR;
1121     }
1122     else
1123     {
1124       hhrtim->State = HAL_HRTIM_STATE_READY;
1125 
1126       /* Disable the DMA */
1127       if (HAL_DMA_Abort(hdma) != HAL_OK)
1128       {
1129          hhrtim->State = HAL_HRTIM_STATE_ERROR;
1130       }
1131 
1132       /* Disable the timer repetition DMA request */
1133       __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_REP);
1134      }
1135   }
1136 
1137   /* Disable the timer counter */
1138   __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
1139 
1140   /* Process Unlocked */
1141   __HAL_UNLOCK(hhrtim);
1142 
1143   if (hhrtim->State == HAL_HRTIM_STATE_ERROR)
1144   {
1145       return HAL_ERROR;
1146   }
1147   else
1148   {
1149       return HAL_OK;
1150   }
1151 }
1152 
1153 /**
1154   * @}
1155   */
1156 
1157 /** @defgroup HRTIM_Exported_Functions_Group3 Simple output compare mode functions
1158   * @ingroup RTEMSBSPsARMSTM32H7
1159  *  @brief    Simple output compare functions
1160 @verbatim
1161  ===============================================================================
1162               ##### Simple output compare functions #####
1163  ===============================================================================
1164     [..]  This section provides functions allowing to:
1165       (+) Configure simple output channel
1166       (+) Start simple output compare
1167       (+) Stop simple output compare
1168       (+) Start simple output compare and enable interrupt
1169       (+) Stop simple output compare and disable interrupt
1170       (+) Start simple output compare and enable DMA transfer
1171       (+) Stop simple output compare and disable DMA transfer
1172        -@- When a HRTIM timer operates in simple output compare mode
1173            the output level is set to a programmable value when a match
1174            is found between the compare register and the counter.
1175            Compare unit 1 is automatically associated to output 1
1176            Compare unit 2 is automatically associated to output 2
1177 @endverbatim
1178   * @{
1179   */
1180 
1181 /**
1182   * @brief  Configure an output in simple output compare mode
1183   * @param  hhrtim pointer to HAL HRTIM handle
1184   * @param  TimerIdx Timer index
1185   *                   This parameter can be one of the following values:
1186   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
1187   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
1188   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
1189   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
1190   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
1191   * @param  OCChannel Timer output
1192   *                    This parameter can be one of the following values:
1193   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
1194   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
1195   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
1196   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
1197   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
1198   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
1199   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
1200   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
1201   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
1202   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
1203   * @param  pSimpleOCChannelCfg pointer to the simple output compare output configuration structure
1204   * @note When the timer operates in simple output compare mode:
1205   *         Output 1 is implicitly controlled by the compare unit 1
1206   *         Output 2 is implicitly controlled by the compare unit 2
1207   *       Output Set/Reset crossbar is set according to the selected output compare mode:
1208   *         Toggle: SETxyR = RSTxyR = CMPy
1209   *         Active: SETxyR = CMPy, RSTxyR = 0
1210   *         Inactive: SETxy =0, RSTxy = CMPy
1211   * @retval HAL status
1212   */
1213 HAL_StatusTypeDef HAL_HRTIM_SimpleOCChannelConfig(HRTIM_HandleTypeDef * hhrtim,
1214                                                  uint32_t TimerIdx,
1215                                                  uint32_t OCChannel,
1216                                                  const HRTIM_SimpleOCChannelCfgTypeDef* pSimpleOCChannelCfg)
1217 {
1218   uint32_t CompareUnit = (uint32_t)RESET;
1219   HRTIM_OutputCfgTypeDef OutputCfg;
1220 
1221   /* Check parameters */
1222   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
1223   assert_param(IS_HRTIM_BASICOCMODE(pSimpleOCChannelCfg->Mode));
1224   assert_param(IS_HRTIM_OUTPUTPULSE(pSimpleOCChannelCfg->Pulse));
1225   assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimpleOCChannelCfg->Polarity));
1226   assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimpleOCChannelCfg->IdleLevel));
1227 
1228   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
1229   {
1230      return HAL_BUSY;
1231   }
1232 
1233   /* Process Locked */
1234   __HAL_LOCK(hhrtim);
1235 
1236   /* Set HRTIM state */
1237   hhrtim->State = HAL_HRTIM_STATE_BUSY;
1238 
1239   /* Configure timer compare unit */
1240   switch (OCChannel)
1241   {
1242   case HRTIM_OUTPUT_TA1:
1243   case HRTIM_OUTPUT_TB1:
1244   case HRTIM_OUTPUT_TC1:
1245   case HRTIM_OUTPUT_TD1:
1246   case HRTIM_OUTPUT_TE1:
1247     {
1248       CompareUnit = HRTIM_COMPAREUNIT_1;
1249       hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pSimpleOCChannelCfg->Pulse;
1250       break;
1251     }
1252   case HRTIM_OUTPUT_TA2:
1253   case HRTIM_OUTPUT_TB2:
1254   case HRTIM_OUTPUT_TC2:
1255   case HRTIM_OUTPUT_TD2:
1256   case HRTIM_OUTPUT_TE2:
1257     {
1258       CompareUnit = HRTIM_COMPAREUNIT_2;
1259       hhrtim->Instance->sTimerxRegs[TimerIdx].CMP2xR = pSimpleOCChannelCfg->Pulse;
1260       break;
1261     }
1262   default:
1263     {
1264       hhrtim->State = HAL_HRTIM_STATE_ERROR;
1265 
1266       /* Process Unlocked */
1267       __HAL_UNLOCK(hhrtim);
1268 
1269       break;
1270     }
1271   }
1272 
1273   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
1274   {
1275      return HAL_ERROR;
1276   }
1277 
1278   /* Configure timer output */
1279   OutputCfg.Polarity = (pSimpleOCChannelCfg->Polarity & HRTIM_OUTR_POL1);
1280   OutputCfg.IdleLevel = (pSimpleOCChannelCfg->IdleLevel & HRTIM_OUTR_IDLES1);
1281   OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE;
1282   OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE;
1283   OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED;
1284   OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR;
1285 
1286   switch (pSimpleOCChannelCfg->Mode)
1287   {
1288   case HRTIM_BASICOCMODE_TOGGLE:
1289     {
1290       if (CompareUnit == HRTIM_COMPAREUNIT_1)
1291       {
1292         OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
1293       }
1294       else
1295       {
1296         OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
1297       }
1298       OutputCfg.ResetSource = OutputCfg.SetSource;
1299       break;
1300     }
1301 
1302   case HRTIM_BASICOCMODE_ACTIVE:
1303     {
1304       if (CompareUnit == HRTIM_COMPAREUNIT_1)
1305       {
1306         OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
1307       }
1308       else
1309       {
1310         OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
1311       }
1312       OutputCfg.ResetSource = HRTIM_OUTPUTRESET_NONE;
1313       break;
1314     }
1315 
1316   case HRTIM_BASICOCMODE_INACTIVE:
1317     {
1318       if (CompareUnit == HRTIM_COMPAREUNIT_1)
1319       {
1320         OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMCMP1;
1321       }
1322       else
1323       {
1324         OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMCMP2;
1325       }
1326       OutputCfg.SetSource = HRTIM_OUTPUTSET_NONE;
1327       break;
1328     }
1329 
1330   default:
1331     {
1332       OutputCfg.SetSource = HRTIM_OUTPUTSET_NONE;
1333       OutputCfg.ResetSource = HRTIM_OUTPUTRESET_NONE;
1334 
1335       hhrtim->State = HAL_HRTIM_STATE_ERROR;
1336 
1337       /* Process Unlocked */
1338       __HAL_UNLOCK(hhrtim);
1339 
1340       break;
1341     }
1342   }
1343 
1344   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
1345   {
1346      return HAL_ERROR;
1347   }
1348 
1349   HRTIM_OutputConfig(hhrtim,
1350                      TimerIdx,
1351                      OCChannel,
1352                      &OutputCfg);
1353 
1354   /* Set HRTIM state */
1355   hhrtim->State = HAL_HRTIM_STATE_READY;
1356 
1357   /* Process Unlocked */
1358   __HAL_UNLOCK(hhrtim);
1359 
1360   return HAL_OK;
1361 }
1362 
1363 /**
1364   * @brief  Start the output compare signal generation on the designed timer output
1365   * @param  hhrtim pointer to HAL HRTIM handle
1366   * @param  TimerIdx Timer index
1367   *                   This parameter can be one of the following values:
1368   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
1369   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
1370   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
1371   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
1372   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
1373   * @param  OCChannel Timer output
1374   *                    This parameter can be one of the following values:
1375   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
1376   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
1377   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
1378   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
1379   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
1380   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
1381   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
1382   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
1383   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
1384   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
1385   * @retval HAL status
1386   */
1387 HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart(HRTIM_HandleTypeDef * hhrtim,
1388                                          uint32_t TimerIdx,
1389                                          uint32_t OCChannel)
1390 {
1391    /* Check the parameters */
1392   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
1393 
1394   /* Process Locked */
1395   __HAL_LOCK(hhrtim);
1396 
1397   hhrtim->State = HAL_HRTIM_STATE_BUSY;
1398 
1399   /* Enable the timer output */
1400   hhrtim->Instance->sCommonRegs.OENR |= OCChannel;
1401 
1402   /* Enable the timer counter */
1403   __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
1404 
1405   hhrtim->State = HAL_HRTIM_STATE_READY;
1406 
1407   /* Process Unlocked */
1408   __HAL_UNLOCK(hhrtim);
1409 
1410   return HAL_OK;
1411 }
1412 
1413 /**
1414   * @brief  Stop the output compare signal generation on the designed timer output
1415   * @param  hhrtim pointer to HAL HRTIM handle
1416   * @param  TimerIdx Timer index
1417   *                   This parameter can be one of the following values:
1418   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
1419   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
1420   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
1421   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
1422   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
1423   * @param  OCChannel Timer output
1424   *                    This parameter can be one of the following values:
1425   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
1426   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
1427   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
1428   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
1429   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
1430   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
1431   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
1432   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
1433   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
1434   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
1435   * @retval HAL status
1436   */
1437 HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop(HRTIM_HandleTypeDef * hhrtim,
1438                                         uint32_t TimerIdx,
1439                                         uint32_t OCChannel)
1440 {
1441    /* Check the parameters */
1442   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
1443 
1444   /* Process Locked */
1445   __HAL_LOCK(hhrtim);
1446 
1447   hhrtim->State = HAL_HRTIM_STATE_BUSY;
1448 
1449   /* Disable the timer output */
1450   hhrtim->Instance->sCommonRegs.ODISR |= OCChannel;
1451 
1452   /* Disable the timer counter */
1453   __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
1454 
1455   hhrtim->State = HAL_HRTIM_STATE_READY;
1456 
1457   /* Process Unlocked */
1458   __HAL_UNLOCK(hhrtim);
1459 
1460   return HAL_OK;
1461 }
1462 
1463 /**
1464   * @brief  Start the output compare signal generation on the designed timer output
1465   *         (Interrupt is enabled (see note note below)).
1466   * @param  hhrtim pointer to HAL HRTIM handle
1467   * @param  TimerIdx Timer index
1468   *                   This parameter can be one of the following values:
1469   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
1470   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
1471   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
1472   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
1473   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
1474   * @param  OCChannel Timer output
1475   *                    This parameter can be one of the following values:
1476   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
1477   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
1478   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
1479   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
1480   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
1481   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
1482   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
1483   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
1484   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
1485   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
1486   * @note Interrupt enabling depends on the chosen output compare mode
1487   *          Output toggle: compare match interrupt is enabled
1488   *          Output set active:  output set interrupt is enabled
1489   *          Output set inactive:  output reset interrupt is enabled
1490   * @retval HAL status
1491   */
1492 HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_IT(HRTIM_HandleTypeDef * hhrtim,
1493                                             uint32_t TimerIdx,
1494                                             uint32_t OCChannel)
1495 {
1496   uint32_t interrupt;
1497 
1498    /* Check the parameters */
1499   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
1500 
1501   /* Process Locked */
1502   __HAL_LOCK(hhrtim);
1503 
1504   hhrtim->State = HAL_HRTIM_STATE_BUSY;
1505 
1506   /* Get the interrupt to enable (depends on the output compare mode) */
1507   interrupt = HRTIM_GetITFromOCMode(hhrtim, TimerIdx, OCChannel);
1508 
1509   /* Enable the timer output */
1510   hhrtim->Instance->sCommonRegs.OENR |= OCChannel;
1511 
1512   /* Enable the timer interrupt (depends on the output compare mode) */
1513   __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, interrupt);
1514 
1515   /* Enable the timer counter */
1516   __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
1517 
1518   hhrtim->State = HAL_HRTIM_STATE_READY;
1519 
1520   /* Process Unlocked */
1521   __HAL_UNLOCK(hhrtim);
1522 
1523   return HAL_OK;
1524 }
1525 
1526 /**
1527   * @brief  Stop the output compare signal generation on the designed timer output
1528   *         (Interrupt is disabled).
1529   * @param  hhrtim pointer to HAL HRTIM handle
1530   * @param  TimerIdx Timer index
1531   *                   This parameter can be one of the following values:
1532   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
1533   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
1534   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
1535   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
1536   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
1537   * @param  OCChannel Timer output
1538   *                    This parameter can be one of the following values:
1539   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
1540   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
1541   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
1542   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
1543   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
1544   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
1545   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
1546   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
1547   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
1548   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
1549   * @retval HAL status
1550   */
1551 HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_IT(HRTIM_HandleTypeDef * hhrtim,
1552                                            uint32_t TimerIdx,
1553                                            uint32_t OCChannel)
1554 {
1555   uint32_t interrupt;
1556 
1557    /* Check the parameters */
1558   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
1559 
1560   /* Process Locked */
1561   __HAL_LOCK(hhrtim);
1562 
1563   hhrtim->State = HAL_HRTIM_STATE_BUSY;
1564 
1565   /* Disable the timer output */
1566   hhrtim->Instance->sCommonRegs.ODISR |= OCChannel;
1567 
1568   /* Get the interrupt to disable (depends on the output compare mode) */
1569   interrupt = HRTIM_GetITFromOCMode(hhrtim, TimerIdx, OCChannel);
1570 
1571   /* Disable the timer interrupt */
1572   __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, interrupt);
1573 
1574   /* Disable the timer counter */
1575   __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
1576 
1577   hhrtim->State = HAL_HRTIM_STATE_READY;
1578 
1579   /* Process Unlocked */
1580   __HAL_UNLOCK(hhrtim);
1581 
1582   return HAL_OK;
1583 }
1584 
1585 /**
1586   * @brief  Start the output compare signal generation on the designed timer output
1587   *         (DMA request is enabled (see note below)).
1588   * @param  hhrtim pointer to HAL HRTIM handle
1589   * @param  TimerIdx Timer index
1590   *                   This parameter can be one of the following values:
1591   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
1592   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
1593   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
1594   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
1595   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
1596   * @param  OCChannel Timer output
1597   *                    This parameter can be one of the following values:
1598   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
1599   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
1600   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
1601   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
1602   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
1603   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
1604   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
1605   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
1606   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
1607   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
1608   * @param  SrcAddr DMA transfer source address
1609   * @param  DestAddr DMA transfer destination address
1610   * @param  Length The length of data items (data size) to be transferred
1611   *                     from source to destination
1612   * @note  DMA request enabling depends on the chosen output compare mode
1613   *          Output toggle: compare match DMA request is enabled
1614   *          Output set active:  output set DMA request is enabled
1615   *          Output set inactive:  output reset DMA request is enabled
1616   * @retval HAL status
1617   */
1618 HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_DMA(HRTIM_HandleTypeDef * hhrtim,
1619                                              uint32_t TimerIdx,
1620                                              uint32_t OCChannel,
1621                                              uint32_t SrcAddr,
1622                                              uint32_t DestAddr,
1623                                              uint32_t Length)
1624 {
1625   DMA_HandleTypeDef * hdma;
1626   uint32_t dma_request;
1627 
1628   /* Check the parameters */
1629   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
1630 
1631   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
1632   {
1633      return HAL_BUSY;
1634   }
1635   if(hhrtim->State == HAL_HRTIM_STATE_READY)
1636   {
1637     if((SrcAddr == 0U ) || (DestAddr == 0U ) || (Length == 0U))
1638     {
1639       return HAL_ERROR;
1640     }
1641     else
1642     {
1643       hhrtim->State = HAL_HRTIM_STATE_BUSY;
1644     }
1645   }
1646 
1647   /* Process Locked */
1648   __HAL_LOCK(hhrtim);
1649 
1650    /* Enable the timer output */
1651   hhrtim->Instance->sCommonRegs.OENR |= OCChannel;
1652 
1653   /* Get the DMA request to enable */
1654   dma_request = HRTIM_GetDMAFromOCMode(hhrtim, TimerIdx, OCChannel);
1655 
1656   /* Get the timer DMA handler */
1657   hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
1658 
1659   if (hdma == NULL)
1660   {
1661    hhrtim->State = HAL_HRTIM_STATE_ERROR;
1662 
1663    /* Process Unlocked */
1664    __HAL_UNLOCK(hhrtim);
1665 
1666    return HAL_ERROR;
1667   }
1668 
1669   /* Set the DMA error callback */
1670   hdma->XferErrorCallback = HRTIM_DMAError ;
1671 
1672   /* Set the DMA transfer completed callback */
1673   hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
1674 
1675   /* Enable the DMA channel */
1676   if (HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length) != HAL_OK)
1677     {
1678         hhrtim->State = HAL_HRTIM_STATE_ERROR;
1679 
1680         /* Process Unlocked */
1681         __HAL_UNLOCK(hhrtim);
1682 
1683         return HAL_ERROR;
1684     }
1685 
1686   /* Enable the timer DMA request */
1687   __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, dma_request);
1688 
1689   /* Enable the timer counter */
1690   __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
1691 
1692   hhrtim->State = HAL_HRTIM_STATE_READY;
1693 
1694   /* Process Unlocked */
1695   __HAL_UNLOCK(hhrtim);
1696 
1697   return HAL_OK;
1698 }
1699 
1700 /**
1701   * @brief  Stop the output compare signal generation on the designed timer output
1702   *         (DMA request is disabled).
1703   * @param  hhrtim pointer to HAL HRTIM handle
1704   * @param  TimerIdx Timer index
1705   *                   This parameter can be one of the following values:
1706   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
1707   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
1708   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
1709   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
1710   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
1711   * @param  OCChannel Timer output
1712   *                    This parameter can be one of the following values:
1713   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
1714   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
1715   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
1716   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
1717   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
1718   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
1719   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
1720   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
1721   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
1722   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
1723   * @retval HAL status
1724   */
1725 HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_DMA(HRTIM_HandleTypeDef * hhrtim,
1726                                             uint32_t TimerIdx,
1727                                             uint32_t OCChannel)
1728 {
1729   uint32_t dma_request;
1730 
1731   /* Check the parameters */
1732   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
1733 
1734   /* Process Locked */
1735   __HAL_LOCK(hhrtim);
1736 
1737   hhrtim->State = HAL_HRTIM_STATE_BUSY;
1738 
1739   /* Disable the timer output */
1740   hhrtim->Instance->sCommonRegs.ODISR |= OCChannel;
1741 
1742   /* Get the timer DMA handler */
1743   /* Disable the DMA */
1744   if (HAL_DMA_Abort(HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx)) != HAL_OK)
1745   {
1746     hhrtim->State = HAL_HRTIM_STATE_ERROR;
1747 
1748     /* Process Unlocked */
1749     __HAL_UNLOCK(hhrtim);
1750 
1751     return HAL_ERROR;
1752   }
1753 
1754   /* Get the DMA request to disable */
1755   dma_request = HRTIM_GetDMAFromOCMode(hhrtim, TimerIdx, OCChannel);
1756 
1757   /* Disable the timer DMA request */
1758   __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, dma_request);
1759 
1760   /* Disable the timer counter */
1761   __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
1762 
1763   hhrtim->State = HAL_HRTIM_STATE_READY;
1764 
1765   /* Process Unlocked */
1766   __HAL_UNLOCK(hhrtim);
1767 
1768   return HAL_OK;
1769 }
1770 
1771 /**
1772   * @}
1773   */
1774 
1775 /** @defgroup HRTIM_Exported_Functions_Group4 Simple PWM output mode functions
1776   * @ingroup RTEMSBSPsARMSTM32H7
1777  *  @brief    Simple PWM output functions
1778 @verbatim
1779  ===============================================================================
1780               ##### Simple PWM output functions #####
1781  ===============================================================================
1782     [..]  This section provides functions allowing to:
1783       (+) Configure simple PWM output channel
1784       (+) Start simple PWM output
1785       (+) Stop simple PWM output
1786       (+) Start simple PWM output and enable interrupt
1787       (+) Stop simple PWM output and disable interrupt
1788       (+) Start simple PWM output and enable DMA transfer
1789       (+) Stop simple PWM output and disable DMA transfer
1790       -@- When a HRTIM timer operates in simple PWM output mode
1791           the output level is set to a programmable value when a match is
1792           found between the compare register and the counter and reset when
1793           the timer period is reached. Duty cycle is determined by the
1794           comparison value.
1795           Compare unit 1 is automatically associated to output 1
1796           Compare unit 2 is automatically associated to output 2
1797 @endverbatim
1798   * @{
1799   */
1800 
1801 /**
1802   * @brief  Configure an output in simple PWM mode
1803   * @param  hhrtim pointer to HAL HRTIM handle
1804   * @param  TimerIdx Timer index
1805   *                   This parameter can be one of the following values:
1806   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
1807   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
1808   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
1809   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
1810   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
1811   * @param  PWMChannel Timer output
1812   *                    This parameter can be one of the following values:
1813   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
1814   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
1815   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
1816   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
1817   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
1818   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
1819   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
1820   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
1821   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
1822   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
1823   * @param  pSimplePWMChannelCfg pointer to the simple PWM output configuration structure
1824   * @note When the timer operates in simple PWM output mode:
1825   *         Output 1 is implicitly controlled by the compare unit 1
1826   *         Output 2 is implicitly controlled by the compare unit 2
1827   *       Output Set/Reset crossbar is set as follows:
1828   *         Output 1: SETx1R = CMP1, RSTx1R = PER
1829   *         Output 2: SETx2R = CMP2, RST2R = PER
1830   * @note When Simple PWM mode is used the registers preload mechanism is
1831   *       enabled (otherwise the behavior is not guaranteed).
1832   * @retval HAL status
1833   */
1834 HAL_StatusTypeDef HAL_HRTIM_SimplePWMChannelConfig(HRTIM_HandleTypeDef * hhrtim,
1835                                                   uint32_t TimerIdx,
1836                                                   uint32_t PWMChannel,
1837                                                   const HRTIM_SimplePWMChannelCfgTypeDef* pSimplePWMChannelCfg)
1838 {
1839   HRTIM_OutputCfgTypeDef OutputCfg;
1840   uint32_t hrtim_timcr;
1841 
1842   /* Check parameters */
1843   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
1844   assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimplePWMChannelCfg->Polarity));
1845   assert_param(IS_HRTIM_OUTPUTPULSE(pSimplePWMChannelCfg->Pulse));
1846   assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimplePWMChannelCfg->IdleLevel));
1847 
1848   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
1849   {
1850      return HAL_BUSY;
1851   }
1852 
1853   /* Process Locked */
1854   __HAL_LOCK(hhrtim);
1855 
1856   hhrtim->State = HAL_HRTIM_STATE_BUSY;
1857 
1858   /* Configure timer compare unit */
1859   switch (PWMChannel)
1860   {
1861   case HRTIM_OUTPUT_TA1:
1862   case HRTIM_OUTPUT_TB1:
1863   case HRTIM_OUTPUT_TC1:
1864   case HRTIM_OUTPUT_TD1:
1865   case HRTIM_OUTPUT_TE1:
1866     {
1867       hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pSimplePWMChannelCfg->Pulse;
1868       OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
1869       break;
1870     }
1871 
1872   case HRTIM_OUTPUT_TA2:
1873   case HRTIM_OUTPUT_TB2:
1874   case HRTIM_OUTPUT_TC2:
1875   case HRTIM_OUTPUT_TD2:
1876   case HRTIM_OUTPUT_TE2:
1877     {
1878       hhrtim->Instance->sTimerxRegs[TimerIdx].CMP2xR = pSimplePWMChannelCfg->Pulse;
1879       OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
1880       break;
1881     }
1882   default:
1883     {
1884       OutputCfg.SetSource = HRTIM_OUTPUTSET_NONE;
1885       OutputCfg.ResetSource = HRTIM_OUTPUTRESET_NONE;
1886 
1887       hhrtim->State = HAL_HRTIM_STATE_ERROR;
1888 
1889       /* Process Unlocked */
1890       __HAL_UNLOCK(hhrtim);
1891 
1892       break;
1893     }
1894   }
1895 
1896   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
1897   {
1898      return HAL_ERROR;
1899   }
1900 
1901   /* Configure timer output */
1902   OutputCfg.Polarity = (pSimplePWMChannelCfg->Polarity & HRTIM_OUTR_POL1);
1903   OutputCfg.IdleLevel = (pSimplePWMChannelCfg->IdleLevel& HRTIM_OUTR_IDLES1);
1904   OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE;
1905   OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE;
1906   OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED;
1907   OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR;
1908   OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMPER;
1909 
1910   HRTIM_OutputConfig(hhrtim,
1911                      TimerIdx,
1912                      PWMChannel,
1913                      &OutputCfg);
1914 
1915   /* Enable the registers preload mechanism */
1916   hrtim_timcr = hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR;
1917   hrtim_timcr |= HRTIM_TIMCR_PREEN;
1918   hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR = hrtim_timcr;
1919 
1920   hhrtim->State = HAL_HRTIM_STATE_READY;
1921 
1922   /* Process Unlocked */
1923   __HAL_UNLOCK(hhrtim);
1924 
1925   return HAL_OK;
1926 }
1927 
1928 /**
1929   * @brief  Start the PWM output signal generation on the designed timer output
1930   * @param  hhrtim pointer to HAL HRTIM handle
1931   * @param  TimerIdx Timer index
1932   *                   This parameter can be one of the following values:
1933   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
1934   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
1935   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
1936   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
1937   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
1938   * @param  PWMChannel Timer output
1939   *                    This parameter can be one of the following values:
1940   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
1941   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
1942   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
1943   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
1944   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
1945   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
1946   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
1947   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
1948   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
1949   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
1950   * @retval HAL status
1951   */
1952 HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart(HRTIM_HandleTypeDef * hhrtim,
1953                                           uint32_t TimerIdx,
1954                                           uint32_t PWMChannel)
1955 {
1956    /* Check the parameters */
1957   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
1958 
1959   /* Process Locked */
1960   __HAL_LOCK(hhrtim);
1961 
1962   hhrtim->State = HAL_HRTIM_STATE_BUSY;
1963 
1964   /* Enable the timer output */
1965   hhrtim->Instance->sCommonRegs.OENR |= PWMChannel;
1966 
1967   /* Enable the timer counter */
1968   __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
1969 
1970   hhrtim->State = HAL_HRTIM_STATE_READY;
1971 
1972   /* Process Unlocked */
1973   __HAL_UNLOCK(hhrtim);
1974 
1975   return HAL_OK;
1976 }
1977 
1978 /**
1979   * @brief  Stop the PWM output signal generation on the designed timer output
1980   * @param  hhrtim pointer to HAL HRTIM handle
1981   * @param  TimerIdx Timer index
1982   *                   This parameter can be one of the following values:
1983   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
1984   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
1985   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
1986   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
1987   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
1988   * @param  PWMChannel Timer output
1989   *                    This parameter can be one of the following values:
1990   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
1991   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
1992   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
1993   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
1994   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
1995   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
1996   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
1997   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
1998   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
1999   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
2000   * @retval HAL status
2001   */
2002 HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop(HRTIM_HandleTypeDef * hhrtim,
2003                                          uint32_t TimerIdx,
2004                                          uint32_t PWMChannel)
2005 {
2006    /* Check the parameters */
2007   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
2008 
2009   /* Process Locked */
2010   __HAL_LOCK(hhrtim);
2011 
2012   hhrtim->State = HAL_HRTIM_STATE_BUSY;
2013 
2014   /* Disable the timer output */
2015   hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel;
2016 
2017   /* Disable the timer counter */
2018   __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
2019 
2020   hhrtim->State = HAL_HRTIM_STATE_READY;
2021 
2022   /* Process Unlocked */
2023   __HAL_UNLOCK(hhrtim);
2024 
2025   return HAL_OK;
2026 }
2027 
2028 /**
2029   * @brief  Start the PWM output signal generation on the designed timer output
2030   *         (The compare interrupt is enabled).
2031   * @param  hhrtim pointer to HAL HRTIM handle
2032   * @param  TimerIdx Timer index
2033   *                   This parameter can be one of the following values:
2034   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
2035   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
2036   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
2037   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
2038   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
2039   * @param  PWMChannel Timer output
2040   *                    This parameter can be one of the following values:
2041   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
2042   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
2043   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
2044   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
2045   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
2046   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
2047   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
2048   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
2049   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
2050   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
2051   * @retval HAL status
2052   */
2053 HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_IT(HRTIM_HandleTypeDef * hhrtim,
2054                                              uint32_t TimerIdx,
2055                                              uint32_t PWMChannel)
2056 {
2057    /* Check the parameters */
2058   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
2059 
2060   /* Process Locked */
2061   __HAL_LOCK(hhrtim);
2062 
2063   hhrtim->State = HAL_HRTIM_STATE_BUSY;
2064 
2065   /* Enable the timer output */
2066   hhrtim->Instance->sCommonRegs.OENR |= PWMChannel;
2067 
2068   /* Enable the timer interrupt (depends on the PWM output) */
2069   switch (PWMChannel)
2070   {
2071   case HRTIM_OUTPUT_TA1:
2072   case HRTIM_OUTPUT_TB1:
2073   case HRTIM_OUTPUT_TC1:
2074   case HRTIM_OUTPUT_TD1:
2075   case HRTIM_OUTPUT_TE1:
2076     {
2077       __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
2078       break;
2079     }
2080 
2081   case HRTIM_OUTPUT_TA2:
2082   case HRTIM_OUTPUT_TB2:
2083   case HRTIM_OUTPUT_TC2:
2084   case HRTIM_OUTPUT_TD2:
2085   case HRTIM_OUTPUT_TE2:
2086     {
2087       __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
2088       break;
2089     }
2090 
2091   default:
2092     {
2093       hhrtim->State = HAL_HRTIM_STATE_ERROR;
2094 
2095       /* Process Unlocked */
2096       __HAL_UNLOCK(hhrtim);
2097 
2098       break;
2099     }
2100   }
2101 
2102   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
2103   {
2104      return HAL_ERROR;
2105   }
2106 
2107   /* Enable the timer counter */
2108   __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
2109 
2110   hhrtim->State = HAL_HRTIM_STATE_READY;
2111 
2112   /* Process Unlocked */
2113   __HAL_UNLOCK(hhrtim);
2114 
2115   return HAL_OK;
2116 }
2117 
2118 /**
2119   * @brief  Stop the PWM output signal generation on the designed timer output
2120   *         (The compare interrupt is disabled).
2121   * @param  hhrtim pointer to HAL HRTIM handle
2122   * @param  TimerIdx Timer index
2123   *                   This parameter can be one of the following values:
2124   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
2125   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
2126   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
2127   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
2128   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
2129   * @param  PWMChannel Timer output
2130   *                    This parameter can be one of the following values:
2131   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
2132   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
2133   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
2134   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
2135   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
2136   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
2137   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
2138   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
2139   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
2140   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
2141   * @retval HAL status
2142   */
2143 HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_IT(HRTIM_HandleTypeDef * hhrtim,
2144                                             uint32_t TimerIdx,
2145                                             uint32_t PWMChannel)
2146 {
2147    /* Check the parameters */
2148   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
2149 
2150   /* Process Locked */
2151   __HAL_LOCK(hhrtim);
2152 
2153   hhrtim->State = HAL_HRTIM_STATE_BUSY;
2154 
2155   /* Disable the timer output */
2156   hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel;
2157 
2158   /* Disable the timer interrupt (depends on the PWM output) */
2159   switch (PWMChannel)
2160   {
2161   case HRTIM_OUTPUT_TA1:
2162   case HRTIM_OUTPUT_TB1:
2163   case HRTIM_OUTPUT_TC1:
2164   case HRTIM_OUTPUT_TD1:
2165   case HRTIM_OUTPUT_TE1:
2166     {
2167       __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
2168       break;
2169     }
2170 
2171   case HRTIM_OUTPUT_TA2:
2172   case HRTIM_OUTPUT_TB2:
2173   case HRTIM_OUTPUT_TC2:
2174   case HRTIM_OUTPUT_TD2:
2175   case HRTIM_OUTPUT_TE2:
2176     {
2177       __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
2178       break;
2179     }
2180 
2181   default:
2182     {
2183       hhrtim->State = HAL_HRTIM_STATE_ERROR;
2184 
2185       /* Process Unlocked */
2186       __HAL_UNLOCK(hhrtim);
2187 
2188       break;
2189     }
2190   }
2191 
2192   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
2193   {
2194      return HAL_ERROR;
2195   }
2196 
2197   /* Disable the timer counter */
2198   __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
2199 
2200   hhrtim->State = HAL_HRTIM_STATE_READY;
2201 
2202   /* Process Unlocked */
2203   __HAL_UNLOCK(hhrtim);
2204 
2205   return HAL_OK;
2206 }
2207 
2208 /**
2209   * @brief  Start the PWM output signal generation on the designed timer output
2210   *         (The compare DMA request is enabled).
2211   * @param  hhrtim pointer to HAL HRTIM handle
2212   * @param  TimerIdx Timer index
2213   *                   This parameter can be one of the following values:
2214   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
2215   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
2216   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
2217   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
2218   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
2219   * @param  PWMChannel Timer output
2220   *                    This parameter can be one of the following values:
2221   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
2222   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
2223   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
2224   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
2225   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
2226   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
2227   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
2228   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
2229   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
2230   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
2231   * @param  SrcAddr DMA transfer source address
2232   * @param  DestAddr DMA transfer destination address
2233   * @param  Length The length of data items (data size) to be transferred
2234   *                     from source to destination
2235   * @retval HAL status
2236   */
2237 HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_DMA(HRTIM_HandleTypeDef * hhrtim,
2238                                               uint32_t TimerIdx,
2239                                               uint32_t PWMChannel,
2240                                               uint32_t SrcAddr,
2241                                               uint32_t DestAddr,
2242                                               uint32_t Length)
2243 {
2244   DMA_HandleTypeDef * hdma;
2245 
2246   /* Check the parameters */
2247   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
2248 
2249   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
2250   {
2251      return HAL_BUSY;
2252   }
2253   if(hhrtim->State == HAL_HRTIM_STATE_READY)
2254   {
2255     if((SrcAddr == 0U ) || (DestAddr == 0U ) || (Length == 0U))
2256     {
2257       return HAL_ERROR;
2258     }
2259     else
2260     {
2261       hhrtim->State = HAL_HRTIM_STATE_BUSY;
2262     }
2263   }
2264 
2265   /* Process Locked */
2266   __HAL_LOCK(hhrtim);
2267 
2268   /* Enable the timer output */
2269   hhrtim->Instance->sCommonRegs.OENR |= PWMChannel;
2270 
2271   /* Get the timer DMA handler */
2272   hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
2273 
2274   if (hdma == NULL)
2275   {
2276     hhrtim->State = HAL_HRTIM_STATE_ERROR;
2277 
2278     /* Process Unlocked */
2279     __HAL_UNLOCK(hhrtim);
2280 
2281     return HAL_ERROR;
2282   }
2283 
2284   /* Set the DMA error callback */
2285   hdma->XferErrorCallback = HRTIM_DMAError ;
2286 
2287   /* Set the DMA transfer completed callback */
2288   hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
2289 
2290   /* Enable the DMA channel */
2291   if (HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length) != HAL_OK)
2292     {
2293         hhrtim->State = HAL_HRTIM_STATE_ERROR;
2294 
2295         /* Process Unlocked */
2296         __HAL_UNLOCK(hhrtim);
2297 
2298         return HAL_ERROR;
2299     }
2300 
2301   /* Enable the timer DMA request */
2302   switch (PWMChannel)
2303   {
2304   case HRTIM_OUTPUT_TA1:
2305   case HRTIM_OUTPUT_TB1:
2306   case HRTIM_OUTPUT_TC1:
2307   case HRTIM_OUTPUT_TD1:
2308   case HRTIM_OUTPUT_TE1:
2309     {
2310       __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP1);
2311       break;
2312     }
2313 
2314   case HRTIM_OUTPUT_TA2:
2315   case HRTIM_OUTPUT_TB2:
2316   case HRTIM_OUTPUT_TC2:
2317   case HRTIM_OUTPUT_TD2:
2318   case HRTIM_OUTPUT_TE2:
2319     {
2320       __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP2);
2321       break;
2322     }
2323 
2324   default:
2325     {
2326       hhrtim->State = HAL_HRTIM_STATE_ERROR;
2327 
2328       /* Process Unlocked */
2329       __HAL_UNLOCK(hhrtim);
2330 
2331       break;
2332     }
2333   }
2334 
2335   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
2336   {
2337      return HAL_ERROR;
2338   }
2339 
2340   /* Enable the timer counter */
2341   __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
2342 
2343   hhrtim->State = HAL_HRTIM_STATE_READY;
2344 
2345   /* Process Unlocked */
2346   __HAL_UNLOCK(hhrtim);
2347 
2348   return HAL_OK;
2349 }
2350 
2351 /**
2352   * @brief  Stop the PWM output signal generation on the designed timer output
2353   *         (The compare DMA request is disabled).
2354   * @param  hhrtim pointer to HAL HRTIM handle
2355   * @param  TimerIdx Timer index
2356   *                   This parameter can be one of the following values:
2357   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
2358   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
2359   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
2360   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
2361   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
2362   * @param  PWMChannel Timer output
2363   *                    This parameter can be one of the following values:
2364   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
2365   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
2366   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
2367   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
2368   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
2369   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
2370   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
2371   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
2372   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
2373   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
2374   * @retval HAL status
2375   */
2376 HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_DMA(HRTIM_HandleTypeDef * hhrtim,
2377                                              uint32_t TimerIdx,
2378                                              uint32_t PWMChannel)
2379 {
2380   /* Check the parameters */
2381   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
2382 
2383   /* Process Locked */
2384   __HAL_LOCK(hhrtim);
2385 
2386   hhrtim->State = HAL_HRTIM_STATE_BUSY;
2387 
2388   /* Disable the timer output */
2389   hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel;
2390 
2391   /* Get the timer DMA handler */
2392   /* Disable the DMA */
2393   if (HAL_DMA_Abort(HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx)) != HAL_OK)
2394   {
2395     hhrtim->State = HAL_HRTIM_STATE_ERROR;
2396 
2397     /* Process Unlocked */
2398     __HAL_UNLOCK(hhrtim);
2399 
2400     return HAL_ERROR;
2401   }
2402 
2403   /* Disable the timer DMA request */
2404   switch (PWMChannel)
2405   {
2406   case HRTIM_OUTPUT_TA1:
2407   case HRTIM_OUTPUT_TB1:
2408   case HRTIM_OUTPUT_TC1:
2409   case HRTIM_OUTPUT_TD1:
2410   case HRTIM_OUTPUT_TE1:
2411     {
2412       __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP1);
2413       break;
2414     }
2415 
2416   case HRTIM_OUTPUT_TA2:
2417   case HRTIM_OUTPUT_TB2:
2418   case HRTIM_OUTPUT_TC2:
2419   case HRTIM_OUTPUT_TD2:
2420   case HRTIM_OUTPUT_TE2:
2421     {
2422       __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP2);
2423       break;
2424     }
2425 
2426   default:
2427     {
2428       hhrtim->State = HAL_HRTIM_STATE_ERROR;
2429 
2430       /* Process Unlocked */
2431       __HAL_UNLOCK(hhrtim);
2432 
2433       break;
2434     }
2435   }
2436 
2437   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
2438   {
2439      return HAL_ERROR;
2440   }
2441 
2442   /* Disable the timer counter */
2443   __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
2444 
2445   hhrtim->State = HAL_HRTIM_STATE_READY;
2446 
2447   /* Process Unlocked */
2448   __HAL_UNLOCK(hhrtim);
2449 
2450   return HAL_OK;
2451 }
2452 
2453 /**
2454   * @}
2455   */
2456 
2457 /** @defgroup HRTIM_Exported_Functions_Group5 Simple input capture functions
2458   * @ingroup RTEMSBSPsARMSTM32H7
2459  *  @brief    Simple input capture functions
2460 @verbatim
2461  ===============================================================================
2462               ##### Simple input capture functions #####
2463  ===============================================================================
2464     [..]  This section provides functions allowing to:
2465       (+) Configure simple input capture channel
2466       (+) Start simple input capture
2467       (+) Stop simple input capture
2468       (+) Start simple input capture and enable interrupt
2469       (+) Stop simple input capture and disable interrupt
2470       (+) Start simple input capture and enable DMA transfer
2471       (+) Stop simple input capture and disable DMA transfer
2472       -@- When a HRTIM timer operates in simple input capture mode
2473           the Capture Register (HRTIM_CPT1/2xR) is used to latch the
2474          value of the timer counter counter after a transition detected
2475          on a given external event input.
2476 @endverbatim
2477   * @{
2478   */
2479 
2480 /**
2481   * @brief  Configure a simple capture
2482   * @param  hhrtim pointer to HAL HRTIM handle
2483   * @param  TimerIdx Timer index
2484   *                   This parameter can be one of the following values:
2485   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
2486   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
2487   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
2488   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
2489   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
2490   * @param  CaptureChannel Capture unit
2491   *                    This parameter can be one of the following values:
2492   *                    @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
2493   *                    @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
2494   * @param  pSimpleCaptureChannelCfg pointer to the simple capture configuration structure
2495   * @note When the timer operates in simple capture mode the capture is triggered
2496   *       by the designated external event and GPIO input is implicitly used as event source.
2497   *       The cature can be triggered by a rising edge, a falling edge or both
2498   *       edges on event channel.
2499   * @retval HAL status
2500   */
2501 HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureChannelConfig(HRTIM_HandleTypeDef * hhrtim,
2502                                                       uint32_t TimerIdx,
2503                                                       uint32_t CaptureChannel,
2504                                                       const HRTIM_SimpleCaptureChannelCfgTypeDef* pSimpleCaptureChannelCfg)
2505 {
2506   HRTIM_EventCfgTypeDef EventCfg;
2507 
2508   /* Check parameters */
2509   assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
2510   assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
2511   assert_param(IS_HRTIM_EVENT(pSimpleCaptureChannelCfg->Event));
2512   assert_param(IS_HRTIM_EVENTPOLARITY(pSimpleCaptureChannelCfg->EventSensitivity,
2513                                       pSimpleCaptureChannelCfg->EventPolarity));
2514   assert_param(IS_HRTIM_EVENTSENSITIVITY(pSimpleCaptureChannelCfg->EventSensitivity));
2515   assert_param(IS_HRTIM_EVENTFILTER(pSimpleCaptureChannelCfg->Event,
2516                                     pSimpleCaptureChannelCfg->EventFilter));
2517 
2518   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
2519   {
2520      return HAL_BUSY;
2521   }
2522 
2523   /* Process Locked */
2524   __HAL_LOCK(hhrtim);
2525 
2526   hhrtim->State = HAL_HRTIM_STATE_BUSY;
2527 
2528   /* Configure external event channel */
2529   EventCfg.FastMode = HRTIM_EVENTFASTMODE_DISABLE;
2530   EventCfg.Filter = (pSimpleCaptureChannelCfg->EventFilter & HRTIM_EECR3_EE6F);
2531   EventCfg.Polarity = (pSimpleCaptureChannelCfg->EventPolarity & HRTIM_EECR1_EE1POL);
2532   EventCfg.Sensitivity = (pSimpleCaptureChannelCfg->EventSensitivity & HRTIM_EECR1_EE1SNS);
2533   EventCfg.Source = HRTIM_EVENTSRC_1;
2534 
2535   HRTIM_EventConfig(hhrtim,
2536                     pSimpleCaptureChannelCfg->Event,
2537                     &EventCfg);
2538 
2539   /* Memorize capture trigger (will be configured when the capture is started */
2540   HRTIM_CaptureUnitConfig(hhrtim,
2541                           TimerIdx,
2542                           CaptureChannel,
2543                           pSimpleCaptureChannelCfg->Event);
2544 
2545   hhrtim->State = HAL_HRTIM_STATE_READY;
2546 
2547   /* Process Unlocked */
2548   __HAL_UNLOCK(hhrtim);
2549 
2550   return HAL_OK;
2551 }
2552 
2553 /**
2554   * @brief  Enable a simple capture on the designed capture unit
2555   * @param  hhrtim pointer to HAL HRTIM handle
2556   * @param  TimerIdx Timer index
2557   *                   This parameter can be one of the following values:
2558   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
2559   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
2560   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
2561   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
2562   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
2563   * @param  CaptureChannel Timer output
2564   *                    This parameter can be one of the following values:
2565   *                    @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
2566   *                    @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
2567   * @retval HAL status
2568   * @note  The external event triggering the capture is available for all timing
2569   *        units. It can be used directly and is active as soon as the timing
2570   *        unit counter is enabled.
2571   */
2572 HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart(HRTIM_HandleTypeDef * hhrtim,
2573                                               uint32_t TimerIdx,
2574                                               uint32_t CaptureChannel)
2575 {
2576    /* Check the parameters */
2577   assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
2578   assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
2579 
2580   /* Process Locked */
2581   __HAL_LOCK(hhrtim);
2582 
2583   hhrtim->State = HAL_HRTIM_STATE_BUSY;
2584 
2585   /* Set the capture unit trigger */
2586   switch (CaptureChannel)
2587   {
2588   case HRTIM_CAPTUREUNIT_1:
2589     {
2590       hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1;
2591       break;
2592     }
2593 
2594   case HRTIM_CAPTUREUNIT_2:
2595     {
2596       hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2;
2597       break;
2598     }
2599 
2600   default:
2601     {
2602       hhrtim->State = HAL_HRTIM_STATE_ERROR;
2603 
2604       /* Process Unlocked */
2605       __HAL_UNLOCK(hhrtim);
2606 
2607       break;
2608     }
2609   }
2610 
2611   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
2612   {
2613      return HAL_ERROR;
2614   }
2615 
2616   /* Enable the timer counter */
2617   __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
2618 
2619   hhrtim->State = HAL_HRTIM_STATE_READY;
2620 
2621   /* Process Unlocked */
2622   __HAL_UNLOCK(hhrtim);
2623 
2624   return HAL_OK;
2625 }
2626 
2627 /**
2628   * @brief  Disable a simple capture on the designed capture unit
2629   * @param  hhrtim pointer to HAL HRTIM handle
2630   * @param  TimerIdx Timer index
2631   *                   This parameter can be one of the following values:
2632   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
2633   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
2634   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
2635   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
2636   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
2637   * @param  CaptureChannel Timer output
2638   *                    This parameter can be one of the following values:
2639   *                    @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
2640   *                    @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
2641   * @retval HAL status
2642   */
2643 HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop(HRTIM_HandleTypeDef * hhrtim,
2644                                              uint32_t TimerIdx,
2645                                              uint32_t CaptureChannel)
2646 {
2647   uint32_t hrtim_cpt1cr;
2648   uint32_t hrtim_cpt2cr;
2649 
2650    /* Check the parameters */
2651   assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
2652   assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
2653 
2654   /* Process Locked */
2655   __HAL_LOCK(hhrtim);
2656 
2657   hhrtim->State = HAL_HRTIM_STATE_BUSY;
2658 
2659   /* Set the capture unit trigger */
2660   switch (CaptureChannel)
2661   {
2662   case HRTIM_CAPTUREUNIT_1:
2663     {
2664       hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE;
2665       break;
2666     }
2667 
2668   case HRTIM_CAPTUREUNIT_2:
2669     {
2670       hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE;
2671       break;
2672     }
2673 
2674   default:
2675     {
2676       hhrtim->State = HAL_HRTIM_STATE_ERROR;
2677 
2678       /* Process Unlocked */
2679       __HAL_UNLOCK(hhrtim);
2680 
2681       break;
2682     }
2683   }
2684 
2685   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
2686   {
2687      return HAL_ERROR;
2688   }
2689 
2690   hrtim_cpt1cr = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR;
2691   hrtim_cpt2cr = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR;
2692 
2693   /* Disable the timer counter */
2694   if ((hrtim_cpt1cr == HRTIM_CAPTURETRIGGER_NONE) &&
2695       (hrtim_cpt2cr == HRTIM_CAPTURETRIGGER_NONE))
2696   {
2697     __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
2698   }
2699 
2700   hhrtim->State = HAL_HRTIM_STATE_READY;
2701 
2702   /* Process Unlocked */
2703   __HAL_UNLOCK(hhrtim);
2704 
2705   return HAL_OK;
2706 }
2707 
2708 /**
2709   * @brief  Enable a simple capture on the designed capture unit
2710   *         (Capture interrupt is enabled).
2711   * @param  hhrtim pointer to HAL HRTIM handle
2712   * @param  TimerIdx Timer index
2713   *                   This parameter can be one of the following values:
2714   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
2715   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
2716   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
2717   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
2718   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
2719   * @param  CaptureChannel Timer output
2720   *                    This parameter can be one of the following values:
2721   *                    @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
2722   *                    @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
2723   * @retval HAL status
2724   */
2725 HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_IT(HRTIM_HandleTypeDef * hhrtim,
2726                                                  uint32_t TimerIdx,
2727                                                  uint32_t CaptureChannel)
2728 {
2729    /* Check the parameters */
2730   assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
2731   assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
2732 
2733   /* Process Locked */
2734   __HAL_LOCK(hhrtim);
2735 
2736   hhrtim->State = HAL_HRTIM_STATE_BUSY;
2737 
2738   /* Set the capture unit trigger */
2739   switch (CaptureChannel)
2740   {
2741   case HRTIM_CAPTUREUNIT_1:
2742     {
2743       hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1;
2744 
2745       /* Enable the capture unit 1 interrupt */
2746       __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1);
2747       break;
2748     }
2749 
2750   case HRTIM_CAPTUREUNIT_2:
2751     {
2752       hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2;
2753 
2754       /* Enable the capture unit 2 interrupt */
2755       __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2);
2756       break;
2757     }
2758 
2759   default:
2760     {
2761       hhrtim->State = HAL_HRTIM_STATE_ERROR;
2762 
2763       /* Process Unlocked */
2764       __HAL_UNLOCK(hhrtim);
2765 
2766       break;
2767     }
2768   }
2769 
2770   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
2771   {
2772      return HAL_ERROR;
2773   }
2774 
2775   /* Enable the timer counter */
2776   __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
2777 
2778   hhrtim->State = HAL_HRTIM_STATE_READY;
2779 
2780   /* Process Unlocked */
2781   __HAL_UNLOCK(hhrtim);
2782 
2783   return HAL_OK;
2784 }
2785 
2786 /**
2787   * @brief  Disable a simple capture on the designed capture unit
2788   *         (Capture interrupt is disabled).
2789   * @param  hhrtim pointer to HAL HRTIM handle
2790   * @param  TimerIdx Timer index
2791   *                   This parameter can be one of the following values:
2792   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
2793   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
2794   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
2795   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
2796   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
2797   * @param  CaptureChannel Timer output
2798   *                    This parameter can be one of the following values:
2799   *                    @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
2800   *                    @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
2801   * @retval HAL status
2802   */
2803 HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_IT(HRTIM_HandleTypeDef * hhrtim,
2804                                                 uint32_t TimerIdx,
2805                                                 uint32_t CaptureChannel)
2806 {
2807 
2808   uint32_t hrtim_cpt1cr;
2809   uint32_t hrtim_cpt2cr;
2810 
2811    /* Check the parameters */
2812   assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
2813   assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
2814 
2815   /* Process Locked */
2816   __HAL_LOCK(hhrtim);
2817 
2818   hhrtim->State = HAL_HRTIM_STATE_BUSY;
2819 
2820   /* Set the capture unit trigger */
2821   switch (CaptureChannel)
2822   {
2823   case HRTIM_CAPTUREUNIT_1:
2824     {
2825       hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE;
2826 
2827       /* Disable the capture unit 1 interrupt */
2828       __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1);
2829       break;
2830     }
2831 
2832   case HRTIM_CAPTUREUNIT_2:
2833     {
2834       hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE;
2835 
2836       /* Disable the capture unit 2 interrupt */
2837       __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2);
2838       break;
2839     }
2840 
2841   default:
2842     {
2843       hhrtim->State = HAL_HRTIM_STATE_ERROR;
2844 
2845       /* Process Unlocked */
2846       __HAL_UNLOCK(hhrtim);
2847 
2848       break;
2849     }
2850   }
2851 
2852   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
2853   {
2854      return HAL_ERROR;
2855   }
2856 
2857   hrtim_cpt1cr = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR;
2858   hrtim_cpt2cr = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR;
2859 
2860   /* Disable the timer counter */
2861   if ((hrtim_cpt1cr == HRTIM_CAPTURETRIGGER_NONE) &&
2862       (hrtim_cpt2cr == HRTIM_CAPTURETRIGGER_NONE))
2863   {
2864     __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
2865   }
2866 
2867   hhrtim->State = HAL_HRTIM_STATE_READY;
2868 
2869   /* Process Unlocked */
2870   __HAL_UNLOCK(hhrtim);
2871 
2872   return HAL_OK;
2873 }
2874 
2875 /**
2876   * @brief  Enable a simple capture on the designed capture unit
2877   *         (Capture DMA request is enabled).
2878   * @param  hhrtim pointer to HAL HRTIM handle
2879   * @param  TimerIdx Timer index
2880   *                   This parameter can be one of the following values:
2881   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
2882   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
2883   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
2884   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
2885   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
2886   * @param  CaptureChannel Timer output
2887   *                    This parameter can be one of the following values:
2888   *                    @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
2889   *                    @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
2890   * @param  SrcAddr DMA transfer source address
2891   * @param  DestAddr DMA transfer destination address
2892   * @param  Length The length of data items (data size) to be transferred
2893   *                     from source to destination
2894   * @retval HAL status
2895   */
2896 HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_DMA(HRTIM_HandleTypeDef * hhrtim,
2897                                                   uint32_t TimerIdx,
2898                                                   uint32_t CaptureChannel,
2899                                                   uint32_t SrcAddr,
2900                                                   uint32_t DestAddr,
2901                                                   uint32_t Length)
2902 {
2903   DMA_HandleTypeDef * hdma;
2904 
2905    /* Check the parameters */
2906   assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
2907   assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
2908 
2909   /* Process Locked */
2910   __HAL_LOCK(hhrtim);
2911 
2912   hhrtim->State = HAL_HRTIM_STATE_BUSY;
2913 
2914   /* Get the timer DMA handler */
2915   hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
2916 
2917   if (hdma == NULL)
2918   {
2919    hhrtim->State = HAL_HRTIM_STATE_ERROR;
2920 
2921    /* Process Unlocked */
2922    __HAL_UNLOCK(hhrtim);
2923 
2924    return HAL_ERROR;
2925   }
2926 
2927   /* Set the DMA error callback */
2928   hdma->XferErrorCallback = HRTIM_DMAError ;
2929 
2930   /* Set the DMA transfer completed callback */
2931   hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
2932 
2933   /* Enable the DMA channel */
2934   if (HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length) != HAL_OK)
2935     {
2936         hhrtim->State = HAL_HRTIM_STATE_ERROR;
2937 
2938         /* Process Unlocked */
2939         __HAL_UNLOCK(hhrtim);
2940 
2941         return HAL_ERROR;
2942     }
2943 
2944   switch (CaptureChannel)
2945   {
2946   case HRTIM_CAPTUREUNIT_1:
2947     {
2948       /* Set the capture unit trigger */
2949       hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1;
2950 
2951       __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT1);
2952       break;
2953     }
2954 
2955   case HRTIM_CAPTUREUNIT_2:
2956     {
2957       /* Set the capture unit trigger */
2958       hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2;
2959 
2960       /* Enable the timer DMA request */
2961       __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT2);
2962       break;
2963     }
2964 
2965   default:
2966     {
2967       hhrtim->State = HAL_HRTIM_STATE_ERROR;
2968 
2969       /* Process Unlocked */
2970       __HAL_UNLOCK(hhrtim);
2971 
2972       break;
2973     }
2974  }
2975 
2976  if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
2977   {
2978      return HAL_ERROR;
2979   }
2980 
2981   /* Enable the timer counter */
2982   __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
2983 
2984   hhrtim->State = HAL_HRTIM_STATE_READY;
2985 
2986   /* Process Unlocked */
2987   __HAL_UNLOCK(hhrtim);
2988 
2989   return HAL_OK;
2990 }
2991 
2992 /**
2993   * @brief  Disable a simple capture on the designed capture unit
2994   *         (Capture DMA request is disabled).
2995   * @param  hhrtim pointer to HAL HRTIM handle
2996   * @param  TimerIdx Timer index
2997   *                   This parameter can be one of the following values:
2998   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
2999   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
3000   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
3001   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
3002   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
3003   * @param  CaptureChannel Timer output
3004   *                    This parameter can be one of the following values:
3005   *                    @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
3006   *                    @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
3007   * @retval HAL status
3008   */
3009 HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_DMA(HRTIM_HandleTypeDef * hhrtim,
3010                                                  uint32_t TimerIdx,
3011                                                  uint32_t CaptureChannel)
3012 {
3013 
3014   uint32_t hrtim_cpt1cr;
3015   uint32_t hrtim_cpt2cr;
3016 
3017   /* Check the parameters */
3018   assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
3019   assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
3020 
3021   /* Process Locked */
3022   __HAL_LOCK(hhrtim);
3023 
3024   hhrtim->State = HAL_HRTIM_STATE_BUSY;
3025 
3026   /* Get the timer DMA handler */
3027   /* Disable the DMA */
3028   if (HAL_DMA_Abort(HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx)) != HAL_OK)
3029   {
3030         hhrtim->State = HAL_HRTIM_STATE_ERROR;
3031 
3032         /* Process Unlocked */
3033         __HAL_UNLOCK(hhrtim);
3034 
3035         return HAL_ERROR;
3036   }
3037 
3038   switch (CaptureChannel)
3039   {
3040   case HRTIM_CAPTUREUNIT_1:
3041     {
3042       /* Reset the capture unit trigger */
3043       hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE;
3044 
3045       /* Disable the capture unit 1 DMA request */
3046       __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT1);
3047       break;
3048     }
3049 
3050   case HRTIM_CAPTUREUNIT_2:
3051     {
3052       /* Reset the capture unit trigger */
3053       hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE;
3054 
3055       /* Disable the capture unit 2 DMA request */
3056       __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT2);
3057       break;
3058     }
3059 
3060   default:
3061     {
3062       hhrtim->State = HAL_HRTIM_STATE_ERROR;
3063 
3064       /* Process Unlocked */
3065       __HAL_UNLOCK(hhrtim);
3066 
3067       break;
3068     }
3069   }
3070 
3071   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
3072   {
3073      return HAL_ERROR;
3074   }
3075 
3076   hrtim_cpt1cr = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR;
3077   hrtim_cpt2cr = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR;
3078 
3079   /* Disable the timer counter */
3080   if ((hrtim_cpt1cr == HRTIM_CAPTURETRIGGER_NONE) &&
3081       (hrtim_cpt2cr == HRTIM_CAPTURETRIGGER_NONE))
3082   {
3083     __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
3084   }
3085 
3086   hhrtim->State = HAL_HRTIM_STATE_READY;
3087 
3088   /* Process Unlocked */
3089   __HAL_UNLOCK(hhrtim);
3090 
3091   return HAL_OK;
3092 }
3093 
3094 /**
3095   * @}
3096   */
3097 
3098 /** @defgroup HRTIM_Exported_Functions_Group6 Simple one pulse functions
3099   * @ingroup RTEMSBSPsARMSTM32H7
3100  *  @brief    Simple one pulse functions
3101 @verbatim
3102  ===============================================================================
3103               ##### Simple one pulse functions #####
3104  ===============================================================================
3105     [..]  This section provides functions allowing to:
3106       (+) Configure one pulse channel
3107       (+) Start one pulse generation
3108       (+) Stop one pulse generation
3109       (+) Start one pulse generation and enable interrupt
3110       (+) Stop one pulse generation and disable interrupt
3111       -@- When a HRTIM timer operates in simple one pulse mode
3112           the timer counter is started in response to transition detected
3113           on a given external event input to generate a pulse with a
3114           programmable length after a programmable delay.
3115 @endverbatim
3116   * @{
3117   */
3118 
3119 /**
3120   * @brief  Configure an output simple one pulse mode
3121   * @param  hhrtim pointer to HAL HRTIM handle
3122   * @param  TimerIdx Timer index
3123   *                   This parameter can be one of the following values:
3124   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
3125   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
3126   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
3127   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
3128   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
3129   * @param  OnePulseChannel Timer output
3130   *                    This parameter can be one of the following values:
3131   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
3132   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
3133   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
3134   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
3135   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
3136   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
3137   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
3138   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
3139   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
3140   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
3141   * @param  pSimpleOnePulseChannelCfg pointer to the simple one pulse output configuration structure
3142   * @note When the timer operates in simple one pulse mode:
3143   *         the timer counter is implicitly started by the reset event,
3144   *         the reset of the timer counter is triggered by the designated external event
3145   *         GPIO input is implicitly used as event source,
3146   *         Output 1 is implicitly controlled by the compare unit 1,
3147   *         Output 2 is implicitly controlled by the compare unit 2.
3148   *       Output Set/Reset crossbar is set as follows:
3149   *         Output 1: SETx1R = CMP1, RSTx1R = PER
3150   *         Output 2: SETx2R = CMP2, RST2R = PER
3151   * @retval HAL status
3152   * @note If HAL_HRTIM_SimpleOnePulseChannelConfig is called for both timer
3153   *       outputs, the reset event related configuration data provided in the
3154   *       second call will override the reset event related configuration data
3155   *       provided in the first call.
3156   */
3157 HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseChannelConfig(HRTIM_HandleTypeDef * hhrtim,
3158                                                        uint32_t TimerIdx,
3159                                                        uint32_t OnePulseChannel,
3160                                                        const HRTIM_SimpleOnePulseChannelCfgTypeDef* pSimpleOnePulseChannelCfg)
3161 {
3162   HRTIM_OutputCfgTypeDef OutputCfg;
3163   HRTIM_EventCfgTypeDef EventCfg;
3164 
3165   /* Check parameters */
3166   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
3167   assert_param(IS_HRTIM_OUTPUTPULSE(pSimpleOnePulseChannelCfg->Pulse));
3168   assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimpleOnePulseChannelCfg->OutputPolarity));
3169   assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimpleOnePulseChannelCfg->OutputIdleLevel));
3170   assert_param(IS_HRTIM_EVENT(pSimpleOnePulseChannelCfg->Event));
3171   assert_param(IS_HRTIM_EVENTPOLARITY(pSimpleOnePulseChannelCfg->EventSensitivity,
3172                                       pSimpleOnePulseChannelCfg->EventPolarity));
3173   assert_param(IS_HRTIM_EVENTSENSITIVITY(pSimpleOnePulseChannelCfg->EventSensitivity));
3174   assert_param(IS_HRTIM_EVENTFILTER(pSimpleOnePulseChannelCfg->Event,
3175                                     pSimpleOnePulseChannelCfg->EventFilter));
3176 
3177   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
3178   {
3179      return HAL_BUSY;
3180   }
3181 
3182   /* Process Locked */
3183   __HAL_LOCK(hhrtim);
3184 
3185   hhrtim->State = HAL_HRTIM_STATE_BUSY;
3186 
3187   /* Configure timer compare unit */
3188   switch (OnePulseChannel)
3189   {
3190   case HRTIM_OUTPUT_TA1:
3191   case HRTIM_OUTPUT_TB1:
3192   case HRTIM_OUTPUT_TC1:
3193   case HRTIM_OUTPUT_TD1:
3194   case HRTIM_OUTPUT_TE1:
3195     {
3196       hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pSimpleOnePulseChannelCfg->Pulse;
3197       OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
3198       break;
3199     }
3200 
3201   case HRTIM_OUTPUT_TA2:
3202   case HRTIM_OUTPUT_TB2:
3203   case HRTIM_OUTPUT_TC2:
3204   case HRTIM_OUTPUT_TD2:
3205   case HRTIM_OUTPUT_TE2:
3206     {
3207       hhrtim->Instance->sTimerxRegs[TimerIdx].CMP2xR = pSimpleOnePulseChannelCfg->Pulse;
3208       OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
3209       break;
3210     }
3211 
3212   default:
3213     {
3214       OutputCfg.SetSource = HRTIM_OUTPUTSET_NONE;
3215       OutputCfg.ResetSource = HRTIM_OUTPUTRESET_NONE;
3216 
3217       hhrtim->State = HAL_HRTIM_STATE_ERROR;
3218 
3219       /* Process Unlocked */
3220       __HAL_UNLOCK(hhrtim);
3221 
3222       break;
3223     }
3224   }
3225 
3226   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
3227   {
3228      return HAL_ERROR;
3229   }
3230 
3231   /* Configure timer output */
3232   OutputCfg.Polarity =  (pSimpleOnePulseChannelCfg->OutputPolarity & HRTIM_OUTR_POL1);
3233   OutputCfg.IdleLevel = (pSimpleOnePulseChannelCfg->OutputIdleLevel & HRTIM_OUTR_IDLES1);
3234   OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE;
3235   OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE;
3236   OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED;
3237   OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR;
3238   OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMPER;
3239 
3240   HRTIM_OutputConfig(hhrtim,
3241                      TimerIdx,
3242                      OnePulseChannel,
3243                      &OutputCfg);
3244 
3245   /* Configure external event channel */
3246   EventCfg.FastMode = HRTIM_EVENTFASTMODE_DISABLE;
3247   EventCfg.Filter = (pSimpleOnePulseChannelCfg->EventFilter & HRTIM_EECR3_EE6F);
3248   EventCfg.Polarity = (pSimpleOnePulseChannelCfg->EventPolarity & HRTIM_OUTR_POL1);
3249   EventCfg.Sensitivity = (pSimpleOnePulseChannelCfg->EventSensitivity &HRTIM_EECR1_EE1SNS);
3250   EventCfg.Source = HRTIM_EVENTSRC_1;
3251 
3252   HRTIM_EventConfig(hhrtim,
3253                     pSimpleOnePulseChannelCfg->Event,
3254                     &EventCfg);
3255 
3256   /* Configure the timer reset register */
3257   HRTIM_TIM_ResetConfig(hhrtim,
3258                         TimerIdx,
3259                         pSimpleOnePulseChannelCfg->Event);
3260 
3261   hhrtim->State = HAL_HRTIM_STATE_READY;
3262 
3263   /* Process Unlocked */
3264   __HAL_UNLOCK(hhrtim);
3265 
3266   return HAL_OK;
3267 }
3268 
3269 /**
3270   * @brief  Enable the simple one pulse signal generation on the designed output
3271   * @param  hhrtim pointer to HAL HRTIM handle
3272   * @param  TimerIdx Timer index
3273   *                   This parameter can be one of the following values:
3274   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
3275   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
3276   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
3277   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
3278   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
3279   * @param  OnePulseChannel Timer output
3280   *                    This parameter can be one of the following values:
3281   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
3282   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
3283   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
3284   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
3285   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
3286   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
3287   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
3288   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
3289   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
3290   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
3291   * @retval HAL status
3292   */
3293 HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStart(HRTIM_HandleTypeDef * hhrtim,
3294                                                 uint32_t TimerIdx,
3295                                                 uint32_t OnePulseChannel)
3296 {
3297   /* Check the parameters */
3298   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
3299 
3300   /* Process Locked */
3301   __HAL_LOCK(hhrtim);
3302 
3303   hhrtim->State = HAL_HRTIM_STATE_BUSY;
3304 
3305   /* Enable the timer output */
3306   hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel;
3307 
3308   /* Enable the timer counter */
3309   __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
3310 
3311   hhrtim->State = HAL_HRTIM_STATE_READY;
3312 
3313   /* Process Unlocked */
3314   __HAL_UNLOCK(hhrtim);
3315 
3316   return HAL_OK;
3317 }
3318 
3319 /**
3320   * @brief  Disable the simple one pulse signal generation on the designed output
3321   * @param  hhrtim pointer to HAL HRTIM handle
3322   * @param  TimerIdx Timer index
3323   *                   This parameter can be one of the following values:
3324   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
3325   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
3326   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
3327   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
3328   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
3329   * @param  OnePulseChannel Timer output
3330   *                    This parameter can be one of the following values:
3331   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
3332   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
3333   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
3334   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
3335   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
3336   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
3337   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
3338   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
3339   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
3340   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
3341   * @retval HAL status
3342   */
3343 HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStop(HRTIM_HandleTypeDef * hhrtim,
3344                                               uint32_t TimerIdx,
3345                                               uint32_t OnePulseChannel)
3346 {
3347   /* Check the parameters */
3348   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
3349 
3350   /* Process Locked */
3351   __HAL_LOCK(hhrtim);
3352 
3353   hhrtim->State = HAL_HRTIM_STATE_BUSY;
3354 
3355   /* Disable the timer output */
3356   hhrtim->Instance->sCommonRegs.ODISR |= OnePulseChannel;
3357 
3358   /* Disable the timer counter */
3359   __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
3360 
3361   hhrtim->State = HAL_HRTIM_STATE_READY;
3362 
3363   /* Process Unlocked */
3364   __HAL_UNLOCK(hhrtim);
3365 
3366   return HAL_OK;
3367 }
3368 
3369 /**
3370   * @brief  Enable the simple one pulse signal generation on the designed output
3371   *         (The compare interrupt is enabled (pulse start)).
3372   * @param  hhrtim pointer to HAL HRTIM handle
3373   * @param  TimerIdx Timer index
3374   *                   This parameter can be one of the following values:
3375   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
3376   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
3377   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
3378   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
3379   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
3380   * @param  OnePulseChannel Timer output
3381   *                    This parameter can be one of the following values:
3382   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
3383   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
3384   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
3385   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
3386   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
3387   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
3388   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
3389   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
3390   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
3391   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
3392   * @retval HAL status
3393   */
3394 HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStart_IT(HRTIM_HandleTypeDef * hhrtim,
3395                                                   uint32_t TimerIdx,
3396                                                   uint32_t OnePulseChannel)
3397 {
3398   /* Check the parameters */
3399   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
3400 
3401   /* Process Locked */
3402   __HAL_LOCK(hhrtim);
3403 
3404   hhrtim->State = HAL_HRTIM_STATE_BUSY;
3405 
3406   /* Enable the timer output */
3407   hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel;
3408 
3409   /* Enable the timer interrupt (depends on the OnePulse output) */
3410   switch (OnePulseChannel)
3411   {
3412   case HRTIM_OUTPUT_TA1:
3413   case HRTIM_OUTPUT_TB1:
3414   case HRTIM_OUTPUT_TC1:
3415   case HRTIM_OUTPUT_TD1:
3416   case HRTIM_OUTPUT_TE1:
3417     {
3418       __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
3419       break;
3420     }
3421 
3422   case HRTIM_OUTPUT_TA2:
3423   case HRTIM_OUTPUT_TB2:
3424   case HRTIM_OUTPUT_TC2:
3425   case HRTIM_OUTPUT_TD2:
3426   case HRTIM_OUTPUT_TE2:
3427     {
3428       __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
3429       break;
3430     }
3431 
3432   default:
3433     {
3434       hhrtim->State = HAL_HRTIM_STATE_ERROR;
3435 
3436       /* Process Unlocked */
3437       __HAL_UNLOCK(hhrtim);
3438 
3439       break;
3440     }
3441   }
3442 
3443   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
3444   {
3445      return HAL_ERROR;
3446   }
3447 
3448   /* Enable the timer counter */
3449   __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
3450 
3451   hhrtim->State = HAL_HRTIM_STATE_READY;
3452 
3453   /* Process Unlocked */
3454   __HAL_UNLOCK(hhrtim);
3455 
3456   return HAL_OK;
3457 }
3458 
3459 /**
3460   * @brief  Disable the simple one pulse signal generation on the designed output
3461   *         (The compare interrupt is disabled).
3462   * @param  hhrtim pointer to HAL HRTIM handle
3463   * @param  TimerIdx Timer index
3464   *                   This parameter can be one of the following values:
3465   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
3466   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
3467   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
3468   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
3469   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
3470   * @param  OnePulseChannel Timer output
3471   *                    This parameter can be one of the following values:
3472   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
3473   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
3474   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
3475   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
3476   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
3477   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
3478   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
3479   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
3480   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
3481   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
3482   * @retval HAL status
3483   */
3484 HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStop_IT(HRTIM_HandleTypeDef * hhrtim,
3485                                                  uint32_t TimerIdx,
3486                                                  uint32_t OnePulseChannel)
3487 {
3488   /* Check the parameters */
3489   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
3490 
3491   /* Process Locked */
3492   __HAL_LOCK(hhrtim);
3493 
3494   hhrtim->State = HAL_HRTIM_STATE_BUSY;
3495 
3496   /* Disable the timer output */
3497   hhrtim->Instance->sCommonRegs.ODISR |= OnePulseChannel;
3498 
3499   /* Disable the timer interrupt (depends on the OnePulse output) */
3500   switch (OnePulseChannel)
3501   {
3502   case HRTIM_OUTPUT_TA1:
3503   case HRTIM_OUTPUT_TB1:
3504   case HRTIM_OUTPUT_TC1:
3505   case HRTIM_OUTPUT_TD1:
3506   case HRTIM_OUTPUT_TE1:
3507     {
3508       __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
3509       break;
3510     }
3511 
3512   case HRTIM_OUTPUT_TA2:
3513   case HRTIM_OUTPUT_TB2:
3514   case HRTIM_OUTPUT_TC2:
3515   case HRTIM_OUTPUT_TD2:
3516   case HRTIM_OUTPUT_TE2:
3517     {
3518       __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
3519       break;
3520     }
3521 
3522   default:
3523     {
3524       hhrtim->State = HAL_HRTIM_STATE_ERROR;
3525 
3526       /* Process Unlocked */
3527       __HAL_UNLOCK(hhrtim);
3528 
3529       break;
3530     }
3531   }
3532 
3533   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
3534   {
3535      return HAL_ERROR;
3536   }
3537 
3538   /* Disable the timer counter */
3539   __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
3540 
3541   hhrtim->State = HAL_HRTIM_STATE_READY;
3542 
3543   /* Process Unlocked */
3544   __HAL_UNLOCK(hhrtim);
3545 
3546   return HAL_OK;
3547 }
3548 
3549 /**
3550   * @}
3551   */
3552 
3553 /** @defgroup HRTIM_Exported_Functions_Group7 Configuration functions
3554   * @ingroup RTEMSBSPsARMSTM32H7
3555  *  @brief    HRTIM configuration functions
3556 @verbatim
3557  ===============================================================================
3558               ##### HRTIM configuration functions #####
3559  ===============================================================================
3560     [..]  This section provides functions allowing to configure the HRTIM
3561           resources shared by all the HRTIM timers operating in waveform mode:
3562       (+) Configure the burst mode controller
3563       (+) Configure an external event conditioning
3564       (+) Configure the external events sampling clock
3565       (+) Configure a fault conditioning
3566       (+) Enable or disable fault inputs
3567       (+) Configure the faults sampling clock
3568       (+) Configure an ADC trigger
3569 
3570 @endverbatim
3571   * @{
3572   */
3573 
3574 /**
3575   * @brief  Configure the burst mode feature of the HRTIM
3576   * @param  hhrtim pointer to HAL HRTIM handle
3577   * @param  pBurstModeCfg pointer to the burst mode configuration structure
3578   * @retval HAL status
3579   * @note This function must be called before starting the burst mode
3580   *       controller
3581   */
3582 HAL_StatusTypeDef HAL_HRTIM_BurstModeConfig(HRTIM_HandleTypeDef * hhrtim,
3583                                             const HRTIM_BurstModeCfgTypeDef* pBurstModeCfg)
3584 {
3585   uint32_t hrtim_bmcr;
3586 
3587   /* Check parameters */
3588   assert_param(IS_HRTIM_BURSTMODE(pBurstModeCfg->Mode));
3589   assert_param(IS_HRTIM_BURSTMODECLOCKSOURCE(pBurstModeCfg->ClockSource));
3590   assert_param(IS_HRTIM_HRTIM_BURSTMODEPRESCALER(pBurstModeCfg->Prescaler));
3591   assert_param(IS_HRTIM_BURSTMODEPRELOAD(pBurstModeCfg->PreloadEnable));
3592   assert_param(IS_HRTIM_BURSTMODETRIGGER(pBurstModeCfg->Trigger));
3593 
3594   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
3595   {
3596      return HAL_BUSY;
3597   }
3598 
3599   /* Process Locked */
3600   __HAL_LOCK(hhrtim);
3601 
3602   hhrtim->State = HAL_HRTIM_STATE_BUSY;
3603 
3604   hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;
3605 
3606   /* Set the burst mode operating mode */
3607   hrtim_bmcr &= ~(HRTIM_BMCR_BMOM);
3608   hrtim_bmcr |= (pBurstModeCfg->Mode & HRTIM_BMCR_BMOM);
3609 
3610   /* Set the burst mode clock source */
3611   hrtim_bmcr &= ~(HRTIM_BMCR_BMCLK);
3612   hrtim_bmcr |= (pBurstModeCfg->ClockSource & HRTIM_BMCR_BMCLK);
3613 
3614   /* Set the burst mode prescaler */
3615   hrtim_bmcr &= ~(HRTIM_BMCR_BMPRSC);
3616   hrtim_bmcr |= pBurstModeCfg->Prescaler;
3617 
3618   /* Enable/disable burst mode registers preload */
3619   hrtim_bmcr &= ~(HRTIM_BMCR_BMPREN);
3620   hrtim_bmcr |= (pBurstModeCfg->PreloadEnable & HRTIM_BMCR_BMPREN);
3621 
3622   /* Set the burst mode trigger */
3623   hhrtim->Instance->sCommonRegs.BMTRGR = pBurstModeCfg->Trigger;
3624 
3625   /* Set the burst mode compare value */
3626   hhrtim->Instance->sCommonRegs.BMCMPR = pBurstModeCfg->IdleDuration;
3627 
3628   /* Set the burst mode period */
3629   hhrtim->Instance->sCommonRegs.BMPER = pBurstModeCfg->Period;
3630 
3631   /* Update the HRTIM registers */
3632   hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;
3633 
3634   hhrtim->State = HAL_HRTIM_STATE_READY;
3635 
3636   /* Process Unlocked */
3637   __HAL_UNLOCK(hhrtim);
3638 
3639   return HAL_OK;
3640 }
3641 
3642 /**
3643   * @brief  Configure the conditioning of an external event
3644   * @param  hhrtim pointer to HAL HRTIM handle
3645   * @param  Event external event to configure
3646   *                    This parameter can be one of the following values:
3647   *                    @arg HRTIM_EVENT_NONE: no external Event
3648   *                    @arg HRTIM_EVENT_1: External event 1
3649   *                    @arg HRTIM_EVENT_2: External event 2
3650   *                    @arg HRTIM_EVENT_3: External event 3
3651   *                    @arg HRTIM_EVENT_4: External event 4
3652   *                    @arg HRTIM_EVENT_5: External event 5
3653   *                    @arg HRTIM_EVENT_6: External event 6
3654   *                    @arg HRTIM_EVENT_7: External event 7
3655   *                    @arg HRTIM_EVENT_8: External event 8
3656   *                    @arg HRTIM_EVENT_9: External event 9
3657   *                    @arg HRTIM_EVENT_10: External event 10
3658   * @param  pEventCfg pointer to the event conditioning configuration structure
3659   * @note This function must be called before starting the timer
3660   * @retval HAL status
3661   */
3662 HAL_StatusTypeDef HAL_HRTIM_EventConfig(HRTIM_HandleTypeDef * hhrtim,
3663                                         uint32_t Event,
3664                                         const HRTIM_EventCfgTypeDef* pEventCfg)
3665 {
3666   /* Check parameters */
3667   assert_param(IS_HRTIM_EVENT(Event));
3668   assert_param(IS_HRTIM_EVENTSRC(pEventCfg->Source));
3669   assert_param(IS_HRTIM_EVENTPOLARITY(pEventCfg->Sensitivity, pEventCfg->Polarity));
3670   assert_param(IS_HRTIM_EVENTSENSITIVITY(pEventCfg->Sensitivity));
3671   assert_param(IS_HRTIM_EVENTFASTMODE(Event, pEventCfg->FastMode));
3672   assert_param(IS_HRTIM_EVENTFILTER(Event, pEventCfg->Filter));
3673 
3674   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
3675   {
3676      return HAL_BUSY;
3677   }
3678 
3679   /* Process Locked */
3680   __HAL_LOCK(hhrtim);
3681 
3682   hhrtim->State = HAL_HRTIM_STATE_BUSY;
3683 
3684   /* Configure the event channel */
3685   HRTIM_EventConfig(hhrtim, Event, pEventCfg);
3686 
3687   hhrtim->State = HAL_HRTIM_STATE_READY;
3688 
3689   /* Process Unlocked */
3690   __HAL_UNLOCK(hhrtim);
3691 
3692   return HAL_OK;
3693 }
3694 
3695 /**
3696   * @brief  Configure the external event conditioning block prescaler
3697   * @param  hhrtim pointer to HAL HRTIM handle
3698   * @param  Prescaler Prescaler value
3699   *                    This parameter can be one of the following values:
3700   *                    @arg HRTIM_EVENTPRESCALER_DIV1: fEEVS=fHRTIM
3701   *                    @arg HRTIM_EVENTPRESCALER_DIV2: fEEVS=fHRTIM / 2
3702   *                    @arg HRTIM_EVENTPRESCALER_DIV4: fEEVS=fHRTIM / 4
3703   *                    @arg HRTIM_EVENTPRESCALER_DIV8: fEEVS=fHRTIM / 8
3704   * @note This function must be called before starting the timer
3705   * @retval HAL status
3706   */
3707 HAL_StatusTypeDef HAL_HRTIM_EventPrescalerConfig(HRTIM_HandleTypeDef * hhrtim,
3708                                                  uint32_t Prescaler)
3709 {
3710   /* Check parameters */
3711   assert_param(IS_HRTIM_EVENTPRESCALER(Prescaler));
3712 
3713   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
3714   {
3715      return HAL_BUSY;
3716   }
3717 
3718   /* Process Locked */
3719   __HAL_LOCK(hhrtim);
3720 
3721   hhrtim->State = HAL_HRTIM_STATE_BUSY;
3722 
3723   /* Set the external event prescaler */
3724   MODIFY_REG(hhrtim->Instance->sCommonRegs.EECR3, HRTIM_EECR3_EEVSD, (Prescaler & HRTIM_EECR3_EEVSD));
3725 
3726   hhrtim->State = HAL_HRTIM_STATE_READY;
3727 
3728   /* Process Unlocked */
3729   __HAL_UNLOCK(hhrtim);
3730 
3731   return HAL_OK;
3732 }
3733 
3734 /**
3735   * @brief  Configure the conditioning of fault input
3736   * @param  hhrtim pointer to HAL HRTIM handle
3737   * @param  Fault fault input to configure
3738   *                    This parameter can be one of the following values:
3739   *                    @arg HRTIM_FAULT_1: Fault input 1
3740   *                    @arg HRTIM_FAULT_2: Fault input 2
3741   *                    @arg HRTIM_FAULT_3: Fault input 3
3742   *                    @arg HRTIM_FAULT_4: Fault input 4
3743   *                    @arg HRTIM_FAULT_5: Fault input 5
3744   * @param  pFaultCfg pointer to the fault conditioning configuration structure
3745   * @note This function must be called before starting the timer and before
3746   *       enabling faults inputs
3747   * @retval HAL status
3748   */
3749 HAL_StatusTypeDef HAL_HRTIM_FaultConfig(HRTIM_HandleTypeDef * hhrtim,
3750                                         uint32_t Fault,
3751                                         const HRTIM_FaultCfgTypeDef* pFaultCfg)
3752 {
3753   uint32_t hrtim_fltinr1;
3754   uint32_t hrtim_fltinr2;
3755 
3756   /* Check parameters */
3757   assert_param(IS_HRTIM_FAULT(Fault));
3758   assert_param(IS_HRTIM_FAULTSOURCE(pFaultCfg->Source));
3759   assert_param(IS_HRTIM_FAULTPOLARITY(pFaultCfg->Polarity));
3760   assert_param(IS_HRTIM_FAULTFILTER(pFaultCfg->Filter));
3761   assert_param(IS_HRTIM_FAULTLOCK(pFaultCfg->Lock));
3762 
3763   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
3764   {
3765      return HAL_BUSY;
3766   }
3767 
3768   /* Process Locked */
3769   __HAL_LOCK(hhrtim);
3770 
3771   hhrtim->State = HAL_HRTIM_STATE_BUSY;
3772 
3773   /* Configure fault channel */
3774   hrtim_fltinr1 = hhrtim->Instance->sCommonRegs.FLTINR1;
3775   hrtim_fltinr2 = hhrtim->Instance->sCommonRegs.FLTINR2;
3776 
3777   switch (Fault)
3778   {
3779   case HRTIM_FAULT_1:
3780     {
3781       hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT1P | HRTIM_FLTINR1_FLT1SRC | HRTIM_FLTINR1_FLT1F | HRTIM_FLTINR1_FLT1LCK);
3782       hrtim_fltinr1 |= (pFaultCfg->Polarity & HRTIM_FLTINR1_FLT1P);
3783       hrtim_fltinr1 |= (pFaultCfg->Source & HRTIM_FLTINR1_FLT1SRC);
3784       hrtim_fltinr1 |= (pFaultCfg->Filter & HRTIM_FLTINR1_FLT1F);
3785       hrtim_fltinr1 |= (pFaultCfg->Lock & HRTIM_FLTINR1_FLT1LCK);
3786       break;
3787     }
3788 
3789   case HRTIM_FAULT_2:
3790     {
3791       hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT2P | HRTIM_FLTINR1_FLT2SRC | HRTIM_FLTINR1_FLT2F | HRTIM_FLTINR1_FLT2LCK);
3792       hrtim_fltinr1 |= ((pFaultCfg->Polarity << 8U) & HRTIM_FLTINR1_FLT2P);
3793       hrtim_fltinr1 |= ((pFaultCfg->Source << 8U) & HRTIM_FLTINR1_FLT2SRC);
3794       hrtim_fltinr1 |= ((pFaultCfg->Filter << 8U) & HRTIM_FLTINR1_FLT2F);
3795       hrtim_fltinr1 |= ((pFaultCfg->Lock << 8U) & HRTIM_FLTINR1_FLT2LCK);
3796       break;
3797     }
3798 
3799   case HRTIM_FAULT_3:
3800     {
3801       hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT3P | HRTIM_FLTINR1_FLT3SRC | HRTIM_FLTINR1_FLT3F | HRTIM_FLTINR1_FLT3LCK);
3802       hrtim_fltinr1 |= ((pFaultCfg->Polarity << 16U) & HRTIM_FLTINR1_FLT3P);
3803       hrtim_fltinr1 |= ((pFaultCfg->Source << 16U) & HRTIM_FLTINR1_FLT3SRC);
3804       hrtim_fltinr1 |= ((pFaultCfg->Filter << 16U) & HRTIM_FLTINR1_FLT3F);
3805       hrtim_fltinr1 |= ((pFaultCfg->Lock << 16U) & HRTIM_FLTINR1_FLT3LCK);
3806       break;
3807      }
3808 
3809   case HRTIM_FAULT_4:
3810     {
3811       hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT4P | HRTIM_FLTINR1_FLT4SRC | HRTIM_FLTINR1_FLT4F | HRTIM_FLTINR1_FLT4LCK);
3812       hrtim_fltinr1 |= ((pFaultCfg->Polarity << 24U) & HRTIM_FLTINR1_FLT4P);
3813       hrtim_fltinr1 |= ((pFaultCfg->Source << 24U) & HRTIM_FLTINR1_FLT4SRC);
3814       hrtim_fltinr1 |= ((pFaultCfg->Filter << 24U) & HRTIM_FLTINR1_FLT4F);
3815       hrtim_fltinr1 |= ((pFaultCfg->Lock << 24U) & HRTIM_FLTINR1_FLT4LCK);
3816       break;
3817     }
3818 
3819   case HRTIM_FAULT_5:
3820     {
3821       hrtim_fltinr2 &= ~(HRTIM_FLTINR2_FLT5P | HRTIM_FLTINR2_FLT5SRC | HRTIM_FLTINR2_FLT5F | HRTIM_FLTINR2_FLT5LCK);
3822       hrtim_fltinr2 |= (pFaultCfg->Polarity & HRTIM_FLTINR2_FLT5P);
3823       hrtim_fltinr2 |= (pFaultCfg->Source & HRTIM_FLTINR2_FLT5SRC);
3824       hrtim_fltinr2 |= (pFaultCfg->Filter & HRTIM_FLTINR2_FLT5F);
3825       hrtim_fltinr2 |= (pFaultCfg->Lock & HRTIM_FLTINR2_FLT5LCK);
3826       break;
3827     }
3828 
3829   default:
3830     {
3831       hhrtim->State = HAL_HRTIM_STATE_ERROR;
3832 
3833       /* Process Unlocked */
3834       __HAL_UNLOCK(hhrtim);
3835 
3836       break;
3837     }
3838   }
3839 
3840   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
3841   {
3842      return HAL_ERROR;
3843   }
3844 
3845   /* Update the HRTIM registers except LOCK bit */
3846   hhrtim->Instance->sCommonRegs.FLTINR1 = (hrtim_fltinr1 & (~(HRTIM_FLTINR1_FLTxLCK)));
3847   hhrtim->Instance->sCommonRegs.FLTINR2 = (hrtim_fltinr2 & (~(HRTIM_FLTINR2_FLTxLCK)));
3848 
3849   /* Update the HRTIM registers LOCK bit */
3850   SET_BIT(hhrtim->Instance->sCommonRegs.FLTINR1,(hrtim_fltinr1 & HRTIM_FLTINR1_FLTxLCK));
3851   SET_BIT(hhrtim->Instance->sCommonRegs.FLTINR2,(hrtim_fltinr2 & HRTIM_FLTINR2_FLTxLCK));
3852 
3853   hhrtim->State = HAL_HRTIM_STATE_READY;
3854 
3855   /* Process Unlocked */
3856   __HAL_UNLOCK(hhrtim);
3857 
3858   return HAL_OK;
3859 }
3860 
3861 /**
3862   * @brief  Configure the fault conditioning block prescaler
3863   * @param  hhrtim pointer to HAL HRTIM handle
3864   * @param  Prescaler Prescaler value
3865   *                    This parameter can be one of the following values:
3866   *                    @arg HRTIM_FAULTPRESCALER_DIV1: fFLTS=fHRTIM
3867   *                    @arg HRTIM_FAULTPRESCALER_DIV2: fFLTS=fHRTIM / 2
3868   *                    @arg HRTIM_FAULTPRESCALER_DIV4: fFLTS=fHRTIM / 4
3869   *                    @arg HRTIM_FAULTPRESCALER_DIV8: fFLTS=fHRTIM / 8
3870   * @retval HAL status
3871   * @note This function must be called before starting the timer and before
3872   *       enabling faults inputs
3873   */
3874 HAL_StatusTypeDef HAL_HRTIM_FaultPrescalerConfig(HRTIM_HandleTypeDef * hhrtim,
3875                                                  uint32_t Prescaler)
3876 {
3877   /* Check parameters */
3878   assert_param(IS_HRTIM_FAULTPRESCALER(Prescaler));
3879 
3880   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
3881   {
3882      return HAL_BUSY;
3883   }
3884 
3885   /* Process Locked */
3886   __HAL_LOCK(hhrtim);
3887 
3888   hhrtim->State = HAL_HRTIM_STATE_BUSY;
3889 
3890   /* Set the external event prescaler */
3891   MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR2, HRTIM_FLTINR2_FLTSD, (Prescaler & HRTIM_FLTINR2_FLTSD));
3892 
3893   hhrtim->State = HAL_HRTIM_STATE_READY;
3894 
3895   /* Process Unlocked */
3896   __HAL_UNLOCK(hhrtim);
3897 
3898   return HAL_OK;
3899 }
3900 
3901 /**
3902   * @brief  Enable or disables the HRTIMx Fault mode.
3903   * @param  hhrtim pointer to HAL HRTIM handle
3904   * @param  Faults fault input(s) to enable or disable
3905   *                   This parameter can be any combination of the following values:
3906   *                    @arg HRTIM_FAULT_1: Fault input 1
3907   *                    @arg HRTIM_FAULT_2: Fault input 2
3908   *                    @arg HRTIM_FAULT_3: Fault input 3
3909   *                    @arg HRTIM_FAULT_4: Fault input 4
3910   *                    @arg HRTIM_FAULT_5: Fault input 5
3911   * @param  Enable Fault(s) enabling
3912   *                    This parameter can be one of the following values:
3913   *                    @arg HRTIM_FAULTMODECTL_ENABLED: Fault(s) enabled
3914   *                    @arg HRTIM_FAULTMODECTL_DISABLED: Fault(s) disabled
3915   * @retval None
3916   */
3917 void HAL_HRTIM_FaultModeCtl(HRTIM_HandleTypeDef * hhrtim,
3918                         uint32_t Faults,
3919                         uint32_t Enable)
3920 {
3921   /* Check parameters */
3922   assert_param(IS_HRTIM_FAULT(Faults));
3923   assert_param(IS_HRTIM_FAULTMODECTL(Enable));
3924 
3925   if ((Faults & HRTIM_FAULT_1) != (uint32_t)RESET)
3926   {
3927     MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR1, HRTIM_FLTINR1_FLT1E, (Enable & HRTIM_FLTINR1_FLT1E));
3928   }
3929   if ((Faults & HRTIM_FAULT_2) != (uint32_t)RESET)
3930   {
3931     MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR1, HRTIM_FLTINR1_FLT2E, ((Enable << 8U) & HRTIM_FLTINR1_FLT2E));
3932   }
3933   if ((Faults & HRTIM_FAULT_3) != (uint32_t)RESET)
3934   {
3935     MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR1, HRTIM_FLTINR1_FLT3E, ((Enable << 16U) & HRTIM_FLTINR1_FLT3E));
3936   }
3937   if ((Faults & HRTIM_FAULT_4) != (uint32_t)RESET)
3938   {
3939     MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR1, HRTIM_FLTINR1_FLT4E, ((Enable << 24U) & HRTIM_FLTINR1_FLT4E));
3940   }
3941   if ((Faults & HRTIM_FAULT_5) != (uint32_t)RESET)
3942   {
3943     MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR2, HRTIM_FLTINR2_FLT5E, ((Enable) & HRTIM_FLTINR2_FLT5E));
3944   }
3945 }
3946 
3947 /**
3948   * @brief  Configure both the ADC trigger register update source and the ADC
3949   *         trigger source.
3950   * @param  hhrtim pointer to HAL HRTIM handle
3951   * @param  ADCTrigger ADC trigger to configure
3952   *                    This parameter can be one of the following values:
3953   *                    @arg HRTIM_ADCTRIGGER_1: ADC trigger 1
3954   *                    @arg HRTIM_ADCTRIGGER_2: ADC trigger 2
3955   *                    @arg HRTIM_ADCTRIGGER_3: ADC trigger 3
3956   *                    @arg HRTIM_ADCTRIGGER_4: ADC trigger 4
3957   * @param  pADCTriggerCfg pointer to the ADC trigger configuration structure
3958   * @retval HAL status
3959   * @note This function must be called before starting the timer
3960   */
3961 HAL_StatusTypeDef HAL_HRTIM_ADCTriggerConfig(HRTIM_HandleTypeDef * hhrtim,
3962                                              uint32_t ADCTrigger,
3963                                              const HRTIM_ADCTriggerCfgTypeDef* pADCTriggerCfg)
3964 {
3965   uint32_t hrtim_cr1;
3966 
3967   /* Check parameters */
3968   assert_param(IS_HRTIM_ADCTRIGGER(ADCTrigger));
3969   assert_param(IS_HRTIM_ADCTRIGGERUPDATE(pADCTriggerCfg->UpdateSource));
3970 
3971   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
3972   {
3973      return HAL_BUSY;
3974   }
3975 
3976   /* Process Locked */
3977   __HAL_LOCK(hhrtim);
3978 
3979   hhrtim->State = HAL_HRTIM_STATE_BUSY;
3980 
3981   /* Set the ADC trigger update source */
3982   hrtim_cr1 = hhrtim->Instance->sCommonRegs.CR1;
3983 
3984   switch (ADCTrigger)
3985   {
3986   case HRTIM_ADCTRIGGER_1:
3987     {
3988       hrtim_cr1 &= ~(HRTIM_CR1_ADC1USRC);
3989       hrtim_cr1 |= (pADCTriggerCfg->UpdateSource & HRTIM_CR1_ADC1USRC);
3990 
3991       /* Set the ADC trigger 1 source */
3992       hhrtim->Instance->sCommonRegs.ADC1R = pADCTriggerCfg->Trigger;
3993       break;
3994     }
3995 
3996   case HRTIM_ADCTRIGGER_2:
3997     {
3998       hrtim_cr1 &= ~(HRTIM_CR1_ADC2USRC);
3999       hrtim_cr1 |= ((pADCTriggerCfg->UpdateSource << 3U) & HRTIM_CR1_ADC2USRC);
4000 
4001       /* Set the ADC trigger 2 source */
4002       hhrtim->Instance->sCommonRegs.ADC2R = pADCTriggerCfg->Trigger;
4003       break;
4004     }
4005 
4006   case HRTIM_ADCTRIGGER_3:
4007     {
4008       hrtim_cr1 &= ~(HRTIM_CR1_ADC3USRC);
4009       hrtim_cr1 |= ((pADCTriggerCfg->UpdateSource << 6U) & HRTIM_CR1_ADC3USRC);
4010 
4011       /* Set the ADC trigger 3 source */
4012       hhrtim->Instance->sCommonRegs.ADC3R = pADCTriggerCfg->Trigger;
4013       break;
4014     }
4015 
4016   case HRTIM_ADCTRIGGER_4:
4017     {
4018       hrtim_cr1 &= ~(HRTIM_CR1_ADC4USRC);
4019       hrtim_cr1 |= ((pADCTriggerCfg->UpdateSource << 9U) & HRTIM_CR1_ADC4USRC);
4020 
4021       /* Set the ADC trigger 4 source */
4022       hhrtim->Instance->sCommonRegs.ADC4R = pADCTriggerCfg->Trigger;
4023       break;
4024     }
4025 
4026   default:
4027     {
4028       hhrtim->State = HAL_HRTIM_STATE_ERROR;
4029 
4030       /* Process Unlocked */
4031       __HAL_UNLOCK(hhrtim);
4032 
4033       break;
4034     }
4035   }
4036 
4037   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
4038   {
4039      return HAL_ERROR;
4040   }
4041 
4042   /* Update the HRTIM registers */
4043   hhrtim->Instance->sCommonRegs.CR1 = hrtim_cr1;
4044 
4045   hhrtim->State = HAL_HRTIM_STATE_READY;
4046 
4047   /* Process Unlocked */
4048   __HAL_UNLOCK(hhrtim);
4049 
4050   return HAL_OK;
4051 }
4052 
4053 
4054 /**
4055   * @}
4056   */
4057 
4058 /** @defgroup HRTIM_Exported_Functions_Group8 Timer waveform configuration and functions
4059   * @ingroup RTEMSBSPsARMSTM32H7
4060  *  @brief    HRTIM timer configuration and control functions
4061 @verbatim
4062  ===============================================================================
4063               ##### HRTIM timer configuration and control functions #####
4064  ===============================================================================
4065     [..]  This section provides functions used to configure and control a
4066           HRTIM timer operating in waveform mode:
4067       (+) Configure HRTIM timer general behavior
4068       (+) Configure HRTIM timer event filtering
4069       (+) Configure HRTIM timer deadtime insertion
4070       (+) Configure HRTIM timer chopper mode
4071       (+) Configure HRTIM timer burst DMA
4072       (+) Configure HRTIM timer compare unit
4073       (+) Configure HRTIM timer capture unit
4074       (+) Configure HRTIM timer output
4075       (+) Set HRTIM timer output level
4076       (+) Enable HRTIM timer output
4077       (+) Disable HRTIM timer output
4078       (+) Start HRTIM timer
4079       (+) Stop HRTIM timer
4080       (+) Start HRTIM timer and enable interrupt
4081       (+) Stop HRTIM timer and disable interrupt
4082       (+) Start HRTIM timer and enable DMA transfer
4083       (+) Stop HRTIM timer and disable DMA transfer
4084       (+) Enable or disable the burst mode controller
4085       (+) Start the burst mode controller (by software)
4086       (+) Trigger a Capture (by software)
4087       (+) Update the HRTIM timer preloadable registers (by software)
4088       (+) Reset the HRTIM timer counter (by software)
4089       (+) Start a burst DMA transfer
4090       (+) Enable timer register update
4091       (+) Disable timer register update
4092 
4093 @endverbatim
4094   * @{
4095   */
4096 
4097 /**
4098   * @brief  Configure the general behavior of a timer operating in waveform mode
4099   * @param  hhrtim pointer to HAL HRTIM handle
4100   * @param  TimerIdx Timer index
4101   *                   This parameter can be one of the following values:
4102   *                   @arg HRTIM_TIMERINDEX_MASTER  for master timer
4103   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
4104   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
4105   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
4106   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
4107   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
4108   * @param  pTimerCfg pointer to the timer configuration structure
4109   * @note When the timer operates in waveform mode, all the features supported by
4110   *       the HRTIM are available without any limitation.
4111   * @retval HAL status
4112   * @note This function must be called before starting the timer
4113   */
4114 HAL_StatusTypeDef HAL_HRTIM_WaveformTimerConfig(HRTIM_HandleTypeDef * hhrtim,
4115                                                 uint32_t TimerIdx,
4116                                                 const HRTIM_TimerCfgTypeDef * pTimerCfg)
4117 {
4118   /* Check parameters */
4119   assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
4120 
4121   /* Relevant for all HRTIM timers, including the master */
4122   assert_param(IS_HRTIM_HALFMODE(pTimerCfg->HalfModeEnable));
4123   assert_param(IS_HRTIM_SYNCSTART(pTimerCfg->StartOnSync));
4124   assert_param(IS_HRTIM_SYNCRESET(pTimerCfg->ResetOnSync));
4125   assert_param(IS_HRTIM_DACSYNC(pTimerCfg->DACSynchro));
4126   assert_param(IS_HRTIM_PRELOAD(pTimerCfg->PreloadEnable));
4127   assert_param(IS_HRTIM_TIMERBURSTMODE(pTimerCfg->BurstMode));
4128   assert_param(IS_HRTIM_UPDATEONREPETITION(pTimerCfg->RepetitionUpdate));
4129 
4130   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
4131   {
4132      return HAL_BUSY;
4133   }
4134 
4135   /* Process Locked */
4136   __HAL_LOCK(hhrtim);
4137 
4138   hhrtim->State = HAL_HRTIM_STATE_BUSY;
4139 
4140   if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
4141   {
4142     /* Check parameters */
4143     assert_param(IS_HRTIM_UPDATEGATING_MASTER(pTimerCfg->UpdateGating));
4144     assert_param(IS_HRTIM_MASTER_IT(pTimerCfg->InterruptRequests));
4145     assert_param(IS_HRTIM_MASTER_DMA(pTimerCfg->DMARequests));
4146 
4147     /* Configure master timer */
4148     HRTIM_MasterWaveform_Config(hhrtim, pTimerCfg);
4149   }
4150   else
4151   {
4152     /* Check parameters */
4153     assert_param(IS_HRTIM_UPDATEGATING_TIM(pTimerCfg->UpdateGating));
4154     assert_param(IS_HRTIM_TIM_IT(pTimerCfg->InterruptRequests));
4155     assert_param(IS_HRTIM_TIM_DMA(pTimerCfg->DMARequests));
4156     assert_param(IS_HRTIM_TIMPUSHPULLMODE(pTimerCfg->PushPull));
4157     assert_param(IS_HRTIM_TIMFAULTENABLE(pTimerCfg->FaultEnable));
4158     assert_param(IS_HRTIM_TIMFAULTLOCK(pTimerCfg->FaultLock));
4159     assert_param(IS_HRTIM_TIMDEADTIMEINSERTION(pTimerCfg->PushPull,
4160                                                pTimerCfg->DeadTimeInsertion));
4161     assert_param(IS_HRTIM_TIMDELAYEDPROTECTION(pTimerCfg->PushPull,
4162                                                pTimerCfg->DelayedProtectionMode));
4163     assert_param(IS_HRTIM_TIMUPDATETRIGGER(pTimerCfg->UpdateTrigger));
4164     assert_param(IS_HRTIM_TIMRESETTRIGGER(pTimerCfg->ResetTrigger));
4165     assert_param(IS_HRTIM_TIMUPDATEONRESET(pTimerCfg->ResetUpdate));
4166 
4167     /* Configure timing unit */
4168     HRTIM_TimingUnitWaveform_Config(hhrtim, TimerIdx, pTimerCfg);
4169   }
4170 
4171   /* Update timer parameters */
4172   hhrtim->TimerParam[TimerIdx].InterruptRequests = pTimerCfg->InterruptRequests;
4173   hhrtim->TimerParam[TimerIdx].DMARequests = pTimerCfg->DMARequests;
4174   hhrtim->TimerParam[TimerIdx].DMASrcAddress = pTimerCfg->DMASrcAddress;
4175   hhrtim->TimerParam[TimerIdx].DMADstAddress = pTimerCfg->DMADstAddress;
4176   hhrtim->TimerParam[TimerIdx].DMASize = pTimerCfg->DMASize;
4177 
4178   /* Force a software update */
4179   HRTIM_ForceRegistersUpdate(hhrtim, TimerIdx);
4180 
4181   hhrtim->State = HAL_HRTIM_STATE_READY;
4182 
4183   /* Process Unlocked */
4184   __HAL_UNLOCK(hhrtim);
4185 
4186   return HAL_OK;
4187 }
4188 
4189 /**
4190   * @brief  Configure the event filtering capabilities of a timer (blanking, windowing)
4191   * @param  hhrtim pointer to HAL HRTIM handle
4192   * @param  TimerIdx Timer index
4193   *                   This parameter can be one of the following values:
4194   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
4195   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
4196   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
4197   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
4198   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
4199   * @param  Event external event for which timer event filtering must be configured
4200   *                    This parameter can be one of the following values:
4201   *                    @arg HRTIM_EVENT_1: External event 1
4202   *                    @arg HRTIM_EVENT_2: External event 2
4203   *                    @arg HRTIM_EVENT_3: External event 3
4204   *                    @arg HRTIM_EVENT_4: External event 4
4205   *                    @arg HRTIM_EVENT_5: External event 5
4206   *                    @arg HRTIM_EVENT_6: External event 6
4207   *                    @arg HRTIM_EVENT_7: External event 7
4208   *                    @arg HRTIM_EVENT_8: External event 8
4209   *                    @arg HRTIM_EVENT_9: External event 9
4210   *                    @arg HRTIM_EVENT_10: External event 10
4211   * @param  pTimerEventFilteringCfg pointer to the timer event filtering configuration structure
4212   * @note This function must be called before starting the timer
4213   * @retval HAL status
4214   */
4215 HAL_StatusTypeDef HAL_HRTIM_TimerEventFilteringConfig(HRTIM_HandleTypeDef * hhrtim,
4216                                                       uint32_t TimerIdx,
4217                                                       uint32_t Event,
4218                                                       const HRTIM_TimerEventFilteringCfgTypeDef* pTimerEventFilteringCfg)
4219 {
4220   /* Check parameters */
4221   assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
4222   assert_param(IS_HRTIM_EVENT(Event));
4223   assert_param(IS_HRTIM_TIMEVENTFILTER(pTimerEventFilteringCfg->Filter));
4224 
4225   assert_param(IS_HRTIM_TIMEVENTLATCH(pTimerEventFilteringCfg->Latch));
4226 
4227   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
4228   {
4229      return HAL_BUSY;
4230   }
4231 
4232   /* Process Locked */
4233   __HAL_LOCK(hhrtim);
4234 
4235   hhrtim->State = HAL_HRTIM_STATE_BUSY;
4236 
4237   /* Configure timer event filtering capabilities */
4238   switch (Event)
4239   {
4240   case HRTIM_EVENT_NONE:
4241     {
4242       CLEAR_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1);
4243       CLEAR_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2);
4244       break;
4245     }
4246 
4247   case HRTIM_EVENT_1:
4248     {
4249       MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1, (HRTIM_EEFR1_EE1FLTR | HRTIM_EEFR1_EE1LTCH), (pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch));
4250       break;
4251     }
4252 
4253   case HRTIM_EVENT_2:
4254     {
4255       MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1, (HRTIM_EEFR1_EE2FLTR | HRTIM_EEFR1_EE2LTCH), ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 6U) );
4256       break;
4257     }
4258 
4259   case HRTIM_EVENT_3:
4260     {
4261       MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1, (HRTIM_EEFR1_EE3FLTR | HRTIM_EEFR1_EE3LTCH), ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 12U) );
4262       break;
4263     }
4264 
4265   case HRTIM_EVENT_4:
4266     {
4267       MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1, (HRTIM_EEFR1_EE4FLTR | HRTIM_EEFR1_EE4LTCH), ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 18U) );
4268       break;
4269     }
4270 
4271   case HRTIM_EVENT_5:
4272     {
4273       MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1, (HRTIM_EEFR1_EE5FLTR | HRTIM_EEFR1_EE5LTCH), ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 24U) );
4274       break;
4275     }
4276 
4277   case HRTIM_EVENT_6:
4278     {
4279       MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2, (HRTIM_EEFR2_EE6FLTR | HRTIM_EEFR2_EE6LTCH), (pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) );
4280       break;
4281     }
4282 
4283   case HRTIM_EVENT_7:
4284     {
4285       MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2, (HRTIM_EEFR2_EE7FLTR | HRTIM_EEFR2_EE7LTCH), ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 6U) );
4286       break;
4287     }
4288 
4289   case HRTIM_EVENT_8:
4290     {
4291       MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2, (HRTIM_EEFR2_EE8FLTR | HRTIM_EEFR2_EE8LTCH), ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 12U) );
4292       break;
4293     }
4294 
4295   case HRTIM_EVENT_9:
4296     {
4297       MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2, (HRTIM_EEFR2_EE9FLTR | HRTIM_EEFR2_EE9LTCH), ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 18U) );
4298       break;
4299     }
4300 
4301   case HRTIM_EVENT_10:
4302     {
4303       MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2, (HRTIM_EEFR2_EE10FLTR | HRTIM_EEFR2_EE10LTCH), ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 24U) );
4304       break;
4305     }
4306 
4307   default:
4308    {
4309       hhrtim->State = HAL_HRTIM_STATE_ERROR;
4310 
4311       /* Process Unlocked */
4312       __HAL_UNLOCK(hhrtim);
4313 
4314       break;
4315     }
4316   }
4317 
4318   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
4319   {
4320      return HAL_ERROR;
4321   }
4322 
4323   hhrtim->State = HAL_HRTIM_STATE_READY;
4324 
4325   /* Process Unlocked */
4326   __HAL_UNLOCK(hhrtim);
4327 
4328   return HAL_OK;
4329 }
4330 
4331 /**
4332   * @brief  Configure the dead-time insertion feature for a timer
4333   * @param  hhrtim pointer to HAL HRTIM handle
4334   * @param  TimerIdx Timer index
4335   *                   This parameter can be one of the following values:
4336   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
4337   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
4338   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
4339   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
4340   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
4341   * @param  pDeadTimeCfg pointer to the deadtime insertion configuration structure
4342   * @retval HAL status
4343   * @note This function must be called before starting the timer
4344   */
4345 HAL_StatusTypeDef HAL_HRTIM_DeadTimeConfig(HRTIM_HandleTypeDef * hhrtim,
4346                                            uint32_t TimerIdx,
4347                                            const HRTIM_DeadTimeCfgTypeDef* pDeadTimeCfg)
4348 {
4349   uint32_t hrtim_dtr;
4350 
4351   /* Check parameters */
4352   assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
4353   assert_param(IS_HRTIM_TIMDEADTIME_PRESCALERRATIO(pDeadTimeCfg->Prescaler));
4354   assert_param(IS_HRTIM_TIMDEADTIME_RISINGSIGN(pDeadTimeCfg->RisingSign));
4355   assert_param(IS_HRTIM_TIMDEADTIME_RISINGLOCK(pDeadTimeCfg->RisingLock));
4356   assert_param(IS_HRTIM_TIMDEADTIME_RISINGSIGNLOCK(pDeadTimeCfg->RisingSignLock));
4357   assert_param(IS_HRTIM_TIMDEADTIME_FALLINGSIGN(pDeadTimeCfg->FallingSign));
4358   assert_param(IS_HRTIM_TIMDEADTIME_FALLINGLOCK(pDeadTimeCfg->FallingLock));
4359   assert_param(IS_HRTIM_TIMDEADTIME_FALLINGSIGNLOCK(pDeadTimeCfg->FallingSignLock));
4360 
4361   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
4362   {
4363      return HAL_BUSY;
4364   }
4365 
4366   /* Process Locked */
4367   __HAL_LOCK(hhrtim);
4368 
4369   hhrtim->State = HAL_HRTIM_STATE_BUSY;
4370 
4371   /* Set timer deadtime configuration */
4372   hrtim_dtr  = (pDeadTimeCfg->Prescaler & HRTIM_DTR_DTPRSC);
4373   hrtim_dtr |= (pDeadTimeCfg->RisingValue & HRTIM_DTR_DTR);
4374   hrtim_dtr |= (pDeadTimeCfg->RisingSign & HRTIM_DTR_SDTR);
4375   hrtim_dtr |= (pDeadTimeCfg->RisingSignLock & HRTIM_DTR_DTRSLK);
4376   hrtim_dtr |= (pDeadTimeCfg->RisingLock & HRTIM_DTR_DTRLK);
4377   hrtim_dtr |= ((pDeadTimeCfg->FallingValue << 16U) & HRTIM_DTR_DTF);
4378   hrtim_dtr |= (pDeadTimeCfg->FallingSign & HRTIM_DTR_SDTF);
4379   hrtim_dtr |= (pDeadTimeCfg->FallingSignLock & HRTIM_DTR_DTFSLK);
4380   hrtim_dtr |= (pDeadTimeCfg->FallingLock & HRTIM_DTR_DTFLK);
4381 
4382   /* Update the HRTIM registers */
4383   MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].DTxR, (
4384                  HRTIM_DTR_DTR | HRTIM_DTR_SDTR | HRTIM_DTR_DTPRSC |
4385                  HRTIM_DTR_DTRSLK | HRTIM_DTR_DTRLK | HRTIM_DTR_DTF |
4386                  HRTIM_DTR_SDTF | HRTIM_DTR_DTFSLK | HRTIM_DTR_DTFLK), hrtim_dtr);
4387 
4388   hhrtim->State = HAL_HRTIM_STATE_READY;
4389 
4390   /* Process Unlocked */
4391   __HAL_UNLOCK(hhrtim);
4392 
4393   return HAL_OK;
4394 }
4395 
4396 /**
4397   * @brief  Configure the chopper mode feature for a timer
4398   * @param  hhrtim pointer to HAL HRTIM handle
4399   * @param  TimerIdx Timer index
4400   *                   This parameter can be one of the following values:
4401   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
4402   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
4403   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
4404   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
4405   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
4406   * @param  pChopperModeCfg pointer to the chopper mode configuration structure
4407   * @retval HAL status
4408   * @note This function must be called before configuring the timer output(s)
4409   */
4410 HAL_StatusTypeDef HAL_HRTIM_ChopperModeConfig(HRTIM_HandleTypeDef * hhrtim,
4411                                               uint32_t TimerIdx,
4412                                               const HRTIM_ChopperModeCfgTypeDef* pChopperModeCfg)
4413 {
4414   uint32_t hrtim_chpr;
4415 
4416   /* Check parameters */
4417   assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
4418   assert_param(IS_HRTIM_CHOPPER_PRESCALERRATIO(pChopperModeCfg->CarrierFreq));
4419   assert_param(IS_HRTIM_CHOPPER_DUTYCYCLE(pChopperModeCfg->DutyCycle));
4420   assert_param(IS_HRTIM_CHOPPER_PULSEWIDTH(pChopperModeCfg->StartPulse));
4421 
4422   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
4423   {
4424      return HAL_BUSY;
4425   }
4426 
4427   /* Process Locked */
4428   __HAL_LOCK(hhrtim);
4429 
4430   hhrtim->State = HAL_HRTIM_STATE_BUSY;
4431 
4432   /* Set timer choppe mode configuration */
4433   hrtim_chpr  = (pChopperModeCfg->CarrierFreq & HRTIM_CHPR_CARFRQ);
4434   hrtim_chpr |= (pChopperModeCfg->DutyCycle & HRTIM_CHPR_CARDTY);
4435   hrtim_chpr |= (pChopperModeCfg->StartPulse & HRTIM_CHPR_STRPW);
4436 
4437   /* Update the HRTIM registers */
4438   MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].CHPxR,
4439              (HRTIM_CHPR_CARFRQ | HRTIM_CHPR_CARDTY | HRTIM_CHPR_STRPW),
4440              hrtim_chpr);
4441 
4442   hhrtim->State = HAL_HRTIM_STATE_READY;
4443 
4444   /* Process Unlocked */
4445   __HAL_UNLOCK(hhrtim);
4446 
4447   return HAL_OK;
4448 }
4449 
4450 /**
4451   * @brief  Configure the burst DMA controller for a timer
4452   * @param  hhrtim pointer to HAL HRTIM handle
4453   * @param  TimerIdx Timer index
4454   *                  This parameter can be one of the following values:
4455   *                   @arg HRTIM_TIMERINDEX_MASTER  for master timer
4456   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
4457   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
4458   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
4459   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
4460   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
4461   * @param  RegistersToUpdate registers to be written by DMA
4462   *                    This parameter can be any combination of the following values:
4463   *                    @arg HRTIM_BURSTDMA_CR: HRTIM_MCR or HRTIM_TIMxCR
4464   *                    @arg HRTIM_BURSTDMA_ICR: HRTIM_MICR or HRTIM_TIMxICR
4465   *                    @arg HRTIM_BURSTDMA_DIER: HRTIM_MDIER or HRTIM_TIMxDIER
4466   *                    @arg HRTIM_BURSTDMA_CNT: HRTIM_MCNT or HRTIM_TIMxCNT
4467   *                    @arg HRTIM_BURSTDMA_PER: HRTIM_MPER or HRTIM_TIMxPER
4468   *                    @arg HRTIM_BURSTDMA_REP: HRTIM_MREP or HRTIM_TIMxREP
4469   *                    @arg HRTIM_BURSTDMA_CMP1: HRTIM_MCMP1 or HRTIM_TIMxCMP1
4470   *                    @arg HRTIM_BURSTDMA_CMP2: HRTIM_MCMP2 or HRTIM_TIMxCMP2
4471   *                    @arg HRTIM_BURSTDMA_CMP3: HRTIM_MCMP3 or HRTIM_TIMxCMP3
4472   *                    @arg HRTIM_BURSTDMA_CMP4: HRTIM_MCMP4 or HRTIM_TIMxCMP4
4473   *                    @arg HRTIM_BURSTDMA_DTR: HRTIM_TIMxDTR
4474   *                    @arg HRTIM_BURSTDMA_SET1R: HRTIM_TIMxSET1R
4475   *                    @arg HRTIM_BURSTDMA_RST1R: HRTIM_TIMxRST1R
4476   *                    @arg HRTIM_BURSTDMA_SET2R: HRTIM_TIMxSET2R
4477   *                    @arg HRTIM_BURSTDMA_RST2R: HRTIM_TIMxRST2R
4478   *                    @arg HRTIM_BURSTDMA_EEFR1: HRTIM_TIMxEEFR1
4479   *                    @arg HRTIM_BURSTDMA_EEFR2: HRTIM_TIMxEEFR2
4480   *                    @arg HRTIM_BURSTDMA_RSTR: HRTIM_TIMxRSTR
4481   *                    @arg HRTIM_BURSTDMA_CHPR: HRTIM_TIMxCHPR
4482   *                    @arg HRTIM_BURSTDMA_OUTR: HRTIM_TIMxOUTR
4483   *                    @arg HRTIM_BURSTDMA_FLTR: HRTIM_TIMxFLTR
4484   * @retval HAL status
4485   * @note This function must be called before starting the timer
4486   */
4487 HAL_StatusTypeDef HAL_HRTIM_BurstDMAConfig(HRTIM_HandleTypeDef * hhrtim,
4488                                            uint32_t TimerIdx,
4489                                            uint32_t RegistersToUpdate)
4490 {
4491   /* Check parameters */
4492   assert_param(IS_HRTIM_TIMER_BURSTDMA(TimerIdx, RegistersToUpdate));
4493 
4494   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
4495   {
4496      return HAL_BUSY;
4497   }
4498 
4499   /* Process Locked */
4500   __HAL_LOCK(hhrtim);
4501 
4502   hhrtim->State = HAL_HRTIM_STATE_BUSY;
4503 
4504   /* Set the burst DMA timer update register */
4505   switch (TimerIdx)
4506   {
4507   case HRTIM_TIMERINDEX_TIMER_A:
4508     {
4509       hhrtim->Instance->sCommonRegs.BDTAUPR = RegistersToUpdate;
4510       break;
4511     }
4512 
4513   case HRTIM_TIMERINDEX_TIMER_B:
4514     {
4515       hhrtim->Instance->sCommonRegs.BDTBUPR = RegistersToUpdate;
4516       break;
4517     }
4518 
4519   case HRTIM_TIMERINDEX_TIMER_C:
4520     {
4521       hhrtim->Instance->sCommonRegs.BDTCUPR = RegistersToUpdate;
4522       break;
4523     }
4524 
4525   case HRTIM_TIMERINDEX_TIMER_D:
4526     {
4527       hhrtim->Instance->sCommonRegs.BDTDUPR = RegistersToUpdate;
4528       break;
4529     }
4530 
4531   case HRTIM_TIMERINDEX_TIMER_E:
4532     {
4533       hhrtim->Instance->sCommonRegs.BDTEUPR = RegistersToUpdate;
4534       break;
4535     }
4536 
4537   case HRTIM_TIMERINDEX_MASTER:
4538     {
4539       hhrtim->Instance->sCommonRegs.BDMUPR = RegistersToUpdate;
4540       break;
4541     }
4542 
4543   default:
4544    {
4545       hhrtim->State = HAL_HRTIM_STATE_ERROR;
4546 
4547       /* Process Unlocked */
4548       __HAL_UNLOCK(hhrtim);
4549 
4550       break;
4551     }
4552   }
4553 
4554   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
4555   {
4556      return HAL_ERROR;
4557   }
4558 
4559   hhrtim->State = HAL_HRTIM_STATE_READY;
4560 
4561   /* Process Unlocked */
4562   __HAL_UNLOCK(hhrtim);
4563 
4564   return HAL_OK;
4565 }
4566 
4567 /**
4568   * @brief  Configure the compare unit of a timer operating in waveform mode
4569   * @param  hhrtim pointer to HAL HRTIM handle
4570   * @param  TimerIdx Timer index
4571   *                   This parameter can be one of the following values:
4572   *                   @arg HRTIM_TIMERINDEX_MASTER  for master timer
4573   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
4574   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
4575   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
4576   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
4577   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
4578   * @param  CompareUnit Compare unit to configure
4579   *                    This parameter can be one of the following values:
4580   *                    @arg HRTIM_COMPAREUNIT_1: Compare unit 1
4581   *                    @arg HRTIM_COMPAREUNIT_2: Compare unit 2
4582   *                    @arg HRTIM_COMPAREUNIT_3: Compare unit 3
4583   *                    @arg HRTIM_COMPAREUNIT_4: Compare unit 4
4584   * @param  pCompareCfg pointer to the compare unit configuration structure
4585   * @note When auto delayed mode is required for compare unit 2 or compare unit 4,
4586   *       application has to configure separately the capture unit. Capture unit
4587   *       to configure in that case depends on the compare unit auto delayed mode
4588   *       is applied to (see below):
4589   *         Auto delayed on output compare 2: capture unit 1 must be configured
4590   *         Auto delayed on output compare 4: capture unit 2 must be configured
4591   * @retval HAL status
4592   * @note This function must be called before starting the timer
4593   */
4594 HAL_StatusTypeDef HAL_HRTIM_WaveformCompareConfig(HRTIM_HandleTypeDef * hhrtim,
4595                                                   uint32_t TimerIdx,
4596                                                   uint32_t CompareUnit,
4597                                                   const HRTIM_CompareCfgTypeDef* pCompareCfg)
4598 {
4599   /* Check parameters */
4600   assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
4601 
4602   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
4603   {
4604      return HAL_BUSY;
4605   }
4606 
4607   /* Process Locked */
4608   __HAL_LOCK(hhrtim);
4609 
4610   hhrtim->State = HAL_HRTIM_STATE_BUSY;
4611 
4612   /* Configure the compare unit */
4613   if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
4614   {
4615     switch (CompareUnit)
4616     {
4617       case HRTIM_COMPAREUNIT_1:
4618         {
4619         hhrtim->Instance->sMasterRegs.MCMP1R = pCompareCfg->CompareValue;
4620         break;
4621         }
4622 
4623       case HRTIM_COMPAREUNIT_2:
4624         {
4625         hhrtim->Instance->sMasterRegs.MCMP2R = pCompareCfg->CompareValue;
4626         break;
4627         }
4628 
4629       case HRTIM_COMPAREUNIT_3:
4630         {
4631         hhrtim->Instance->sMasterRegs.MCMP3R = pCompareCfg->CompareValue;
4632         break;
4633         }
4634 
4635       case HRTIM_COMPAREUNIT_4:
4636         {
4637         hhrtim->Instance->sMasterRegs.MCMP4R = pCompareCfg->CompareValue;
4638         break;
4639         }
4640 
4641       default:
4642         {
4643         hhrtim->State = HAL_HRTIM_STATE_ERROR;
4644 
4645         /* Process Unlocked */
4646         __HAL_UNLOCK(hhrtim);
4647 
4648         break;
4649         }
4650     }
4651 
4652     if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
4653     {
4654      return HAL_ERROR;
4655     }
4656 
4657   }
4658   else
4659   {
4660     switch (CompareUnit)
4661     {
4662     case HRTIM_COMPAREUNIT_1:
4663       {
4664         /* Set the compare value */
4665         hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->CompareValue;
4666         break;
4667       }
4668 
4669     case HRTIM_COMPAREUNIT_2:
4670       {
4671         /* Check parameters */
4672         assert_param(IS_HRTIM_COMPAREUNIT_AUTODELAYEDMODE(CompareUnit, pCompareCfg->AutoDelayedMode));
4673 
4674         /* Set the compare value */
4675         hhrtim->Instance->sTimerxRegs[TimerIdx].CMP2xR = pCompareCfg->CompareValue;
4676 
4677         if (pCompareCfg->AutoDelayedMode != HRTIM_AUTODELAYEDMODE_REGULAR)
4678         {
4679           /* Configure auto-delayed mode */
4680           /* DELCMP2 bitfield must be reset when reprogrammed from one value */
4681           /* to the other to reinitialize properly the auto-delayed mechanism */
4682           hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR &= ~HRTIM_TIMCR_DELCMP2;
4683           hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR |= pCompareCfg->AutoDelayedMode;
4684 
4685           /* Set the compare value for timeout compare unit (if any) */
4686           if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1)
4687           {
4688             hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->AutoDelayedTimeout;
4689           }
4690           else if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3)
4691           {
4692             hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->AutoDelayedTimeout;
4693           }
4694           else
4695           {
4696             /* nothing to do */
4697           }
4698         }
4699         else
4700         {
4701           /* Clear HRTIM_TIMxCR.DELCMP2 bitfield */
4702           MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR, HRTIM_TIMCR_DELCMP2, 0U);
4703         }
4704          break;
4705       }
4706 
4707     case HRTIM_COMPAREUNIT_3:
4708       {
4709         /* Set the compare value */
4710         hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->CompareValue;
4711         break;
4712       }
4713 
4714     case HRTIM_COMPAREUNIT_4:
4715       {
4716         /* Check parameters */
4717         assert_param(IS_HRTIM_COMPAREUNIT_AUTODELAYEDMODE(CompareUnit, pCompareCfg->AutoDelayedMode));
4718 
4719         /* Set the compare value */
4720         hhrtim->Instance->sTimerxRegs[TimerIdx].CMP4xR = pCompareCfg->CompareValue;
4721 
4722         if (pCompareCfg->AutoDelayedMode != HRTIM_AUTODELAYEDMODE_REGULAR)
4723         {
4724           /* Configure auto-delayed mode */
4725           /* DELCMP4 bitfield must be reset when reprogrammed from one value */
4726           /* to the other to reinitialize properly the auto-delayed mechanism */
4727           hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR &= ~HRTIM_TIMCR_DELCMP4;
4728           hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR |= (pCompareCfg->AutoDelayedMode << 2U);
4729 
4730           /* Set the compare value for timeout compare unit (if any) */
4731           if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1)
4732           {
4733             hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->AutoDelayedTimeout;
4734           }
4735           else if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3)
4736           {
4737             hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->AutoDelayedTimeout;
4738           }
4739           else
4740           {
4741             /* nothing to do */
4742           }
4743         }
4744         else
4745         {
4746           /* Clear HRTIM_TIMxCR.DELCMP4 bitfield */
4747           MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR, HRTIM_TIMCR_DELCMP4, 0U);
4748         }
4749          break;
4750       }
4751 
4752   default:
4753      {
4754       hhrtim->State = HAL_HRTIM_STATE_ERROR;
4755 
4756       /* Process Unlocked */
4757       __HAL_UNLOCK(hhrtim);
4758 
4759       break;
4760      }
4761    }
4762 
4763    if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
4764    {
4765      return HAL_ERROR;
4766    }
4767 
4768   }
4769   hhrtim->State = HAL_HRTIM_STATE_READY;
4770 
4771   /* Process Unlocked */
4772   __HAL_UNLOCK(hhrtim);
4773 
4774   return HAL_OK;
4775 }
4776 
4777 /**
4778   * @brief  Configure the capture unit of a timer operating in waveform mode
4779   * @param  hhrtim pointer to HAL HRTIM handle
4780   * @param  TimerIdx Timer index
4781   *                   This parameter can be one of the following values:
4782   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
4783   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
4784   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
4785   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
4786   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
4787   * @param  CaptureUnit Capture unit to configure
4788   *                    This parameter can be one of the following values:
4789   *                    @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
4790   *                    @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
4791   * @param  pCaptureCfg pointer to the compare unit configuration structure
4792   * @retval HAL status
4793   * @note This function must be called before starting the timer
4794   */
4795 HAL_StatusTypeDef HAL_HRTIM_WaveformCaptureConfig(HRTIM_HandleTypeDef * hhrtim,
4796                                                   uint32_t TimerIdx,
4797                                                   uint32_t CaptureUnit,
4798                                                   const HRTIM_CaptureCfgTypeDef* pCaptureCfg)
4799 {
4800   /* Check parameters */
4801   assert_param(IS_HRTIM_TIMER_CAPTURETRIGGER(TimerIdx, pCaptureCfg->Trigger));
4802 
4803 
4804   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
4805   {
4806      return HAL_BUSY;
4807   }
4808 
4809   /* Process Locked */
4810   __HAL_LOCK(hhrtim);
4811 
4812   hhrtim->State = HAL_HRTIM_STATE_BUSY;
4813 
4814   /* Configure the capture unit */
4815   switch (CaptureUnit)
4816   {
4817   case HRTIM_CAPTUREUNIT_1:
4818     {
4819       WRITE_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR, pCaptureCfg->Trigger);
4820       break;
4821     }
4822 
4823   case HRTIM_CAPTUREUNIT_2:
4824     {
4825       WRITE_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR, pCaptureCfg->Trigger);
4826       break;
4827     }
4828 
4829   default:
4830     {
4831       hhrtim->State = HAL_HRTIM_STATE_ERROR;
4832 
4833       /* Process Unlocked */
4834       __HAL_UNLOCK(hhrtim);
4835 
4836       break;
4837     }
4838   }
4839 
4840   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
4841   {
4842      return HAL_ERROR;
4843   }
4844 
4845 
4846   hhrtim->State = HAL_HRTIM_STATE_READY;
4847 
4848   /* Process Unlocked */
4849   __HAL_UNLOCK(hhrtim);
4850 
4851   return HAL_OK;
4852 }
4853 
4854 /**
4855   * @brief  Configure the output of a timer operating in waveform mode
4856   * @param  hhrtim pointer to HAL HRTIM handle
4857   * @param  TimerIdx Timer index
4858   *                   This parameter can be one of the following values:
4859   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
4860   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
4861   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
4862   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
4863   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
4864   * @param  Output Timer output
4865   *                    This parameter can be one of the following values:
4866   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
4867   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
4868   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
4869   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
4870   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
4871   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
4872   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
4873   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
4874   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
4875   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
4876   * @param  pOutputCfg pointer to the timer output configuration structure
4877   * @retval HAL status
4878   * @note This function must be called before configuring the timer and after
4879   *       configuring the deadtime insertion feature (if required).
4880   */
4881 HAL_StatusTypeDef HAL_HRTIM_WaveformOutputConfig(HRTIM_HandleTypeDef * hhrtim,
4882                                                 uint32_t TimerIdx,
4883                                                 uint32_t Output,
4884                                                 const HRTIM_OutputCfgTypeDef * pOutputCfg)
4885 {
4886   /* Check parameters */
4887   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
4888   assert_param(IS_HRTIM_OUTPUTPOLARITY(pOutputCfg->Polarity));
4889   assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pOutputCfg->IdleLevel));
4890   assert_param(IS_HRTIM_OUTPUTIDLEMODE(pOutputCfg->IdleMode));
4891   assert_param(IS_HRTIM_OUTPUTFAULTLEVEL(pOutputCfg->FaultLevel));
4892   assert_param(IS_HRTIM_OUTPUTCHOPPERMODE(pOutputCfg->ChopperModeEnable));
4893   assert_param(IS_HRTIM_OUTPUTBURSTMODEENTRY(pOutputCfg->BurstModeEntryDelayed));
4894 
4895   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
4896   {
4897      return HAL_BUSY;
4898   }
4899 
4900   /* Process Locked */
4901   __HAL_LOCK(hhrtim);
4902 
4903   hhrtim->State = HAL_HRTIM_STATE_BUSY;
4904 
4905   /* Configure the timer output */
4906   HRTIM_OutputConfig(hhrtim,
4907                      TimerIdx,
4908                      Output,
4909                      pOutputCfg);
4910 
4911   hhrtim->State = HAL_HRTIM_STATE_READY;
4912 
4913   /* Process Unlocked */
4914   __HAL_UNLOCK(hhrtim);
4915 
4916   return HAL_OK;
4917 }
4918 
4919 /**
4920   * @brief  Force the timer output to its active or inactive state
4921   * @param  hhrtim pointer to HAL HRTIM handle
4922   * @param  TimerIdx Timer index
4923   *                   This parameter can be one of the following values:
4924   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
4925   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
4926   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
4927   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
4928   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
4929   * @param  Output Timer output
4930   *                    This parameter can be one of the following values:
4931   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
4932   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
4933   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
4934   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
4935   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
4936   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
4937   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
4938   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
4939   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
4940   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
4941   * @param OutputLevel indicates whether the output is forced to its active or inactive level
4942   *                    This parameter can be one of the following values:
4943   *                    @arg HRTIM_OUTPUTLEVEL_ACTIVE: output is forced to its active level
4944   *                    @arg HRTIM_OUTPUTLEVEL_INACTIVE: output is forced to its inactive level
4945   * @retval HAL status
4946   * @note The 'software set/reset trigger' bit in the output set/reset registers
4947   *       is automatically reset by hardware
4948   */
4949 HAL_StatusTypeDef HAL_HRTIM_WaveformSetOutputLevel(HRTIM_HandleTypeDef * hhrtim,
4950                                                    uint32_t TimerIdx,
4951                                                    uint32_t Output,
4952                                                    uint32_t OutputLevel)
4953 {
4954   /* Check parameters */
4955   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
4956   assert_param(IS_HRTIM_OUTPUTLEVEL(OutputLevel));
4957 
4958   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
4959   {
4960      return HAL_BUSY;
4961   }
4962 
4963   /* Process Locked */
4964   __HAL_LOCK(hhrtim);
4965 
4966   hhrtim->State = HAL_HRTIM_STATE_BUSY;
4967 
4968   /* Force timer output level */
4969   switch (Output)
4970   {
4971   case HRTIM_OUTPUT_TA1:
4972   case HRTIM_OUTPUT_TB1:
4973   case HRTIM_OUTPUT_TC1:
4974   case HRTIM_OUTPUT_TD1:
4975   case HRTIM_OUTPUT_TE1:
4976     {
4977       if (OutputLevel == HRTIM_OUTPUTLEVEL_ACTIVE)
4978       {
4979         /* Force output to its active state */
4980         SET_BIT(hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R,HRTIM_SET1R_SST);
4981       }
4982       else
4983       {
4984         /* Force output to its inactive state */
4985         SET_BIT(hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R, HRTIM_RST1R_SRT);
4986       }
4987       break;
4988     }
4989 
4990   case HRTIM_OUTPUT_TA2:
4991   case HRTIM_OUTPUT_TB2:
4992   case HRTIM_OUTPUT_TC2:
4993   case HRTIM_OUTPUT_TD2:
4994   case HRTIM_OUTPUT_TE2:
4995     {
4996       if (OutputLevel == HRTIM_OUTPUTLEVEL_ACTIVE)
4997       {
4998         /* Force output to its active state */
4999         SET_BIT(hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R, HRTIM_SET2R_SST);
5000       }
5001       else
5002       {
5003         /* Force output to its inactive state */
5004         SET_BIT(hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R, HRTIM_RST2R_SRT);
5005       }
5006       break;
5007     }
5008 
5009   default:
5010     {
5011       hhrtim->State = HAL_HRTIM_STATE_ERROR;
5012 
5013       /* Process Unlocked */
5014       __HAL_UNLOCK(hhrtim);
5015 
5016       break;
5017     }
5018   }
5019 
5020   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
5021   {
5022      return HAL_ERROR;
5023   }
5024 
5025   hhrtim->State = HAL_HRTIM_STATE_READY;
5026 
5027   /* Process Unlocked */
5028   __HAL_UNLOCK(hhrtim);
5029 
5030   return HAL_OK;
5031 }
5032 
5033 /**
5034   * @brief  Enable the generation of the waveform signal on the designated output(s)
5035   *         Outputs can be combined (ORed) to allow for simultaneous output enabling.
5036   * @param  hhrtim pointer to HAL HRTIM handle
5037   * @param  OutputsToStart Timer output(s) to enable
5038   *                    This parameter can be any combination of the following values:
5039   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
5040   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
5041   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
5042   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
5043   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
5044   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
5045   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
5046   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
5047   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
5048   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
5049   * @retval HAL status
5050   */
5051 HAL_StatusTypeDef HAL_HRTIM_WaveformOutputStart(HRTIM_HandleTypeDef * hhrtim,
5052                                                 uint32_t OutputsToStart)
5053 {
5054    /* Check the parameters */
5055   assert_param(IS_HRTIM_OUTPUT(OutputsToStart));
5056 
5057   /* Process Locked */
5058   __HAL_LOCK(hhrtim);
5059 
5060   hhrtim->State = HAL_HRTIM_STATE_BUSY;
5061 
5062   /* Enable the HRTIM outputs */
5063   hhrtim->Instance->sCommonRegs.OENR |= (OutputsToStart);
5064 
5065   hhrtim->State = HAL_HRTIM_STATE_READY;
5066 
5067   /* Process Unlocked */
5068   __HAL_UNLOCK(hhrtim);
5069 
5070   return HAL_OK;
5071 }
5072 
5073 /**
5074   * @brief  Disable the generation of the waveform signal on the designated output(s)
5075   *         Outputs can be combined (ORed) to allow for simultaneous output disabling.
5076   * @param  hhrtim pointer to HAL HRTIM handle
5077   * @param  OutputsToStop Timer output(s) to disable
5078   *                    This parameter can be any combination of the following values:
5079   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
5080   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
5081   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
5082   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
5083   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
5084   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
5085   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
5086   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
5087   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
5088   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
5089   * @retval HAL status
5090   */
5091 HAL_StatusTypeDef HAL_HRTIM_WaveformOutputStop(HRTIM_HandleTypeDef * hhrtim,
5092                                                uint32_t OutputsToStop)
5093 {
5094    /* Check the parameters */
5095   assert_param(IS_HRTIM_OUTPUT(OutputsToStop));
5096 
5097   /* Process Locked */
5098   __HAL_LOCK(hhrtim);
5099 
5100   hhrtim->State = HAL_HRTIM_STATE_BUSY;
5101 
5102   /* Enable the HRTIM outputs */
5103   hhrtim->Instance->sCommonRegs.ODISR |= (OutputsToStop);
5104 
5105   hhrtim->State = HAL_HRTIM_STATE_READY;
5106 
5107   /* Process Unlocked */
5108   __HAL_UNLOCK(hhrtim);
5109 
5110   return HAL_OK;
5111 }
5112 
5113 /**
5114   * @brief  Start the counter of the designated timer(s) operating in waveform mode
5115   *         Timers can be combined (ORed) to allow for simultaneous counter start.
5116   * @param  hhrtim pointer to HAL HRTIM handle
5117   * @param  Timers Timer counter(s) to start
5118   *                   This parameter can be any combination of the following values:
5119   *                   @arg HRTIM_TIMERID_MASTER
5120   *                   @arg HRTIM_TIMERID_TIMER_A
5121   *                   @arg HRTIM_TIMERID_TIMER_B
5122   *                   @arg HRTIM_TIMERID_TIMER_C
5123   *                   @arg HRTIM_TIMERID_TIMER_D
5124   *                   @arg HRTIM_TIMERID_TIMER_E
5125   * @retval HAL status
5126   */
5127 HAL_StatusTypeDef HAL_HRTIM_WaveformCountStart(HRTIM_HandleTypeDef * hhrtim,
5128                                                  uint32_t Timers)
5129 {
5130   /* Check the parameters */
5131   assert_param(IS_HRTIM_TIMERID(Timers));
5132 
5133   /* Process Locked */
5134   __HAL_LOCK(hhrtim);
5135 
5136   hhrtim->State = HAL_HRTIM_STATE_BUSY;
5137 
5138   /* Enable timer(s) counter */
5139   hhrtim->Instance->sMasterRegs.MCR |= (Timers);
5140 
5141   hhrtim->State = HAL_HRTIM_STATE_READY;
5142 
5143   /* Process Unlocked */
5144   __HAL_UNLOCK(hhrtim);
5145 
5146   return HAL_OK;
5147 }
5148 
5149 /**
5150   * @brief  Stop the counter of the designated timer(s) operating in waveform mode
5151   *         Timers can be combined (ORed) to allow for simultaneous counter stop.
5152   * @param  hhrtim pointer to HAL HRTIM handle
5153   * @param  Timers Timer counter(s) to stop
5154   *                   This parameter can be any combination of the following values:
5155   *                   @arg HRTIM_TIMERID_MASTER
5156   *                   @arg HRTIM_TIMERID_TIMER_A
5157   *                   @arg HRTIM_TIMERID_TIMER_B
5158   *                   @arg HRTIM_TIMERID_TIMER_C
5159   *                   @arg HRTIM_TIMERID_TIMER_D
5160   *                   @arg HRTIM_TIMERID_TIMER_E
5161   * @retval HAL status
5162   * @note The counter of a timer is stopped only if all timer outputs are disabled
5163   */
5164 HAL_StatusTypeDef HAL_HRTIM_WaveformCountStop(HRTIM_HandleTypeDef * hhrtim,
5165                                                 uint32_t Timers)
5166 {
5167   /* Check the parameters */
5168   assert_param(IS_HRTIM_TIMERID(Timers));
5169 
5170   /* Process Locked */
5171   __HAL_LOCK(hhrtim);
5172 
5173   hhrtim->State = HAL_HRTIM_STATE_BUSY;
5174 
5175   /* Disable timer(s) counter */
5176   hhrtim->Instance->sMasterRegs.MCR &= ~(Timers);
5177 
5178   hhrtim->State = HAL_HRTIM_STATE_READY;
5179 
5180   /* Process Unlocked */
5181   __HAL_UNLOCK(hhrtim);
5182 
5183   return HAL_OK;
5184 }
5185 
5186 /**
5187   * @brief  Start the counter of the designated timer(s) operating in waveform mode
5188   *         Timers can be combined (ORed) to allow for simultaneous counter start.
5189   * @param  hhrtim pointer to HAL HRTIM handle
5190   * @param  Timers Timer counter(s) to start
5191   *                   This parameter can be any combination of the following values:
5192   *                   @arg HRTIM_TIMERID_MASTER
5193   *                   @arg HRTIM_TIMERID_TIMER_A
5194   *                   @arg HRTIM_TIMERID_TIMER_B
5195   *                   @arg HRTIM_TIMERID_TIMER_C
5196   *                   @arg HRTIM_TIMERID_TIMER_D
5197   *                   @arg HRTIM_TIMERID_TIMER_E
5198   * @note HRTIM interrupts (e.g. faults interrupts) and interrupts related
5199   *       to the timers to start are enabled within this function.
5200   *       Interrupts to enable are selected through HAL_HRTIM_WaveformTimerConfig
5201   *       function.
5202   * @retval HAL status
5203   */
5204 HAL_StatusTypeDef HAL_HRTIM_WaveformCountStart_IT(HRTIM_HandleTypeDef * hhrtim,
5205                                                     uint32_t Timers)
5206 {
5207   uint8_t timer_idx;
5208 
5209   /* Check the parameters */
5210   assert_param(IS_HRTIM_TIMERID(Timers));
5211 
5212   /* Process Locked */
5213   __HAL_LOCK(hhrtim);
5214 
5215   hhrtim->State = HAL_HRTIM_STATE_BUSY;
5216 
5217   /* Enable HRTIM interrupts (if required) */
5218   __HAL_HRTIM_ENABLE_IT(hhrtim, hhrtim->Init.HRTIMInterruptResquests);
5219 
5220   /* Enable master timer related interrupts (if required) */
5221   if ((Timers & HRTIM_TIMERID_MASTER) != 0U)
5222   {
5223     __HAL_HRTIM_MASTER_ENABLE_IT(hhrtim,
5224                                  hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].InterruptRequests);
5225   }
5226 
5227   /* Enable timing unit related interrupts (if required) */
5228   for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
5229        timer_idx < HRTIM_TIMERINDEX_MASTER ;
5230        timer_idx++)
5231   {
5232     if ((Timers & TimerIdxToTimerId[timer_idx]) != 0U)
5233     {
5234       __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim,
5235                                   timer_idx,
5236                                   hhrtim->TimerParam[timer_idx].InterruptRequests);
5237     }
5238   }
5239 
5240   /* Enable timer(s) counter */
5241   hhrtim->Instance->sMasterRegs.MCR |= (Timers);
5242 
5243   hhrtim->State = HAL_HRTIM_STATE_READY;
5244 
5245   /* Process Unlocked */
5246   __HAL_UNLOCK(hhrtim);
5247 
5248   return HAL_OK;}
5249 
5250 /**
5251   * @brief  Stop the counter of the designated timer(s) operating in waveform mode
5252   *         Timers can be combined (ORed) to allow for simultaneous counter stop.
5253   * @param  hhrtim pointer to HAL HRTIM handle
5254   * @param  Timers Timer counter(s) to stop
5255   *                   This parameter can be any combination of the following values:
5256   *                   @arg HRTIM_TIMERID_MASTER
5257   *                   @arg HRTIM_TIMERID_TIMER_A
5258   *                   @arg HRTIM_TIMERID_TIMER_B
5259   *                   @arg HRTIM_TIMERID_TIMER_C
5260   *                   @arg HRTIM_TIMERID_TIMER_D
5261   *                   @arg HRTIM_TIMERID_TIMER_E
5262   * @retval HAL status
5263   * @note The counter of a timer is stopped only if all timer outputs are disabled
5264   * @note All enabled timer related interrupts are disabled.
5265   */
5266 HAL_StatusTypeDef HAL_HRTIM_WaveformCountStop_IT(HRTIM_HandleTypeDef * hhrtim,
5267                                                    uint32_t Timers)
5268 {
5269   /* ++ WA */
5270   __IO uint32_t delai = (uint32_t)(0x17FU);
5271   /* -- WA */
5272 
5273   uint8_t timer_idx;
5274 
5275   /* Check the parameters */
5276   assert_param(IS_HRTIM_TIMERID(Timers));
5277 
5278   /* Process Locked */
5279   __HAL_LOCK(hhrtim);
5280 
5281   hhrtim->State = HAL_HRTIM_STATE_BUSY;
5282 
5283   /* Disable HRTIM interrupts (if required) */
5284   __HAL_HRTIM_DISABLE_IT(hhrtim, hhrtim->Init.HRTIMInterruptResquests);
5285 
5286   /* Disable master timer related interrupts (if required) */
5287   if ((Timers & HRTIM_TIMERID_MASTER) != 0U)
5288   {
5289     /* Interrupts enable flag must be cleared one by one */
5290     __HAL_HRTIM_MASTER_DISABLE_IT(hhrtim, hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].InterruptRequests);
5291   }
5292 
5293   /* Disable timing unit related interrupts (if required) */
5294   for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
5295        timer_idx < HRTIM_TIMERINDEX_MASTER ;
5296        timer_idx++)
5297   {
5298     if ((Timers & TimerIdxToTimerId[timer_idx]) != 0U)
5299     {
5300       __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, timer_idx, hhrtim->TimerParam[timer_idx].InterruptRequests);
5301     }
5302   }
5303 
5304   /* ++ WA */
5305   do { delai--; } while (delai != 0U);
5306   /* -- WA */
5307 
5308   /* Disable timer(s) counter */
5309   hhrtim->Instance->sMasterRegs.MCR &= ~(Timers);
5310 
5311   hhrtim->State = HAL_HRTIM_STATE_READY;
5312 
5313   /* Process Unlocked */
5314   __HAL_UNLOCK(hhrtim);
5315 
5316   return HAL_OK;
5317 }
5318 
5319 /**
5320   * @brief  Start the counter of the designated timer(s) operating in waveform mode
5321   *         Timers can be combined (ORed) to allow for simultaneous counter start.
5322   * @param  hhrtim pointer to HAL HRTIM handle
5323   * @param  Timers Timer counter(s) to start
5324   *                   This parameter can be any combination of the following values:
5325   *                   @arg HRTIM_TIMERID_MASTER
5326   *                   @arg HRTIM_TIMERID_TIMER_A
5327   *                   @arg HRTIM_TIMERID_TIMER_B
5328   *                   @arg HRTIM_TIMERID_TIMER_C
5329   *                   @arg HRTIM_TIMERID_TIMER_D
5330   *                   @arg HRTIM_TIMERID_TIMER_E
5331   * @retval HAL status
5332   * @note This function enables the dma request(s) mentioned in the timer
5333   *       configuration data structure for every timers to start.
5334   * @note The source memory address, the destination memory address and the
5335   *       size of each DMA transfer are specified at timer configuration time
5336   *       (see HAL_HRTIM_WaveformTimerConfig)
5337   */
5338 HAL_StatusTypeDef HAL_HRTIM_WaveformCountStart_DMA(HRTIM_HandleTypeDef * hhrtim,
5339                                                      uint32_t Timers)
5340 {
5341   uint8_t timer_idx;
5342   DMA_HandleTypeDef * hdma;
5343 
5344   /* Check the parameters */
5345   assert_param(IS_HRTIM_TIMERID(Timers));
5346 
5347   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
5348   {
5349      return HAL_BUSY;
5350   }
5351 
5352   hhrtim->State = HAL_HRTIM_STATE_BUSY;
5353 
5354   /* Process Locked */
5355   __HAL_LOCK(hhrtim);
5356 
5357   if (((Timers & HRTIM_TIMERID_MASTER) != (uint32_t)RESET) &&
5358       (hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests != 0U))
5359   {
5360       /* Set the DMA error callback */
5361       hhrtim->hdmaMaster->XferErrorCallback = HRTIM_DMAError ;
5362 
5363       /* Set the DMA transfer completed callback */
5364       hhrtim->hdmaMaster->XferCpltCallback = HRTIM_DMAMasterCplt;
5365 
5366       /* Enable the DMA channel */
5367       if (HAL_DMA_Start_IT(hhrtim->hdmaMaster,
5368                        hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMASrcAddress,
5369                        hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMADstAddress,
5370                        hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMASize) != HAL_OK)
5371     {
5372             hhrtim->State = HAL_HRTIM_STATE_ERROR;
5373 
5374             /* Process Unlocked */
5375             __HAL_UNLOCK(hhrtim);
5376 
5377             return HAL_ERROR;
5378         }
5379 
5380       /* Enable the timer DMA request */
5381       __HAL_HRTIM_MASTER_ENABLE_DMA(hhrtim,
5382                                    hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests);
5383   }
5384 
5385   for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
5386        timer_idx < HRTIM_TIMERINDEX_MASTER ;
5387        timer_idx++)
5388   {
5389     if (((Timers & TimerIdxToTimerId[timer_idx]) != (uint32_t)RESET) &&
5390          (hhrtim->TimerParam[timer_idx].DMARequests != 0U))
5391     {
5392       /* Get the timer DMA handler */
5393       hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, timer_idx);
5394 
5395       if (hdma == NULL)
5396       {
5397         hhrtim->State = HAL_HRTIM_STATE_ERROR;
5398 
5399         /* Process Unlocked */
5400         __HAL_UNLOCK(hhrtim);
5401 
5402         return HAL_ERROR;
5403       }
5404 
5405        /* Set the DMA error callback */
5406       hdma->XferErrorCallback = HRTIM_DMAError ;
5407 
5408       /* Set the DMA transfer completed callback */
5409       hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
5410 
5411       /* Enable the DMA channel */
5412       if (HAL_DMA_Start_IT(hdma,
5413                        hhrtim->TimerParam[timer_idx].DMASrcAddress,
5414                        hhrtim->TimerParam[timer_idx].DMADstAddress,
5415                        hhrtim->TimerParam[timer_idx].DMASize) != HAL_OK)
5416     {
5417               hhrtim->State = HAL_HRTIM_STATE_ERROR;
5418 
5419               /* Process Unlocked */
5420               __HAL_UNLOCK(hhrtim);
5421 
5422               return HAL_ERROR;
5423         }
5424 
5425       /* Enable the timer DMA request */
5426       __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim,
5427                                    timer_idx,
5428                                    hhrtim->TimerParam[timer_idx].DMARequests);
5429     }
5430   }
5431 
5432   /* Enable the timer counter */
5433   __HAL_HRTIM_ENABLE(hhrtim, Timers);
5434 
5435   hhrtim->State = HAL_HRTIM_STATE_READY;
5436 
5437   /* Process Unlocked */
5438   __HAL_UNLOCK(hhrtim);
5439 
5440   return HAL_OK;
5441 }
5442 
5443 /**
5444   * @brief  Stop the counter of the designated timer(s) operating in waveform mode
5445   *         Timers can be combined (ORed) to allow for simultaneous counter stop.
5446   * @param  hhrtim pointer to HAL HRTIM handle
5447   * @param  Timers Timer counter(s) to stop
5448   *                   This parameter can be any combination of the following values:
5449   *                   @arg HRTIM_TIMERID_MASTER
5450   *                   @arg HRTIM_TIMERID_TIMER_A
5451   *                   @arg HRTIM_TIMERID_TIMER_B
5452   *                   @arg HRTIM_TIMERID_TIMER_C
5453   *                   @arg HRTIM_TIMERID_TIMER_D
5454   *                   @arg HRTIM_TIMERID_TIMER_E
5455   * @retval HAL status
5456   * @note  The counter of a timer is stopped only if all timer outputs are disabled
5457   * @note  All enabled timer related DMA requests are disabled.
5458   */
5459 HAL_StatusTypeDef HAL_HRTIM_WaveformCountStop_DMA(HRTIM_HandleTypeDef * hhrtim,
5460                                                     uint32_t Timers)
5461 {
5462   uint8_t timer_idx;
5463 
5464   /* Check the parameters */
5465   assert_param(IS_HRTIM_TIMERID(Timers));
5466 
5467   hhrtim->State = HAL_HRTIM_STATE_BUSY;
5468 
5469   if (((Timers & HRTIM_TIMERID_MASTER) != 0U) &&
5470       (hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests != 0U))
5471   {
5472     /* Disable the DMA */
5473     if (HAL_DMA_Abort(hhrtim->hdmaMaster) != HAL_OK)
5474     {
5475           hhrtim->State = HAL_HRTIM_STATE_ERROR;
5476     }
5477     else
5478     {
5479           hhrtim->State = HAL_HRTIM_STATE_READY;
5480           /* Disable the DMA request(s) */
5481           __HAL_HRTIM_MASTER_DISABLE_DMA(hhrtim,
5482                                          hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests);
5483     }
5484   }
5485 
5486   for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
5487        timer_idx < HRTIM_TIMERINDEX_MASTER ;
5488        timer_idx++)
5489   {
5490     if (((Timers & TimerIdxToTimerId[timer_idx]) != 0U) &&
5491         (hhrtim->TimerParam[timer_idx].DMARequests != 0U))
5492     {
5493       /* Get the timer DMA handler */
5494       /* Disable the DMA */
5495       if (HAL_DMA_Abort(HRTIM_GetDMAHandleFromTimerIdx(hhrtim, timer_idx)) != HAL_OK)
5496       {
5497         hhrtim->State = HAL_HRTIM_STATE_ERROR;
5498       }
5499       else
5500       {
5501         hhrtim->State = HAL_HRTIM_STATE_READY;
5502 
5503         /* Disable the DMA request(s) */
5504         __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim,
5505                                       timer_idx,
5506                                       hhrtim->TimerParam[timer_idx].DMARequests);
5507       }
5508     }
5509   }
5510 
5511   /* Disable the timer counter */
5512   __HAL_HRTIM_DISABLE(hhrtim, Timers);
5513 
5514   if (hhrtim->State == HAL_HRTIM_STATE_ERROR)
5515   {
5516       return HAL_ERROR;
5517   }
5518   else
5519   {
5520       return HAL_OK;
5521   }
5522 }
5523 
5524 /**
5525   * @brief  Enable or disables the HRTIM burst mode controller.
5526   * @param  hhrtim pointer to HAL HRTIM handle
5527   * @param  Enable Burst mode controller enabling
5528   *                    This parameter can be one of the following values:
5529   *                    @arg HRTIM_BURSTMODECTL_ENABLED: Burst mode enabled
5530   *                    @arg HRTIM_BURSTMODECTL_DISABLED: Burst mode disabled
5531   * @retval HAL status
5532   * @note This function must be called after starting the timer(s)
5533   */
5534 HAL_StatusTypeDef HAL_HRTIM_BurstModeCtl(HRTIM_HandleTypeDef * hhrtim,
5535                                          uint32_t Enable)
5536 {
5537   /* Check parameters */
5538   assert_param(IS_HRTIM_BURSTMODECTL(Enable));
5539 
5540   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
5541   {
5542      return HAL_BUSY;
5543   }
5544 
5545   /* Process Locked */
5546   __HAL_LOCK(hhrtim);
5547 
5548   hhrtim->State = HAL_HRTIM_STATE_BUSY;
5549 
5550   /* Enable/Disable the burst mode controller */
5551   MODIFY_REG(hhrtim->Instance->sCommonRegs.BMCR, HRTIM_BMCR_BME, Enable);
5552 
5553   hhrtim->State = HAL_HRTIM_STATE_READY;
5554 
5555   /* Process Unlocked */
5556   __HAL_UNLOCK(hhrtim);
5557 
5558   return HAL_OK;
5559 }
5560 
5561 /**
5562   * @brief  Trig the burst mode operation.
5563   * @param  hhrtim pointer to HAL HRTIM handle
5564   * @retval HAL status
5565   */
5566 HAL_StatusTypeDef HAL_HRTIM_BurstModeSoftwareTrigger(HRTIM_HandleTypeDef *hhrtim)
5567 {
5568   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
5569   {
5570      return HAL_BUSY;
5571   }
5572 
5573   /* Process Locked */
5574   __HAL_LOCK(hhrtim);
5575 
5576   hhrtim->State = HAL_HRTIM_STATE_BUSY;
5577 
5578   /* Software trigger of the burst mode controller */
5579   SET_BIT(hhrtim->Instance->sCommonRegs.BMTRGR, HRTIM_BMTRGR_SW);
5580 
5581   hhrtim->State = HAL_HRTIM_STATE_READY;
5582 
5583   /* Process Unlocked */
5584   __HAL_UNLOCK(hhrtim);
5585 
5586   return HAL_OK;
5587 }
5588 
5589 /**
5590   * @brief  Trig a software capture on the designed capture unit
5591   * @param  hhrtim pointer to HAL HRTIM handle
5592   * @param  TimerIdx Timer index
5593   *                   This parameter can be one of the following values:
5594   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
5595   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
5596   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
5597   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
5598   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
5599   * @param  CaptureUnit Capture unit to trig
5600   *                    This parameter can be one of the following values:
5601   *                    @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
5602   *                    @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
5603   * @retval HAL status
5604   * @note The 'software capture' bit in the capure configuration register is
5605   *       automatically reset by hardware
5606   */
5607 HAL_StatusTypeDef HAL_HRTIM_SoftwareCapture(HRTIM_HandleTypeDef * hhrtim,
5608                                             uint32_t TimerIdx,
5609                                             uint32_t CaptureUnit)
5610 {
5611   /* Check parameters */
5612   assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
5613   assert_param(IS_HRTIM_CAPTUREUNIT(CaptureUnit));
5614 
5615   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
5616   {
5617      return HAL_BUSY;
5618   }
5619 
5620   /* Process Locked */
5621   __HAL_LOCK(hhrtim);
5622 
5623   hhrtim->State = HAL_HRTIM_STATE_BUSY;
5624 
5625   /* Force a software capture on concerned capture unit */
5626   switch (CaptureUnit)
5627   {
5628   case HRTIM_CAPTUREUNIT_1:
5629     {
5630       SET_BIT(hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR, HRTIM_CPT1CR_SWCPT);
5631       break;
5632     }
5633 
5634   case HRTIM_CAPTUREUNIT_2:
5635     {
5636       SET_BIT(hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR, HRTIM_CPT2CR_SWCPT);
5637       break;
5638     }
5639 
5640   default:
5641     {
5642       hhrtim->State = HAL_HRTIM_STATE_ERROR;
5643 
5644       /* Process Unlocked */
5645       __HAL_UNLOCK(hhrtim);
5646 
5647     break;
5648     }
5649   }
5650 
5651   if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
5652   {
5653      return HAL_ERROR;
5654   }
5655 
5656   hhrtim->State = HAL_HRTIM_STATE_READY;
5657 
5658   /* Process Unlocked */
5659   __HAL_UNLOCK(hhrtim);
5660 
5661   return HAL_OK;
5662 }
5663 
5664 /**
5665   * @brief  Trig the update of the registers of one or several timers
5666   * @param  hhrtim pointer to HAL HRTIM handle
5667   * @param  Timers timers concerned with the software register update
5668   *                   This parameter can be any combination of the following values:
5669   *                   @arg HRTIM_TIMERUPDATE_MASTER
5670   *                   @arg HRTIM_TIMERUPDATE_A
5671   *                   @arg HRTIM_TIMERUPDATE_B
5672   *                   @arg HRTIM_TIMERUPDATE_C
5673   *                   @arg HRTIM_TIMERUPDATE_D
5674   *                   @arg HRTIM_TIMERUPDATE_E
5675   * @retval HAL status
5676   * @note The 'software update' bits in the HRTIM control register 2 register are
5677   *       automatically reset by hardware
5678   */
5679 HAL_StatusTypeDef HAL_HRTIM_SoftwareUpdate(HRTIM_HandleTypeDef * hhrtim,
5680                                            uint32_t Timers)
5681 {
5682   /* Check parameters */
5683   assert_param(IS_HRTIM_TIMERUPDATE(Timers));
5684 
5685   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
5686   {
5687      return HAL_BUSY;
5688   }
5689 
5690   /* Process Locked */
5691   __HAL_LOCK(hhrtim);
5692 
5693   hhrtim->State = HAL_HRTIM_STATE_BUSY;
5694 
5695   /* Force timer(s) registers update */
5696   hhrtim->Instance->sCommonRegs.CR2 |= Timers;
5697 
5698   hhrtim->State = HAL_HRTIM_STATE_READY;
5699 
5700   /* Process Unlocked */
5701   __HAL_UNLOCK(hhrtim);
5702 
5703   return HAL_OK;
5704 }
5705 
5706 /**
5707   * @brief  Trig the reset of one or several timers
5708   * @param  hhrtim pointer to HAL HRTIM handle
5709   * @param  Timers timers concerned with the software counter reset
5710   *                   This parameter can be any combination of the following values:
5711   *                   @arg HRTIM_TIMERRESET_MASTER
5712   *                   @arg HRTIM_TIMERRESET_TIMER_A
5713   *                   @arg HRTIM_TIMERRESET_TIMER_B
5714   *                   @arg HRTIM_TIMERRESET_TIMER_C
5715   *                   @arg HRTIM_TIMERRESET_TIMER_D
5716   *                   @arg HRTIM_TIMERRESET_TIMER_E
5717   * @retval HAL status
5718   * @note The 'software reset' bits in the HRTIM control register 2  are
5719   *       automatically reset by hardware
5720   */
5721 HAL_StatusTypeDef HAL_HRTIM_SoftwareReset(HRTIM_HandleTypeDef * hhrtim,
5722                                           uint32_t Timers)
5723 {
5724   /* Check parameters */
5725   assert_param(IS_HRTIM_TIMERRESET(Timers));
5726 
5727   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
5728   {
5729      return HAL_BUSY;
5730   }
5731 
5732   /* Process Locked */
5733   __HAL_LOCK(hhrtim);
5734 
5735   hhrtim->State = HAL_HRTIM_STATE_BUSY;
5736 
5737   /* Force timer(s) registers reset */
5738   hhrtim->Instance->sCommonRegs.CR2 = Timers;
5739 
5740   hhrtim->State = HAL_HRTIM_STATE_READY;
5741 
5742   /* Process Unlocked */
5743   __HAL_UNLOCK(hhrtim);
5744 
5745   return HAL_OK;
5746 }
5747 
5748 /**
5749   * @brief  Start a burst DMA operation to update HRTIM control registers content
5750   * @param  hhrtim pointer to HAL HRTIM handle
5751   * @param  TimerIdx Timer index
5752   *                   This parameter can be one of the following values:
5753   *                   @arg HRTIM_TIMERINDEX_MASTER  for master timer
5754   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
5755   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
5756   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
5757   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
5758   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
5759   * @param  BurstBufferAddress address of the buffer the HRTIM control registers
5760   *                             content will be updated from.
5761   * @param  BurstBufferLength size (in WORDS) of the burst buffer.
5762   * @retval HAL status
5763   * @note The TimerIdx parameter determines the dma channel to be used by the
5764   *       DMA burst controller (see below)
5765   *       HRTIM_TIMERINDEX_MASTER: DMA channel 2 is used by the DMA burst controller
5766   *       HRTIM_TIMERINDEX_TIMER_A: DMA channel 3 is used by the DMA burst controller
5767   *       HRTIM_TIMERINDEX_TIMER_B: DMA channel 4 is used by the DMA burst controller
5768   *       HRTIM_TIMERINDEX_TIMER_C: DMA channel 5 is used by the DMA burst controller
5769   *       HRTIM_TIMERINDEX_TIMER_D: DMA channel 6 is used by the DMA burst controller
5770   *       HRTIM_TIMERINDEX_TIMER_E: DMA channel 7 is used by the DMA burst controller
5771   */
5772 HAL_StatusTypeDef HAL_HRTIM_BurstDMATransfer(HRTIM_HandleTypeDef *hhrtim,
5773                                              uint32_t TimerIdx,
5774                                              uint32_t BurstBufferAddress,
5775                                              uint32_t BurstBufferLength)
5776 {
5777   DMA_HandleTypeDef * hdma;
5778 
5779   /* Check the parameters */
5780   assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
5781 
5782   if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
5783   {
5784      return HAL_BUSY;
5785   }
5786   if(hhrtim->State == HAL_HRTIM_STATE_READY)
5787   {
5788     if((BurstBufferAddress == 0U ) || (BurstBufferLength == 0U))
5789     {
5790       return HAL_ERROR;
5791     }
5792     else
5793     {
5794       hhrtim->State = HAL_HRTIM_STATE_BUSY;
5795     }
5796   }
5797 
5798   /* Process Locked */
5799   __HAL_LOCK(hhrtim);
5800 
5801   /* Get the timer DMA handler */
5802   hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
5803 
5804   if (hdma == NULL)
5805   {
5806     hhrtim->State = HAL_HRTIM_STATE_ERROR;
5807 
5808     /* Process Unlocked */
5809     __HAL_UNLOCK(hhrtim);
5810 
5811     return HAL_ERROR;
5812   }
5813 
5814   /* Set the DMA transfer completed callback */
5815   hdma->XferCpltCallback = HRTIM_BurstDMACplt;
5816 
5817   /* Set the DMA error callback */
5818   hdma->XferErrorCallback = HRTIM_DMAError ;
5819 
5820   /* Enable the DMA channel */
5821   if (HAL_DMA_Start_IT(hdma,
5822                    BurstBufferAddress,
5823                    (uint32_t)&(hhrtim->Instance->sCommonRegs.BDMADR),
5824                    BurstBufferLength) != HAL_OK)
5825     {
5826            hhrtim->State = HAL_HRTIM_STATE_ERROR;
5827 
5828            /* Process Unlocked */
5829            __HAL_UNLOCK(hhrtim);
5830 
5831            return HAL_ERROR;
5832         }
5833 
5834   hhrtim->State = HAL_HRTIM_STATE_READY;
5835 
5836   /* Process Unlocked */
5837   __HAL_UNLOCK(hhrtim);
5838 
5839   return HAL_OK;
5840 }
5841 
5842 /**
5843   * @brief  Enable the transfer from preload to active registers for one
5844   *         or several timing units (including master timer).
5845   * @param  hhrtim pointer to HAL HRTIM handle
5846   * @param  Timers Timer(s) concerned by the register preload enabling command
5847   *                   This parameter can be any combination of the following values:
5848   *                   @arg HRTIM_TIMERUPDATE_MASTER
5849   *                   @arg HRTIM_TIMERUPDATE_A
5850   *                   @arg HRTIM_TIMERUPDATE_B
5851   *                   @arg HRTIM_TIMERUPDATE_C
5852   *                   @arg HRTIM_TIMERUPDATE_D
5853   *                   @arg HRTIM_TIMERUPDATE_E
5854   * @retval HAL status
5855   */
5856 HAL_StatusTypeDef HAL_HRTIM_UpdateEnable(HRTIM_HandleTypeDef *hhrtim,
5857                                           uint32_t Timers)
5858 {
5859    /* Check the parameters */
5860   assert_param(IS_HRTIM_TIMERUPDATE(Timers));
5861 
5862   /* Process Locked */
5863   __HAL_LOCK(hhrtim);
5864 
5865   hhrtim->State = HAL_HRTIM_STATE_BUSY;
5866 
5867   /* Enable timer(s) registers update */
5868   hhrtim->Instance->sCommonRegs.CR1 &= ~(Timers);
5869 
5870   hhrtim->State = HAL_HRTIM_STATE_READY;
5871 
5872   /* Process Unlocked */
5873   __HAL_UNLOCK(hhrtim);
5874 
5875   return HAL_OK;
5876   }
5877 
5878 /**
5879   * @brief  Disable the transfer from preload to active registers for one
5880   *         or several timing units (including master timer).
5881   * @param  hhrtim pointer to HAL HRTIM handle
5882   * @param  Timers Timer(s) concerned by the register preload disabling command
5883   *                   This parameter can be any combination of the following values:
5884   *                   @arg HRTIM_TIMERUPDATE_MASTER
5885   *                   @arg HRTIM_TIMERUPDATE_A
5886   *                   @arg HRTIM_TIMERUPDATE_B
5887   *                   @arg HRTIM_TIMERUPDATE_C
5888   *                   @arg HRTIM_TIMERUPDATE_D
5889   *                   @arg HRTIM_TIMERUPDATE_E
5890   * @retval HAL status
5891   */
5892 HAL_StatusTypeDef HAL_HRTIM_UpdateDisable(HRTIM_HandleTypeDef *hhrtim,
5893                                           uint32_t Timers)
5894 {
5895   /* Check the parameters */
5896   assert_param(IS_HRTIM_TIMERUPDATE(Timers));
5897 
5898   /* Process Locked */
5899   __HAL_LOCK(hhrtim);
5900 
5901   hhrtim->State = HAL_HRTIM_STATE_BUSY;
5902 
5903   /* Enable timer(s) registers update */
5904   hhrtim->Instance->sCommonRegs.CR1 |= (Timers);
5905 
5906   hhrtim->State = HAL_HRTIM_STATE_READY;
5907 
5908   /* Process Unlocked */
5909   __HAL_UNLOCK(hhrtim);
5910 
5911   return HAL_OK;
5912   }
5913 
5914 /**
5915   * @}
5916   */
5917 
5918 /** @defgroup HRTIM_Exported_Functions_Group9 Peripheral state functions
5919   * @ingroup RTEMSBSPsARMSTM32H7
5920  *  @brief    Peripheral State functions
5921 @verbatim
5922  ===============================================================================
5923               ##### Peripheral State functions #####
5924  ===============================================================================
5925     [..]  This section provides functions used to get HRTIM or HRTIM timer
5926           specific information:
5927       (+) Get HRTIM HAL state
5928       (+) Get captured value
5929       (+) Get HRTIM timer output level
5930       (+) Get HRTIM timer output state
5931       (+) Get delayed protection status
5932       (+) Get burst status
5933       (+) Get current push-pull status
5934       (+) Get idle push-pull status
5935 
5936 @endverbatim
5937   * @{
5938   */
5939 
5940 /**
5941   * @brief  Return the HRTIM HAL state
5942   * @param  hhrtim pointer to HAL HRTIM handle
5943   * @retval HAL state
5944   */
5945 HAL_HRTIM_StateTypeDef HAL_HRTIM_GetState(const HRTIM_HandleTypeDef* hhrtim)
5946 {
5947   /* Return HRTIM state */
5948   return hhrtim->State;
5949 }
5950 
5951 /**
5952   * @brief  Return actual value of the capture register of the designated capture unit
5953   * @param  hhrtim pointer to HAL HRTIM handle
5954   * @param  TimerIdx Timer index
5955   *                   This parameter can be one of the following values:
5956   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
5957   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
5958   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
5959   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
5960   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
5961   * @param  CaptureUnit Capture unit to trig
5962   *                    This parameter can be one of the following values:
5963   *                    @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
5964   *                    @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
5965   * @retval Captured value
5966   */
5967 uint32_t HAL_HRTIM_GetCapturedValue(const HRTIM_HandleTypeDef * hhrtim,
5968                                     uint32_t TimerIdx,
5969                                     uint32_t CaptureUnit)
5970 {
5971   uint32_t captured_value;
5972 
5973   /* Check parameters */
5974   assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
5975   assert_param(IS_HRTIM_CAPTUREUNIT(CaptureUnit));
5976 
5977   /* Read captured value */
5978   switch (CaptureUnit)
5979   {
5980   case HRTIM_CAPTUREUNIT_1:
5981     {
5982       captured_value = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xR;
5983       break;
5984     }
5985 
5986   case HRTIM_CAPTUREUNIT_2:
5987     {
5988       captured_value = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xR;
5989       break;
5990     }
5991 
5992   default:
5993    {
5994        captured_value = 0xFFFFFFFFUL;
5995       break;
5996     }
5997 
5998   }
5999 
6000   return captured_value;
6001 }
6002 
6003 
6004 /**
6005   * @brief  Return actual level (active or inactive) of the designated output
6006   * @param  hhrtim pointer to HAL HRTIM handle
6007   * @param  TimerIdx Timer index
6008   *                   This parameter can be one of the following values:
6009   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6010   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6011   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6012   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6013   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6014   * @param  Output Timer output
6015   *                    This parameter can be one of the following values:
6016   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
6017   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
6018   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
6019   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
6020   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
6021   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
6022   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
6023   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
6024   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
6025   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
6026   * @retval Output level
6027   * @note Returned output level is taken before the output stage (chopper,
6028   *        polarity).
6029   */
6030 uint32_t HAL_HRTIM_WaveformGetOutputLevel(const HRTIM_HandleTypeDef * hhrtim,
6031                                           uint32_t TimerIdx,
6032                                           uint32_t Output)
6033 {
6034   uint32_t output_level;
6035 
6036   /* Check parameters */
6037   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
6038 
6039   /* Read the output level */
6040   switch (Output)
6041   {
6042   case HRTIM_OUTPUT_TA1:
6043   case HRTIM_OUTPUT_TB1:
6044   case HRTIM_OUTPUT_TC1:
6045   case HRTIM_OUTPUT_TD1:
6046   case HRTIM_OUTPUT_TE1:
6047     {
6048       if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O1CPY) != (uint32_t)RESET)
6049       {
6050         output_level = HRTIM_OUTPUTLEVEL_ACTIVE;
6051       }
6052       else
6053       {
6054         output_level = HRTIM_OUTPUTLEVEL_INACTIVE;
6055       }
6056      break;
6057     }
6058 
6059   case HRTIM_OUTPUT_TA2:
6060   case HRTIM_OUTPUT_TB2:
6061   case HRTIM_OUTPUT_TC2:
6062   case HRTIM_OUTPUT_TD2:
6063   case HRTIM_OUTPUT_TE2:
6064     {
6065       if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O2CPY) != (uint32_t)RESET)
6066       {
6067         output_level = HRTIM_OUTPUTLEVEL_ACTIVE;
6068       }
6069       else
6070       {
6071         output_level = HRTIM_OUTPUTLEVEL_INACTIVE;
6072       }
6073       break;
6074     }
6075 
6076   default:
6077     {
6078       output_level = 0xFFFFFFFFUL;
6079       break;
6080     }
6081   }
6082 
6083   return output_level;
6084 }
6085 
6086 /**
6087   * @brief  Return actual state (RUN, IDLE, FAULT) of the designated output
6088   * @param  hhrtim pointer to HAL HRTIM handle
6089   * @param  TimerIdx Timer index
6090   *                   This parameter can be one of the following values:
6091   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6092   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6093   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6094   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6095   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6096   * @param  Output Timer output
6097   *                    This parameter can be one of the following values:
6098   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
6099   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
6100   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
6101   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
6102   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
6103   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
6104   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
6105   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
6106   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
6107   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
6108   * @retval Output state
6109   */
6110 uint32_t HAL_HRTIM_WaveformGetOutputState(const HRTIM_HandleTypeDef * hhrtim,
6111                                           uint32_t TimerIdx,
6112                                           uint32_t Output)
6113 {
6114   uint32_t output_bit;
6115   uint32_t output_state;
6116 
6117   /* Check parameters */
6118   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
6119 
6120   /* Prevent unused argument(s) compilation warning */
6121   UNUSED(TimerIdx);
6122 
6123   /* Set output state according to output control status and output disable status */
6124   switch (Output)
6125   {
6126   case HRTIM_OUTPUT_TA1:
6127     {
6128       output_bit = HRTIM_OENR_TA1OEN;
6129       break;
6130     }
6131 
6132   case HRTIM_OUTPUT_TA2:
6133     {
6134       output_bit = HRTIM_OENR_TA2OEN;
6135       break;
6136     }
6137 
6138   case HRTIM_OUTPUT_TB1:
6139     {
6140       output_bit = HRTIM_OENR_TB1OEN;
6141       break;
6142     }
6143 
6144   case HRTIM_OUTPUT_TB2:
6145     {
6146       output_bit = HRTIM_OENR_TB2OEN;
6147       break;
6148     }
6149 
6150   case HRTIM_OUTPUT_TC1:
6151     {
6152       output_bit = HRTIM_OENR_TC1OEN;
6153       break;
6154     }
6155 
6156   case HRTIM_OUTPUT_TC2:
6157     {
6158       output_bit = HRTIM_OENR_TC2OEN;
6159       break;
6160     }
6161 
6162   case HRTIM_OUTPUT_TD1:
6163     {
6164       output_bit = HRTIM_OENR_TD1OEN;
6165       break;
6166     }
6167 
6168   case HRTIM_OUTPUT_TD2:
6169     {
6170       output_bit = HRTIM_OENR_TD2OEN;
6171       break;
6172     }
6173 
6174   case HRTIM_OUTPUT_TE1:
6175     {
6176       output_bit = HRTIM_OENR_TE1OEN;
6177       break;
6178     }
6179 
6180   case HRTIM_OUTPUT_TE2:
6181     {
6182       output_bit = HRTIM_OENR_TE2OEN;
6183       break;
6184     }
6185 
6186   default:
6187     {
6188       output_bit = 0UL;
6189       break;
6190     }
6191   }
6192 
6193   if ((hhrtim->Instance->sCommonRegs.OENR & output_bit) != (uint32_t)RESET)
6194   {
6195     /* Output is enabled: output in RUN state (whatever output disable status is)*/
6196     output_state = HRTIM_OUTPUTSTATE_RUN;
6197   }
6198   else
6199   {
6200     if ((hhrtim->Instance->sCommonRegs.ODSR & output_bit) != (uint32_t)RESET)
6201     {
6202       /* Output is disabled: output in FAULT state */
6203       output_state = HRTIM_OUTPUTSTATE_FAULT;
6204     }
6205     else
6206     {
6207       /* Output is disabled: output in IDLE state */
6208       output_state = HRTIM_OUTPUTSTATE_IDLE;
6209     }
6210   }
6211 
6212   return(output_state);
6213 }
6214 
6215 /**
6216   * @brief  Return the level (active or inactive) of the designated output
6217   *         when the delayed protection was triggered.
6218   * @param  hhrtim pointer to HAL HRTIM handle
6219   * @param  TimerIdx Timer index
6220   *                   This parameter can be one of the following values:
6221   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6222   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6223   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6224   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6225   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6226   * @param  Output Timer output
6227   *                    This parameter can be one of the following values:
6228   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
6229   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
6230   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
6231   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
6232   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
6233   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
6234   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
6235   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
6236   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
6237   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
6238   * @retval Delayed protection status
6239   */
6240 uint32_t HAL_HRTIM_GetDelayedProtectionStatus(const HRTIM_HandleTypeDef * hhrtim,
6241                                               uint32_t TimerIdx,
6242                                               uint32_t Output)
6243 {
6244   uint32_t delayed_protection_status;
6245 
6246   /* Check parameters */
6247   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
6248 
6249   /* Read the delayed protection status */
6250   switch (Output)
6251   {
6252   case HRTIM_OUTPUT_TA1:
6253   case HRTIM_OUTPUT_TB1:
6254   case HRTIM_OUTPUT_TC1:
6255   case HRTIM_OUTPUT_TD1:
6256   case HRTIM_OUTPUT_TE1:
6257     {
6258       if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O1STAT) != (uint32_t)RESET)
6259       {
6260         /* Output 1 was active when the delayed idle protection was triggered */
6261         delayed_protection_status = HRTIM_OUTPUTLEVEL_ACTIVE;
6262       }
6263       else
6264       {
6265         /* Output 1 was inactive when the delayed idle protection was triggered */
6266         delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE;
6267       }
6268       break;
6269     }
6270 
6271   case HRTIM_OUTPUT_TA2:
6272   case HRTIM_OUTPUT_TB2:
6273   case HRTIM_OUTPUT_TC2:
6274   case HRTIM_OUTPUT_TD2:
6275   case HRTIM_OUTPUT_TE2:
6276     {
6277       if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O2STAT) != (uint32_t)RESET)
6278       {
6279         /* Output 2 was active when the delayed idle protection was triggered */
6280         delayed_protection_status = HRTIM_OUTPUTLEVEL_ACTIVE;
6281       }
6282       else
6283       {
6284         /* Output 2 was inactive when the delayed idle protection was triggered */
6285         delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE;
6286       }
6287       break;
6288     }
6289 
6290   default:
6291     {
6292       delayed_protection_status = 0xFFFFFFFFUL;
6293       break;
6294     }
6295   }
6296 
6297   return delayed_protection_status;
6298 }
6299 
6300 /**
6301   * @brief  Return the actual status (active or inactive) of the burst mode controller
6302   * @param  hhrtim pointer to HAL HRTIM handle
6303   * @retval Burst mode controller status
6304   */
6305 uint32_t HAL_HRTIM_GetBurstStatus(const HRTIM_HandleTypeDef * hhrtim)
6306 {
6307   uint32_t burst_mode_status;
6308 
6309   /* Read burst mode status */
6310   burst_mode_status = (hhrtim->Instance->sCommonRegs.BMCR & HRTIM_BMCR_BMSTAT);
6311 
6312   return burst_mode_status;
6313 }
6314 
6315 /**
6316   * @brief  Indicate on which output the signal is currently active (when the
6317   *         push pull mode is enabled).
6318   * @param  hhrtim pointer to HAL HRTIM handle
6319   * @param  TimerIdx Timer index
6320   *                   This parameter can be one of the following values:
6321   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6322   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6323   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6324   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6325   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6326   * @retval Burst mode controller status
6327   */
6328 uint32_t HAL_HRTIM_GetCurrentPushPullStatus(const HRTIM_HandleTypeDef * hhrtim,
6329                                             uint32_t TimerIdx)
6330 {
6331   uint32_t current_pushpull_status;
6332 
6333   /* Check the parameters */
6334   assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
6335 
6336   /* Read current push pull status */
6337   current_pushpull_status = (hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_CPPSTAT);
6338 
6339   return current_pushpull_status;
6340 }
6341 
6342 
6343 /**
6344   * @brief  Indicate on which output the signal was applied, in push-pull mode,
6345             balanced fault mode or delayed idle mode, when the protection was triggered.
6346   * @param  hhrtim pointer to HAL HRTIM handle
6347   * @param  TimerIdx Timer index
6348   *                   This parameter can be one of the following values:
6349   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6350   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6351   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6352   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6353   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6354   * @retval Idle Push Pull Status
6355   */
6356 uint32_t HAL_HRTIM_GetIdlePushPullStatus(const HRTIM_HandleTypeDef * hhrtim,
6357                                          uint32_t TimerIdx)
6358 {
6359   uint32_t idle_pushpull_status;
6360 
6361   /* Check the parameters */
6362   assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
6363 
6364   /* Read current push pull status */
6365   idle_pushpull_status = (hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_IPPSTAT);
6366 
6367   return idle_pushpull_status;
6368 }
6369 
6370 /**
6371   * @}
6372   */
6373 
6374 /** @defgroup HRTIM_Exported_Functions_Group10 Interrupts handling
6375   * @ingroup RTEMSBSPsARMSTM32H7
6376  *  @brief  Functions called when HRTIM generates an interrupt
6377  *          7 interrupts can be generated by the master timer:
6378  *            - Master timer registers update
6379  *            - Synchronization event received
6380  *            - Master timer repetition event
6381  *            - Master Compare 1 to 4 event
6382  *          14 interrupts can be generated by each timing unit:
6383  *            - Delayed protection triggered
6384  *            - Counter reset or roll-over event
6385  *            - Output 1 and output 2 reset (transition active to inactive)
6386  *            - Output 1 and output 2 set (transition inactive to active)
6387  *            - Capture 1 and 2 events
6388  *            - Timing unit registers update
6389  *            - Repetition event
6390  *            - Compare 1 to 4 event
6391  *          7 global interrupts are generated for the whole HRTIM:
6392  *            - System fault and Fault 1 to 5 (regardless of the timing unit attribution)
6393  *            - Burst mode period completed
6394 @verbatim
6395  ===============================================================================
6396                       ##### HRTIM interrupts handling #####
6397  ===============================================================================
6398     [..]
6399     This subsection provides a set of functions allowing to manage the HRTIM
6400     interrupts:
6401       (+)  HRTIM interrupt handler
6402       (+)  Callback function called when Fault1 interrupt occurs
6403       (+)  Callback function called when Fault2 interrupt occurs
6404       (+)  Callback function called when Fault3 interrupt occurs
6405       (+)  Callback function called when Fault4 interrupt occurs
6406       (+)  Callback function called when Fault5 interrupt occurs
6407       (+)  Callback function called when system Fault interrupt occurs
6408       (+)  Callback function called when burst mode period interrupt occurs
6409       (+)  Callback function called when synchronization input interrupt occurs
6410       (+)  Callback function called when a timer register update interrupt occurs
6411       (+)  Callback function called when a timer repetition interrupt occurs
6412       (+)  Callback function called when a compare 1 match interrupt occurs
6413       (+)  Callback function called when a compare 2 match interrupt occurs
6414       (+)  Callback function called when a compare 3 match interrupt occurs
6415       (+)  Callback function called when a compare 4 match interrupt occurs
6416       (+)  Callback function called when a capture 1 interrupt occurs
6417       (+)  Callback function called when a capture 2 interrupt occurs
6418       (+)  Callback function called when a delayed protection interrupt occurs
6419       (+)  Callback function called when a timer counter reset interrupt occurs
6420       (+)  Callback function called when a timer output 1 set interrupt occurs
6421       (+)  Callback function called when a timer output 1 reset interrupt occurs
6422       (+)  Callback function called when a timer output 2 set interrupt occurs
6423       (+)  Callback function called when a timer output 2 reset interrupt occurs
6424       (+)  Callback function called when a timer output 2 reset interrupt occurs
6425       (+)  Callback function called upon completion of a burst DMA transfer
6426       (+)  HRTIM callback function registration
6427       (+)  HRTIM callback function unregistration
6428       (+)  HRTIM Timer x callback function registration
6429       (+)  HRTIM Timer x callback function unregistration
6430 
6431 @endverbatim
6432   * @{
6433   */
6434 
6435 /**
6436   * @brief  This function handles HRTIM interrupt request.
6437   * @param  hhrtim pointer to HAL HRTIM handle
6438   * @param  TimerIdx Timer index
6439   *                   This parameter can be any value of HRTIM_Timer_Index
6440   * @retval None
6441   */
6442 void HAL_HRTIM_IRQHandler(HRTIM_HandleTypeDef * hhrtim,
6443                           uint32_t TimerIdx)
6444 {
6445   /* HRTIM interrupts handling */
6446   if (TimerIdx == HRTIM_TIMERINDEX_COMMON)
6447   {
6448     HRTIM_HRTIM_ISR(hhrtim);
6449   }
6450   else if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
6451   {
6452     /* Master related interrupts handling */
6453     HRTIM_Master_ISR(hhrtim);
6454   }
6455   else
6456   {
6457     /* Timing unit related interrupts handling */
6458     HRTIM_Timer_ISR(hhrtim, TimerIdx);
6459   }
6460 
6461 }
6462 
6463 /**
6464   * @brief  Callback function invoked when a fault 1 interrupt occurred
6465   * @param  hhrtim pointer to HAL HRTIM handle  * @retval None
6466   * @retval None
6467   */
6468 __weak void HAL_HRTIM_Fault1Callback(HRTIM_HandleTypeDef * hhrtim)
6469 {
6470   /* Prevent unused argument(s) compilation warning */
6471   UNUSED(hhrtim);
6472 
6473   /* NOTE : This function should not be modified, when the callback is needed,
6474             the HAL_HRTIM_Fault1Callback could be implemented in the user file
6475    */
6476 }
6477 
6478 /**
6479   * @brief  Callback function invoked when a fault 2 interrupt occurred
6480   * @param  hhrtim pointer to HAL HRTIM handle
6481   * @retval None
6482   */
6483 __weak void HAL_HRTIM_Fault2Callback(HRTIM_HandleTypeDef * hhrtim)
6484 {
6485   /* Prevent unused argument(s) compilation warning */
6486   UNUSED(hhrtim);
6487 
6488   /* NOTE : This function should not be modified, when the callback is needed,
6489             the HAL_HRTIM_Fault2Callback could be implemented in the user file
6490    */
6491 }
6492 
6493 /**
6494   * @brief  Callback function invoked when a fault 3 interrupt occurred
6495   * @param  hhrtim pointer to HAL HRTIM handle
6496   * @retval None
6497   */
6498 __weak void HAL_HRTIM_Fault3Callback(HRTIM_HandleTypeDef * hhrtim)
6499 {
6500   /* Prevent unused argument(s) compilation warning */
6501   UNUSED(hhrtim);
6502 
6503   /* NOTE : This function should not be modified, when the callback is needed,
6504             the HAL_HRTIM_Fault3Callback could be implemented in the user file
6505    */
6506 }
6507 
6508 /**
6509   * @brief  Callback function invoked when a fault 4 interrupt occurred
6510   * @param  hhrtim pointer to HAL HRTIM handle
6511   * @retval None
6512   */
6513 __weak void HAL_HRTIM_Fault4Callback(HRTIM_HandleTypeDef * hhrtim)
6514 {
6515   /* Prevent unused argument(s) compilation warning */
6516   UNUSED(hhrtim);
6517 
6518   /* NOTE : This function should not be modified, when the callback is needed,
6519             the HAL_HRTIM_Fault4Callback could be implemented in the user file
6520    */
6521 }
6522 
6523 /**
6524   * @brief  Callback function invoked when a fault 5 interrupt occurred
6525   * @param  hhrtim pointer to HAL HRTIM handle
6526   * @retval None
6527   */
6528 __weak void HAL_HRTIM_Fault5Callback(HRTIM_HandleTypeDef * hhrtim)
6529 {
6530   /* Prevent unused argument(s) compilation warning */
6531   UNUSED(hhrtim);
6532 
6533   /* NOTE : This function should not be modified, when the callback is needed,
6534             the HAL_HRTIM_Fault5Callback could be implemented in the user file
6535    */
6536 }
6537 
6538 /**
6539   * @brief  Callback function invoked when a system fault interrupt occurred
6540   * @param  hhrtim pointer to HAL HRTIM handle
6541   * @retval None
6542   */
6543 __weak void HAL_HRTIM_SystemFaultCallback(HRTIM_HandleTypeDef * hhrtim)
6544 {
6545   /* Prevent unused argument(s) compilation warning */
6546   UNUSED(hhrtim);
6547 
6548   /* NOTE : This function should not be modified, when the callback is needed,
6549             the HAL_HRTIM_SystemFaultCallback could be implemented in the user file
6550    */
6551 }
6552 
6553 /**
6554   * @brief  Callback function invoked when the end of the burst mode period is reached
6555   * @param  hhrtim pointer to HAL HRTIM handle
6556   * @retval None
6557   */
6558 __weak void HAL_HRTIM_BurstModePeriodCallback(HRTIM_HandleTypeDef * hhrtim)
6559 {
6560   /* Prevent unused argument(s) compilation warning */
6561   UNUSED(hhrtim);
6562 
6563   /* NOTE : This function should not be modified, when the callback is needed,
6564             the HAL_HRTIM_BurstModeCallback could be implemented in the user file
6565    */
6566 }
6567 
6568 /**
6569   * @brief  Callback function invoked when a synchronization input event is received
6570   * @param  hhrtim pointer to HAL HRTIM handle
6571   * @retval None
6572   */
6573 __weak void HAL_HRTIM_SynchronizationEventCallback(HRTIM_HandleTypeDef * hhrtim)
6574 {
6575   /* Prevent unused argument(s) compilation warning */
6576   UNUSED(hhrtim);
6577 
6578   /* NOTE : This function should not be modified, when the callback is needed,
6579             the HAL_HRTIM_SynchronizationEventCallback could be implemented in the user file
6580    */
6581 }
6582 
6583 /**
6584   * @brief  Callback function invoked when timer registers are updated
6585   * @param  hhrtim pointer to HAL HRTIM handle
6586   * @param  TimerIdx Timer index
6587   *                   This parameter can be one of the following values:
6588   *                   @arg HRTIM_TIMERINDEX_MASTER  for master timer
6589   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6590   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6591   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6592   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6593   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6594   * @retval None
6595   */
6596 __weak void HAL_HRTIM_RegistersUpdateCallback(HRTIM_HandleTypeDef * hhrtim,
6597                                               uint32_t TimerIdx)
6598 {
6599   /* Prevent unused argument(s) compilation warning */
6600   UNUSED(hhrtim);
6601   UNUSED(TimerIdx);
6602 
6603   /* NOTE : This function should not be modified, when the callback is needed,
6604             the HAL_HRTIM_Master_RegistersUpdateCallback could be implemented in the user file
6605    */
6606 }
6607 
6608 /**
6609   * @brief  Callback function invoked when timer repetition period has elapsed
6610   * @param  hhrtim pointer to HAL HRTIM handle
6611   * @param  TimerIdx Timer index
6612   *                   This parameter can be one of the following values:
6613   *                   @arg HRTIM_TIMERINDEX_MASTER  for master timer
6614   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6615   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6616   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6617   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6618   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6619   * @retval None
6620   */
6621 __weak void HAL_HRTIM_RepetitionEventCallback(HRTIM_HandleTypeDef * hhrtim,
6622                                               uint32_t TimerIdx)
6623 {
6624   /* Prevent unused argument(s) compilation warning */
6625   UNUSED(hhrtim);
6626   UNUSED(TimerIdx);
6627 
6628   /* NOTE : This function should not be modified, when the callback is needed,
6629             the HAL_HRTIM_Master_RepetitionEventCallback could be implemented in the user file
6630    */
6631 }
6632 
6633 /**
6634   * @brief  Callback function invoked when the timer counter matches the value
6635   *         programmed in the compare 1 register
6636   * @param  hhrtim pointer to HAL HRTIM handle
6637   * @param  TimerIdx Timer index
6638   *                   This parameter can be one of the following values:
6639   *                   @arg HRTIM_TIMERINDEX_MASTER  for master timer
6640   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6641   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6642   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6643   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6644   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6645   * @retval None
6646   */
6647 __weak void HAL_HRTIM_Compare1EventCallback(HRTIM_HandleTypeDef * hhrtim,
6648                                               uint32_t TimerIdx)
6649 {
6650   /* Prevent unused argument(s) compilation warning */
6651   UNUSED(hhrtim);
6652   UNUSED(TimerIdx);
6653 
6654   /* NOTE : This function should not be modified, when the callback is needed,
6655             the HAL_HRTIM_Master_Compare1EventCallback could be implemented in the user file
6656    */
6657 }
6658 
6659 /**
6660   * @brief  Callback function invoked when the timer counter matches the value
6661   *         programmed in the compare 2 register
6662   * @param  hhrtim pointer to HAL HRTIM handle
6663   * @retval None
6664   * @param  TimerIdx Timer index
6665   *                   This parameter can be one of the following values:
6666   *                   @arg HRTIM_TIMERINDEX_MASTER  for master timer
6667   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6668   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6669   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6670   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6671   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6672   */
6673 __weak void HAL_HRTIM_Compare2EventCallback(HRTIM_HandleTypeDef * hhrtim,
6674                                               uint32_t TimerIdx)
6675 {
6676   /* Prevent unused argument(s) compilation warning */
6677   UNUSED(hhrtim);
6678   UNUSED(TimerIdx);
6679 
6680   /* NOTE : This function should not be modified, when the callback is needed,
6681             the HAL_HRTIM_Master_Compare2EventCallback could be implemented in the user file
6682    */
6683 }
6684 
6685 /**
6686   * @brief  Callback function invoked when the timer counter matches the value
6687   *         programmed in the compare 3 register
6688   * @param  hhrtim pointer to HAL HRTIM handle
6689   * @param  TimerIdx Timer index
6690   *                   This parameter can be one of the following values:
6691   *                   @arg HRTIM_TIMERINDEX_MASTER  for master timer
6692   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6693   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6694   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6695   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6696   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6697   * @retval None
6698   */
6699 __weak void HAL_HRTIM_Compare3EventCallback(HRTIM_HandleTypeDef * hhrtim,
6700                                               uint32_t TimerIdx)
6701 {
6702   /* Prevent unused argument(s) compilation warning */
6703   UNUSED(hhrtim);
6704   UNUSED(TimerIdx);
6705 
6706   /* NOTE : This function should not be modified, when the callback is needed,
6707             the HAL_HRTIM_Master_Compare3EventCallback could be implemented in the user file
6708    */
6709 }
6710 
6711 /**
6712   * @brief  Callback function invoked when the timer counter matches the value
6713   *         programmed in the compare 4 register.
6714   * @param  hhrtim pointer to HAL HRTIM handle
6715   * @param  TimerIdx Timer index
6716   *                   This parameter can be one of the following values:
6717   *                   @arg HRTIM_TIMERINDEX_MASTER  for master timer
6718   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6719   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6720   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6721   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6722   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6723   * @retval None
6724   */
6725 __weak void HAL_HRTIM_Compare4EventCallback(HRTIM_HandleTypeDef * hhrtim,
6726                                               uint32_t TimerIdx)
6727 {
6728   /* Prevent unused argument(s) compilation warning */
6729   UNUSED(hhrtim);
6730   UNUSED(TimerIdx);
6731 
6732   /* NOTE : This function should not be modified, when the callback is needed,
6733             the HAL_HRTIM_Master_Compare4EventCallback could be implemented in the user file
6734    */
6735 }
6736 
6737 /**
6738   * @brief  Callback function invoked when the timer x capture 1 event occurs
6739   * @param  hhrtim pointer to HAL HRTIM handle
6740   * @param  TimerIdx Timer index
6741   *                   This parameter can be one of the following values:
6742   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6743   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6744   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6745   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6746   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6747   * @retval None
6748   */
6749 __weak void HAL_HRTIM_Capture1EventCallback(HRTIM_HandleTypeDef * hhrtim,
6750                                               uint32_t TimerIdx)
6751 {
6752   /* Prevent unused argument(s) compilation warning */
6753   UNUSED(hhrtim);
6754   UNUSED(TimerIdx);
6755 
6756   /* NOTE : This function should not be modified, when the callback is needed,
6757             the HAL_HRTIM_Timer_Capture1EventCallback could be implemented in the user file
6758    */
6759 }
6760 
6761 /**
6762   * @brief  Callback function invoked when the timer x capture 2 event occurs
6763   * @param  hhrtim pointer to HAL HRTIM handle
6764   * @param  TimerIdx Timer index
6765   *                   This parameter can be one of the following values:
6766   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6767   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6768   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6769   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6770   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6771   * @retval None
6772   */
6773 __weak void HAL_HRTIM_Capture2EventCallback(HRTIM_HandleTypeDef * hhrtim,
6774                                               uint32_t TimerIdx)
6775 {
6776   /* Prevent unused argument(s) compilation warning */
6777   UNUSED(hhrtim);
6778   UNUSED(TimerIdx);
6779 
6780   /* NOTE : This function should not be modified, when the callback is needed,
6781             the HAL_HRTIM_Timer_Capture2EventCallback could be implemented in the user file
6782    */
6783 }
6784 
6785 /**
6786   * @brief  Callback function invoked when the delayed idle or balanced idle mode is
6787   *         entered.
6788   * @param  hhrtim pointer to HAL HRTIM handle
6789   * @param  TimerIdx Timer index
6790   *                   This parameter can be one of the following values:
6791   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6792   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6793   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6794   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6795   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6796   * @retval None
6797   */
6798 __weak void HAL_HRTIM_DelayedProtectionCallback(HRTIM_HandleTypeDef * hhrtim,
6799                                               uint32_t TimerIdx)
6800 {
6801   /* Prevent unused argument(s) compilation warning */
6802   UNUSED(hhrtim);
6803   UNUSED(TimerIdx);
6804 
6805   /* NOTE : This function should not be modified, when the callback is needed,
6806             the HAL_HRTIM_Timer_DelayedProtectionCallback could be implemented in the user file
6807    */
6808 }
6809 
6810 /**
6811   * @brief  Callback function invoked when the timer x counter reset/roll-over
6812   *         event occurs.
6813   * @param  hhrtim pointer to HAL HRTIM handle
6814   * @param  TimerIdx Timer index
6815   *                   This parameter can be one of the following values:
6816   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6817   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6818   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6819   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6820   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6821   * @retval None
6822   */
6823 __weak void HAL_HRTIM_CounterResetCallback(HRTIM_HandleTypeDef * hhrtim,
6824                                               uint32_t TimerIdx)
6825 {
6826   /* Prevent unused argument(s) compilation warning */
6827   UNUSED(hhrtim);
6828   UNUSED(TimerIdx);
6829 
6830   /* NOTE : This function should not be modified, when the callback is needed,
6831             the HAL_HRTIM_Timer_CounterResetCallback could be implemented in the user file
6832    */
6833 }
6834 
6835 /**
6836   * @brief  Callback function invoked when the timer x output 1 is set
6837   * @param  hhrtim pointer to HAL HRTIM handle
6838   * @param  TimerIdx Timer index
6839   *                   This parameter can be one of the following values:
6840   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6841   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6842   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6843   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6844   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6845   * @retval None
6846   */
6847 __weak void HAL_HRTIM_Output1SetCallback(HRTIM_HandleTypeDef * hhrtim,
6848                                               uint32_t TimerIdx)
6849 {
6850   /* Prevent unused argument(s) compilation warning */
6851   UNUSED(hhrtim);
6852   UNUSED(TimerIdx);
6853 
6854   /* NOTE : This function should not be modified, when the callback is needed,
6855             the HAL_HRTIM_Timer_Output1SetCallback could be implemented in the user file
6856    */
6857 }
6858 
6859 /**
6860   * @brief  Callback function invoked when the timer x output 1 is reset
6861   * @param  hhrtim pointer to HAL HRTIM handle
6862   * @param  TimerIdx Timer index
6863   *                   This parameter can be one of the following values:
6864   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6865   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6866   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6867   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6868   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6869   * @retval None
6870   */
6871 __weak void HAL_HRTIM_Output1ResetCallback(HRTIM_HandleTypeDef * hhrtim,
6872                                               uint32_t TimerIdx)
6873 {
6874   /* Prevent unused argument(s) compilation warning */
6875   UNUSED(hhrtim);
6876   UNUSED(TimerIdx);
6877 
6878   /* NOTE : This function should not be modified, when the callback is needed,
6879             the HAL_HRTIM_Timer_Output1ResetCallback could be implemented in the user file
6880    */
6881 }
6882 
6883 /**
6884   * @brief  Callback function invoked when the timer x output 2 is set
6885   * @param  hhrtim pointer to HAL HRTIM handle
6886   * @param  TimerIdx Timer index
6887   *                   This parameter can be one of the following values:
6888   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6889   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6890   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6891   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6892   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6893   * @retval None
6894   */
6895 __weak void HAL_HRTIM_Output2SetCallback(HRTIM_HandleTypeDef * hhrtim,
6896                                               uint32_t TimerIdx)
6897 {
6898   /* Prevent unused argument(s) compilation warning */
6899   UNUSED(hhrtim);
6900   UNUSED(TimerIdx);
6901 
6902   /* NOTE : This function should not be modified, when the callback is needed,
6903             the HAL_HRTIM_Timer_Output2SetCallback could be implemented in the user file
6904    */
6905 }
6906 
6907 /**
6908   * @brief  Callback function invoked when the timer x output 2 is reset
6909   * @param  hhrtim pointer to HAL HRTIM handle
6910   * @param  TimerIdx Timer index
6911   *                   This parameter can be one of the following values:
6912   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6913   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6914   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6915   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6916   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6917   * @retval None
6918   */
6919 __weak void HAL_HRTIM_Output2ResetCallback(HRTIM_HandleTypeDef * hhrtim,
6920                                               uint32_t TimerIdx)
6921 {
6922   /* Prevent unused argument(s) compilation warning */
6923   UNUSED(hhrtim);
6924   UNUSED(TimerIdx);
6925 
6926   /* NOTE : This function should not be modified, when the callback is needed,
6927             the HAL_HRTIM_Timer_Output2ResetCallback could be implemented in the user file
6928    */
6929 }
6930 
6931 /**
6932   * @brief  Callback function invoked when a DMA burst transfer is completed
6933   * @param  hhrtim pointer to HAL HRTIM handle
6934   * @param  TimerIdx Timer index
6935   *                   This parameter can be one of the following values:
6936   *                   @arg HRTIM_TIMERINDEX_MASTER  for master timer
6937   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
6938   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
6939   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
6940   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
6941   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
6942   * @retval None
6943   */
6944 __weak void HAL_HRTIM_BurstDMATransferCallback(HRTIM_HandleTypeDef * hhrtim,
6945                                                uint32_t TimerIdx)
6946 {
6947   /* Prevent unused argument(s) compilation warning */
6948   UNUSED(hhrtim);
6949   UNUSED(TimerIdx);
6950 
6951   /* NOTE : This function should not be modified, when the callback is needed,
6952             the HAL_HRTIM_BurstDMATransferCallback could be implemented in the user file
6953    */
6954 }
6955 
6956 /**
6957   * @brief  Callback function invoked when a DMA error occurs
6958   * @param  hhrtim pointer to HAL HRTIM handle
6959   * @retval None
6960   */
6961 __weak void HAL_HRTIM_ErrorCallback(HRTIM_HandleTypeDef *hhrtim)
6962 {
6963   /* Prevent unused argument(s) compilation warning */
6964   UNUSED(hhrtim);
6965 
6966   /* NOTE : This function should not be modified, when the callback is needed,
6967             the HAL_HRTIM_ErrorCallback could be implemented in the user file
6968    */
6969 }
6970 
6971 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
6972 /**
6973   * @brief  HRTIM callback function registration
6974   * @param  hhrtim pointer to HAL HRTIM handle
6975   * @param  CallbackID ID of the HRTIM callback function to register
6976   *                   This parameter can be one of the following values:
6977   *                   @arg HAL_HRTIM_FAULT1CALLBACK_CB_ID
6978   *                   @arg HAL_HRTIM_FAULT2CALLBACK_CB_ID
6979   *                   @arg HAL_HRTIM_FAULT3CALLBACK_CB_ID
6980   *                   @arg HAL_HRTIM_FAULT4CALLBACK_CB_ID
6981   *                   @arg HAL_HRTIM_FAULT5CALLBACK_CB_ID
6982   *                   @arg HAL_HRTIM_SYSTEMFAULTCALLBACK_CB_ID
6983   *                   @arg HAL_HRTIM_BURSTMODEPERIODCALLBACK_CB_ID
6984   *                   @arg HAL_HRTIM_SYNCHRONIZATIONEVENTCALLBACK_CB_ID
6985   *                   @arg HAL_HRTIM_ERRORCALLBACK_CB_ID
6986   *                   @arg HAL_HRTIM_MSPINIT_CB_ID
6987   *                   @arg HAL_HRTIM_MSPDEINIT_CB_ID
6988   * @param  pCallback Callback function pointer
6989   * @retval HAL status
6990   */
6991 HAL_StatusTypeDef HAL_HRTIM_RegisterCallback(HRTIM_HandleTypeDef *       hhrtim,
6992                                              HAL_HRTIM_CallbackIDTypeDef CallbackID,
6993                                              pHRTIM_CallbackTypeDef      pCallback)
6994 {
6995   HAL_StatusTypeDef status = HAL_OK;
6996 
6997   if (pCallback == NULL)
6998   {
6999     /* Update the state */
7000     hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
7001 
7002     return HAL_ERROR;
7003   }
7004 
7005   /* Process locked */
7006   __HAL_LOCK(hhrtim);
7007 
7008   if (HAL_HRTIM_STATE_READY == hhrtim->State)
7009   {
7010     switch (CallbackID)
7011     {
7012       case HAL_HRTIM_FAULT1CALLBACK_CB_ID :
7013         hhrtim->Fault1Callback = pCallback;
7014         break;
7015 
7016       case HAL_HRTIM_FAULT2CALLBACK_CB_ID :
7017         hhrtim->Fault2Callback = pCallback;
7018         break;
7019 
7020       case HAL_HRTIM_FAULT3CALLBACK_CB_ID :
7021         hhrtim->Fault3Callback = pCallback;
7022         break;
7023 
7024       case HAL_HRTIM_FAULT4CALLBACK_CB_ID :
7025         hhrtim->Fault4Callback = pCallback;
7026         break;
7027 
7028       case HAL_HRTIM_FAULT5CALLBACK_CB_ID :
7029         hhrtim->Fault5Callback = pCallback;
7030         break;
7031 
7032       case HAL_HRTIM_SYSTEMFAULTCALLBACK_CB_ID :
7033         hhrtim->SystemFaultCallback = pCallback;
7034         break;
7035 
7036 
7037       case HAL_HRTIM_BURSTMODEPERIODCALLBACK_CB_ID :
7038         hhrtim->BurstModePeriodCallback = pCallback;
7039         break;
7040 
7041       case HAL_HRTIM_SYNCHRONIZATIONEVENTCALLBACK_CB_ID :
7042         hhrtim->SynchronizationEventCallback = pCallback;
7043         break;
7044 
7045       case HAL_HRTIM_ERRORCALLBACK_CB_ID :
7046         hhrtim->ErrorCallback = pCallback;
7047         break;
7048 
7049       case HAL_HRTIM_MSPINIT_CB_ID :
7050         hhrtim->MspInitCallback = pCallback;
7051         break;
7052 
7053       case HAL_HRTIM_MSPDEINIT_CB_ID :
7054         hhrtim->MspDeInitCallback = pCallback;
7055         break;
7056 
7057       default :
7058         /* Update the state */
7059         hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
7060 
7061         /* Return error status */
7062         status = HAL_ERROR;
7063         break;
7064     }
7065   }
7066   else if (HAL_HRTIM_STATE_RESET == hhrtim->State)
7067   {
7068     switch (CallbackID)
7069     {
7070       case HAL_HRTIM_MSPINIT_CB_ID :
7071         hhrtim->MspInitCallback = pCallback;
7072         break;
7073 
7074       case HAL_HRTIM_MSPDEINIT_CB_ID :
7075         hhrtim->MspDeInitCallback = pCallback;
7076         break;
7077 
7078       default :
7079         /* Update the state */
7080         hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
7081 
7082         /* Return error status */
7083         status = HAL_ERROR;
7084         break;
7085     }
7086   }
7087   else
7088   {
7089     /* Update the state */
7090     hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
7091 
7092     /* Return error status */
7093     status = HAL_ERROR;
7094   }
7095 
7096   /* Release Lock */
7097   __HAL_UNLOCK(hhrtim);
7098 
7099   return status;
7100 }
7101 
7102 /**
7103   * @brief  HRTIM callback function un-registration
7104   * @param  hhrtim pointer to HAL HRTIM handle
7105   * @param  CallbackID ID of the HRTIM callback function to unregister
7106   *                   This parameter can be one of the following values:
7107   *                   @arg HAL_HRTIM_FAULT1CALLBACK_CB_ID
7108   *                   @arg HAL_HRTIM_FAULT2CALLBACK_CB_ID
7109   *                   @arg HAL_HRTIM_FAULT3CALLBACK_CB_ID
7110   *                   @arg HAL_HRTIM_FAULT4CALLBACK_CB_ID
7111   *                   @arg HAL_HRTIM_FAULT5CALLBACK_CB_ID
7112   *                   @arg HAL_HRTIM_SYSTEMFAULTCALLBACK_CB_ID
7113   *                   @arg HAL_HRTIM_BURSTMODEPERIODCALLBACK_CB_ID
7114   *                   @arg HAL_HRTIM_SYNCHRONIZATIONEVENTCALLBACK_CB_ID
7115   *                   @arg HAL_HRTIM_ERRORCALLBACK_CB_ID
7116   *                   @arg HAL_HRTIM_MSPINIT_CB_ID
7117   *                   @arg HAL_HRTIM_MSPDEINIT_CB_ID
7118   * @retval HAL status
7119   */
7120 HAL_StatusTypeDef HAL_HRTIM_UnRegisterCallback(HRTIM_HandleTypeDef * hhrtim,
7121                                                HAL_HRTIM_CallbackIDTypeDef CallbackID)
7122 {
7123   HAL_StatusTypeDef status = HAL_OK;
7124 
7125   /* Process locked */
7126   __HAL_LOCK(hhrtim);
7127 
7128   if (HAL_HRTIM_STATE_READY == hhrtim->State)
7129   {
7130     switch (CallbackID)
7131     {
7132     case HAL_HRTIM_FAULT1CALLBACK_CB_ID :
7133       hhrtim->Fault1Callback = HAL_HRTIM_Fault1Callback;
7134       break;
7135 
7136     case HAL_HRTIM_FAULT2CALLBACK_CB_ID :
7137       hhrtim->Fault2Callback = HAL_HRTIM_Fault2Callback;
7138       break;
7139 
7140     case HAL_HRTIM_FAULT3CALLBACK_CB_ID :
7141       hhrtim->Fault3Callback = HAL_HRTIM_Fault3Callback;
7142       break;
7143 
7144     case HAL_HRTIM_FAULT4CALLBACK_CB_ID :
7145       hhrtim->Fault4Callback = HAL_HRTIM_Fault4Callback;
7146       break;
7147 
7148     case HAL_HRTIM_FAULT5CALLBACK_CB_ID :
7149       hhrtim->Fault5Callback = HAL_HRTIM_Fault5Callback;
7150       break;
7151 
7152     case HAL_HRTIM_SYSTEMFAULTCALLBACK_CB_ID :
7153       hhrtim->SystemFaultCallback = HAL_HRTIM_SystemFaultCallback;
7154       break;
7155 
7156 
7157     case HAL_HRTIM_BURSTMODEPERIODCALLBACK_CB_ID :
7158       hhrtim->BurstModePeriodCallback = HAL_HRTIM_BurstModePeriodCallback;
7159       break;
7160 
7161     case HAL_HRTIM_SYNCHRONIZATIONEVENTCALLBACK_CB_ID :
7162       hhrtim->SynchronizationEventCallback = HAL_HRTIM_SynchronizationEventCallback;
7163       break;
7164 
7165     case HAL_HRTIM_ERRORCALLBACK_CB_ID :
7166       hhrtim->ErrorCallback = HAL_HRTIM_ErrorCallback;
7167       break;
7168 
7169     case HAL_HRTIM_MSPINIT_CB_ID :
7170       hhrtim->MspInitCallback = HAL_HRTIM_MspInit;
7171       break;
7172 
7173     case HAL_HRTIM_MSPDEINIT_CB_ID :
7174       hhrtim->MspDeInitCallback = HAL_HRTIM_MspDeInit;
7175       break;
7176 
7177     default :
7178     /* Update the state */
7179     hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
7180 
7181     /* Return error status */
7182     status = HAL_ERROR;
7183       break;
7184     }
7185   }
7186   else if (HAL_HRTIM_STATE_RESET == hhrtim->State)
7187   {
7188     switch (CallbackID)
7189     {
7190     case HAL_HRTIM_MSPINIT_CB_ID :
7191       hhrtim->MspInitCallback = HAL_HRTIM_MspInit;
7192       break;
7193 
7194     case HAL_HRTIM_MSPDEINIT_CB_ID :
7195       hhrtim->MspDeInitCallback = HAL_HRTIM_MspDeInit;
7196       break;
7197 
7198     default :
7199     /* Update the state */
7200     hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
7201 
7202     /* Return error status */
7203     status =  HAL_ERROR;
7204       break;
7205     }
7206   }
7207   else
7208   {
7209     /* Update the state */
7210     hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
7211 
7212     /* Return error status */
7213     status =  HAL_ERROR;
7214   }
7215 
7216   /* Release Lock */
7217   __HAL_UNLOCK(hhrtim);
7218 
7219   return status;
7220 }
7221 
7222 /**
7223   * @brief  HRTIM Timer x callback function registration
7224   * @param  hhrtim pointer to HAL HRTIM handle
7225   * @param  CallbackID ID of the HRTIM Timer x callback function to register
7226   *                   This parameter can be one of the following values:
7227   *                   @arg HAL_HRTIM_REGISTERSUPDATECALLBACK_CB_ID
7228   *                   @arg HAL_HRTIM_REPETITIONEVENTCALLBACK_CB_ID
7229   *                   @arg HAL_HRTIM_COMPARE1EVENTCALLBACK_CB_ID
7230   *                   @arg HAL_HRTIM_COMPARE2EVENTCALLBACK_CB_ID
7231   *                   @arg HAL_HRTIM_COMPARE3EVENTCALLBACK_CB_ID
7232   *                   @arg HAL_HRTIM_COMPARE4EVENTCALLBACK_CB_ID
7233   *                   @arg HAL_HRTIM_CAPTURE1EVENTCALLBACK_CB_ID
7234   *                   @arg HAL_HRTIM_CAPTURE2EVENTCALLBACK_CB_ID
7235   *                   @arg HAL_HRTIM_DELAYEDPROTECTIONCALLBACK_CB_ID
7236   *                   @arg HAL_HRTIM_COUNTERRESETCALLBACK_CB_ID
7237   *                   @arg HAL_HRTIM_OUTPUT1SETCALLBACK_CB_ID
7238   *                   @arg HAL_HRTIM_OUTPUT1RESETCALLBACK_CB_ID
7239   *                   @arg HAL_HRTIM_OUTPUT2SETCALLBACK_CB_ID
7240   *                   @arg HAL_HRTIM_OUTPUT2RESETCALLBACK_CB_ID
7241   *                   @arg HAL_HRTIM_BURSTDMATRANSFERCALLBACK_CB_ID
7242   * @param  pCallback Callback function pointer
7243   * @retval HAL status
7244   */
7245 HAL_StatusTypeDef HAL_HRTIM_TIMxRegisterCallback(HRTIM_HandleTypeDef * hhrtim,
7246                                                  HAL_HRTIM_CallbackIDTypeDef CallbackID,
7247                                                  pHRTIM_TIMxCallbackTypeDef pCallback)
7248 {
7249   HAL_StatusTypeDef status = HAL_OK;
7250 
7251   if (pCallback == NULL)
7252   {
7253     /* Update the state */
7254     hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
7255 
7256     return HAL_ERROR;
7257   }
7258 
7259   /* Process locked */
7260   __HAL_LOCK(hhrtim);
7261 
7262   if (HAL_HRTIM_STATE_READY == hhrtim->State)
7263   {
7264     switch (CallbackID)
7265     {
7266       case HAL_HRTIM_REGISTERSUPDATECALLBACK_CB_ID :
7267         hhrtim->RegistersUpdateCallback = pCallback;
7268         break;
7269 
7270       case HAL_HRTIM_REPETITIONEVENTCALLBACK_CB_ID :
7271         hhrtim->RepetitionEventCallback = pCallback;
7272         break;
7273 
7274       case HAL_HRTIM_COMPARE1EVENTCALLBACK_CB_ID :
7275         hhrtim->Compare1EventCallback = pCallback;
7276         break;
7277 
7278       case HAL_HRTIM_COMPARE2EVENTCALLBACK_CB_ID :
7279         hhrtim->Compare2EventCallback = pCallback;
7280         break;
7281 
7282       case HAL_HRTIM_COMPARE3EVENTCALLBACK_CB_ID :
7283         hhrtim->Compare3EventCallback = pCallback;
7284         break;
7285 
7286       case HAL_HRTIM_COMPARE4EVENTCALLBACK_CB_ID :
7287         hhrtim->Compare4EventCallback = pCallback;
7288         break;
7289 
7290       case HAL_HRTIM_CAPTURE1EVENTCALLBACK_CB_ID :
7291         hhrtim->Capture1EventCallback = pCallback;
7292         break;
7293 
7294       case HAL_HRTIM_CAPTURE2EVENTCALLBACK_CB_ID :
7295         hhrtim->Capture2EventCallback = pCallback;
7296         break;
7297 
7298       case HAL_HRTIM_DELAYEDPROTECTIONCALLBACK_CB_ID :
7299         hhrtim->DelayedProtectionCallback = pCallback;
7300         break;
7301 
7302       case HAL_HRTIM_COUNTERRESETCALLBACK_CB_ID :
7303         hhrtim->CounterResetCallback = pCallback;
7304         break;
7305 
7306       case HAL_HRTIM_OUTPUT1SETCALLBACK_CB_ID :
7307         hhrtim->Output1SetCallback = pCallback;
7308         break;
7309 
7310       case HAL_HRTIM_OUTPUT1RESETCALLBACK_CB_ID :
7311         hhrtim->Output1ResetCallback = pCallback;
7312         break;
7313 
7314       case HAL_HRTIM_OUTPUT2SETCALLBACK_CB_ID :
7315         hhrtim->Output2SetCallback = pCallback;
7316         break;
7317 
7318       case HAL_HRTIM_OUTPUT2RESETCALLBACK_CB_ID :
7319         hhrtim->Output2ResetCallback = pCallback;
7320         break;
7321 
7322       case HAL_HRTIM_BURSTDMATRANSFERCALLBACK_CB_ID :
7323         hhrtim->BurstDMATransferCallback = pCallback;
7324         break;
7325 
7326     default :
7327         /* Update the state */
7328         hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
7329 
7330         /* Return error status */
7331         status = HAL_ERROR;
7332         break;
7333     }
7334   }
7335   else
7336   {
7337     /* Update the state */
7338     hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
7339 
7340     /* Return error status */
7341     status = HAL_ERROR;
7342   }
7343 
7344   /* Release Lock */
7345   __HAL_UNLOCK(hhrtim);
7346 
7347   return status;
7348 }
7349 
7350 /**
7351   * @brief  HRTIM Timer x callback function un-registration
7352   * @param  hhrtim pointer to HAL HRTIM handle
7353   * @param  CallbackID ID of the HRTIM callback Timer x function to unregister
7354   *                   This parameter can be one of the following values:
7355   *                   @arg HAL_HRTIM_REGISTERSUPDATECALLBACK_CB_ID
7356   *                   @arg HAL_HRTIM_REPETITIONEVENTCALLBACK_CB_ID
7357   *                   @arg HAL_HRTIM_COMPARE1EVENTCALLBACK_CB_ID
7358   *                   @arg HAL_HRTIM_COMPARE2EVENTCALLBACK_CB_ID
7359   *                   @arg HAL_HRTIM_COMPARE3EVENTCALLBACK_CB_ID
7360   *                   @arg HAL_HRTIM_COMPARE4EVENTCALLBACK_CB_ID
7361   *                   @arg HAL_HRTIM_CAPTURE1EVENTCALLBACK_CB_ID
7362   *                   @arg HAL_HRTIM_CAPTURE2EVENTCALLBACK_CB_ID
7363   *                   @arg HAL_HRTIM_DELAYEDPROTECTIONCALLBACK_CB_ID
7364   *                   @arg HAL_HRTIM_COUNTERRESETCALLBACK_CB_ID
7365   *                   @arg HAL_HRTIM_OUTPUT1SETCALLBACK_CB_ID
7366   *                   @arg HAL_HRTIM_OUTPUT1RESETCALLBACK_CB_ID
7367   *                   @arg HAL_HRTIM_OUTPUT2SETCALLBACK_CB_ID
7368   *                   @arg HAL_HRTIM_OUTPUT2RESETCALLBACK_CB_ID
7369   *                   @arg HAL_HRTIM_BURSTDMATRANSFERCALLBACK_CB_ID
7370   * @retval HAL status
7371   */
7372 HAL_StatusTypeDef HAL_HRTIM_TIMxUnRegisterCallback(HRTIM_HandleTypeDef * hhrtim,
7373                                                    HAL_HRTIM_CallbackIDTypeDef CallbackID)
7374 {
7375   HAL_StatusTypeDef status = HAL_OK;
7376 
7377   /* Process locked */
7378   __HAL_LOCK(hhrtim);
7379 
7380   if (HAL_HRTIM_STATE_READY == hhrtim->State)
7381   {
7382     switch (CallbackID)
7383     {
7384       case HAL_HRTIM_REGISTERSUPDATECALLBACK_CB_ID :
7385         hhrtim->RegistersUpdateCallback = HAL_HRTIM_RegistersUpdateCallback;
7386         break;
7387 
7388       case HAL_HRTIM_REPETITIONEVENTCALLBACK_CB_ID :
7389         hhrtim->RepetitionEventCallback = HAL_HRTIM_RepetitionEventCallback;
7390         break;
7391 
7392       case HAL_HRTIM_COMPARE1EVENTCALLBACK_CB_ID :
7393         hhrtim->Compare1EventCallback = HAL_HRTIM_Compare1EventCallback;
7394         break;
7395 
7396       case HAL_HRTIM_COMPARE2EVENTCALLBACK_CB_ID :
7397         hhrtim->Compare2EventCallback = HAL_HRTIM_Compare2EventCallback;
7398         break;
7399 
7400       case HAL_HRTIM_COMPARE3EVENTCALLBACK_CB_ID :
7401         hhrtim->Compare3EventCallback = HAL_HRTIM_Compare3EventCallback;
7402         break;
7403 
7404       case HAL_HRTIM_COMPARE4EVENTCALLBACK_CB_ID :
7405         hhrtim->Compare4EventCallback = HAL_HRTIM_Compare4EventCallback;
7406         break;
7407 
7408       case HAL_HRTIM_CAPTURE1EVENTCALLBACK_CB_ID :
7409         hhrtim->Capture1EventCallback = HAL_HRTIM_Capture1EventCallback;
7410         break;
7411 
7412       case HAL_HRTIM_CAPTURE2EVENTCALLBACK_CB_ID :
7413         hhrtim->Capture2EventCallback = HAL_HRTIM_Capture2EventCallback;
7414         break;
7415 
7416       case HAL_HRTIM_DELAYEDPROTECTIONCALLBACK_CB_ID :
7417         hhrtim->DelayedProtectionCallback = HAL_HRTIM_DelayedProtectionCallback;
7418         break;
7419 
7420       case HAL_HRTIM_COUNTERRESETCALLBACK_CB_ID :
7421         hhrtim->CounterResetCallback = HAL_HRTIM_CounterResetCallback;
7422         break;
7423 
7424       case HAL_HRTIM_OUTPUT1SETCALLBACK_CB_ID :
7425         hhrtim->Output1SetCallback = HAL_HRTIM_Output1SetCallback;
7426         break;
7427 
7428       case HAL_HRTIM_OUTPUT1RESETCALLBACK_CB_ID :
7429         hhrtim->Output1ResetCallback = HAL_HRTIM_Output1ResetCallback;
7430         break;
7431 
7432       case HAL_HRTIM_OUTPUT2SETCALLBACK_CB_ID :
7433         hhrtim->Output2SetCallback = HAL_HRTIM_Output2SetCallback;
7434         break;
7435 
7436       case HAL_HRTIM_OUTPUT2RESETCALLBACK_CB_ID :
7437         hhrtim->Output2ResetCallback = HAL_HRTIM_Output2ResetCallback;
7438         break;
7439 
7440       case HAL_HRTIM_BURSTDMATRANSFERCALLBACK_CB_ID :
7441         hhrtim->BurstDMATransferCallback = HAL_HRTIM_BurstDMATransferCallback;
7442         break;
7443 
7444     default :
7445         /* Update the state */
7446         hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
7447 
7448         /* Return error status */
7449         status = HAL_ERROR;
7450         break;
7451     }
7452   }
7453   else
7454   {
7455     /* Update the state */
7456     hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
7457 
7458     /* Return error status */
7459     status = HAL_ERROR;
7460   }
7461 
7462   /* Release Lock */
7463   __HAL_UNLOCK(hhrtim);
7464 
7465   return status;
7466 }
7467 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
7468 /**
7469   * @}
7470   */
7471 
7472 /**
7473   * @}
7474   */
7475 
7476 /** @addtogroup HRTIM_Private_Functions
7477   * @{
7478   */
7479 
7480 /**
7481   * @brief  Configure the master timer time base
7482   * @param  hhrtim pointer to HAL HRTIM handle
7483   * @param  pTimeBaseCfg pointer to the time base configuration structure
7484   * @retval None
7485   */
7486 static void HRTIM_MasterBase_Config(HRTIM_HandleTypeDef * hhrtim,
7487                                     const HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg)
7488 {
7489   uint32_t hrtim_mcr;
7490 
7491   /* Configure master timer */
7492   hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
7493 
7494   /* Set the prescaler ratio */
7495   hrtim_mcr &= (uint32_t) ~(HRTIM_MCR_CK_PSC);
7496   hrtim_mcr |= (uint32_t)pTimeBaseCfg->PrescalerRatio;
7497 
7498   /* Set the operating mode */
7499   hrtim_mcr &= (uint32_t) ~(HRTIM_MCR_CONT | HRTIM_MCR_RETRIG);
7500   hrtim_mcr |= (uint32_t)pTimeBaseCfg->Mode;
7501 
7502   /* Update the HRTIM registers */
7503   hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
7504   hhrtim->Instance->sMasterRegs.MPER = pTimeBaseCfg->Period;
7505   hhrtim->Instance->sMasterRegs.MREP = pTimeBaseCfg->RepetitionCounter;
7506 }
7507 
7508 /**
7509   * @brief  Configure timing unit (Timer A to Timer E) time base
7510   * @param  hhrtim pointer to HAL HRTIM handle
7511   * @param  TimerIdx Timer index
7512   * @param  pTimeBaseCfg pointer to the time base configuration structure
7513   * @retval None
7514   */
7515 static void HRTIM_TimingUnitBase_Config(HRTIM_HandleTypeDef * hhrtim,
7516                                         uint32_t TimerIdx ,
7517                                         const HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg)
7518 {
7519   uint32_t hrtim_timcr;
7520 
7521   /* Configure master timing unit */
7522   hrtim_timcr = hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR;
7523 
7524   /* Set the prescaler ratio */
7525   hrtim_timcr &= (uint32_t) ~(HRTIM_TIMCR_CK_PSC);
7526   hrtim_timcr |= (uint32_t)pTimeBaseCfg->PrescalerRatio;
7527 
7528   /* Set the operating mode */
7529   hrtim_timcr &= (uint32_t) ~(HRTIM_TIMCR_CONT | HRTIM_TIMCR_RETRIG);
7530   hrtim_timcr |= (uint32_t)pTimeBaseCfg->Mode;
7531 
7532   /* Update the HRTIM registers */
7533   hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR = hrtim_timcr;
7534   hhrtim->Instance->sTimerxRegs[TimerIdx].PERxR = pTimeBaseCfg->Period;
7535   hhrtim->Instance->sTimerxRegs[TimerIdx].REPxR = pTimeBaseCfg->RepetitionCounter;
7536 }
7537 
7538 /**
7539   * @brief  Configure the master timer in waveform mode
7540   * @param  hhrtim pointer to HAL HRTIM handle
7541   * @param  pTimerCfg pointer to the timer configuration data structure
7542   * @retval None
7543   */
7544 static void HRTIM_MasterWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
7545                                         const HRTIM_TimerCfgTypeDef * pTimerCfg)
7546 {
7547   uint32_t hrtim_mcr;
7548   uint32_t hrtim_bmcr;
7549 
7550   /* Configure master timer */
7551   hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
7552   hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;
7553 
7554   /* Enable/Disable the half mode */
7555   hrtim_mcr &= ~(HRTIM_MCR_HALF);
7556   hrtim_mcr |= pTimerCfg->HalfModeEnable;
7557 
7558   /* Enable/Disable the timer start upon synchronization event reception */
7559   hrtim_mcr &= ~(HRTIM_MCR_SYNCSTRTM);
7560   hrtim_mcr |= pTimerCfg->StartOnSync;
7561 
7562   /* Enable/Disable the timer reset upon synchronization event reception */
7563   hrtim_mcr &= ~(HRTIM_MCR_SYNCRSTM);
7564   hrtim_mcr |= pTimerCfg->ResetOnSync;
7565 
7566   /* Enable/Disable the DAC synchronization event generation */
7567   hrtim_mcr &= ~(HRTIM_MCR_DACSYNC);
7568   hrtim_mcr |= pTimerCfg->DACSynchro;
7569 
7570   /* Enable/Disable preload mechanism for timer registers */
7571   hrtim_mcr &= ~(HRTIM_MCR_PREEN);
7572   hrtim_mcr |= pTimerCfg->PreloadEnable;
7573 
7574   /* Master timer registers update handling */
7575   hrtim_mcr &= ~(HRTIM_MCR_BRSTDMA);
7576   hrtim_mcr |= (pTimerCfg->UpdateGating << 2U);
7577 
7578   /* Enable/Disable registers update on repetition */
7579   hrtim_mcr &= ~(HRTIM_MCR_MREPU);
7580   hrtim_mcr |= pTimerCfg->RepetitionUpdate;
7581 
7582   /* Set the timer burst mode */
7583   hrtim_bmcr &= ~(HRTIM_BMCR_MTBM);
7584   hrtim_bmcr |= pTimerCfg->BurstMode;
7585 
7586   /* Update the HRTIM registers */
7587   hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
7588   hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;
7589 }
7590 
7591 /**
7592   * @brief  Configure timing unit (Timer A to Timer E) in waveform mode
7593   * @param  hhrtim pointer to HAL HRTIM handle
7594   * @param  TimerIdx Timer index
7595   * @param  pTimerCfg pointer to the timer configuration data structure
7596   * @retval None
7597   */
7598 static void  HRTIM_TimingUnitWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
7599                                              uint32_t TimerIdx,
7600                                              const HRTIM_TimerCfgTypeDef * pTimerCfg)
7601 {
7602   uint32_t hrtim_timcr;
7603   uint32_t hrtim_timfltr;
7604   uint32_t hrtim_timoutr;
7605   uint32_t hrtim_timrstr;
7606   uint32_t hrtim_bmcr;
7607 
7608   /* UPDGAT bitfield must be reset before programming a new value */
7609   hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR &= ~(HRTIM_TIMCR_UPDGAT);
7610 
7611   /* Configure timing unit (Timer A to Timer E) */
7612   hrtim_timcr = hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR;
7613   hrtim_timfltr = hhrtim->Instance->sTimerxRegs[TimerIdx].FLTxR;
7614   hrtim_timoutr = hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR;
7615   hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;
7616 
7617   /* Enable/Disable the half mode */
7618   hrtim_timcr &= ~(HRTIM_TIMCR_HALF);
7619   hrtim_timcr |= pTimerCfg->HalfModeEnable;
7620 
7621   /* Enable/Disable the timer start upon synchronization event reception */
7622   hrtim_timcr &= ~(HRTIM_TIMCR_SYNCSTRT);
7623   hrtim_timcr |= pTimerCfg->StartOnSync;
7624 
7625   /* Enable/Disable the timer reset upon synchronization event reception */
7626   hrtim_timcr &= ~(HRTIM_TIMCR_SYNCRST);
7627   hrtim_timcr |= pTimerCfg->ResetOnSync;
7628 
7629   /* Enable/Disable the DAC synchronization event generation */
7630   hrtim_timcr &= ~(HRTIM_TIMCR_DACSYNC);
7631   hrtim_timcr |= pTimerCfg->DACSynchro;
7632 
7633   /* Enable/Disable preload mechanism for timer registers */
7634   hrtim_timcr &= ~(HRTIM_TIMCR_PREEN);
7635   hrtim_timcr |= pTimerCfg->PreloadEnable;
7636 
7637   /* Timing unit registers update handling */
7638   hrtim_timcr &= ~(HRTIM_TIMCR_UPDGAT);
7639   hrtim_timcr |= pTimerCfg->UpdateGating;
7640 
7641   /* Enable/Disable registers update on repetition */
7642   hrtim_timcr &= ~(HRTIM_TIMCR_TREPU);
7643   if (pTimerCfg->RepetitionUpdate == HRTIM_UPDATEONREPETITION_ENABLED)
7644   {
7645     hrtim_timcr |= HRTIM_TIMCR_TREPU;
7646   }
7647 
7648   /* Set the push-pull mode */
7649   hrtim_timcr &= ~(HRTIM_TIMCR_PSHPLL);
7650   hrtim_timcr |= pTimerCfg->PushPull;
7651 
7652   /* Enable/Disable registers update on timer counter reset */
7653   hrtim_timcr &= ~(HRTIM_TIMCR_TRSTU);
7654   hrtim_timcr |= pTimerCfg->ResetUpdate;
7655 
7656   /* Set the timer update trigger */
7657   hrtim_timcr &= ~(HRTIM_TIMCR_TIMUPDATETRIGGER);
7658   hrtim_timcr |= pTimerCfg->UpdateTrigger;
7659 
7660   /* Enable/Disable the fault channel at timer level */
7661   hrtim_timfltr &= ~(HRTIM_FLTR_FLTxEN);
7662   hrtim_timfltr |= (pTimerCfg->FaultEnable & HRTIM_FLTR_FLTxEN);
7663 
7664   /* Lock/Unlock fault sources at timer level */
7665   hrtim_timfltr &= ~(HRTIM_FLTR_FLTLCK);
7666   hrtim_timfltr |= pTimerCfg->FaultLock;
7667 
7668   /* The deadtime cannot be used simultaneously with the push-pull mode */
7669   if (pTimerCfg->PushPull == HRTIM_TIMPUSHPULLMODE_DISABLED)
7670   {
7671     /* Enable/Disable dead time insertion at timer level */
7672     hrtim_timoutr &= ~(HRTIM_OUTR_DTEN);
7673     hrtim_timoutr |= pTimerCfg->DeadTimeInsertion;
7674   }
7675 
7676   /* Enable/Disable delayed protection at timer level
7677      Delayed Idle is available whatever the timer operating mode (regular, push-pull)
7678      Balanced Idle is only available in push-pull mode
7679   */
7680   if ( ((pTimerCfg->DelayedProtectionMode != HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6)
7681        && (pTimerCfg->DelayedProtectionMode != HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7))
7682        || (pTimerCfg->PushPull == HRTIM_TIMPUSHPULLMODE_ENABLED))
7683   {
7684     hrtim_timoutr &= ~(HRTIM_OUTR_DLYPRT| HRTIM_OUTR_DLYPRTEN);
7685     hrtim_timoutr |= pTimerCfg->DelayedProtectionMode;
7686   }
7687 
7688   /* Set the timer counter reset trigger */
7689   hrtim_timrstr = pTimerCfg->ResetTrigger;
7690 
7691   /* Set the timer burst mode */
7692   switch (TimerIdx)
7693   {
7694   case HRTIM_TIMERINDEX_TIMER_A:
7695     {
7696       hrtim_bmcr &= ~(HRTIM_BMCR_TABM);
7697       hrtim_bmcr |= ( pTimerCfg->BurstMode << 1U);
7698       break;
7699     }
7700 
7701   case HRTIM_TIMERINDEX_TIMER_B:
7702     {
7703       hrtim_bmcr &= ~(HRTIM_BMCR_TBBM);
7704       hrtim_bmcr |= ( pTimerCfg->BurstMode << 2U);
7705       break;
7706     }
7707 
7708   case HRTIM_TIMERINDEX_TIMER_C:
7709     {
7710       hrtim_bmcr &= ~(HRTIM_BMCR_TCBM);
7711       hrtim_bmcr |= ( pTimerCfg->BurstMode << 3U);
7712       break;
7713     }
7714 
7715   case HRTIM_TIMERINDEX_TIMER_D:
7716     {
7717       hrtim_bmcr &= ~(HRTIM_BMCR_TDBM);
7718       hrtim_bmcr |= ( pTimerCfg->BurstMode << 4U);
7719       break;
7720     }
7721 
7722   case HRTIM_TIMERINDEX_TIMER_E:
7723     {
7724       hrtim_bmcr &= ~(HRTIM_BMCR_TEBM);
7725       hrtim_bmcr |= ( pTimerCfg->BurstMode << 5U);
7726       break;
7727     }
7728 
7729   default:
7730     break;
7731   }
7732 
7733   /* Update the HRTIM registers */
7734   hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR = hrtim_timcr;
7735   hhrtim->Instance->sTimerxRegs[TimerIdx].FLTxR = hrtim_timfltr;
7736   hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR = hrtim_timoutr;
7737   hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = hrtim_timrstr;
7738   hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;
7739 }
7740 
7741 /**
7742   * @brief  Configure a capture unit
7743   * @param  hhrtim pointer to HAL HRTIM handle
7744   * @param  TimerIdx Timer index
7745   * @param  CaptureUnit Capture unit identifier
7746   * @param  Event Event reference
7747   * @retval None
7748   */
7749 static void HRTIM_CaptureUnitConfig(HRTIM_HandleTypeDef * hhrtim,
7750                                     uint32_t TimerIdx,
7751                                     uint32_t CaptureUnit,
7752                                     uint32_t Event)
7753 {
7754   uint32_t CaptureTrigger = 0xFFFFFFFFU;
7755 
7756   switch (Event)
7757   {
7758   case HRTIM_EVENT_1:
7759     {
7760       CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_1;
7761       break;
7762     }
7763 
7764   case HRTIM_EVENT_2:
7765     {
7766       CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_2;
7767       break;
7768     }
7769 
7770   case HRTIM_EVENT_3:
7771     {
7772       CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_3;
7773       break;
7774     }
7775 
7776   case HRTIM_EVENT_4:
7777     {
7778       CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_4;
7779       break;
7780     }
7781 
7782   case HRTIM_EVENT_5:
7783     {
7784       CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_5;
7785       break;
7786     }
7787 
7788   case HRTIM_EVENT_6:
7789     {
7790       CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_6;
7791       break;
7792     }
7793 
7794   case HRTIM_EVENT_7:
7795     {
7796       CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_7;
7797       break;
7798     }
7799 
7800   case HRTIM_EVENT_8:
7801     {
7802       CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_8;
7803       break;
7804     }
7805 
7806   case HRTIM_EVENT_9:
7807     {
7808       CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_9;
7809       break;
7810     }
7811 
7812   case HRTIM_EVENT_10:
7813     {
7814       CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_10;
7815       break;
7816     }
7817 
7818   default:
7819     break;
7820   }
7821 
7822   switch (CaptureUnit)
7823   {
7824   case HRTIM_CAPTUREUNIT_1:
7825     {
7826       hhrtim->TimerParam[TimerIdx].CaptureTrigger1 = CaptureTrigger;
7827       break;
7828     }
7829 
7830   case HRTIM_CAPTUREUNIT_2:
7831     {
7832       hhrtim->TimerParam[TimerIdx].CaptureTrigger2 = CaptureTrigger;
7833       break;
7834     }
7835 
7836   default:
7837     break;
7838   }
7839 }
7840 
7841 /**
7842   * @brief  Configure the output of a timing unit
7843   * @param  hhrtim pointer to HAL HRTIM handle
7844   * @param  TimerIdx Timer index
7845   * @param  Output timing unit output identifier
7846   * @param  pOutputCfg pointer to the output configuration data structure
7847   * @retval None
7848   */
7849 static void  HRTIM_OutputConfig(HRTIM_HandleTypeDef * hhrtim,
7850                                 uint32_t TimerIdx,
7851                                 uint32_t Output,
7852                                 const HRTIM_OutputCfgTypeDef * pOutputCfg)
7853 {
7854   uint32_t hrtim_outr;
7855   uint32_t hrtim_dtr;
7856 
7857   uint32_t shift = 0U;
7858 
7859   hrtim_outr = hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR;
7860   hrtim_dtr = hhrtim->Instance->sTimerxRegs[TimerIdx].DTxR;
7861 
7862   switch (Output)
7863   {
7864   case HRTIM_OUTPUT_TA1:
7865   case HRTIM_OUTPUT_TB1:
7866   case HRTIM_OUTPUT_TC1:
7867   case HRTIM_OUTPUT_TD1:
7868   case HRTIM_OUTPUT_TE1:
7869     {
7870       /* Set the output set/reset crossbar */
7871       hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R = pOutputCfg->SetSource;
7872       hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R = pOutputCfg->ResetSource;
7873       break;
7874     }
7875 
7876   case HRTIM_OUTPUT_TA2:
7877   case HRTIM_OUTPUT_TB2:
7878   case HRTIM_OUTPUT_TC2:
7879   case HRTIM_OUTPUT_TD2:
7880   case HRTIM_OUTPUT_TE2:
7881     {
7882       /* Set the output set/reset crossbar */
7883       hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R = pOutputCfg->SetSource;
7884       hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R = pOutputCfg->ResetSource;
7885       shift = 16U;
7886       break;
7887     }
7888 
7889   default:
7890     break;
7891   }
7892 
7893   /* Clear output config */
7894   hrtim_outr &= ~((HRTIM_OUTR_POL1 |
7895                    HRTIM_OUTR_IDLM1 |
7896                    HRTIM_OUTR_IDLES1|
7897                    HRTIM_OUTR_FAULT1|
7898                    HRTIM_OUTR_CHP1 |
7899                    HRTIM_OUTR_DIDL1) << shift);
7900 
7901   /* Set the polarity */
7902   hrtim_outr |= (pOutputCfg->Polarity << shift);
7903 
7904   /* Set the IDLE mode */
7905   hrtim_outr |= (pOutputCfg->IdleMode << shift);
7906 
7907   /* Set the IDLE state */
7908   hrtim_outr |= (pOutputCfg->IdleLevel << shift);
7909 
7910   /* Set the FAULT state */
7911   hrtim_outr |= (pOutputCfg->FaultLevel << shift);
7912 
7913   /* Set the chopper mode */
7914   hrtim_outr |= (pOutputCfg->ChopperModeEnable << shift);
7915 
7916   /* Set the burst mode entry mode : deadtime insertion when entering the idle
7917      state during a burst mode operation is allowed only under the following
7918      conditions:
7919      - the outputs is active during the burst mode (IDLES=1U)
7920      - positive deadtimes (SDTR/SDTF set to 0U)
7921   */
7922   if ((pOutputCfg->IdleLevel == HRTIM_OUTPUTIDLELEVEL_ACTIVE) &&
7923       ((hrtim_dtr & HRTIM_DTR_SDTR) == (uint32_t)RESET) &&
7924       ((hrtim_dtr & HRTIM_DTR_SDTF) == (uint32_t)RESET))
7925   {
7926     hrtim_outr |= (pOutputCfg->BurstModeEntryDelayed << shift);
7927   }
7928 
7929   /* Update HRTIM register */
7930   hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR = hrtim_outr;
7931 }
7932 
7933 /**
7934   * @brief  Configure an external event channel
7935   * @param  hhrtim pointer to HAL HRTIM handle
7936   * @param  Event Event channel identifier
7937   * @param  pEventCfg pointer to the event channel configuration data structure
7938   * @retval None
7939   */
7940 static void HRTIM_EventConfig(HRTIM_HandleTypeDef * hhrtim,
7941                               uint32_t Event,
7942                               const HRTIM_EventCfgTypeDef *pEventCfg)
7943 {
7944   uint32_t hrtim_eecr1;
7945   uint32_t hrtim_eecr2;
7946   uint32_t hrtim_eecr3;
7947 
7948   /* Configure external event channel */
7949   hrtim_eecr1 = hhrtim->Instance->sCommonRegs.EECR1;
7950   hrtim_eecr2 = hhrtim->Instance->sCommonRegs.EECR2;
7951   hrtim_eecr3 = hhrtim->Instance->sCommonRegs.EECR3;
7952 
7953   switch (Event)
7954   {
7955   case HRTIM_EVENT_NONE:
7956     {
7957       /* Update the HRTIM registers */
7958       hhrtim->Instance->sCommonRegs.EECR1 = 0U;
7959       hhrtim->Instance->sCommonRegs.EECR2 = 0U;
7960       hhrtim->Instance->sCommonRegs.EECR3 = 0U;
7961       break;
7962     }
7963 
7964   case HRTIM_EVENT_1:
7965     {
7966       hrtim_eecr1 &= ~(HRTIM_EECR1_EE1SRC | HRTIM_EECR1_EE1POL | HRTIM_EECR1_EE1SNS | HRTIM_EECR1_EE1FAST);
7967       hrtim_eecr1 |= (pEventCfg->Source & HRTIM_EECR1_EE1SRC);
7968       hrtim_eecr1 |= (pEventCfg->Polarity & HRTIM_EECR1_EE1POL);
7969       hrtim_eecr1 |= (pEventCfg->Sensitivity & HRTIM_EECR1_EE1SNS);
7970       /* Update the HRTIM registers (all bitfields but EE1FAST bit) */
7971       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
7972       /* Update the HRTIM registers (EE1FAST bit) */
7973       hrtim_eecr1 |= (pEventCfg->FastMode  & HRTIM_EECR1_EE1FAST);
7974       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
7975       break;
7976     }
7977 
7978   case HRTIM_EVENT_2:
7979     {
7980       hrtim_eecr1 &= ~(HRTIM_EECR1_EE2SRC | HRTIM_EECR1_EE2POL | HRTIM_EECR1_EE2SNS | HRTIM_EECR1_EE2FAST);
7981       hrtim_eecr1 |= ((pEventCfg->Source << 6U) & HRTIM_EECR1_EE2SRC);
7982       hrtim_eecr1 |= ((pEventCfg->Polarity << 6U) & HRTIM_EECR1_EE2POL);
7983       hrtim_eecr1 |= ((pEventCfg->Sensitivity << 6U) & HRTIM_EECR1_EE2SNS);
7984       /* Update the HRTIM registers (all bitfields but EE2FAST bit) */
7985       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
7986       /* Update the HRTIM registers (EE2FAST bit) */
7987       hrtim_eecr1 |= ((pEventCfg->FastMode << 6U) & HRTIM_EECR1_EE2FAST);
7988       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
7989       break;
7990     }
7991 
7992   case HRTIM_EVENT_3:
7993     {
7994       hrtim_eecr1 &= ~(HRTIM_EECR1_EE3SRC | HRTIM_EECR1_EE3POL | HRTIM_EECR1_EE3SNS | HRTIM_EECR1_EE3FAST);
7995       hrtim_eecr1 |= ((pEventCfg->Source << 12U) & HRTIM_EECR1_EE3SRC);
7996       hrtim_eecr1 |= ((pEventCfg->Polarity << 12U) & HRTIM_EECR1_EE3POL);
7997       hrtim_eecr1 |= ((pEventCfg->Sensitivity << 12U) & HRTIM_EECR1_EE3SNS);
7998       /* Update the HRTIM registers (all bitfields but EE3FAST bit) */
7999       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
8000       /* Update the HRTIM registers (EE3FAST bit) */
8001       hrtim_eecr1 |= ((pEventCfg->FastMode << 12U) & HRTIM_EECR1_EE3FAST);
8002       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
8003       break;
8004     }
8005 
8006   case HRTIM_EVENT_4:
8007     {
8008       hrtim_eecr1 &= ~(HRTIM_EECR1_EE4SRC | HRTIM_EECR1_EE4POL | HRTIM_EECR1_EE4SNS | HRTIM_EECR1_EE4FAST);
8009       hrtim_eecr1 |= ((pEventCfg->Source << 18U) & HRTIM_EECR1_EE4SRC);
8010       hrtim_eecr1 |= ((pEventCfg->Polarity << 18U) & HRTIM_EECR1_EE4POL);
8011       hrtim_eecr1 |= ((pEventCfg->Sensitivity << 18U) & HRTIM_EECR1_EE4SNS);
8012       /* Update the HRTIM registers (all bitfields but EE4FAST bit) */
8013       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
8014       /* Update the HRTIM registers (EE4FAST bit) */
8015       hrtim_eecr1 |= ((pEventCfg->FastMode << 18U) & HRTIM_EECR1_EE4FAST);
8016       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
8017       break;
8018     }
8019 
8020   case HRTIM_EVENT_5:
8021     {
8022       hrtim_eecr1 &= ~(HRTIM_EECR1_EE5SRC | HRTIM_EECR1_EE5POL | HRTIM_EECR1_EE5SNS | HRTIM_EECR1_EE5FAST);
8023       hrtim_eecr1 |= ((pEventCfg->Source << 24U) & HRTIM_EECR1_EE5SRC);
8024       hrtim_eecr1 |= ((pEventCfg->Polarity << 24U) & HRTIM_EECR1_EE5POL);
8025       hrtim_eecr1 |= ((pEventCfg->Sensitivity << 24U) & HRTIM_EECR1_EE5SNS);
8026       /* Update the HRTIM registers (all bitfields but EE5FAST bit) */
8027       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
8028       /* Update the HRTIM registers (EE5FAST bit) */
8029       hrtim_eecr1 |= ((pEventCfg->FastMode << 24U) & HRTIM_EECR1_EE5FAST);
8030       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
8031       break;
8032     }
8033 
8034   case HRTIM_EVENT_6:
8035     {
8036       hrtim_eecr2 &= ~(HRTIM_EECR2_EE6SRC | HRTIM_EECR2_EE6POL | HRTIM_EECR2_EE6SNS);
8037       hrtim_eecr2 |= (pEventCfg->Source & HRTIM_EECR2_EE6SRC);
8038       hrtim_eecr2 |= (pEventCfg->Polarity & HRTIM_EECR2_EE6POL);
8039       hrtim_eecr2 |= (pEventCfg->Sensitivity & HRTIM_EECR2_EE6SNS);
8040       hrtim_eecr3 &= ~(HRTIM_EECR3_EE6F);
8041       hrtim_eecr3 |= (pEventCfg->Filter & HRTIM_EECR3_EE6F);
8042       /* Update the HRTIM registers */
8043       hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
8044       hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
8045       break;
8046     }
8047 
8048   case HRTIM_EVENT_7:
8049     {
8050       hrtim_eecr2 &= ~(HRTIM_EECR2_EE7SRC | HRTIM_EECR2_EE7POL | HRTIM_EECR2_EE7SNS);
8051       hrtim_eecr2 |= ((pEventCfg->Source << 6U) & HRTIM_EECR2_EE7SRC);
8052       hrtim_eecr2 |= ((pEventCfg->Polarity << 6U) & HRTIM_EECR2_EE7POL);
8053       hrtim_eecr2 |= ((pEventCfg->Sensitivity << 6U) & HRTIM_EECR2_EE7SNS);
8054       hrtim_eecr3 &= ~(HRTIM_EECR3_EE7F);
8055       hrtim_eecr3 |= ((pEventCfg->Filter << 6U) & HRTIM_EECR3_EE7F);
8056       /* Update the HRTIM registers */
8057       hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
8058       hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
8059       break;
8060     }
8061 
8062   case HRTIM_EVENT_8:
8063     {
8064       hrtim_eecr2 &= ~(HRTIM_EECR2_EE8SRC | HRTIM_EECR2_EE8POL | HRTIM_EECR2_EE8SNS);
8065       hrtim_eecr2 |= ((pEventCfg->Source << 12U) & HRTIM_EECR2_EE8SRC);
8066       hrtim_eecr2 |= ((pEventCfg->Polarity << 12U) & HRTIM_EECR2_EE8POL);
8067       hrtim_eecr2 |= ((pEventCfg->Sensitivity << 12U) & HRTIM_EECR2_EE8SNS);
8068       hrtim_eecr3 &= ~(HRTIM_EECR3_EE8F);
8069       hrtim_eecr3 |= ((pEventCfg->Filter << 12U) & HRTIM_EECR3_EE8F );
8070       /* Update the HRTIM registers */
8071       hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
8072       hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
8073       break;
8074     }
8075 
8076   case HRTIM_EVENT_9:
8077     {
8078       hrtim_eecr2 &= ~(HRTIM_EECR2_EE9SRC | HRTIM_EECR2_EE9POL | HRTIM_EECR2_EE9SNS);
8079       hrtim_eecr2 |= ((pEventCfg->Source << 18U) & HRTIM_EECR2_EE9SRC);
8080       hrtim_eecr2 |= ((pEventCfg->Polarity << 18U) & HRTIM_EECR2_EE9POL);
8081       hrtim_eecr2 |= ((pEventCfg->Sensitivity << 18U) & HRTIM_EECR2_EE9SNS);
8082       hrtim_eecr3 &= ~(HRTIM_EECR3_EE9F);
8083       hrtim_eecr3 |= ((pEventCfg->Filter << 18U) & HRTIM_EECR3_EE9F);
8084       /* Update the HRTIM registers */
8085       hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
8086       hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
8087       break;
8088     }
8089 
8090   case HRTIM_EVENT_10:
8091     {
8092       hrtim_eecr2 &= ~(HRTIM_EECR2_EE10SRC | HRTIM_EECR2_EE10POL | HRTIM_EECR2_EE10SNS);
8093       hrtim_eecr2 |= ((pEventCfg->Source << 24U) & HRTIM_EECR2_EE10SRC);
8094       hrtim_eecr2 |= ((pEventCfg->Polarity << 24U) & HRTIM_EECR2_EE10POL);
8095       hrtim_eecr2 |= ((pEventCfg->Sensitivity << 24U) & HRTIM_EECR2_EE10SNS);
8096       hrtim_eecr3 &= ~(HRTIM_EECR3_EE10F);
8097       hrtim_eecr3 |= ((pEventCfg->Filter << 24U) & HRTIM_EECR3_EE10F);
8098       /* Update the HRTIM registers */
8099       hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
8100       hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
8101       break;
8102     }
8103 
8104   default:
8105     break;
8106   }
8107 }
8108 
8109 /**
8110   * @brief  Configure the timer counter reset
8111   * @param  hhrtim pointer to HAL HRTIM handle
8112   * @param  TimerIdx Timer index
8113   * @param  Event Event channel identifier
8114   * @retval None
8115   */
8116 static void HRTIM_TIM_ResetConfig(HRTIM_HandleTypeDef * hhrtim,
8117                                   uint32_t TimerIdx,
8118                                   uint32_t Event)
8119 {
8120   switch (Event)
8121   {
8122   case HRTIM_EVENT_1:
8123     {
8124       hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_1;
8125       break;
8126     }
8127 
8128   case HRTIM_EVENT_2:
8129     {
8130       hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_2;
8131       break;
8132     }
8133 
8134   case HRTIM_EVENT_3:
8135     {
8136       hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_3;
8137       break;
8138     }
8139 
8140   case HRTIM_EVENT_4:
8141     {
8142       hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_4;
8143       break;
8144     }
8145 
8146   case HRTIM_EVENT_5:
8147     {
8148       hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_5;
8149       break;
8150     }
8151 
8152   case HRTIM_EVENT_6:
8153     {
8154       hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_6;
8155       break;
8156     }
8157 
8158   case HRTIM_EVENT_7:
8159     {
8160       hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_7;
8161       break;
8162     }
8163 
8164   case HRTIM_EVENT_8:
8165     {
8166       hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_8;
8167       break;
8168     }
8169 
8170   case HRTIM_EVENT_9:
8171     {
8172       hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_9;
8173       break;
8174     }
8175 
8176   case HRTIM_EVENT_10:
8177     {
8178       hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_10;
8179       break;
8180     }
8181 
8182   default:
8183     break;
8184   }
8185 }
8186 
8187 /**
8188   * @brief  Return the interrupt to enable or disable according to the
8189   *         OC mode.
8190   * @param  hhrtim pointer to HAL HRTIM handle
8191   * @param  TimerIdx Timer index
8192   * @param  OCChannel Timer output
8193   *                    This parameter can be one of the following values:
8194   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
8195   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
8196   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
8197   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
8198   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
8199   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
8200   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
8201   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
8202   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
8203   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
8204   * @retval Interrupt to enable or disable
8205   */
8206 static uint32_t HRTIM_GetITFromOCMode(const HRTIM_HandleTypeDef * hhrtim,
8207                                       uint32_t TimerIdx,
8208                                       uint32_t OCChannel)
8209 {
8210   uint32_t hrtim_set;
8211   uint32_t hrtim_reset;
8212   uint32_t interrupt = 0U;
8213 
8214   switch (OCChannel)
8215   {
8216   case HRTIM_OUTPUT_TA1:
8217   case HRTIM_OUTPUT_TB1:
8218   case HRTIM_OUTPUT_TC1:
8219   case HRTIM_OUTPUT_TD1:
8220   case HRTIM_OUTPUT_TE1:
8221     {
8222       /* Retreives actual OC mode and set interrupt accordingly */
8223       hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R;
8224       hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R;
8225 
8226       if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
8227           ((hrtim_reset & HRTIM_OUTPUTRESET_TIMCMP1) == HRTIM_OUTPUTRESET_TIMCMP1))
8228       {
8229         /* OC mode: HRTIM_BASICOCMODE_TOGGLE */
8230         interrupt = HRTIM_TIM_IT_CMP1;
8231       }
8232       else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
8233                (hrtim_reset == 0U))
8234       {
8235          /* OC mode: HRTIM_BASICOCMODE_ACTIVE */
8236         interrupt = HRTIM_TIM_IT_SET1;
8237       }
8238       else if ((hrtim_set == 0U) &&
8239                ((hrtim_reset & HRTIM_OUTPUTRESET_TIMCMP1) == HRTIM_OUTPUTRESET_TIMCMP1))
8240       {
8241          /* OC mode: HRTIM_BASICOCMODE_INACTIVE */
8242         interrupt = HRTIM_TIM_IT_RST1;
8243       }
8244       else
8245       {
8246        /* nothing to do */
8247       }
8248       break;
8249     }
8250 
8251   case HRTIM_OUTPUT_TA2:
8252   case HRTIM_OUTPUT_TB2:
8253   case HRTIM_OUTPUT_TC2:
8254   case HRTIM_OUTPUT_TD2:
8255   case HRTIM_OUTPUT_TE2:
8256     {
8257       /* Retreives actual OC mode and set interrupt accordingly */
8258       hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R;
8259       hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R;
8260 
8261       if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
8262           ((hrtim_reset & HRTIM_OUTPUTRESET_TIMCMP2) == HRTIM_OUTPUTRESET_TIMCMP2))
8263       {
8264         /* OC mode: HRTIM_BASICOCMODE_TOGGLE */
8265         interrupt = HRTIM_TIM_IT_CMP2;
8266       }
8267       else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
8268                (hrtim_reset == 0U))
8269       {
8270          /* OC mode: HRTIM_BASICOCMODE_ACTIVE */
8271         interrupt = HRTIM_TIM_IT_SET2;
8272       }
8273       else if ((hrtim_set == 0U) &&
8274                ((hrtim_reset & HRTIM_OUTPUTRESET_TIMCMP2) == HRTIM_OUTPUTRESET_TIMCMP2))
8275       {
8276          /* OC mode: HRTIM_BASICOCMODE_INACTIVE */
8277         interrupt = HRTIM_TIM_IT_RST2;
8278       }
8279       else
8280       {
8281        /* nothing to do */
8282       }
8283       break;
8284     }
8285 
8286   default:
8287     break;
8288   }
8289 
8290   return interrupt;
8291 }
8292 
8293 /**
8294   * @brief  Return the DMA request to enable or disable according to the
8295   *         OC mode.
8296   * @param  hhrtim pointer to HAL HRTIM handle
8297   * @param  TimerIdx Timer index
8298   * @param  OCChannel Timer output
8299   *                    This parameter can be one of the following values:
8300   *                    @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
8301   *                    @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
8302   *                    @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
8303   *                    @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
8304   *                    @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
8305   *                    @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
8306   *                    @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
8307   *                    @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
8308   *                    @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
8309   *                    @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
8310   * @retval DMA request to enable or disable
8311   */
8312 static uint32_t HRTIM_GetDMAFromOCMode(const HRTIM_HandleTypeDef * hhrtim,
8313                                        uint32_t TimerIdx,
8314                                        uint32_t OCChannel)
8315 {
8316   uint32_t hrtim_set;
8317   uint32_t hrtim_reset;
8318   uint32_t dma_request = 0U;
8319 
8320   switch (OCChannel)
8321   {
8322   case HRTIM_OUTPUT_TA1:
8323   case HRTIM_OUTPUT_TB1:
8324   case HRTIM_OUTPUT_TC1:
8325   case HRTIM_OUTPUT_TD1:
8326   case HRTIM_OUTPUT_TE1:
8327     {
8328       /* Retreives actual OC mode and set dma_request accordingly */
8329       hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R;
8330       hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R;
8331 
8332       if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
8333           ((hrtim_reset & HRTIM_OUTPUTRESET_TIMCMP1) == HRTIM_OUTPUTRESET_TIMCMP1))
8334       {
8335         /* OC mode: HRTIM_BASICOCMODE_TOGGLE */
8336         dma_request = HRTIM_TIM_DMA_CMP1;
8337       }
8338       else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
8339                (hrtim_reset == 0U))
8340       {
8341          /* OC mode: HRTIM_BASICOCMODE_ACTIVE */
8342         dma_request = HRTIM_TIM_DMA_SET1;
8343       }
8344       else if ((hrtim_set == 0U) &&
8345                ((hrtim_reset & HRTIM_OUTPUTRESET_TIMCMP1) == HRTIM_OUTPUTRESET_TIMCMP1))
8346       {
8347          /* OC mode: HRTIM_BASICOCMODE_INACTIVE */
8348         dma_request = HRTIM_TIM_DMA_RST1;
8349       }
8350       else
8351       {
8352     /* nothing to do */
8353       }
8354       break;
8355     }
8356 
8357   case HRTIM_OUTPUT_TA2:
8358   case HRTIM_OUTPUT_TB2:
8359   case HRTIM_OUTPUT_TC2:
8360   case HRTIM_OUTPUT_TD2:
8361   case HRTIM_OUTPUT_TE2:
8362     {
8363       /* Retreives actual OC mode and set dma_request accordingly */
8364       hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R;
8365       hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R;
8366 
8367       if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
8368           ((hrtim_reset & HRTIM_OUTPUTRESET_TIMCMP2) == HRTIM_OUTPUTRESET_TIMCMP2))
8369       {
8370         /* OC mode: HRTIM_BASICOCMODE_TOGGLE */
8371         dma_request = HRTIM_TIM_DMA_CMP2;
8372       }
8373       else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
8374                (hrtim_reset == 0U))
8375       {
8376          /* OC mode: HRTIM_BASICOCMODE_ACTIVE */
8377         dma_request = HRTIM_TIM_DMA_SET2;
8378       }
8379       else if ((hrtim_set == 0U) &&
8380                ((hrtim_reset & HRTIM_OUTPUTRESET_TIMCMP2) == HRTIM_OUTPUTRESET_TIMCMP2))
8381       {
8382          /* OC mode: HRTIM_BASICOCMODE_INACTIVE */
8383         dma_request = HRTIM_TIM_DMA_RST2;
8384       }
8385       else
8386       {
8387     /* nothing to do */
8388       }
8389       break;
8390     }
8391 
8392   default:
8393     break;
8394   }
8395 
8396   return dma_request;
8397 }
8398 
8399 static DMA_HandleTypeDef * HRTIM_GetDMAHandleFromTimerIdx(const HRTIM_HandleTypeDef * hhrtim,
8400                                                           uint32_t TimerIdx)
8401 {
8402   DMA_HandleTypeDef * hdma = (DMA_HandleTypeDef *)NULL;
8403 
8404   switch (TimerIdx)
8405   {
8406   case HRTIM_TIMERINDEX_MASTER:
8407     {
8408       hdma = hhrtim->hdmaMaster;
8409       break;
8410     }
8411 
8412   case HRTIM_TIMERINDEX_TIMER_A:
8413     {
8414       hdma = hhrtim->hdmaTimerA;
8415       break;
8416     }
8417 
8418   case HRTIM_TIMERINDEX_TIMER_B:
8419     {
8420       hdma = hhrtim->hdmaTimerB;
8421       break;
8422     }
8423 
8424   case HRTIM_TIMERINDEX_TIMER_C:
8425     {
8426       hdma = hhrtim->hdmaTimerC;
8427       break;
8428     }
8429 
8430   case HRTIM_TIMERINDEX_TIMER_D:
8431     {
8432       hdma = hhrtim->hdmaTimerD;
8433       break;
8434     }
8435 
8436   case HRTIM_TIMERINDEX_TIMER_E:
8437     {
8438       hdma = hhrtim->hdmaTimerE;
8439       break;
8440     }
8441 
8442   default:
8443     break;
8444   }
8445 
8446   return hdma;
8447 }
8448 
8449 static uint32_t GetTimerIdxFromDMAHandle(const HRTIM_HandleTypeDef * hhrtim,
8450                                          const DMA_HandleTypeDef * hdma)
8451 {
8452   uint32_t timed_idx = 0xFFFFFFFFU;
8453 
8454   if (hdma == hhrtim->hdmaMaster)
8455   {
8456     timed_idx = HRTIM_TIMERINDEX_MASTER;
8457   }
8458   else if (hdma == hhrtim->hdmaTimerA)
8459   {
8460     timed_idx = HRTIM_TIMERINDEX_TIMER_A;
8461   }
8462   else if (hdma == hhrtim->hdmaTimerB)
8463   {
8464     timed_idx = HRTIM_TIMERINDEX_TIMER_B;
8465   }
8466   else if (hdma == hhrtim->hdmaTimerC)
8467   {
8468     timed_idx = HRTIM_TIMERINDEX_TIMER_C;
8469   }
8470   else if (hdma == hhrtim->hdmaTimerD)
8471   {
8472     timed_idx = HRTIM_TIMERINDEX_TIMER_D;
8473   }
8474   else if (hdma == hhrtim->hdmaTimerE)
8475   {
8476     timed_idx = HRTIM_TIMERINDEX_TIMER_E;
8477   }
8478   else
8479   {
8480     /* nothing to do */
8481   }
8482   return timed_idx;
8483 }
8484 
8485 /**
8486   * @brief  Force an immediate transfer from the preload to the active
8487   *         registers.
8488   * @param  hhrtim pointer to HAL HRTIM handle
8489   * @param  TimerIdx Timer index
8490   * @retval None
8491   */
8492 static void HRTIM_ForceRegistersUpdate(HRTIM_HandleTypeDef * hhrtim,
8493                                        uint32_t TimerIdx)
8494 {
8495   switch (TimerIdx)
8496   {
8497   case HRTIM_TIMERINDEX_MASTER:
8498     {
8499       hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_MSWU;
8500       break;
8501     }
8502 
8503   case HRTIM_TIMERINDEX_TIMER_A:
8504     {
8505       hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TASWU;
8506       break;
8507     }
8508 
8509   case HRTIM_TIMERINDEX_TIMER_B:
8510     {
8511       hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TBSWU;
8512       break;
8513     }
8514 
8515   case HRTIM_TIMERINDEX_TIMER_C:
8516     {
8517       hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TCSWU;
8518       break;
8519     }
8520 
8521   case HRTIM_TIMERINDEX_TIMER_D:
8522     {
8523       hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TDSWU;
8524       break;
8525     }
8526 
8527   case HRTIM_TIMERINDEX_TIMER_E:
8528     {
8529       hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TESWU;
8530       break;
8531     }
8532 
8533   default:
8534     break;
8535   }
8536 }
8537 
8538 
8539 /**
8540   * @brief  HRTIM interrupts service routine
8541   * @param  hhrtim pointer to HAL HRTIM handle
8542   * @retval None
8543   */
8544 static void HRTIM_HRTIM_ISR(HRTIM_HandleTypeDef * hhrtim)
8545 {
8546   uint32_t isrflags = READ_REG(hhrtim->Instance->sCommonRegs.ISR);
8547   uint32_t ierits   = READ_REG(hhrtim->Instance->sCommonRegs.IER);
8548 
8549   /* Fault 1 event */
8550   if((uint32_t)(isrflags & HRTIM_FLAG_FLT1) != (uint32_t)RESET)
8551   {
8552     if((uint32_t)(ierits & HRTIM_IT_FLT1) != (uint32_t)RESET)
8553     {
8554       __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT1);
8555 
8556       /* Invoke Fault 1 event callback */
8557 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8558       hhrtim->Fault1Callback(hhrtim);
8559 #else
8560       HAL_HRTIM_Fault1Callback(hhrtim);
8561 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8562     }
8563   }
8564 
8565   /* Fault 2 event */
8566   if((uint32_t)(isrflags & HRTIM_FLAG_FLT2) != (uint32_t)RESET)
8567   {
8568     if((uint32_t)(ierits & HRTIM_IT_FLT2) != (uint32_t)RESET)
8569     {
8570       __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT2);
8571 
8572       /* Invoke Fault 2 event callback */
8573 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8574       hhrtim->Fault2Callback(hhrtim);
8575 #else
8576       HAL_HRTIM_Fault2Callback(hhrtim);
8577 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8578     }
8579   }
8580 
8581   /* Fault 3 event */
8582   if((uint32_t)(isrflags & HRTIM_FLAG_FLT3) != (uint32_t)RESET)
8583   {
8584     if((uint32_t)(ierits & HRTIM_IT_FLT3) != (uint32_t)RESET)
8585     {
8586       __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT3);
8587 
8588       /* Invoke Fault 3 event callback */
8589 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8590       hhrtim->Fault3Callback(hhrtim);
8591 #else
8592       HAL_HRTIM_Fault3Callback(hhrtim);
8593 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8594     }
8595   }
8596 
8597   /* Fault 4 event */
8598   if((uint32_t)(isrflags & HRTIM_FLAG_FLT4) != (uint32_t)RESET)
8599   {
8600     if((uint32_t)(ierits & HRTIM_IT_FLT4) != (uint32_t)RESET)
8601     {
8602       __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT4);
8603 
8604       /* Invoke Fault 4 event callback */
8605 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8606       hhrtim->Fault4Callback(hhrtim);
8607 #else
8608       HAL_HRTIM_Fault4Callback(hhrtim);
8609 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8610     }
8611   }
8612 
8613   /* Fault 5 event */
8614   if((uint32_t)(isrflags & HRTIM_FLAG_FLT5) != (uint32_t)RESET)
8615   {
8616     if((uint32_t)(ierits & HRTIM_IT_FLT5) != (uint32_t)RESET)
8617     {
8618       __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT5);
8619 
8620       /* Invoke Fault 5 event callback */
8621 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8622       hhrtim->Fault5Callback(hhrtim);
8623 #else
8624       HAL_HRTIM_Fault5Callback(hhrtim);
8625 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8626     }
8627   }
8628 
8629   /* System fault event */
8630   if((uint32_t)(isrflags & HRTIM_FLAG_SYSFLT) != (uint32_t)RESET)
8631   {
8632     if((uint32_t)(ierits & HRTIM_IT_SYSFLT) != (uint32_t)RESET)
8633     {
8634       __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_SYSFLT);
8635 
8636       /* Invoke System fault event callback */
8637 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8638       hhrtim->SystemFaultCallback(hhrtim);
8639 #else
8640       HAL_HRTIM_SystemFaultCallback(hhrtim);
8641 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8642     }
8643   }
8644 }
8645 
8646 /**
8647 * @brief  Master timer interrupts service routine
8648 * @param  hhrtim pointer to HAL HRTIM handle
8649 * @retval None
8650 */
8651 static void HRTIM_Master_ISR(HRTIM_HandleTypeDef * hhrtim)
8652 {
8653   uint32_t isrflags  = READ_REG(hhrtim->Instance->sCommonRegs.ISR);
8654   uint32_t ierits    = READ_REG(hhrtim->Instance->sCommonRegs.IER);
8655   uint32_t misrflags = READ_REG(hhrtim->Instance->sMasterRegs.MISR);
8656   uint32_t mdierits  = READ_REG(hhrtim->Instance->sMasterRegs.MDIER);
8657 
8658   /* Burst mode period event */
8659   if((uint32_t)(isrflags & HRTIM_FLAG_BMPER) != (uint32_t)RESET)
8660   {
8661     if((uint32_t)(ierits & HRTIM_IT_BMPER) != (uint32_t)RESET)
8662     {
8663       __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_BMPER);
8664 
8665       /* Invoke Burst mode period event callback */
8666 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8667       hhrtim->BurstModePeriodCallback(hhrtim);
8668 #else
8669       HAL_HRTIM_BurstModePeriodCallback(hhrtim);
8670 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8671     }
8672   }
8673 
8674   /* Master timer compare 1 event */
8675   if((uint32_t)(misrflags & HRTIM_MASTER_FLAG_MCMP1) != (uint32_t)RESET)
8676   {
8677     if((uint32_t)(mdierits & HRTIM_MASTER_IT_MCMP1) != (uint32_t)RESET)
8678     {
8679       __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP1);
8680 
8681       /* Invoke compare 1 event callback */
8682 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8683       hhrtim->Compare1EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
8684 #else
8685       HAL_HRTIM_Compare1EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
8686 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8687     }
8688   }
8689 
8690   /* Master timer compare 2 event */
8691   if((uint32_t)(misrflags & HRTIM_MASTER_FLAG_MCMP2) != (uint32_t)RESET)
8692   {
8693     if((uint32_t)(mdierits & HRTIM_MASTER_IT_MCMP2) != (uint32_t)RESET)
8694     {
8695       __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP2);
8696 
8697       /* Invoke compare 2 event callback */
8698 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8699       hhrtim->Compare2EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
8700 #else
8701       HAL_HRTIM_Compare2EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
8702 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8703     }
8704   }
8705 
8706   /* Master timer compare 3 event */
8707   if((uint32_t)(misrflags & HRTIM_MASTER_FLAG_MCMP3) != (uint32_t)RESET)
8708   {
8709     if((uint32_t)(mdierits & HRTIM_MASTER_IT_MCMP3) != (uint32_t)RESET)
8710     {
8711       __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP3);
8712 
8713       /* Invoke compare 3 event callback */
8714 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8715       hhrtim->Compare3EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
8716 #else
8717       HAL_HRTIM_Compare3EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
8718 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8719     }
8720   }
8721 
8722   /* Master timer compare 4 event */
8723   if((uint32_t)(misrflags & HRTIM_MASTER_FLAG_MCMP4) != (uint32_t)RESET)
8724   {
8725     if((uint32_t)(mdierits & HRTIM_MASTER_IT_MCMP4) != (uint32_t)RESET)
8726     {
8727       __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP4);
8728 
8729       /* Invoke compare 4 event callback */
8730 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8731       hhrtim->Compare4EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
8732 #else
8733       HAL_HRTIM_Compare4EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
8734 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8735     }
8736   }
8737 
8738   /* Master timer repetition event */
8739   if((uint32_t)(misrflags & HRTIM_MASTER_FLAG_MREP) != (uint32_t)RESET)
8740   {
8741     if((uint32_t)(mdierits & HRTIM_MASTER_IT_MREP) != (uint32_t)RESET)
8742     {
8743       __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MREP);
8744 
8745       /* Invoke repetition event callback */
8746 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8747       hhrtim->RepetitionEventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
8748 #else
8749       HAL_HRTIM_RepetitionEventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
8750 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8751     }
8752   }
8753 
8754   /* Synchronization input event */
8755   if((uint32_t)(misrflags & HRTIM_MASTER_FLAG_SYNC) != (uint32_t)RESET)
8756   {
8757     if((uint32_t)(mdierits & HRTIM_MASTER_IT_SYNC) != (uint32_t)RESET)
8758     {
8759       __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_SYNC);
8760 
8761       /* Invoke synchronization event callback */
8762 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8763       hhrtim->SynchronizationEventCallback(hhrtim);
8764 #else
8765       HAL_HRTIM_SynchronizationEventCallback(hhrtim);
8766 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8767     }
8768   }
8769 
8770   /* Master timer registers update event */
8771   if((uint32_t)(misrflags & HRTIM_MASTER_FLAG_MUPD) != (uint32_t)RESET)
8772   {
8773     if((uint32_t)(mdierits & HRTIM_MASTER_IT_MUPD) != (uint32_t)RESET)
8774     {
8775       __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MUPD);
8776 
8777       /* Invoke registers update event callback */
8778 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8779       hhrtim->RegistersUpdateCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
8780 #else
8781       HAL_HRTIM_RegistersUpdateCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
8782 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8783     }
8784   }
8785 }
8786 
8787 /**
8788   * @brief  Timer interrupts service routine
8789   * @param  hhrtim pointer to HAL HRTIM handle
8790   * @param  TimerIdx Timer index
8791   *                   This parameter can be one of the following values:
8792   *                   @arg HRTIM_TIMERINDEX_TIMER_A for timer A
8793   *                   @arg HRTIM_TIMERINDEX_TIMER_B for timer B
8794   *                   @arg HRTIM_TIMERINDEX_TIMER_C for timer C
8795   *                   @arg HRTIM_TIMERINDEX_TIMER_D for timer D
8796   *                   @arg HRTIM_TIMERINDEX_TIMER_E for timer E
8797   * @retval None
8798 */
8799 static void HRTIM_Timer_ISR(HRTIM_HandleTypeDef * hhrtim,
8800                      uint32_t TimerIdx)
8801 {
8802   uint32_t tisrflags = READ_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR);
8803   uint32_t tdierits  = READ_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxDIER);
8804 
8805   /* Timer compare 1 event */
8806   if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_CMP1) != (uint32_t)RESET)
8807   {
8808     if((uint32_t)(tdierits & HRTIM_TIM_IT_CMP1) != (uint32_t)RESET)
8809     {
8810       __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
8811 
8812       /* Invoke compare 1 event callback */
8813 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8814       hhrtim->Compare1EventCallback(hhrtim, TimerIdx);
8815 #else
8816       HAL_HRTIM_Compare1EventCallback(hhrtim, TimerIdx);
8817 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8818     }
8819   }
8820 
8821   /* Timer compare 2 event */
8822   if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_CMP2) != (uint32_t)RESET)
8823   {
8824     if((uint32_t)(tdierits & HRTIM_TIM_IT_CMP2) != (uint32_t)RESET)
8825     {
8826       __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
8827 
8828       /* Invoke compare 2 event callback */
8829 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8830       hhrtim->Compare2EventCallback(hhrtim, TimerIdx);
8831 #else
8832       HAL_HRTIM_Compare2EventCallback(hhrtim, TimerIdx);
8833 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8834     }
8835   }
8836 
8837   /* Timer compare 3 event */
8838   if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_CMP3) != (uint32_t)RESET)
8839   {
8840     if((uint32_t)(tdierits & HRTIM_TIM_IT_CMP3) != (uint32_t)RESET)
8841     {
8842       __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP3);
8843 
8844       /* Invoke compare 3 event callback */
8845 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8846       hhrtim->Compare3EventCallback(hhrtim, TimerIdx);
8847 #else
8848       HAL_HRTIM_Compare3EventCallback(hhrtim, TimerIdx);
8849 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8850     }
8851   }
8852 
8853   /* Timer compare 4 event */
8854   if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_CMP4) != (uint32_t)RESET)
8855   {
8856     if((uint32_t)(tdierits & HRTIM_TIM_IT_CMP4) != (uint32_t)RESET)
8857     {
8858       __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP4);
8859 
8860       /* Invoke compare 4 event callback */
8861 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8862       hhrtim->Compare4EventCallback(hhrtim, TimerIdx);
8863 #else
8864       HAL_HRTIM_Compare4EventCallback(hhrtim, TimerIdx);
8865 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8866     }
8867   }
8868 
8869   /* Timer repetition event */
8870   if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_REP) != (uint32_t)RESET)
8871   {
8872     if((uint32_t)(tdierits & HRTIM_TIM_IT_REP) != (uint32_t)RESET)
8873     {
8874       __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP);
8875 
8876       /* Invoke repetition event callback */
8877 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8878       hhrtim->RepetitionEventCallback(hhrtim, TimerIdx);
8879 #else
8880       HAL_HRTIM_RepetitionEventCallback(hhrtim, TimerIdx);
8881 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8882     }
8883   }
8884 
8885   /* Timer registers update event */
8886   if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_UPD) != (uint32_t)RESET)
8887   {
8888     if((uint32_t)(tdierits & HRTIM_TIM_IT_UPD) != (uint32_t)RESET)
8889     {
8890       __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_UPD);
8891 
8892       /* Invoke registers update event callback */
8893 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8894       hhrtim->RegistersUpdateCallback(hhrtim, TimerIdx);
8895 #else
8896       HAL_HRTIM_RegistersUpdateCallback(hhrtim, TimerIdx);
8897 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8898     }
8899   }
8900 
8901   /* Timer capture 1 event */
8902   if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_CPT1) != (uint32_t)RESET)
8903   {
8904     if((uint32_t)(tdierits & HRTIM_TIM_IT_CPT1) != (uint32_t)RESET)
8905     {
8906       __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1);
8907 
8908       /* Invoke capture 1 event callback */
8909 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8910       hhrtim->Capture1EventCallback(hhrtim, TimerIdx);
8911 #else
8912       HAL_HRTIM_Capture1EventCallback(hhrtim, TimerIdx);
8913 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8914     }
8915   }
8916 
8917   /* Timer capture 2 event */
8918   if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_CPT2) != (uint32_t)RESET)
8919   {
8920     if((uint32_t)(tdierits & HRTIM_TIM_IT_CPT2) != (uint32_t)RESET)
8921     {
8922       __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2);
8923 
8924       /* Invoke capture 2 event callback */
8925 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8926       hhrtim->Capture2EventCallback(hhrtim, TimerIdx);
8927 #else
8928       HAL_HRTIM_Capture2EventCallback(hhrtim, TimerIdx);
8929 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8930     }
8931   }
8932 
8933   /* Timer output 1 set event */
8934   if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_SET1) != (uint32_t)RESET)
8935   {
8936     if((uint32_t)(tdierits & HRTIM_TIM_IT_SET1) != (uint32_t)RESET)
8937     {
8938       __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_SET1);
8939 
8940       /* Invoke output 1 set event callback */
8941 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8942       hhrtim->Output1SetCallback(hhrtim, TimerIdx);
8943 #else
8944       HAL_HRTIM_Output1SetCallback(hhrtim, TimerIdx);
8945 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8946     }
8947   }
8948 
8949   /* Timer output 1 reset event */
8950   if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_RST1) != (uint32_t)RESET)
8951   {
8952     if((uint32_t)(tdierits & HRTIM_TIM_IT_RST1) != (uint32_t)RESET)
8953     {
8954       __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_RST1);
8955 
8956       /* Invoke output 1 reset event callback */
8957 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8958       hhrtim->Output1ResetCallback(hhrtim, TimerIdx);
8959 #else
8960       HAL_HRTIM_Output1ResetCallback(hhrtim, TimerIdx);
8961 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8962     }
8963   }
8964 
8965   /* Timer output 2 set event */
8966   if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_SET2) != (uint32_t)RESET)
8967   {
8968     if((uint32_t)(tdierits & HRTIM_TIM_IT_SET2) != (uint32_t)RESET)
8969     {
8970       __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_SET2);
8971 
8972       /* Invoke output 2 set event callback */
8973 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8974       hhrtim->Output2SetCallback(hhrtim, TimerIdx);
8975 #else
8976       HAL_HRTIM_Output2SetCallback(hhrtim, TimerIdx);
8977 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8978     }
8979   }
8980 
8981   /* Timer output 2 reset event */
8982   if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_RST2) != (uint32_t)RESET)
8983   {
8984     if((uint32_t)(tdierits & HRTIM_TIM_IT_RST2) != (uint32_t)RESET)
8985     {
8986       __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_RST2);
8987 
8988       /* Invoke output 2 reset event callback */
8989 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
8990       hhrtim->Output2ResetCallback(hhrtim, TimerIdx);
8991 #else
8992       HAL_HRTIM_Output2ResetCallback(hhrtim, TimerIdx);
8993 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
8994     }
8995   }
8996 
8997   /* Timer reset event */
8998   if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_RST) != (uint32_t)RESET)
8999   {
9000     if((uint32_t)(tdierits & HRTIM_TIM_IT_RST) != (uint32_t)RESET)
9001     {
9002       __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_RST);
9003 
9004       /* Invoke timer reset callback */
9005 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9006       hhrtim->CounterResetCallback(hhrtim, TimerIdx);
9007 #else
9008       HAL_HRTIM_CounterResetCallback(hhrtim, TimerIdx);
9009 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9010     }
9011   }
9012 
9013   /* Delayed protection event */
9014   if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_DLYPRT) != (uint32_t)RESET)
9015   {
9016     if((uint32_t)(tdierits & HRTIM_TIM_IT_DLYPRT) != (uint32_t)RESET)
9017     {
9018       __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_DLYPRT);
9019 
9020       /* Invoke delayed protection callback */
9021 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9022       hhrtim->DelayedProtectionCallback(hhrtim, TimerIdx);
9023 #else
9024       HAL_HRTIM_DelayedProtectionCallback(hhrtim, TimerIdx);
9025 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9026     }
9027   }
9028 }
9029 
9030 /**
9031   * @brief  DMA callback invoked upon master timer related DMA request completion
9032   * @param  hdma pointer to DMA handle.
9033   * @retval None
9034   */
9035 static void HRTIM_DMAMasterCplt(DMA_HandleTypeDef *hdma)
9036 {
9037   HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent;
9038 
9039   if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP1) != (uint32_t)RESET)
9040   {
9041 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9042     hrtim->Compare1EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
9043 #else
9044     HAL_HRTIM_Compare1EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
9045 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9046   }
9047   else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP2) != (uint32_t)RESET)
9048   {
9049 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9050     hrtim->Compare2EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
9051 #else
9052     HAL_HRTIM_Compare2EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
9053 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9054   }
9055   else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP3) != (uint32_t)RESET)
9056   {
9057 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9058     hrtim->Compare3EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
9059 #else
9060     HAL_HRTIM_Compare3EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
9061 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9062   }
9063   else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP4) != (uint32_t)RESET)
9064   {
9065 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9066     hrtim->Compare4EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
9067 #else
9068     HAL_HRTIM_Compare4EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
9069 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9070   }
9071   else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_SYNC) != (uint32_t)RESET)
9072   {
9073 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9074     hrtim->SynchronizationEventCallback(hrtim);
9075 #else
9076     HAL_HRTIM_SynchronizationEventCallback(hrtim);
9077 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9078   }
9079   else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MUPD) != (uint32_t)RESET)
9080   {
9081 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9082     hrtim->RegistersUpdateCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
9083 #else
9084     HAL_HRTIM_RegistersUpdateCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
9085 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9086   }
9087   else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MREP) != (uint32_t)RESET)
9088   {
9089 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9090     hrtim->RepetitionEventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
9091 #else
9092     HAL_HRTIM_RepetitionEventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
9093 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9094   }
9095   else
9096   {
9097     /* nothing to do */
9098   }
9099 }
9100 
9101 /**
9102   * @brief  DMA callback invoked upon timer A..E related DMA request completion
9103   * @param  hdma pointer to DMA handle.
9104   * @retval None
9105   */
9106 static void HRTIM_DMATimerxCplt(DMA_HandleTypeDef *hdma)
9107 {
9108   uint8_t timer_idx;
9109 
9110   HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent;
9111 
9112   timer_idx = (uint8_t)GetTimerIdxFromDMAHandle(hrtim, hdma);
9113 
9114   if ( !IS_HRTIM_TIMING_UNIT(timer_idx) ) {return;}
9115 
9116   if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP1) != (uint32_t)RESET)
9117   {
9118 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9119     hrtim->Compare1EventCallback(hrtim, timer_idx);
9120 #else
9121     HAL_HRTIM_Compare1EventCallback(hrtim, timer_idx);
9122 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9123   }
9124   else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP2) != (uint32_t)RESET)
9125   {
9126 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9127     hrtim->Compare2EventCallback(hrtim, timer_idx);
9128 #else
9129     HAL_HRTIM_Compare2EventCallback(hrtim, timer_idx);
9130 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9131   }
9132   else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP3) != (uint32_t)RESET)
9133   {
9134 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9135     hrtim->Compare3EventCallback(hrtim, timer_idx);
9136 #else
9137     HAL_HRTIM_Compare3EventCallback(hrtim, timer_idx);
9138 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9139   }
9140   else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP4) != (uint32_t)RESET)
9141   {
9142 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9143     hrtim->Compare4EventCallback(hrtim, timer_idx);
9144 #else
9145     HAL_HRTIM_Compare4EventCallback(hrtim, timer_idx);
9146 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9147   }
9148   else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_UPD) != (uint32_t)RESET)
9149   {
9150 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9151     hrtim->RegistersUpdateCallback(hrtim, timer_idx);
9152 #else
9153     HAL_HRTIM_RegistersUpdateCallback(hrtim, timer_idx);
9154 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9155   }
9156   else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CPT1) != (uint32_t)RESET)
9157   {
9158 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9159     hrtim->Capture1EventCallback(hrtim, timer_idx);
9160 #else
9161     HAL_HRTIM_Capture1EventCallback(hrtim, timer_idx);
9162 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9163   }
9164   else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CPT2) != (uint32_t)RESET)
9165   {
9166 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9167     hrtim->Capture2EventCallback(hrtim, timer_idx);
9168 #else
9169     HAL_HRTIM_Capture2EventCallback(hrtim, timer_idx);
9170 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9171   }
9172   else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_SET1) != (uint32_t)RESET)
9173   {
9174 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9175     hrtim->Output1SetCallback(hrtim, timer_idx);
9176 #else
9177     HAL_HRTIM_Output1SetCallback(hrtim, timer_idx);
9178 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9179   }
9180   else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_RST1) != (uint32_t)RESET)
9181   {
9182 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9183     hrtim->Output1ResetCallback(hrtim, timer_idx);
9184 #else
9185     HAL_HRTIM_Output1ResetCallback(hrtim, timer_idx);
9186 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9187   }
9188   else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_SET2) != (uint32_t)RESET)
9189   {
9190 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9191     hrtim->Output2SetCallback(hrtim, timer_idx);
9192 #else
9193     HAL_HRTIM_Output2SetCallback(hrtim, timer_idx);
9194 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9195   }
9196   else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_RST2) != (uint32_t)RESET)
9197   {
9198 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9199     hrtim->Output2ResetCallback(hrtim, timer_idx);
9200 #else
9201     HAL_HRTIM_Output2ResetCallback(hrtim, timer_idx);
9202 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9203   }
9204   else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_RST) != (uint32_t)RESET)
9205   {
9206 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9207     hrtim->CounterResetCallback(hrtim, timer_idx);
9208 #else
9209     HAL_HRTIM_CounterResetCallback(hrtim, timer_idx);
9210 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9211   }
9212   else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_DLYPRT) != (uint32_t)RESET)
9213   {
9214 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9215     hrtim->DelayedProtectionCallback(hrtim, timer_idx);
9216 #else
9217     HAL_HRTIM_DelayedProtectionCallback(hrtim, timer_idx);
9218 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9219   }
9220   else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_REP) != (uint32_t)RESET)
9221   {
9222 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9223     hrtim->RepetitionEventCallback(hrtim, timer_idx);
9224 #else
9225     HAL_HRTIM_RepetitionEventCallback(hrtim, timer_idx);
9226 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9227   }
9228   else
9229   {
9230     /* nothing to do */
9231   }
9232 }
9233 
9234 /**
9235 * @brief  DMA error callback
9236 * @param  hdma pointer to DMA handle.
9237 * @retval None
9238 */
9239 static void HRTIM_DMAError(DMA_HandleTypeDef *hdma)
9240 {
9241   HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent;
9242 
9243 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9244     hrtim->ErrorCallback(hrtim);
9245 #else
9246   HAL_HRTIM_ErrorCallback(hrtim);
9247 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9248 }
9249 
9250 /**
9251   * @brief  DMA callback invoked upon burst DMA transfer completion
9252   * @param  hdma pointer to DMA handle.
9253   * @retval None
9254   */
9255 static void HRTIM_BurstDMACplt(DMA_HandleTypeDef *hdma)
9256 {
9257   HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent;
9258 
9259 #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
9260     hrtim->BurstDMATransferCallback(hrtim, GetTimerIdxFromDMAHandle(hrtim, hdma));
9261 #else
9262   HAL_HRTIM_BurstDMATransferCallback(hrtim, GetTimerIdxFromDMAHandle(hrtim, hdma));
9263 #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
9264 }
9265 
9266 /**
9267   * @}
9268   */
9269 
9270 /**
9271   * @}
9272   */
9273 
9274 #endif /* HRTIM1 */
9275 
9276 #endif /* HAL_HRTIM_MODULE_ENABLED */
9277 
9278 /**
9279   * @}
9280   */