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File indexing completed on 2025-05-11 08:23:07

0001 /**
0002   ******************************************************************************
0003   * @file    stm32h7xx_hal_dfsdm.c
0004   * @author  MCD Application Team
0005   * @brief   This file provides firmware functions to manage the following
0006   *          functionalities of the Digital Filter for Sigma-Delta Modulators
0007   *          (DFSDM) peripherals:
0008   *           + Initialization and configuration of channels and filters
0009   *           + Regular channels configuration
0010   *           + Injected channels configuration
0011   *           + Regular/Injected Channels DMA Configuration
0012   *           + Interrupts and flags management
0013   *           + Analog watchdog feature
0014   *           + Short-circuit detector feature
0015   *           + Extremes detector feature
0016   *           + Clock absence detector feature
0017   *           + Break generation on analog watchdog or short-circuit event
0018   *
0019   ******************************************************************************
0020   * @attention
0021   *
0022   * Copyright (c) 2017 STMicroelectronics.
0023   * All rights reserved.
0024   *
0025   * This software is licensed under terms that can be found in the LICENSE file
0026   * in the root directory of this software component.
0027   * If no LICENSE file comes with this software, it is provided AS-IS.
0028   *
0029   ******************************************************************************
0030   @verbatim
0031   ==============================================================================
0032                      ##### How to use this driver #####
0033   ==============================================================================
0034   [..]
0035     *** Channel initialization ***
0036     ==============================
0037     [..]
0038       (#) User has first to initialize channels (before filters initialization).
0039       (#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() :
0040         (++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE().
0041         (++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
0042         (++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init().
0043         (++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global
0044             interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
0045       (#) Configure the output clock, input, serial interface, analog watchdog,
0046           offset and data right bit shift parameters for this channel using the
0047           HAL_DFSDM_ChannelInit() function.
0048 
0049     *** Channel clock absence detector ***
0050     ======================================
0051     [..]
0052       (#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or
0053           HAL_DFSDM_ChannelCkabStart_IT().
0054       (#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock
0055           absence.
0056       (#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if
0057           clock absence is detected.
0058       (#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or
0059           HAL_DFSDM_ChannelCkabStop_IT().
0060       (#) Please note that the same mode (polling or interrupt) has to be used
0061           for all channels because the channels are sharing the same interrupt.
0062       (#) Please note also that in interrupt mode, if clock absence detector is
0063           stopped for one channel, interrupt will be disabled for all channels.
0064 
0065     *** Channel short circuit detector ***
0066     ======================================
0067     [..]
0068       (#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or
0069           or HAL_DFSDM_ChannelScdStart_IT().
0070       (#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short
0071           circuit.
0072       (#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if
0073           short circuit is detected.
0074       (#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or
0075           or HAL_DFSDM_ChannelScdStop_IT().
0076       (#) Please note that the same mode (polling or interrupt) has to be used
0077           for all channels because the channels are sharing the same interrupt.
0078       (#) Please note also that in interrupt mode, if short circuit detector is
0079           stopped for one channel, interrupt will be disabled for all channels.
0080 
0081     *** Channel analog watchdog value ***
0082     =====================================
0083     [..]
0084       (#) Get analog watchdog filter value of a channel using
0085           HAL_DFSDM_ChannelGetAwdValue().
0086 
0087     *** Channel offset value ***
0088     =====================================
0089     [..]
0090       (#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset().
0091 
0092     *** Filter initialization ***
0093     =============================
0094     [..]
0095       (#) After channel initialization, user has to init filters.
0096       (#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() :
0097         (++) If interrupt mode is used , enable and configure DFSDMz_FLTx global
0098             interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
0099             Please note that DFSDMz_FLT0 global interrupt could be already
0100             enabled if interrupt is used for channel.
0101         (++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it
0102             with DFSDMz filter handle using __HAL_LINKDMA().
0103       (#) Configure the regular conversion, injected conversion and filter
0104           parameters for this filter using the HAL_DFSDM_FilterInit() function.
0105 
0106     *** Filter regular channel conversion ***
0107     =========================================
0108     [..]
0109       (#) Select regular channel and enable/disable continuous mode using
0110           HAL_DFSDM_FilterConfigRegChannel().
0111       (#) Start regular conversion using HAL_DFSDM_FilterRegularStart(),
0112           HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or
0113           HAL_DFSDM_FilterRegularMsbStart_DMA().
0114       (#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect
0115           the end of regular conversion.
0116       (#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called
0117           at the end of regular conversion.
0118       (#) Get value of regular conversion and corresponding channel using
0119           HAL_DFSDM_FilterGetRegularValue().
0120       (#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and
0121           HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the
0122           half transfer and at the transfer complete. Please note that
0123           HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA
0124           circular mode.
0125       (#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(),
0126           HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA().
0127 
0128     *** Filter injected channels conversion ***
0129     ===========================================
0130     [..]
0131       (#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel().
0132       (#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(),
0133           HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or
0134           HAL_DFSDM_FilterInjectedMsbStart_DMA().
0135       (#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect
0136           the end of injected conversion.
0137       (#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called
0138           at the end of injected conversion.
0139       (#) Get value of injected conversion and corresponding channel using
0140           HAL_DFSDM_FilterGetInjectedValue().
0141       (#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and
0142           HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the
0143           half transfer and at the transfer complete. Please note that
0144           HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA
0145           circular mode.
0146       (#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(),
0147           HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA().
0148 
0149     *** Filter analog watchdog ***
0150     ==============================
0151     [..]
0152       (#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT().
0153       (#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs.
0154       (#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT().
0155 
0156     *** Filter extreme detector ***
0157     ===============================
0158     [..]
0159       (#) Start filter extreme detector using HAL_DFSDM_FilterExdStart().
0160       (#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue().
0161       (#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue().
0162       (#) Start filter extreme detector using HAL_DFSDM_FilterExdStop().
0163 
0164     *** Filter conversion time ***
0165     ==============================
0166     [..]
0167       (#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue().
0168 
0169     *** Callback registration ***
0170     =============================
0171     [..]
0172     The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS when set to 1
0173     allows the user to configure dynamically the driver callbacks.
0174     Use functions HAL_DFSDM_Channel_RegisterCallback(),
0175     HAL_DFSDM_Filter_RegisterCallback() or
0176     HAL_DFSDM_Filter_RegisterAwdCallback() to register a user callback.
0177 
0178     [..]
0179     Function HAL_DFSDM_Channel_RegisterCallback() allows to register
0180     following callbacks:
0181       (+) CkabCallback      : DFSDM channel clock absence detection callback.
0182       (+) ScdCallback       : DFSDM channel short circuit detection callback.
0183       (+) MspInitCallback   : DFSDM channel MSP init callback.
0184       (+) MspDeInitCallback : DFSDM channel MSP de-init callback.
0185     [..]
0186     This function takes as parameters the HAL peripheral handle, the Callback ID
0187     and a pointer to the user callback function.
0188 
0189     [..]
0190     Function HAL_DFSDM_Filter_RegisterCallback() allows to register
0191     following callbacks:
0192       (+) RegConvCpltCallback     : DFSDM filter regular conversion complete callback.
0193       (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback.
0194       (+) InjConvCpltCallback     : DFSDM filter injected conversion complete callback.
0195       (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback.
0196       (+) ErrorCallback           : DFSDM filter error callback.
0197       (+) MspInitCallback         : DFSDM filter MSP init callback.
0198       (+) MspDeInitCallback       : DFSDM filter MSP de-init callback.
0199     [..]
0200     This function takes as parameters the HAL peripheral handle, the Callback ID
0201     and a pointer to the user callback function.
0202 
0203     [..]
0204     For specific DFSDM filter analog watchdog callback use dedicated register callback:
0205     HAL_DFSDM_Filter_RegisterAwdCallback().
0206 
0207     [..]
0208     Use functions HAL_DFSDM_Channel_UnRegisterCallback() or
0209     HAL_DFSDM_Filter_UnRegisterCallback() to reset a callback to the default
0210     weak function.
0211 
0212     [..]
0213     HAL_DFSDM_Channel_UnRegisterCallback() takes as parameters the HAL peripheral handle,
0214     and the Callback ID.
0215     [..]
0216     This function allows to reset following callbacks:
0217       (+) CkabCallback      : DFSDM channel clock absence detection callback.
0218       (+) ScdCallback       : DFSDM channel short circuit detection callback.
0219       (+) MspInitCallback   : DFSDM channel MSP init callback.
0220       (+) MspDeInitCallback : DFSDM channel MSP de-init callback.
0221 
0222     [..]
0223     HAL_DFSDM_Filter_UnRegisterCallback() takes as parameters the HAL peripheral handle,
0224     and the Callback ID.
0225     [..]
0226     This function allows to reset following callbacks:
0227       (+) RegConvCpltCallback     : DFSDM filter regular conversion complete callback.
0228       (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback.
0229       (+) InjConvCpltCallback     : DFSDM filter injected conversion complete callback.
0230       (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback.
0231       (+) ErrorCallback           : DFSDM filter error callback.
0232       (+) MspInitCallback         : DFSDM filter MSP init callback.
0233       (+) MspDeInitCallback       : DFSDM filter MSP de-init callback.
0234 
0235     [..]
0236     For specific DFSDM filter analog watchdog callback use dedicated unregister callback:
0237     HAL_DFSDM_Filter_UnRegisterAwdCallback().
0238 
0239     [..]
0240     By default, after the call of init function and if the state is RESET
0241     all callbacks are reset to the corresponding legacy weak functions:
0242     examples HAL_DFSDM_ChannelScdCallback(), HAL_DFSDM_FilterErrorCallback().
0243     Exception done for MspInit and MspDeInit callbacks that are respectively
0244     reset to the legacy weak functions in the init and de-init only when these
0245     callbacks are null (not registered beforehand).
0246     If not, MspInit or MspDeInit are not null, the init and de-init keep and use
0247     the user MspInit/MspDeInit callbacks (registered beforehand)
0248 
0249     [..]
0250     Callbacks can be registered/unregistered in READY state only.
0251     Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
0252     in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
0253     during the init/de-init.
0254     In that case first register the MspInit/MspDeInit user callbacks using
0255     HAL_DFSDM_Channel_RegisterCallback() or
0256     HAL_DFSDM_Filter_RegisterCallback() before calling init or de-init function.
0257 
0258     [..]
0259     When The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS is set to 0 or
0260     not defined, the callback registering feature is not available
0261     and weak callbacks are used.
0262 
0263     @endverbatim
0264   ******************************************************************************
0265   */
0266 
0267 /* Includes ------------------------------------------------------------------*/
0268 #include "stm32h7xx_hal.h"
0269 
0270 /** @addtogroup STM32H7xx_HAL_Driver
0271   * @{
0272   */
0273 #ifdef HAL_DFSDM_MODULE_ENABLED
0274 
0275 /** @defgroup DFSDM DFSDM
0276   * @ingroup RTEMSBSPsARMSTM32H7
0277   * @brief DFSDM HAL driver module
0278   * @{
0279   */
0280 
0281 /* Private typedef -----------------------------------------------------------*/
0282 /* Private define ------------------------------------------------------------*/
0283 /** @defgroup DFSDM_Private_Define DFSDM Private Define
0284   * @ingroup RTEMSBSPsARMSTM32H7
0285  * @{
0286  */
0287 #define DFSDM_FLTCR1_MSB_RCH_OFFSET     8
0288 #define DFSDM_MSB_MASK                  0xFFFF0000U
0289 #define DFSDM_LSB_MASK                  0x0000FFFFU
0290 #define DFSDM_CKAB_TIMEOUT              5000U
0291 #define DFSDM1_CHANNEL_NUMBER           8U
0292 #if defined(DFSDM2_Channel0)
0293 #define DFSDM2_CHANNEL_NUMBER           2U
0294 #endif /* DFSDM2_Channel0 */
0295 /**
0296   * @}
0297   */
0298 
0299 /* Private macro -------------------------------------------------------------*/
0300 /* Private variables ---------------------------------------------------------*/
0301 /** @defgroup DFSDM_Private_Variables DFSDM Private Variables
0302   * @ingroup RTEMSBSPsARMSTM32H7
0303   * @{
0304   */
0305 static __IO uint32_t                v_dfsdm1ChannelCounter = 0;
0306 static DFSDM_Channel_HandleTypeDef *a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL};
0307 #if defined(DFSDM2_Channel0)
0308 static __IO uint32_t                v_dfsdm2ChannelCounter = 0;
0309 static DFSDM_Channel_HandleTypeDef *a_dfsdm2ChannelHandle[DFSDM2_CHANNEL_NUMBER] = {NULL};
0310 #endif /* DFSDM2_Channel0 */
0311 /**
0312   * @}
0313   */
0314 
0315 /* Private function prototypes -----------------------------------------------*/
0316 /** @defgroup DFSDM_Private_Functions DFSDM Private Functions
0317   * @ingroup RTEMSBSPsARMSTM32H7
0318   * @{
0319   */
0320 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels);
0321 static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef *Instance);
0322 static void     DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
0323 static void     DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
0324 static void     DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
0325 static void     DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
0326 static void     DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma);
0327 static void     DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma);
0328 static void     DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma);
0329 static void     DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma);
0330 static void     DFSDM_DMAError(DMA_HandleTypeDef *hdma);
0331 /**
0332   * @}
0333   */
0334 
0335 /* Exported functions --------------------------------------------------------*/
0336 /** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions
0337   * @ingroup RTEMSBSPsARMSTM32H7
0338   * @{
0339   */
0340 
0341 /** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
0342   * @ingroup RTEMSBSPsARMSTM32H7
0343  *  @brief    Channel initialization and de-initialization functions
0344  *
0345 @verbatim
0346   ==============================================================================
0347         ##### Channel initialization and de-initialization functions #####
0348   ==============================================================================
0349     [..]  This section provides functions allowing to:
0350       (+) Initialize the DFSDM channel.
0351       (+) De-initialize the DFSDM channel.
0352 @endverbatim
0353   * @{
0354   */
0355 
0356 /**
0357   * @brief  Initialize the DFSDM channel according to the specified parameters
0358   *         in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
0359   * @param  hdfsdm_channel DFSDM channel handle.
0360   * @retval HAL status.
0361   */
0362 HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
0363 {
0364   __IO uint32_t               *channelCounterPtr;
0365   DFSDM_Channel_HandleTypeDef **channelHandleTable;
0366   DFSDM_Channel_TypeDef       *channel0Instance;
0367 
0368   /* Check DFSDM Channel handle */
0369   if(hdfsdm_channel == NULL)
0370   {
0371     return HAL_ERROR;
0372   }
0373 
0374   /* Check parameters */
0375   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
0376   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation));
0377   assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer));
0378   assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking));
0379   assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins));
0380   assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type));
0381   assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock));
0382   assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder));
0383   assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling));
0384   assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));
0385   assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));
0386 
0387 #if defined(DFSDM2_Channel0)
0388   if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
0389   {
0390     channelCounterPtr  = &v_dfsdm1ChannelCounter;
0391     channelHandleTable = a_dfsdm1ChannelHandle;
0392     channel0Instance   = DFSDM1_Channel0;
0393   }
0394   else
0395   {
0396     channelCounterPtr  = &v_dfsdm2ChannelCounter;
0397     channelHandleTable = a_dfsdm2ChannelHandle;
0398     channel0Instance   = DFSDM2_Channel0;
0399   }
0400 #else /* DFSDM2_Channel0 */
0401   channelCounterPtr  = &v_dfsdm1ChannelCounter;
0402   channelHandleTable = a_dfsdm1ChannelHandle;
0403   channel0Instance   = DFSDM1_Channel0;
0404 #endif /* DFSDM2_Channel0 */
0405 
0406   /* Check that channel has not been already initialized */
0407   if (channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
0408   {
0409     return HAL_ERROR;
0410   }
0411 
0412 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
0413   /* Reset callback pointers to the weak predefined callbacks */
0414   hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback;
0415   hdfsdm_channel->ScdCallback  = HAL_DFSDM_ChannelScdCallback;
0416 
0417   /* Call MSP init function */
0418   if(hdfsdm_channel->MspInitCallback == NULL)
0419   {
0420     hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
0421   }
0422   hdfsdm_channel->MspInitCallback(hdfsdm_channel);
0423 #else
0424   /* Call MSP init function */
0425   HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
0426 #endif
0427 
0428   /* Update the channel counter */
0429   (*channelCounterPtr)++;
0430 
0431   /* Configure output serial clock and enable global DFSDM interface only for first channel */
0432   if(*channelCounterPtr == 1U)
0433   {
0434     assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
0435     /* Set the output serial clock source */
0436     channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
0437     channel0Instance->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection;
0438 
0439     /* Reset clock divider */
0440     channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
0441     if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
0442     {
0443       assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
0444       /* Set the output clock divider */
0445       channel0Instance->CHCFGR1 |= (uint32_t)((hdfsdm_channel->Init.OutputClock.Divider - 1U) <<
0446                                               DFSDM_CHCFGR1_CKOUTDIV_Pos);
0447     }
0448 
0449     /* enable the DFSDM global interface */
0450     channel0Instance->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN;
0451   }
0452 
0453   /* Set channel input parameters */
0454   hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX |
0455                                          DFSDM_CHCFGR1_CHINSEL);
0456   hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer |
0457                                         hdfsdm_channel->Init.Input.DataPacking |
0458                                         hdfsdm_channel->Init.Input.Pins);
0459 
0460   /* Set serial interface parameters */
0461   hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL);
0462   hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type |
0463                                         hdfsdm_channel->Init.SerialInterface.SpiClock);
0464 
0465   /* Set analog watchdog parameters */
0466   hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR);
0467   hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder |
0468                                          ((hdfsdm_channel->Init.Awd.Oversampling - 1U) << DFSDM_CHAWSCDR_AWFOSR_Pos));
0469 
0470   /* Set channel offset and right bit shift */
0471   hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS);
0472   hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_Pos) |
0473                                         (hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_Pos));
0474 
0475   /* Enable DFSDM channel */
0476   hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN;
0477 
0478   /* Set DFSDM Channel to ready state */
0479   hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
0480 
0481   /* Store channel handle in DFSDM channel handle table */
0482   channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
0483 
0484   return HAL_OK;
0485 }
0486 
0487 /**
0488   * @brief  De-initialize the DFSDM channel.
0489   * @param  hdfsdm_channel DFSDM channel handle.
0490   * @retval HAL status.
0491   */
0492 HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
0493 {
0494   __IO uint32_t               *channelCounterPtr;
0495   DFSDM_Channel_HandleTypeDef **channelHandleTable;
0496   DFSDM_Channel_TypeDef       *channel0Instance;
0497 
0498   /* Check DFSDM Channel handle */
0499   if(hdfsdm_channel == NULL)
0500   {
0501     return HAL_ERROR;
0502   }
0503 
0504   /* Check parameters */
0505   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
0506 
0507 #if defined(DFSDM2_Channel0)
0508   if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
0509   {
0510     channelCounterPtr  = &v_dfsdm1ChannelCounter;
0511     channelHandleTable = a_dfsdm1ChannelHandle;
0512     channel0Instance   = DFSDM1_Channel0;
0513   }
0514   else
0515   {
0516     channelCounterPtr  = &v_dfsdm2ChannelCounter;
0517     channelHandleTable = a_dfsdm2ChannelHandle;
0518     channel0Instance   = DFSDM2_Channel0;
0519   }
0520 #else /* DFSDM2_Channel0 */
0521   channelCounterPtr  = &v_dfsdm1ChannelCounter;
0522   channelHandleTable = a_dfsdm1ChannelHandle;
0523   channel0Instance   = DFSDM1_Channel0;
0524 #endif /* DFSDM2_Channel0 */
0525 
0526   /* Check that channel has not been already deinitialized */
0527   if (channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
0528   {
0529     return HAL_ERROR;
0530   }
0531 
0532   /* Disable the DFSDM channel */
0533   hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
0534 
0535   /* Update the channel counter */
0536   (*channelCounterPtr)--;
0537 
0538   /* Disable global DFSDM at deinit of last channel */
0539   if (*channelCounterPtr == 0U)
0540   {
0541     channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
0542   }
0543 
0544   /* Call MSP deinit function */
0545 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
0546   if(hdfsdm_channel->MspDeInitCallback == NULL)
0547   {
0548     hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
0549   }
0550   hdfsdm_channel->MspDeInitCallback(hdfsdm_channel);
0551 #else
0552   HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
0553 #endif
0554 
0555   /* Set DFSDM Channel in reset state */
0556   hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
0557 
0558   /* Reset channel handle in DFSDM channel handle table */
0559   channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL;
0560 
0561   return HAL_OK;
0562 }
0563 
0564 /**
0565   * @brief  Initialize the DFSDM channel MSP.
0566   * @param  hdfsdm_channel DFSDM channel handle.
0567   * @retval None
0568   */
0569 __weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
0570 {
0571   /* Prevent unused argument(s) compilation warning */
0572   UNUSED(hdfsdm_channel);
0573 
0574   /* NOTE : This function should not be modified, when the function is needed,
0575             the HAL_DFSDM_ChannelMspInit could be implemented in the user file.
0576    */
0577 }
0578 
0579 /**
0580   * @brief  De-initialize the DFSDM channel MSP.
0581   * @param  hdfsdm_channel DFSDM channel handle.
0582   * @retval None
0583   */
0584 __weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
0585 {
0586   /* Prevent unused argument(s) compilation warning */
0587   UNUSED(hdfsdm_channel);
0588 
0589   /* NOTE : This function should not be modified, when the function is needed,
0590             the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file.
0591    */
0592 }
0593 
0594 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
0595 /**
0596   * @brief  Register a user DFSDM channel callback
0597   *         to be used instead of the weak predefined callback.
0598   * @param  hdfsdm_channel DFSDM channel handle.
0599   * @param  CallbackID ID of the callback to be registered.
0600   *         This parameter can be one of the following values:
0601   *           @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID.
0602   *           @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID.
0603   *           @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID.
0604   *           @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID.
0605   * @param  pCallback pointer to the callback function.
0606   * @retval HAL status.
0607   */
0608 HAL_StatusTypeDef HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef        *hdfsdm_channel,
0609                                                      HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID,
0610                                                      pDFSDM_Channel_CallbackTypeDef      pCallback)
0611 {
0612   HAL_StatusTypeDef status = HAL_OK;
0613 
0614   if(pCallback == NULL)
0615   {
0616     /* update return status */
0617     status = HAL_ERROR;
0618   }
0619   else
0620   {
0621     if(HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State)
0622     {
0623       switch (CallbackID)
0624       {
0625         case HAL_DFSDM_CHANNEL_CKAB_CB_ID :
0626           hdfsdm_channel->CkabCallback = pCallback;
0627           break;
0628         case HAL_DFSDM_CHANNEL_SCD_CB_ID :
0629           hdfsdm_channel->ScdCallback = pCallback;
0630           break;
0631         case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
0632           hdfsdm_channel->MspInitCallback = pCallback;
0633           break;
0634         case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
0635           hdfsdm_channel->MspDeInitCallback = pCallback;
0636           break;
0637         default :
0638           /* update return status */
0639           status = HAL_ERROR;
0640           break;
0641       }
0642     }
0643     else if(HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State)
0644     {
0645       switch (CallbackID)
0646       {
0647         case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
0648           hdfsdm_channel->MspInitCallback = pCallback;
0649           break;
0650         case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
0651           hdfsdm_channel->MspDeInitCallback = pCallback;
0652           break;
0653         default :
0654           /* update return status */
0655           status = HAL_ERROR;
0656           break;
0657       }
0658     }
0659     else
0660     {
0661       /* update return status */
0662       status = HAL_ERROR;
0663     }
0664   }
0665   return status;
0666 }
0667 
0668 /**
0669   * @brief  Unregister a user DFSDM channel callback.
0670   *         DFSDM channel callback is redirected to the weak predefined callback.
0671   * @param  hdfsdm_channel DFSDM channel handle.
0672   * @param  CallbackID ID of the callback to be unregistered.
0673   *         This parameter can be one of the following values:
0674   *           @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID.
0675   *           @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID.
0676   *           @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID.
0677   *           @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID.
0678   * @retval HAL status.
0679   */
0680 HAL_StatusTypeDef HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef        *hdfsdm_channel,
0681                                                        HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID)
0682 {
0683   HAL_StatusTypeDef status = HAL_OK;
0684 
0685   if(HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State)
0686   {
0687     switch (CallbackID)
0688     {
0689       case HAL_DFSDM_CHANNEL_CKAB_CB_ID :
0690         hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback;
0691         break;
0692       case HAL_DFSDM_CHANNEL_SCD_CB_ID :
0693         hdfsdm_channel->ScdCallback = HAL_DFSDM_ChannelScdCallback;
0694         break;
0695       case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
0696         hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
0697         break;
0698       case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
0699         hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
0700         break;
0701       default :
0702         /* update return status */
0703         status = HAL_ERROR;
0704         break;
0705     }
0706   }
0707   else if(HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State)
0708   {
0709     switch (CallbackID)
0710     {
0711       case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
0712         hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
0713         break;
0714       case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
0715         hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
0716         break;
0717       default :
0718         /* update return status */
0719         status = HAL_ERROR;
0720         break;
0721     }
0722   }
0723   else
0724   {
0725     /* update return status */
0726     status = HAL_ERROR;
0727   }
0728   return status;
0729 }
0730 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
0731 
0732 /**
0733   * @}
0734   */
0735 
0736 /** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
0737   * @ingroup RTEMSBSPsARMSTM32H7
0738  *  @brief    Channel operation functions
0739  *
0740 @verbatim
0741   ==============================================================================
0742                    ##### Channel operation functions #####
0743   ==============================================================================
0744     [..]  This section provides functions allowing to:
0745       (+) Manage clock absence detector feature.
0746       (+) Manage short circuit detector feature.
0747       (+) Get analog watchdog value.
0748       (+) Modify offset value.
0749 @endverbatim
0750   * @{
0751   */
0752 
0753 /**
0754   * @brief  This function allows to start clock absence detection in polling mode.
0755   * @note   Same mode has to be used for all channels.
0756   * @note   If clock is not available on this channel during 5 seconds,
0757   *         clock absence detection will not be activated and function
0758   *         will return HAL_TIMEOUT error.
0759   * @param  hdfsdm_channel DFSDM channel handle.
0760   * @retval HAL status
0761   */
0762 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
0763 {
0764   HAL_StatusTypeDef status = HAL_OK;
0765   uint32_t channel;
0766   uint32_t tickstart;
0767   DFSDM_Filter_TypeDef *filter0Instance;
0768 
0769   /* Check parameters */
0770   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
0771 
0772 #if defined(DFSDM2_Channel0)
0773   if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
0774   {
0775     filter0Instance = DFSDM1_Filter0;
0776   }
0777   else
0778   {
0779     filter0Instance = DFSDM2_Filter0;
0780   }
0781 #else /* DFSDM2_Channel0 */
0782   filter0Instance = DFSDM1_Filter0;
0783 #endif /* DFSDM2_Channel0 */
0784 
0785   /* Check DFSDM channel state */
0786   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
0787   {
0788     /* Return error status */
0789     status = HAL_ERROR;
0790   }
0791   else
0792   {
0793     /* Get channel number from channel instance */
0794     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
0795 
0796     /* Get timeout */
0797     tickstart = HAL_GetTick();
0798 
0799     /* Clear clock absence flag */
0800     while ((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U)
0801     {
0802       filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
0803 
0804       /* Check the Timeout */
0805       if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
0806       {
0807         /* Set timeout status */
0808         status = HAL_TIMEOUT;
0809         break;
0810       }
0811     }
0812 
0813     if(status == HAL_OK)
0814     {
0815       /* Start clock absence detection */
0816       hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
0817     }
0818   }
0819   /* Return function status */
0820   return status;
0821 }
0822 
0823 /**
0824   * @brief  This function allows to poll for the clock absence detection.
0825   * @param  hdfsdm_channel DFSDM channel handle.
0826   * @param  Timeout Timeout value in milliseconds.
0827   * @retval HAL status
0828   */
0829 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(const DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
0830                                                uint32_t Timeout)
0831 {
0832   uint32_t tickstart;
0833   uint32_t channel;
0834   DFSDM_Filter_TypeDef *filter0Instance;
0835 
0836   /* Check parameters */
0837   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
0838 
0839 #if defined(DFSDM2_Channel0)
0840   if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
0841   {
0842     filter0Instance = DFSDM1_Filter0;
0843   }
0844   else
0845   {
0846     filter0Instance = DFSDM2_Filter0;
0847   }
0848 #else /* DFSDM2_Channel0 */
0849   filter0Instance = DFSDM1_Filter0;
0850 #endif /* DFSDM2_Channel0 */
0851 
0852   /* Check DFSDM channel state */
0853   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
0854   {
0855     /* Return error status */
0856     return HAL_ERROR;
0857   }
0858   else
0859   {
0860     /* Get channel number from channel instance */
0861     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
0862 
0863     /* Get timeout */
0864     tickstart = HAL_GetTick();
0865 
0866     /* Wait clock absence detection */
0867     while ((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) == 0U)
0868     {
0869       /* Check the Timeout */
0870       if(Timeout != HAL_MAX_DELAY)
0871       {
0872         if(((HAL_GetTick()-tickstart) > Timeout) || (Timeout == 0U))
0873         {
0874           /* Return timeout status */
0875           return HAL_TIMEOUT;
0876         }
0877       }
0878     }
0879 
0880     /* Clear clock absence detection flag */
0881     filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
0882 
0883     /* Return function status */
0884     return HAL_OK;
0885   }
0886 }
0887 
0888 /**
0889   * @brief  This function allows to stop clock absence detection in polling mode.
0890   * @param  hdfsdm_channel DFSDM channel handle.
0891   * @retval HAL status
0892   */
0893 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
0894 {
0895   HAL_StatusTypeDef status = HAL_OK;
0896   uint32_t channel;
0897   DFSDM_Filter_TypeDef *filter0Instance;
0898 
0899   /* Check parameters */
0900   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
0901 
0902 #if defined(DFSDM2_Channel0)
0903   if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
0904   {
0905     filter0Instance = DFSDM1_Filter0;
0906   }
0907   else
0908   {
0909     filter0Instance = DFSDM2_Filter0;
0910   }
0911 #else /* DFSDM2_Channel0 */
0912   filter0Instance = DFSDM1_Filter0;
0913 #endif /* DFSDM2_Channel0 */
0914 
0915   /* Check DFSDM channel state */
0916   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
0917   {
0918     /* Return error status */
0919     status = HAL_ERROR;
0920   }
0921   else
0922   {
0923     /* Stop clock absence detection */
0924     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
0925 
0926     /* Clear clock absence flag */
0927     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
0928     filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
0929   }
0930   /* Return function status */
0931   return status;
0932 }
0933 
0934 /**
0935   * @brief  This function allows to start clock absence detection in interrupt mode.
0936   * @note   Same mode has to be used for all channels.
0937   * @note   If clock is not available on this channel during 5 seconds,
0938   *         clock absence detection will not be activated and function
0939   *         will return HAL_TIMEOUT error.
0940   * @param  hdfsdm_channel DFSDM channel handle.
0941   * @retval HAL status
0942   */
0943 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
0944 {
0945   HAL_StatusTypeDef status = HAL_OK;
0946   uint32_t channel;
0947   uint32_t tickstart;
0948   DFSDM_Filter_TypeDef *filter0Instance;
0949 
0950   /* Check parameters */
0951   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
0952 
0953 #if defined(DFSDM2_Channel0)
0954   if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
0955   {
0956     filter0Instance = DFSDM1_Filter0;
0957   }
0958   else
0959   {
0960     filter0Instance = DFSDM2_Filter0;
0961   }
0962 #else /* DFSDM2_Channel0 */
0963   filter0Instance = DFSDM1_Filter0;
0964 #endif /* DFSDM2_Channel0 */
0965 
0966   /* Check DFSDM channel state */
0967   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
0968   {
0969     /* Return error status */
0970     status = HAL_ERROR;
0971   }
0972   else
0973   {
0974     /* Get channel number from channel instance */
0975     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
0976 
0977     /* Get timeout */
0978     tickstart = HAL_GetTick();
0979 
0980     /* Clear clock absence flag */
0981     while ((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U)
0982     {
0983       filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
0984 
0985       /* Check the Timeout */
0986       if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
0987       {
0988         /* Set timeout status */
0989         status = HAL_TIMEOUT;
0990         break;
0991       }
0992     }
0993 
0994     if(status == HAL_OK)
0995     {
0996       /* Activate clock absence detection interrupt */
0997       filter0Instance->FLTCR2 |= DFSDM_FLTCR2_CKABIE;
0998 
0999       /* Start clock absence detection */
1000       hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
1001     }
1002   }
1003   /* Return function status */
1004   return status;
1005 }
1006 
1007 /**
1008   * @brief  Clock absence detection callback.
1009   * @param  hdfsdm_channel DFSDM channel handle.
1010   * @retval None
1011   */
1012 __weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1013 {
1014   /* Prevent unused argument(s) compilation warning */
1015   UNUSED(hdfsdm_channel);
1016 
1017   /* NOTE : This function should not be modified, when the callback is needed,
1018             the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file
1019    */
1020 }
1021 
1022 /**
1023   * @brief  This function allows to stop clock absence detection in interrupt mode.
1024   * @note   Interrupt will be disabled for all channels
1025   * @param  hdfsdm_channel DFSDM channel handle.
1026   * @retval HAL status
1027   */
1028 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1029 {
1030   HAL_StatusTypeDef status = HAL_OK;
1031   uint32_t channel;
1032   DFSDM_Filter_TypeDef *filter0Instance;
1033 
1034   /* Check parameters */
1035   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1036 
1037 #if defined(DFSDM2_Channel0)
1038   if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
1039   {
1040     filter0Instance = DFSDM1_Filter0;
1041   }
1042   else
1043   {
1044     filter0Instance = DFSDM2_Filter0;
1045   }
1046 #else /* DFSDM2_Channel0 */
1047   filter0Instance = DFSDM1_Filter0;
1048 #endif /* DFSDM2_Channel0 */
1049 
1050   /* Check DFSDM channel state */
1051   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1052   {
1053     /* Return error status */
1054     status = HAL_ERROR;
1055   }
1056   else
1057   {
1058     /* Stop clock absence detection */
1059     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
1060 
1061     /* Clear clock absence flag */
1062     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1063     filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
1064 
1065     /* Disable clock absence detection interrupt */
1066     filter0Instance->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
1067   }
1068   /* Return function status */
1069   return status;
1070 }
1071 
1072 /**
1073   * @brief  This function allows to start short circuit detection in polling mode.
1074   * @note   Same mode has to be used for all channels
1075   * @param  hdfsdm_channel DFSDM channel handle.
1076   * @param  Threshold Short circuit detector threshold.
1077   *         This parameter must be a number between Min_Data = 0 and Max_Data = 255.
1078   * @param  BreakSignal Break signals assigned to short circuit event.
1079   *         This parameter can be a values combination of @ref DFSDM_BreakSignals.
1080   * @retval HAL status
1081   */
1082 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
1083                                             uint32_t Threshold,
1084                                             uint32_t BreakSignal)
1085 {
1086   HAL_StatusTypeDef status = HAL_OK;
1087 
1088   /* Check parameters */
1089   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1090   assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
1091   assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
1092 
1093   /* Check DFSDM channel state */
1094   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1095   {
1096     /* Return error status */
1097     status = HAL_ERROR;
1098   }
1099   else
1100   {
1101     /* Configure threshold and break signals */
1102     hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
1103     hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
1104                                            Threshold);
1105 
1106     /* Start short circuit detection */
1107     hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
1108   }
1109   /* Return function status */
1110   return status;
1111 }
1112 
1113 /**
1114   * @brief  This function allows to poll for the short circuit detection.
1115   * @param  hdfsdm_channel DFSDM channel handle.
1116   * @param  Timeout Timeout value in milliseconds.
1117   * @retval HAL status
1118   */
1119 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(const DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
1120                                               uint32_t Timeout)
1121 {
1122   uint32_t tickstart;
1123   uint32_t channel;
1124   DFSDM_Filter_TypeDef *filter0Instance;
1125 
1126   /* Check parameters */
1127   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1128 
1129 #if defined(DFSDM2_Channel0)
1130   if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
1131   {
1132     filter0Instance = DFSDM1_Filter0;
1133   }
1134   else
1135   {
1136     filter0Instance = DFSDM2_Filter0;
1137   }
1138 #else /* DFSDM2_Channel0 */
1139   filter0Instance = DFSDM1_Filter0;
1140 #endif /* DFSDM2_Channel0 */
1141 
1142   /* Check DFSDM channel state */
1143   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1144   {
1145     /* Return error status */
1146     return HAL_ERROR;
1147   }
1148   else
1149   {
1150     /* Get channel number from channel instance */
1151     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1152 
1153     /* Get timeout */
1154     tickstart = HAL_GetTick();
1155 
1156     /* Wait short circuit detection */
1157     while (((filter0Instance->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_Pos + channel)) == 0U)
1158     {
1159       /* Check the Timeout */
1160       if(Timeout != HAL_MAX_DELAY)
1161       {
1162         if(((HAL_GetTick()-tickstart) > Timeout) || (Timeout == 0U))
1163         {
1164           /* Return timeout status */
1165           return HAL_TIMEOUT;
1166         }
1167       }
1168     }
1169 
1170     /* Clear short circuit detection flag */
1171     filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
1172 
1173     /* Return function status */
1174     return HAL_OK;
1175   }
1176 }
1177 
1178 /**
1179   * @brief  This function allows to stop short circuit detection in polling mode.
1180   * @param  hdfsdm_channel DFSDM channel handle.
1181   * @retval HAL status
1182   */
1183 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1184 {
1185   HAL_StatusTypeDef status = HAL_OK;
1186   uint32_t channel;
1187   DFSDM_Filter_TypeDef *filter0Instance;
1188 
1189   /* Check parameters */
1190   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1191 
1192 #if defined(DFSDM2_Channel0)
1193   if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
1194   {
1195     filter0Instance = DFSDM1_Filter0;
1196   }
1197   else
1198   {
1199     filter0Instance = DFSDM2_Filter0;
1200   }
1201 #else /* DFSDM2_Channel0 */
1202   filter0Instance = DFSDM1_Filter0;
1203 #endif /* DFSDM2_Channel0 */
1204 
1205   /* Check DFSDM channel state */
1206   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1207   {
1208     /* Return error status */
1209     status = HAL_ERROR;
1210   }
1211   else
1212   {
1213     /* Stop short circuit detection */
1214     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
1215 
1216     /* Clear short circuit detection flag */
1217     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1218     filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
1219   }
1220   /* Return function status */
1221   return status;
1222 }
1223 
1224 /**
1225   * @brief  This function allows to start short circuit detection in interrupt mode.
1226   * @note   Same mode has to be used for all channels
1227   * @param  hdfsdm_channel DFSDM channel handle.
1228   * @param  Threshold Short circuit detector threshold.
1229   *         This parameter must be a number between Min_Data = 0 and Max_Data = 255.
1230   * @param  BreakSignal Break signals assigned to short circuit event.
1231   *         This parameter can be a values combination of @ref DFSDM_BreakSignals.
1232   * @retval HAL status
1233   */
1234 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
1235                                                uint32_t Threshold,
1236                                                uint32_t BreakSignal)
1237 {
1238   HAL_StatusTypeDef status = HAL_OK;
1239   DFSDM_Filter_TypeDef *filter0Instance;
1240 
1241   /* Check parameters */
1242   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1243   assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
1244   assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
1245 
1246 #if defined(DFSDM2_Channel0)
1247   if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
1248   {
1249     filter0Instance = DFSDM1_Filter0;
1250   }
1251   else
1252   {
1253     filter0Instance = DFSDM2_Filter0;
1254   }
1255 #else /* DFSDM2_Channel0 */
1256   filter0Instance = DFSDM1_Filter0;
1257 #endif /* DFSDM2_Channel0 */
1258 
1259   /* Check DFSDM channel state */
1260   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1261   {
1262     /* Return error status */
1263     status = HAL_ERROR;
1264   }
1265   else
1266   {
1267     /* Activate short circuit detection interrupt */
1268     filter0Instance->FLTCR2 |= DFSDM_FLTCR2_SCDIE;
1269 
1270     /* Configure threshold and break signals */
1271     hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
1272     hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
1273                                            Threshold);
1274 
1275     /* Start short circuit detection */
1276     hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
1277   }
1278   /* Return function status */
1279   return status;
1280 }
1281 
1282 /**
1283   * @brief  Short circuit detection callback.
1284   * @param  hdfsdm_channel DFSDM channel handle.
1285   * @retval None
1286   */
1287 __weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1288 {
1289   /* Prevent unused argument(s) compilation warning */
1290   UNUSED(hdfsdm_channel);
1291 
1292   /* NOTE : This function should not be modified, when the callback is needed,
1293             the HAL_DFSDM_ChannelScdCallback could be implemented in the user file
1294    */
1295 }
1296 
1297 /**
1298   * @brief  This function allows to stop short circuit detection in interrupt mode.
1299   * @note   Interrupt will be disabled for all channels
1300   * @param  hdfsdm_channel DFSDM channel handle.
1301   * @retval HAL status
1302   */
1303 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1304 {
1305   HAL_StatusTypeDef status = HAL_OK;
1306   uint32_t channel;
1307   DFSDM_Filter_TypeDef *filter0Instance;
1308 
1309   /* Check parameters */
1310   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1311 
1312 #if defined(DFSDM2_Channel0)
1313   if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
1314   {
1315     filter0Instance = DFSDM1_Filter0;
1316   }
1317   else
1318   {
1319     filter0Instance = DFSDM2_Filter0;
1320   }
1321 #else /* DFSDM2_Channel0 */
1322   filter0Instance = DFSDM1_Filter0;
1323 #endif /* DFSDM2_Channel0 */
1324 
1325   /* Check DFSDM channel state */
1326   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1327   {
1328     /* Return error status */
1329     status = HAL_ERROR;
1330   }
1331   else
1332   {
1333     /* Stop short circuit detection */
1334     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
1335 
1336     /* Clear short circuit detection flag */
1337     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1338     filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
1339 
1340     /* Disable short circuit detection interrupt */
1341     filter0Instance->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
1342   }
1343   /* Return function status */
1344   return status;
1345 }
1346 
1347 /**
1348   * @brief  This function allows to get channel analog watchdog value.
1349   * @param  hdfsdm_channel DFSDM channel handle.
1350   * @retval Channel analog watchdog value.
1351   */
1352 int16_t HAL_DFSDM_ChannelGetAwdValue(const DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1353 {
1354   return (int16_t) hdfsdm_channel->Instance->CHWDATAR;
1355 }
1356 
1357 /**
1358   * @brief  This function allows to modify channel offset value.
1359   * @param  hdfsdm_channel DFSDM channel handle.
1360   * @param  Offset DFSDM channel offset.
1361   *         This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
1362   * @retval HAL status.
1363   */
1364 HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
1365                                                 int32_t Offset)
1366 {
1367   HAL_StatusTypeDef status = HAL_OK;
1368 
1369   /* Check parameters */
1370   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1371   assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset));
1372 
1373   /* Check DFSDM channel state */
1374   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1375   {
1376     /* Return error status */
1377     status = HAL_ERROR;
1378   }
1379   else
1380   {
1381     /* Modify channel offset */
1382     hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);
1383     hdfsdm_channel->Instance->CHCFGR2 |= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_Pos);
1384   }
1385   /* Return function status */
1386   return status;
1387 }
1388 
1389 /**
1390   * @}
1391   */
1392 
1393 /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
1394   * @ingroup RTEMSBSPsARMSTM32H7
1395  *  @brief    Channel state function
1396  *
1397 @verbatim
1398   ==============================================================================
1399                    ##### Channel state function #####
1400   ==============================================================================
1401     [..]  This section provides function allowing to:
1402       (+) Get channel handle state.
1403 @endverbatim
1404   * @{
1405   */
1406 
1407 /**
1408   * @brief  This function allows to get the current DFSDM channel handle state.
1409   * @param  hdfsdm_channel DFSDM channel handle.
1410   * @retval DFSDM channel state.
1411   */
1412 HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(const DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1413 {
1414   /* Return DFSDM channel handle state */
1415   return hdfsdm_channel->State;
1416 }
1417 
1418 /**
1419   * @}
1420   */
1421 
1422 /** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
1423   * @ingroup RTEMSBSPsARMSTM32H7
1424  *  @brief    Filter initialization and de-initialization functions
1425  *
1426 @verbatim
1427   ==============================================================================
1428         ##### Filter initialization and de-initialization functions #####
1429   ==============================================================================
1430     [..]  This section provides functions allowing to:
1431       (+) Initialize the DFSDM filter.
1432       (+) De-initialize the DFSDM filter.
1433 @endverbatim
1434   * @{
1435   */
1436 
1437 /**
1438   * @brief  Initialize the DFSDM filter according to the specified parameters
1439   *         in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
1440   * @param  hdfsdm_filter DFSDM filter handle.
1441   * @retval HAL status.
1442   */
1443 HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1444 {
1445   const DFSDM_Filter_TypeDef *filter0Instance;
1446 
1447   /* Check DFSDM Channel handle */
1448   if(hdfsdm_filter == NULL)
1449   {
1450     return HAL_ERROR;
1451   }
1452 
1453   /* Check parameters */
1454   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1455   assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger));
1456   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode));
1457   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode));
1458   assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger));
1459   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode));
1460   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode));
1461   assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));
1462   assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));
1463   assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));
1464 
1465 #if defined(DFSDM2_Channel0)
1466   if (IS_DFSDM1_FILTER_INSTANCE(hdfsdm_filter->Instance))
1467   {
1468     filter0Instance = DFSDM1_Filter0;
1469   }
1470   else
1471   {
1472     filter0Instance = DFSDM2_Filter0;
1473   }
1474 #else /* DFSDM2_Channel0 */
1475   filter0Instance = DFSDM1_Filter0;
1476 #endif /* DFSDM2_Channel0 */
1477 
1478   /* Check parameters compatibility */
1479   if ((hdfsdm_filter->Instance == filter0Instance) &&
1480       ((hdfsdm_filter->Init.RegularParam.Trigger  == DFSDM_FILTER_SYNC_TRIGGER) ||
1481        (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
1482   {
1483     return HAL_ERROR;
1484   }
1485 
1486   /* Initialize DFSDM filter variables with default values */
1487   hdfsdm_filter->RegularContMode     = DFSDM_CONTINUOUS_CONV_OFF;
1488   hdfsdm_filter->InjectedChannelsNbr = 1;
1489   hdfsdm_filter->InjConvRemaining    = 1;
1490   hdfsdm_filter->ErrorCode           = DFSDM_FILTER_ERROR_NONE;
1491 
1492 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1493   /* Reset callback pointers to the weak predefined callbacks */
1494   hdfsdm_filter->AwdCallback             = HAL_DFSDM_FilterAwdCallback;
1495   hdfsdm_filter->RegConvCpltCallback     = HAL_DFSDM_FilterRegConvCpltCallback;
1496   hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback;
1497   hdfsdm_filter->InjConvCpltCallback     = HAL_DFSDM_FilterInjConvCpltCallback;
1498   hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback;
1499   hdfsdm_filter->ErrorCallback           = HAL_DFSDM_FilterErrorCallback;
1500 
1501   /* Call MSP init function */
1502   if(hdfsdm_filter->MspInitCallback == NULL)
1503   {
1504     hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
1505   }
1506   hdfsdm_filter->MspInitCallback(hdfsdm_filter);
1507 #else
1508   /* Call MSP init function */
1509   HAL_DFSDM_FilterMspInit(hdfsdm_filter);
1510 #endif
1511 
1512   /* Set regular parameters */
1513   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
1514   if(hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)
1515   {
1516     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_FAST;
1517   }
1518   else
1519   {
1520     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST);
1521   }
1522 
1523   if(hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)
1524   {
1525     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RDMAEN;
1526   }
1527   else
1528   {
1529     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN);
1530   }
1531 
1532   /* Set injected parameters */
1533   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC | DFSDM_FLTCR1_JEXTEN | DFSDM_FLTCR1_JEXTSEL);
1534   if(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)
1535   {
1536     assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));
1537     assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));
1538     hdfsdm_filter->Instance->FLTCR1 |= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);
1539   }
1540 
1541   if(hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)
1542   {
1543     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSCAN;
1544   }
1545   else
1546   {
1547     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN);
1548   }
1549 
1550   if(hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)
1551   {
1552     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JDMAEN;
1553   }
1554   else
1555   {
1556     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN);
1557   }
1558 
1559   /* Set filter parameters */
1560   hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD | DFSDM_FLTFCR_FOSR | DFSDM_FLTFCR_IOSR);
1561   hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder |
1562                                       ((hdfsdm_filter->Init.FilterParam.Oversampling - 1U) << DFSDM_FLTFCR_FOSR_Pos) |
1563                                       (hdfsdm_filter->Init.FilterParam.IntOversampling - 1U));
1564 
1565   /* Store regular and injected triggers and injected scan mode*/
1566   hdfsdm_filter->RegularTrigger   = hdfsdm_filter->Init.RegularParam.Trigger;
1567   hdfsdm_filter->InjectedTrigger  = hdfsdm_filter->Init.InjectedParam.Trigger;
1568   hdfsdm_filter->ExtTriggerEdge   = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;
1569   hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;
1570 
1571   /* Enable DFSDM filter */
1572   hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
1573 
1574   /* Set DFSDM filter to ready state */
1575   hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;
1576 
1577   return HAL_OK;
1578 }
1579 
1580 /**
1581   * @brief  De-initializes the DFSDM filter.
1582   * @param  hdfsdm_filter DFSDM filter handle.
1583   * @retval HAL status.
1584   */
1585 HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1586 {
1587   /* Check DFSDM filter handle */
1588   if(hdfsdm_filter == NULL)
1589   {
1590     return HAL_ERROR;
1591   }
1592 
1593   /* Check parameters */
1594   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1595 
1596   /* Disable the DFSDM filter */
1597   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
1598 
1599   /* Call MSP deinit function */
1600 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1601   if(hdfsdm_filter->MspDeInitCallback == NULL)
1602   {
1603     hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
1604   }
1605   hdfsdm_filter->MspDeInitCallback(hdfsdm_filter);
1606 #else
1607   HAL_DFSDM_FilterMspDeInit(hdfsdm_filter);
1608 #endif
1609 
1610   /* Set DFSDM filter in reset state */
1611   hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET;
1612 
1613   return HAL_OK;
1614 }
1615 
1616 /**
1617   * @brief  Initializes the DFSDM filter MSP.
1618   * @param  hdfsdm_filter DFSDM filter handle.
1619   * @retval None
1620   */
1621 __weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1622 {
1623   /* Prevent unused argument(s) compilation warning */
1624   UNUSED(hdfsdm_filter);
1625 
1626   /* NOTE : This function should not be modified, when the function is needed,
1627             the HAL_DFSDM_FilterMspInit could be implemented in the user file.
1628    */
1629 }
1630 
1631 /**
1632   * @brief  De-initializes the DFSDM filter MSP.
1633   * @param  hdfsdm_filter DFSDM filter handle.
1634   * @retval None
1635   */
1636 __weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1637 {
1638   /* Prevent unused argument(s) compilation warning */
1639   UNUSED(hdfsdm_filter);
1640 
1641   /* NOTE : This function should not be modified, when the function is needed,
1642             the HAL_DFSDM_FilterMspDeInit could be implemented in the user file.
1643    */
1644 }
1645 
1646 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1647 /**
1648   * @brief  Register a user DFSDM filter callback
1649   *         to be used instead of the weak predefined callback.
1650   * @param  hdfsdm_filter DFSDM filter handle.
1651   * @param  CallbackID ID of the callback to be registered.
1652   *         This parameter can be one of the following values:
1653   *           @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID.
1654   *           @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID.
1655   *           @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID.
1656   *           @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID.
1657   *           @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID.
1658   *           @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID.
1659   *           @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID.
1660   * @param  pCallback pointer to the callback function.
1661   * @retval HAL status.
1662   */
1663 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef        *hdfsdm_filter,
1664                                                     HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID,
1665                                                     pDFSDM_Filter_CallbackTypeDef      pCallback)
1666 {
1667   HAL_StatusTypeDef status = HAL_OK;
1668 
1669   if(pCallback == NULL)
1670   {
1671     /* update the error code */
1672     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1673     /* update return status */
1674     status = HAL_ERROR;
1675   }
1676   else
1677   {
1678     if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1679     {
1680       switch (CallbackID)
1681       {
1682         case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID :
1683           hdfsdm_filter->RegConvCpltCallback = pCallback;
1684           break;
1685         case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID :
1686           hdfsdm_filter->RegConvHalfCpltCallback = pCallback;
1687           break;
1688         case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID :
1689           hdfsdm_filter->InjConvCpltCallback = pCallback;
1690           break;
1691         case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID :
1692           hdfsdm_filter->InjConvHalfCpltCallback = pCallback;
1693           break;
1694         case HAL_DFSDM_FILTER_ERROR_CB_ID :
1695           hdfsdm_filter->ErrorCallback = pCallback;
1696           break;
1697         case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1698           hdfsdm_filter->MspInitCallback = pCallback;
1699           break;
1700         case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1701           hdfsdm_filter->MspDeInitCallback = pCallback;
1702           break;
1703         default :
1704           /* update the error code */
1705           hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1706           /* update return status */
1707           status = HAL_ERROR;
1708           break;
1709       }
1710     }
1711     else if(HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State)
1712     {
1713       switch (CallbackID)
1714       {
1715         case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1716           hdfsdm_filter->MspInitCallback = pCallback;
1717           break;
1718         case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1719           hdfsdm_filter->MspDeInitCallback = pCallback;
1720           break;
1721         default :
1722           /* update the error code */
1723           hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1724           /* update return status */
1725           status = HAL_ERROR;
1726           break;
1727       }
1728     }
1729     else
1730     {
1731       /* update the error code */
1732       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1733       /* update return status */
1734       status = HAL_ERROR;
1735     }
1736   }
1737   return status;
1738 }
1739 
1740 /**
1741   * @brief  Unregister a user DFSDM filter callback.
1742   *         DFSDM filter callback is redirected to the weak predefined callback.
1743   * @param  hdfsdm_filter DFSDM filter handle.
1744   * @param  CallbackID ID of the callback to be unregistered.
1745   *         This parameter can be one of the following values:
1746   *           @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID.
1747   *           @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID.
1748   *           @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID.
1749   *           @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID.
1750   *           @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID.
1751   *           @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID.
1752   *           @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID.
1753   * @retval HAL status.
1754   */
1755 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef        *hdfsdm_filter,
1756                                                       HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID)
1757 {
1758   HAL_StatusTypeDef status = HAL_OK;
1759 
1760   if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1761   {
1762     switch (CallbackID)
1763     {
1764       case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID :
1765         hdfsdm_filter->RegConvCpltCallback = HAL_DFSDM_FilterRegConvCpltCallback;
1766         break;
1767       case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID :
1768         hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback;
1769         break;
1770       case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID :
1771         hdfsdm_filter->InjConvCpltCallback = HAL_DFSDM_FilterInjConvCpltCallback;
1772         break;
1773       case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID :
1774         hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback;
1775         break;
1776       case HAL_DFSDM_FILTER_ERROR_CB_ID :
1777         hdfsdm_filter->ErrorCallback = HAL_DFSDM_FilterErrorCallback;
1778         break;
1779       case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1780         hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
1781         break;
1782       case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1783         hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
1784         break;
1785       default :
1786         /* update the error code */
1787         hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1788         /* update return status */
1789         status = HAL_ERROR;
1790         break;
1791     }
1792   }
1793   else if(HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State)
1794   {
1795     switch (CallbackID)
1796     {
1797       case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1798         hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
1799         break;
1800       case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1801         hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
1802         break;
1803       default :
1804         /* update the error code */
1805         hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1806         /* update return status */
1807         status = HAL_ERROR;
1808         break;
1809     }
1810   }
1811   else
1812   {
1813     /* update the error code */
1814     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1815     /* update return status */
1816     status = HAL_ERROR;
1817   }
1818   return status;
1819 }
1820 
1821 /**
1822   * @brief  Register a user DFSDM filter analog watchdog callback
1823   *         to be used instead of the weak predefined callback.
1824   * @param  hdfsdm_filter DFSDM filter handle.
1825   * @param  pCallback pointer to the DFSDM filter analog watchdog callback function.
1826   * @retval HAL status.
1827   */
1828 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef      *hdfsdm_filter,
1829                                                        pDFSDM_Filter_AwdCallbackTypeDef pCallback)
1830 {
1831   HAL_StatusTypeDef status = HAL_OK;
1832 
1833   if(pCallback == NULL)
1834   {
1835     /* update the error code */
1836     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1837     /* update return status */
1838     status = HAL_ERROR;
1839   }
1840   else
1841   {
1842     if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1843     {
1844       hdfsdm_filter->AwdCallback = pCallback;
1845     }
1846     else
1847     {
1848       /* update the error code */
1849       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1850       /* update return status */
1851       status = HAL_ERROR;
1852     }
1853   }
1854   return status;
1855 }
1856 
1857 /**
1858   * @brief  Unregister a user DFSDM filter analog watchdog callback.
1859   *         DFSDM filter AWD callback is redirected to the weak predefined callback.
1860   * @param  hdfsdm_filter DFSDM filter handle.
1861   * @retval HAL status.
1862   */
1863 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1864 {
1865   HAL_StatusTypeDef status = HAL_OK;
1866 
1867   if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1868   {
1869     hdfsdm_filter->AwdCallback = HAL_DFSDM_FilterAwdCallback;
1870   }
1871   else
1872   {
1873     /* update the error code */
1874     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1875     /* update return status */
1876     status = HAL_ERROR;
1877   }
1878   return status;
1879 }
1880 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
1881 
1882 /**
1883   * @}
1884   */
1885 
1886 /** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
1887   * @ingroup RTEMSBSPsARMSTM32H7
1888  *  @brief    Filter control functions
1889  *
1890 @verbatim
1891   ==============================================================================
1892                     ##### Filter control functions #####
1893   ==============================================================================
1894     [..]  This section provides functions allowing to:
1895       (+) Select channel and enable/disable continuous mode for regular conversion.
1896       (+) Select channels for injected conversion.
1897 @endverbatim
1898   * @{
1899   */
1900 
1901 /**
1902   * @brief  This function allows to select channel and to enable/disable
1903   *         continuous mode for regular conversion.
1904   * @param  hdfsdm_filter DFSDM filter handle.
1905   * @param  Channel Channel for regular conversion.
1906   *         This parameter can be a value of @ref DFSDM_Channel_Selection.
1907   * @param  ContinuousMode Enable/disable continuous mode for regular conversion.
1908   *         This parameter can be a value of @ref DFSDM_ContinuousMode.
1909   * @retval HAL status
1910   */
1911 HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1912                                                    uint32_t                    Channel,
1913                                                    uint32_t                    ContinuousMode)
1914 {
1915   HAL_StatusTypeDef status = HAL_OK;
1916 
1917   /* Check parameters */
1918   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1919   assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));
1920   assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));
1921 
1922   /* Check DFSDM filter state */
1923   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
1924       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
1925   {
1926     /* Configure channel and continuous mode for regular conversion */
1927     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH | DFSDM_FLTCR1_RCONT);
1928     if(ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)
1929     {
1930       hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) (((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) |
1931                                                     DFSDM_FLTCR1_RCONT);
1932     }
1933     else
1934     {
1935       hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) ((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET);
1936     }
1937     /* Store continuous mode information */
1938     hdfsdm_filter->RegularContMode = ContinuousMode;
1939   }
1940   else
1941   {
1942     status = HAL_ERROR;
1943   }
1944 
1945   /* Return function status */
1946   return status;
1947 }
1948 
1949 /**
1950   * @brief  This function allows to select channels for injected conversion.
1951   * @param  hdfsdm_filter DFSDM filter handle.
1952   * @param  Channel Channels for injected conversion.
1953   *         This parameter can be a values combination of @ref DFSDM_Channel_Selection.
1954   * @retval HAL status
1955   */
1956 HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1957                                                    uint32_t                    Channel)
1958 {
1959   HAL_StatusTypeDef status = HAL_OK;
1960 
1961   /* Check parameters */
1962   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1963   assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
1964 
1965   /* Check DFSDM filter state */
1966   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
1967       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
1968   {
1969     /* Configure channel for injected conversion */
1970     hdfsdm_filter->Instance->FLTJCHGR = (uint32_t) (Channel & DFSDM_LSB_MASK);
1971     /* Store number of injected channels */
1972     hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel);
1973     /* Update number of injected channels remaining */
1974     hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
1975                                       hdfsdm_filter->InjectedChannelsNbr : 1U;
1976   }
1977   else
1978   {
1979     status = HAL_ERROR;
1980   }
1981   /* Return function status */
1982   return status;
1983 }
1984 
1985 /**
1986   * @}
1987   */
1988 
1989 /** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
1990   * @ingroup RTEMSBSPsARMSTM32H7
1991  *  @brief    Filter operation functions
1992  *
1993 @verbatim
1994   ==============================================================================
1995                     ##### Filter operation functions #####
1996   ==============================================================================
1997     [..]  This section provides functions allowing to:
1998       (+) Start conversion of regular/injected channel.
1999       (+) Poll for the end of regular/injected conversion.
2000       (+) Stop conversion of regular/injected channel.
2001       (+) Start conversion of regular/injected channel and enable interrupt.
2002       (+) Call the callback functions at the end of regular/injected conversions.
2003       (+) Stop conversion of regular/injected channel and disable interrupt.
2004       (+) Start conversion of regular/injected channel and enable DMA transfer.
2005       (+) Stop conversion of regular/injected channel and disable DMA transfer.
2006       (+) Start analog watchdog and enable interrupt.
2007       (+) Call the callback function when analog watchdog occurs.
2008       (+) Stop analog watchdog and disable interrupt.
2009       (+) Start extreme detector.
2010       (+) Stop extreme detector.
2011       (+) Get result of regular channel conversion.
2012       (+) Get result of injected channel conversion.
2013       (+) Get extreme detector maximum and minimum values.
2014       (+) Get conversion time.
2015       (+) Handle DFSDM interrupt request.
2016 @endverbatim
2017   * @{
2018   */
2019 
2020 /**
2021   * @brief  This function allows to start regular conversion in polling mode.
2022   * @note   This function should be called only when DFSDM filter instance is
2023   *         in idle state or if injected conversion is ongoing.
2024   * @param  hdfsdm_filter DFSDM filter handle.
2025   * @retval HAL status
2026   */
2027 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2028 {
2029   HAL_StatusTypeDef status = HAL_OK;
2030 
2031   /* Check parameters */
2032   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2033 
2034   /* Check DFSDM filter state */
2035   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2036       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
2037   {
2038     /* Start regular conversion */
2039     DFSDM_RegConvStart(hdfsdm_filter);
2040   }
2041   else
2042   {
2043     status = HAL_ERROR;
2044   }
2045   /* Return function status */
2046   return status;
2047 }
2048 
2049 /**
2050   * @brief  This function allows to poll for the end of regular conversion.
2051   * @note   This function should be called only if regular conversion is ongoing.
2052   * @param  hdfsdm_filter DFSDM filter handle.
2053   * @param  Timeout Timeout value in milliseconds.
2054   * @retval HAL status
2055   */
2056 HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2057                                                        uint32_t                    Timeout)
2058 {
2059   uint32_t tickstart;
2060 
2061   /* Check parameters */
2062   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2063 
2064   /* Check DFSDM filter state */
2065   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
2066       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2067   {
2068     /* Return error status */
2069     return HAL_ERROR;
2070   }
2071   else
2072   {
2073     /* Get timeout */
2074     tickstart = HAL_GetTick();
2075 
2076     /* Wait end of regular conversion */
2077     while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF)
2078     {
2079       /* Check the Timeout */
2080       if(Timeout != HAL_MAX_DELAY)
2081       {
2082         if(((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
2083         {
2084           /* Return timeout status */
2085           return HAL_TIMEOUT;
2086         }
2087       }
2088     }
2089     /* Check if overrun occurs */
2090     if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF)
2091     {
2092       /* Update error code and call error callback */
2093       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
2094 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2095       hdfsdm_filter->ErrorCallback(hdfsdm_filter);
2096 #else
2097       HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
2098 #endif
2099 
2100       /* Clear regular overrun flag */
2101       hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
2102     }
2103     /* Update DFSDM filter state only if not continuous conversion and SW trigger */
2104     if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2105         (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
2106     {
2107       hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
2108                              HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
2109     }
2110     /* Return function status */
2111     return HAL_OK;
2112   }
2113 }
2114 
2115 /**
2116   * @brief  This function allows to stop regular conversion in polling mode.
2117   * @note   This function should be called only if regular conversion is ongoing.
2118   * @param  hdfsdm_filter DFSDM filter handle.
2119   * @retval HAL status
2120   */
2121 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2122 {
2123   HAL_StatusTypeDef status = HAL_OK;
2124 
2125   /* Check parameters */
2126   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2127 
2128   /* Check DFSDM filter state */
2129   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
2130       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2131   {
2132     /* Return error status */
2133     status = HAL_ERROR;
2134   }
2135   else
2136   {
2137     /* Stop regular conversion */
2138     DFSDM_RegConvStop(hdfsdm_filter);
2139   }
2140   /* Return function status */
2141   return status;
2142 }
2143 
2144 /**
2145   * @brief  This function allows to start regular conversion in interrupt mode.
2146   * @note   This function should be called only when DFSDM filter instance is
2147   *         in idle state or if injected conversion is ongoing.
2148   * @param  hdfsdm_filter DFSDM filter handle.
2149   * @retval HAL status
2150   */
2151 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2152 {
2153   HAL_StatusTypeDef status = HAL_OK;
2154 
2155   /* Check parameters */
2156   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2157 
2158   /* Check DFSDM filter state */
2159   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2160       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
2161   {
2162     /* Enable interrupts for regular conversions */
2163     hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
2164 
2165     /* Start regular conversion */
2166     DFSDM_RegConvStart(hdfsdm_filter);
2167   }
2168   else
2169   {
2170     status = HAL_ERROR;
2171   }
2172   /* Return function status */
2173   return status;
2174 }
2175 
2176 /**
2177   * @brief  This function allows to stop regular conversion in interrupt mode.
2178   * @note   This function should be called only if regular conversion is ongoing.
2179   * @param  hdfsdm_filter DFSDM filter handle.
2180   * @retval HAL status
2181   */
2182 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2183 {
2184   HAL_StatusTypeDef status = HAL_OK;
2185 
2186   /* Check parameters */
2187   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2188 
2189   /* Check DFSDM filter state */
2190   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
2191       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2192   {
2193     /* Return error status */
2194     status = HAL_ERROR;
2195   }
2196   else
2197   {
2198     /* Disable interrupts for regular conversions */
2199     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
2200 
2201     /* Stop regular conversion */
2202     DFSDM_RegConvStop(hdfsdm_filter);
2203   }
2204   /* Return function status */
2205   return status;
2206 }
2207 
2208 /**
2209   * @brief  This function allows to start regular conversion in DMA mode.
2210   * @note   This function should be called only when DFSDM filter instance is
2211   *         in idle state or if injected conversion is ongoing.
2212   *         Please note that data on buffer will contain signed regular conversion
2213   *         value on 24 most significant bits and corresponding channel on 3 least
2214   *         significant bits.
2215   * @param  hdfsdm_filter DFSDM filter handle.
2216   * @param  pData The destination buffer address.
2217   * @param  Length The length of data to be transferred from DFSDM filter to memory.
2218   * @retval HAL status
2219   */
2220 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2221                                                    int32_t                    *pData,
2222                                                    uint32_t                    Length)
2223 {
2224   HAL_StatusTypeDef status = HAL_OK;
2225 
2226   /* Check parameters */
2227   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2228 
2229   /* Check destination address and length */
2230   if((pData == NULL) || (Length == 0U))
2231   {
2232     status = HAL_ERROR;
2233   }
2234   /* Check that DMA is enabled for regular conversion */
2235   else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
2236   {
2237     status = HAL_ERROR;
2238   }
2239   /* Check parameters compatibility */
2240   else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2241            (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2242            (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
2243            (Length != 1U))
2244   {
2245     status = HAL_ERROR;
2246   }
2247   else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2248            (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2249            (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
2250   {
2251     status = HAL_ERROR;
2252   }
2253   /* Check DFSDM filter state */
2254   else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2255            (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
2256   {
2257     /* Set callbacks on DMA handler */
2258     hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
2259     hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
2260     hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
2261                                                    DFSDM_DMARegularHalfConvCplt : NULL;
2262 
2263     /* Start DMA in interrupt mode */
2264     if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
2265                          (uint32_t) pData, Length) != HAL_OK)
2266     {
2267       /* Set DFSDM filter in error state */
2268       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2269       status = HAL_ERROR;
2270     }
2271     else
2272     {
2273       /* Start regular conversion */
2274       DFSDM_RegConvStart(hdfsdm_filter);
2275     }
2276   }
2277   else
2278   {
2279     status = HAL_ERROR;
2280   }
2281   /* Return function status */
2282   return status;
2283 }
2284 
2285 /**
2286   * @brief  This function allows to start regular conversion in DMA mode and to get
2287   *         only the 16 most significant bits of conversion.
2288   * @note   This function should be called only when DFSDM filter instance is
2289   *         in idle state or if injected conversion is ongoing.
2290   *         Please note that data on buffer will contain signed 16 most significant
2291   *         bits of regular conversion.
2292   * @param  hdfsdm_filter DFSDM filter handle.
2293   * @param  pData The destination buffer address.
2294   * @param  Length The length of data to be transferred from DFSDM filter to memory.
2295   * @retval HAL status
2296   */
2297 HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2298                                                       int16_t                    *pData,
2299                                                       uint32_t                    Length)
2300 {
2301   HAL_StatusTypeDef status = HAL_OK;
2302 
2303   /* Check parameters */
2304   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2305 
2306   /* Check destination address and length */
2307   if((pData == NULL) || (Length == 0U))
2308   {
2309     status = HAL_ERROR;
2310   }
2311   /* Check that DMA is enabled for regular conversion */
2312   else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
2313   {
2314     status = HAL_ERROR;
2315   }
2316   /* Check parameters compatibility */
2317   else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2318            (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2319            (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
2320            (Length != 1U))
2321   {
2322     status = HAL_ERROR;
2323   }
2324   else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2325            (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2326            (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
2327   {
2328     status = HAL_ERROR;
2329   }
2330   /* Check DFSDM filter state */
2331   else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2332            (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
2333   {
2334     /* Set callbacks on DMA handler */
2335     hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
2336     hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
2337     hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
2338                                                    DFSDM_DMARegularHalfConvCplt : NULL;
2339 
2340     /* Start DMA in interrupt mode */
2341     if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2U, \
2342                          (uint32_t) pData, Length) != HAL_OK)
2343     {
2344       /* Set DFSDM filter in error state */
2345       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2346       status = HAL_ERROR;
2347     }
2348     else
2349     {
2350       /* Start regular conversion */
2351       DFSDM_RegConvStart(hdfsdm_filter);
2352     }
2353   }
2354   else
2355   {
2356     status = HAL_ERROR;
2357   }
2358   /* Return function status */
2359   return status;
2360 }
2361 
2362 /**
2363   * @brief  This function allows to stop regular conversion in DMA mode.
2364   * @note   This function should be called only if regular conversion is ongoing.
2365   * @param  hdfsdm_filter DFSDM filter handle.
2366   * @retval HAL status
2367   */
2368 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2369 {
2370   HAL_StatusTypeDef status = HAL_OK;
2371 
2372   /* Check parameters */
2373   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2374 
2375   /* Check DFSDM filter state */
2376   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
2377       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2378   {
2379     /* Return error status */
2380     status = HAL_ERROR;
2381   }
2382   else
2383   {
2384     /* Stop current DMA transfer */
2385     if(HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK)
2386     {
2387       /* Set DFSDM filter in error state */
2388       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2389       status = HAL_ERROR;
2390     }
2391     else
2392     {
2393       /* Stop regular conversion */
2394       DFSDM_RegConvStop(hdfsdm_filter);
2395     }
2396   }
2397   /* Return function status */
2398   return status;
2399 }
2400 
2401 /**
2402   * @brief  This function allows to get regular conversion value.
2403   * @param  hdfsdm_filter DFSDM filter handle.
2404   * @param  Channel Corresponding channel of regular conversion.
2405   * @retval Regular conversion value
2406   */
2407 int32_t HAL_DFSDM_FilterGetRegularValue(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2408                                         uint32_t                   *Channel)
2409 {
2410   uint32_t reg;
2411   int32_t  value;
2412 
2413   /* Check parameters */
2414   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2415   assert_param(Channel != (void *)0);
2416 
2417   /* Get value of data register for regular channel */
2418   reg = hdfsdm_filter->Instance->FLTRDATAR;
2419 
2420   /* Extract channel and regular conversion value */
2421   *Channel = (reg & DFSDM_FLTRDATAR_RDATACH);
2422   /* Regular conversion value is a signed value located on 24 MSB of register */
2423   /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
2424   reg &= DFSDM_FLTRDATAR_RDATA;
2425   value = ((int32_t)reg) / 256;
2426 
2427   /* return regular conversion value */
2428   return value;
2429 }
2430 
2431 /**
2432   * @brief  This function allows to start injected conversion in polling mode.
2433   * @note   This function should be called only when DFSDM filter instance is
2434   *         in idle state or if regular conversion is ongoing.
2435   * @param  hdfsdm_filter DFSDM filter handle.
2436   * @retval HAL status
2437   */
2438 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2439 {
2440   HAL_StatusTypeDef status = HAL_OK;
2441 
2442   /* Check parameters */
2443   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2444 
2445   /* Check DFSDM filter state */
2446   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2447       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2448   {
2449     /* Start injected conversion */
2450     DFSDM_InjConvStart(hdfsdm_filter);
2451   }
2452   else
2453   {
2454     status = HAL_ERROR;
2455   }
2456   /* Return function status */
2457   return status;
2458 }
2459 
2460 /**
2461   * @brief  This function allows to poll for the end of injected conversion.
2462   * @note   This function should be called only if injected conversion is ongoing.
2463   * @param  hdfsdm_filter DFSDM filter handle.
2464   * @param  Timeout Timeout value in milliseconds.
2465   * @retval HAL status
2466   */
2467 HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2468                                                        uint32_t                    Timeout)
2469 {
2470   uint32_t tickstart;
2471 
2472   /* Check parameters */
2473   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2474 
2475   /* Check DFSDM filter state */
2476   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2477       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2478   {
2479     /* Return error status */
2480     return HAL_ERROR;
2481   }
2482   else
2483   {
2484     /* Get timeout */
2485     tickstart = HAL_GetTick();
2486 
2487     /* Wait end of injected conversions */
2488     while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF)
2489     {
2490       /* Check the Timeout */
2491       if(Timeout != HAL_MAX_DELAY)
2492       {
2493         if(((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
2494         {
2495           /* Return timeout status */
2496           return HAL_TIMEOUT;
2497         }
2498       }
2499     }
2500     /* Check if overrun occurs */
2501     if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF)
2502     {
2503       /* Update error code and call error callback */
2504       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
2505 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2506       hdfsdm_filter->ErrorCallback(hdfsdm_filter);
2507 #else
2508       HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
2509 #endif
2510 
2511       /* Clear injected overrun flag */
2512       hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
2513     }
2514 
2515     /* Update remaining injected conversions */
2516     hdfsdm_filter->InjConvRemaining--;
2517     if(hdfsdm_filter->InjConvRemaining == 0U)
2518     {
2519       /* Update DFSDM filter state only if trigger is software */
2520       if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
2521       {
2522         hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
2523                                HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
2524       }
2525 
2526       /* end of injected sequence, reset the value */
2527       hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
2528                                         hdfsdm_filter->InjectedChannelsNbr : 1U;
2529     }
2530 
2531     /* Return function status */
2532     return HAL_OK;
2533   }
2534 }
2535 
2536 /**
2537   * @brief  This function allows to stop injected conversion in polling mode.
2538   * @note   This function should be called only if injected conversion is ongoing.
2539   * @param  hdfsdm_filter DFSDM filter handle.
2540   * @retval HAL status
2541   */
2542 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2543 {
2544   HAL_StatusTypeDef status = HAL_OK;
2545 
2546   /* Check parameters */
2547   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2548 
2549   /* Check DFSDM filter state */
2550   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2551       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2552   {
2553     /* Return error status */
2554     status = HAL_ERROR;
2555   }
2556   else
2557   {
2558     /* Stop injected conversion */
2559     DFSDM_InjConvStop(hdfsdm_filter);
2560   }
2561   /* Return function status */
2562   return status;
2563 }
2564 
2565 /**
2566   * @brief  This function allows to start injected conversion in interrupt mode.
2567   * @note   This function should be called only when DFSDM filter instance is
2568   *         in idle state or if regular conversion is ongoing.
2569   * @param  hdfsdm_filter DFSDM filter handle.
2570   * @retval HAL status
2571   */
2572 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2573 {
2574   HAL_StatusTypeDef status = HAL_OK;
2575 
2576   /* Check parameters */
2577   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2578 
2579   /* Check DFSDM filter state */
2580   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2581       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2582   {
2583     /* Enable interrupts for injected conversions */
2584     hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
2585 
2586     /* Start injected conversion */
2587     DFSDM_InjConvStart(hdfsdm_filter);
2588   }
2589   else
2590   {
2591     status = HAL_ERROR;
2592   }
2593   /* Return function status */
2594   return status;
2595 }
2596 
2597 /**
2598   * @brief  This function allows to stop injected conversion in interrupt mode.
2599   * @note   This function should be called only if injected conversion is ongoing.
2600   * @param  hdfsdm_filter DFSDM filter handle.
2601   * @retval HAL status
2602   */
2603 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2604 {
2605   HAL_StatusTypeDef status = HAL_OK;
2606 
2607   /* Check parameters */
2608   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2609 
2610   /* Check DFSDM filter state */
2611   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2612       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2613   {
2614     /* Return error status */
2615     status = HAL_ERROR;
2616   }
2617   else
2618   {
2619     /* Disable interrupts for injected conversions */
2620     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
2621 
2622     /* Stop injected conversion */
2623     DFSDM_InjConvStop(hdfsdm_filter);
2624   }
2625   /* Return function status */
2626   return status;
2627 }
2628 
2629 /**
2630   * @brief  This function allows to start injected conversion in DMA mode.
2631   * @note   This function should be called only when DFSDM filter instance is
2632   *         in idle state or if regular conversion is ongoing.
2633   *         Please note that data on buffer will contain signed injected conversion
2634   *         value on 24 most significant bits and corresponding channel on 3 least
2635   *         significant bits.
2636   * @param  hdfsdm_filter DFSDM filter handle.
2637   * @param  pData The destination buffer address.
2638   * @param  Length The length of data to be transferred from DFSDM filter to memory.
2639   * @retval HAL status
2640   */
2641 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2642                                                     int32_t                    *pData,
2643                                                     uint32_t                    Length)
2644 {
2645   HAL_StatusTypeDef status = HAL_OK;
2646 
2647   /* Check parameters */
2648   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2649 
2650   /* Check destination address and length */
2651   if((pData == NULL) || (Length == 0U))
2652   {
2653     status = HAL_ERROR;
2654   }
2655   /* Check that DMA is enabled for injected conversion */
2656   else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
2657   {
2658     status = HAL_ERROR;
2659   }
2660   /* Check parameters compatibility */
2661   else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2662            (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
2663            (Length > hdfsdm_filter->InjConvRemaining))
2664   {
2665     status = HAL_ERROR;
2666   }
2667   else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2668            (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
2669   {
2670     status = HAL_ERROR;
2671   }
2672   /* Check DFSDM filter state */
2673   else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2674            (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2675   {
2676     /* Set callbacks on DMA handler */
2677     hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
2678     hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
2679     hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
2680                                                    DFSDM_DMAInjectedHalfConvCplt : NULL;
2681 
2682     /* Start DMA in interrupt mode */
2683     if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \
2684                          (uint32_t) pData, Length) != HAL_OK)
2685     {
2686       /* Set DFSDM filter in error state */
2687       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2688       status = HAL_ERROR;
2689     }
2690     else
2691     {
2692       /* Start injected conversion */
2693       DFSDM_InjConvStart(hdfsdm_filter);
2694     }
2695   }
2696   else
2697   {
2698     status = HAL_ERROR;
2699   }
2700   /* Return function status */
2701   return status;
2702 }
2703 
2704 /**
2705   * @brief  This function allows to start injected conversion in DMA mode and to get
2706   *         only the 16 most significant bits of conversion.
2707   * @note   This function should be called only when DFSDM filter instance is
2708   *         in idle state or if regular conversion is ongoing.
2709   *         Please note that data on buffer will contain signed 16 most significant
2710   *         bits of injected conversion.
2711   * @param  hdfsdm_filter DFSDM filter handle.
2712   * @param  pData The destination buffer address.
2713   * @param  Length The length of data to be transferred from DFSDM filter to memory.
2714   * @retval HAL status
2715   */
2716 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2717                                                        int16_t                    *pData,
2718                                                        uint32_t                    Length)
2719 {
2720   HAL_StatusTypeDef status = HAL_OK;
2721 
2722   /* Check parameters */
2723   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2724 
2725   /* Check destination address and length */
2726   if((pData == NULL) || (Length == 0U))
2727   {
2728     status = HAL_ERROR;
2729   }
2730   /* Check that DMA is enabled for injected conversion */
2731   else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
2732   {
2733     status = HAL_ERROR;
2734   }
2735   /* Check parameters compatibility */
2736   else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2737            (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
2738            (Length > hdfsdm_filter->InjConvRemaining))
2739   {
2740     status = HAL_ERROR;
2741   }
2742   else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2743            (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
2744   {
2745     status = HAL_ERROR;
2746   }
2747   /* Check DFSDM filter state */
2748   else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2749            (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2750   {
2751     /* Set callbacks on DMA handler */
2752     hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
2753     hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
2754     hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
2755                                                    DFSDM_DMAInjectedHalfConvCplt : NULL;
2756 
2757     /* Start DMA in interrupt mode */
2758     if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2U, \
2759                          (uint32_t) pData, Length) != HAL_OK)
2760     {
2761       /* Set DFSDM filter in error state */
2762       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2763       status = HAL_ERROR;
2764     }
2765     else
2766     {
2767       /* Start injected conversion */
2768       DFSDM_InjConvStart(hdfsdm_filter);
2769     }
2770   }
2771   else
2772   {
2773     status = HAL_ERROR;
2774   }
2775   /* Return function status */
2776   return status;
2777 }
2778 
2779 /**
2780   * @brief  This function allows to stop injected conversion in DMA mode.
2781   * @note   This function should be called only if injected conversion is ongoing.
2782   * @param  hdfsdm_filter DFSDM filter handle.
2783   * @retval HAL status
2784   */
2785 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2786 {
2787   HAL_StatusTypeDef status = HAL_OK;
2788 
2789   /* Check parameters */
2790   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2791 
2792   /* Check DFSDM filter state */
2793   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2794       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2795   {
2796     /* Return error status */
2797     status = HAL_ERROR;
2798   }
2799   else
2800   {
2801     /* Stop current DMA transfer */
2802     if(HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK)
2803     {
2804       /* Set DFSDM filter in error state */
2805       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2806       status = HAL_ERROR;
2807     }
2808     else
2809     {
2810       /* Stop regular conversion */
2811       DFSDM_InjConvStop(hdfsdm_filter);
2812     }
2813   }
2814   /* Return function status */
2815   return status;
2816 }
2817 
2818 /**
2819   * @brief  This function allows to get injected conversion value.
2820   * @param  hdfsdm_filter DFSDM filter handle.
2821   * @param  Channel Corresponding channel of injected conversion.
2822   * @retval Injected conversion value
2823   */
2824 int32_t HAL_DFSDM_FilterGetInjectedValue(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2825                                          uint32_t                   *Channel)
2826 {
2827   uint32_t reg;
2828   int32_t  value;
2829 
2830   /* Check parameters */
2831   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2832   assert_param(Channel != (void *)0);
2833 
2834   /* Get value of data register for injected channel */
2835   reg = hdfsdm_filter->Instance->FLTJDATAR;
2836 
2837   /* Extract channel and injected conversion value */
2838   *Channel = (reg & DFSDM_FLTJDATAR_JDATACH);
2839   /* Injected conversion value is a signed value located on 24 MSB of register */
2840   /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
2841   reg &= DFSDM_FLTJDATAR_JDATA;
2842   value = ((int32_t)reg) / 256;
2843 
2844   /* return regular conversion value */
2845   return value;
2846 }
2847 
2848 /**
2849   * @brief  This function allows to start filter analog watchdog in interrupt mode.
2850   * @param  hdfsdm_filter DFSDM filter handle.
2851   * @param  awdParam DFSDM filter analog watchdog parameters.
2852   * @retval HAL status
2853   */
2854 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef   *hdfsdm_filter,
2855                                               const DFSDM_Filter_AwdParamTypeDef *awdParam)
2856 {
2857   HAL_StatusTypeDef status = HAL_OK;
2858 
2859   /* Check parameters */
2860   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2861   assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource));
2862   assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel));
2863   assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold));
2864   assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold));
2865   assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal));
2866   assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal));
2867 
2868   /* Check DFSDM filter state */
2869   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2870       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2871   {
2872     /* Return error status */
2873     status = HAL_ERROR;
2874   }
2875   else
2876   {
2877     /* Set analog watchdog data source */
2878     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
2879     hdfsdm_filter->Instance->FLTCR1 |= awdParam->DataSource;
2880 
2881     /* Set thresholds and break signals */
2882     hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
2883     hdfsdm_filter->Instance->FLTAWHTR |= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_AWHT_Pos) | \
2884                                           awdParam->HighBreakSignal);
2885     hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
2886     hdfsdm_filter->Instance->FLTAWLTR |= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_AWLT_Pos) | \
2887                                           awdParam->LowBreakSignal);
2888 
2889     /* Set channels and interrupt for analog watchdog */
2890     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH);
2891     hdfsdm_filter->Instance->FLTCR2 |= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_Pos) | \
2892                                         DFSDM_FLTCR2_AWDIE);
2893   }
2894   /* Return function status */
2895   return status;
2896 }
2897 
2898 /**
2899   * @brief  This function allows to stop filter analog watchdog in interrupt mode.
2900   * @param  hdfsdm_filter DFSDM filter handle.
2901   * @retval HAL status
2902   */
2903 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2904 {
2905   HAL_StatusTypeDef status = HAL_OK;
2906 
2907   /* Check parameters */
2908   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2909 
2910   /* Check DFSDM filter state */
2911   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2912       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2913   {
2914     /* Return error status */
2915     status = HAL_ERROR;
2916   }
2917   else
2918   {
2919     /* Reset channels for analog watchdog and deactivate interrupt */
2920     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH | DFSDM_FLTCR2_AWDIE);
2921 
2922     /* Clear all analog watchdog flags */
2923     hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF | DFSDM_FLTAWCFR_CLRAWLTF);
2924 
2925     /* Reset thresholds and break signals */
2926     hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
2927     hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
2928 
2929     /* Reset analog watchdog data source */
2930     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
2931   }
2932   /* Return function status */
2933   return status;
2934 }
2935 
2936 /**
2937   * @brief  This function allows to start extreme detector feature.
2938   * @param  hdfsdm_filter DFSDM filter handle.
2939   * @param  Channel Channels where extreme detector is enabled.
2940   *         This parameter can be a values combination of @ref DFSDM_Channel_Selection.
2941   * @retval HAL status
2942   */
2943 HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2944                                            uint32_t                    Channel)
2945 {
2946   HAL_StatusTypeDef status = HAL_OK;
2947 
2948   /* Check parameters */
2949   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2950   assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
2951 
2952   /* Check DFSDM filter state */
2953   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2954       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2955   {
2956     /* Return error status */
2957     status = HAL_ERROR;
2958   }
2959   else
2960   {
2961     /* Set channels for extreme detector */
2962     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
2963     hdfsdm_filter->Instance->FLTCR2 |= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_Pos);
2964   }
2965   /* Return function status */
2966   return status;
2967 }
2968 
2969 /**
2970   * @brief  This function allows to stop extreme detector feature.
2971   * @param  hdfsdm_filter DFSDM filter handle.
2972   * @retval HAL status
2973   */
2974 HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2975 {
2976   HAL_StatusTypeDef status = HAL_OK;
2977   __IO uint32_t     reg1;
2978   __IO uint32_t     reg2;
2979 
2980   /* Check parameters */
2981   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2982 
2983   /* Check DFSDM filter state */
2984   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2985       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2986   {
2987     /* Return error status */
2988     status = HAL_ERROR;
2989   }
2990   else
2991   {
2992     /* Reset channels for extreme detector */
2993     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
2994 
2995     /* Clear extreme detector values */
2996     reg1 = hdfsdm_filter->Instance->FLTEXMAX;
2997     reg2 = hdfsdm_filter->Instance->FLTEXMIN;
2998     UNUSED(reg1); /* To avoid GCC warning */
2999     UNUSED(reg2); /* To avoid GCC warning */
3000   }
3001   /* Return function status */
3002   return status;
3003 }
3004 
3005 /**
3006   * @brief  This function allows to get extreme detector maximum value.
3007   * @param  hdfsdm_filter DFSDM filter handle.
3008   * @param  Channel Corresponding channel.
3009   * @retval Extreme detector maximum value
3010   *         This value is between Min_Data = -8388608 and Max_Data = 8388607.
3011   */
3012 int32_t HAL_DFSDM_FilterGetExdMaxValue(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
3013                                        uint32_t                   *Channel)
3014 {
3015   uint32_t reg;
3016   int32_t  value;
3017 
3018   /* Check parameters */
3019   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
3020   assert_param(Channel != (void *)0);
3021 
3022   /* Get value of extreme detector maximum register */
3023   reg = hdfsdm_filter->Instance->FLTEXMAX;
3024 
3025   /* Extract channel and extreme detector maximum value */
3026   *Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH);
3027   /* Extreme detector maximum value is a signed value located on 24 MSB of register */
3028   /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
3029   reg &= DFSDM_FLTEXMAX_EXMAX;
3030   value = ((int32_t)reg) / 256;
3031 
3032   /* return extreme detector maximum value */
3033   return value;
3034 }
3035 
3036 /**
3037   * @brief  This function allows to get extreme detector minimum value.
3038   * @param  hdfsdm_filter DFSDM filter handle.
3039   * @param  Channel Corresponding channel.
3040   * @retval Extreme detector minimum value
3041   *         This value is between Min_Data = -8388608 and Max_Data = 8388607.
3042   */
3043 int32_t HAL_DFSDM_FilterGetExdMinValue(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
3044                                        uint32_t                   *Channel)
3045 {
3046   uint32_t reg;
3047   int32_t  value;
3048 
3049   /* Check parameters */
3050   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
3051   assert_param(Channel != (void *)0);
3052 
3053   /* Get value of extreme detector minimum register */
3054   reg = hdfsdm_filter->Instance->FLTEXMIN;
3055 
3056   /* Extract channel and extreme detector minimum value */
3057   *Channel = (reg & DFSDM_FLTEXMIN_EXMINCH);
3058   /* Extreme detector minimum value is a signed value located on 24 MSB of register */
3059   /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
3060   reg &= DFSDM_FLTEXMIN_EXMIN;
3061   value = ((int32_t)reg) / 256;
3062 
3063   /* return extreme detector minimum value */
3064   return value;
3065 }
3066 
3067 /**
3068   * @brief  This function allows to get conversion time value.
3069   * @param  hdfsdm_filter DFSDM filter handle.
3070   * @retval Conversion time value
3071   * @note   To get time in second, this value has to be divided by DFSDM clock frequency.
3072   */
3073 uint32_t HAL_DFSDM_FilterGetConvTimeValue(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3074 {
3075   uint32_t reg;
3076   uint32_t value;
3077 
3078   /* Check parameters */
3079   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
3080 
3081   /* Get value of conversion timer register */
3082   reg = hdfsdm_filter->Instance->FLTCNVTIMR;
3083 
3084   /* Extract conversion time value */
3085   value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_CNVCNT_Pos);
3086 
3087   /* return extreme detector minimum value */
3088   return value;
3089 }
3090 
3091 /**
3092   * @brief  This function handles the DFSDM interrupts.
3093   * @param  hdfsdm_filter DFSDM filter handle.
3094   * @retval None
3095   */
3096 void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3097 {
3098   DFSDM_Channel_HandleTypeDef **channelHandleTable;
3099   const DFSDM_Filter_TypeDef   *filter0Instance;
3100   uint32_t channelNumber;
3101 
3102   /* Get FTLISR and FLTCR2 register values */
3103   const uint32_t temp_fltisr = hdfsdm_filter->Instance->FLTISR;
3104   const uint32_t temp_fltcr2 = hdfsdm_filter->Instance->FLTCR2;
3105 
3106 #if defined(DFSDM2_Channel0)
3107   if (IS_DFSDM1_FILTER_INSTANCE(hdfsdm_filter->Instance))
3108   {
3109     channelHandleTable = a_dfsdm1ChannelHandle;
3110     filter0Instance    = DFSDM1_Filter0;
3111     channelNumber      = DFSDM1_CHANNEL_NUMBER;
3112   }
3113   else
3114   {
3115     channelHandleTable = a_dfsdm2ChannelHandle;
3116     filter0Instance    = DFSDM2_Filter0;
3117     channelNumber      = DFSDM2_CHANNEL_NUMBER;
3118   }
3119 #else /* DFSDM2_Channel0 */
3120   channelHandleTable = a_dfsdm1ChannelHandle;
3121   filter0Instance    = DFSDM1_Filter0;
3122   channelNumber      = DFSDM1_CHANNEL_NUMBER;
3123 #endif /* DFSDM2_Channel0 */
3124 
3125   /* Check if overrun occurs during regular conversion */
3126   if(((temp_fltisr & DFSDM_FLTISR_ROVRF) != 0U) && \
3127       ((temp_fltcr2 & DFSDM_FLTCR2_ROVRIE) != 0U))
3128   {
3129     /* Clear regular overrun flag */
3130     hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
3131 
3132     /* Update error code */
3133     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
3134 
3135     /* Call error callback */
3136 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3137     hdfsdm_filter->ErrorCallback(hdfsdm_filter);
3138 #else
3139     HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
3140 #endif
3141   }
3142   /* Check if overrun occurs during injected conversion */
3143   else if(((temp_fltisr & DFSDM_FLTISR_JOVRF) != 0U) && \
3144            ((temp_fltcr2 & DFSDM_FLTCR2_JOVRIE) != 0U))
3145   {
3146     /* Clear injected overrun flag */
3147     hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
3148 
3149     /* Update error code */
3150     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
3151 
3152     /* Call error callback */
3153 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3154     hdfsdm_filter->ErrorCallback(hdfsdm_filter);
3155 #else
3156     HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
3157 #endif
3158   }
3159   /* Check if end of regular conversion */
3160   else if(((temp_fltisr & DFSDM_FLTISR_REOCF) != 0U) && \
3161            ((temp_fltcr2 & DFSDM_FLTCR2_REOCIE) != 0U))
3162   {
3163     /* Call regular conversion complete callback */
3164 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3165     hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter);
3166 #else
3167     HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
3168 #endif
3169 
3170     /* End of conversion if mode is not continuous and software trigger */
3171     if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
3172         (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
3173     {
3174       /* Disable interrupts for regular conversions */
3175       hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE);
3176 
3177       /* Update DFSDM filter state */
3178       hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
3179                              HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
3180     }
3181   }
3182   /* Check if end of injected conversion */
3183   else if(((temp_fltisr & DFSDM_FLTISR_JEOCF) != 0U) && \
3184            ((temp_fltcr2 & DFSDM_FLTCR2_JEOCIE) != 0U))
3185   {
3186     /* Call injected conversion complete callback */
3187 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3188     hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter);
3189 #else
3190     HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
3191 #endif
3192 
3193     /* Update remaining injected conversions */
3194     hdfsdm_filter->InjConvRemaining--;
3195     if(hdfsdm_filter->InjConvRemaining == 0U)
3196     {
3197       /* End of conversion if trigger is software */
3198       if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3199       {
3200         /* Disable interrupts for injected conversions */
3201         hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE);
3202 
3203         /* Update DFSDM filter state */
3204         hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
3205                                HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
3206       }
3207       /* end of injected sequence, reset the value */
3208       hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3209                                         hdfsdm_filter->InjectedChannelsNbr : 1U;
3210     }
3211   }
3212   /* Check if analog watchdog occurs */
3213   else if(((temp_fltisr & DFSDM_FLTISR_AWDF) != 0U) && \
3214            ((temp_fltcr2 & DFSDM_FLTCR2_AWDIE) != 0U))
3215   {
3216     uint32_t reg;
3217     uint32_t threshold;
3218     uint32_t channel = 0;
3219 
3220     /* Get channel and threshold */
3221     reg = hdfsdm_filter->Instance->FLTAWSR;
3222     threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0U) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;
3223     if(threshold == DFSDM_AWD_HIGH_THRESHOLD)
3224     {
3225       reg = reg >> DFSDM_FLTAWSR_AWHTF_Pos;
3226     }
3227     while (((reg & 1U) == 0U) && (channel < (channelNumber - 1U)))
3228     {
3229       channel++;
3230       reg = reg >> 1;
3231     }
3232     /* Clear analog watchdog flag */
3233     hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \
3234                                         (1UL << (DFSDM_FLTAWSR_AWHTF_Pos + channel)) : \
3235                                         (1UL << channel);
3236 
3237     /* Call analog watchdog callback */
3238 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3239     hdfsdm_filter->AwdCallback(hdfsdm_filter, channel, threshold);
3240 #else
3241     HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold);
3242 #endif
3243   }
3244   /* Check if clock absence occurs */
3245   else if((hdfsdm_filter->Instance == filter0Instance) && \
3246            ((temp_fltisr & DFSDM_FLTISR_CKABF) != 0U) && \
3247            ((temp_fltcr2 & DFSDM_FLTCR2_CKABIE) != 0U))
3248   {
3249     uint32_t reg;
3250     uint32_t channel = 0;
3251 
3252     reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_Pos);
3253 
3254     while (channel < channelNumber)
3255     {
3256       /* Check if flag is set and corresponding channel is enabled */
3257       if (((reg & 1U) != 0U) && (channelHandleTable[channel] != NULL))
3258       {
3259         /* Check clock absence has been enabled for this channel */
3260         if ((channelHandleTable[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0U)
3261         {
3262           /* Clear clock absence flag */
3263           hdfsdm_filter->Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
3264 
3265           /* Call clock absence callback */
3266 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3267           channelHandleTable[channel]->CkabCallback(channelHandleTable[channel]);
3268 #else
3269           HAL_DFSDM_ChannelCkabCallback(channelHandleTable[channel]);
3270 #endif
3271         }
3272       }
3273       channel++;
3274       reg = reg >> 1;
3275     }
3276   }
3277   /* Check if short circuit detection occurs */
3278   else if((hdfsdm_filter->Instance == filter0Instance) && \
3279            ((temp_fltisr & DFSDM_FLTISR_SCDF) != 0U) && \
3280            ((temp_fltcr2 & DFSDM_FLTCR2_SCDIE) != 0U))
3281   {
3282     uint32_t reg;
3283     uint32_t channel = 0;
3284 
3285     /* Get channel */
3286     reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_Pos);
3287     while (((reg & 1U) == 0U) && (channel < (channelNumber - 1U)))
3288     {
3289       channel++;
3290       reg = reg >> 1;
3291     }
3292 
3293     /* Clear short circuit detection flag */
3294     hdfsdm_filter->Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
3295 
3296     /* Call short circuit detection callback */
3297 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3298     channelHandleTable[channel]->ScdCallback(channelHandleTable[channel]);
3299 #else
3300     HAL_DFSDM_ChannelScdCallback(channelHandleTable[channel]);
3301 #endif
3302   }
3303 }
3304 
3305 /**
3306   * @brief  Regular conversion complete callback.
3307   * @note   In interrupt mode, user has to read conversion value in this function
3308   *         using HAL_DFSDM_FilterGetRegularValue.
3309   * @param  hdfsdm_filter DFSDM filter handle.
3310   * @retval None
3311   */
3312 __weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3313 {
3314   /* Prevent unused argument(s) compilation warning */
3315   UNUSED(hdfsdm_filter);
3316 
3317   /* NOTE : This function should not be modified, when the callback is needed,
3318             the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file.
3319    */
3320 }
3321 
3322 /**
3323   * @brief  Half regular conversion complete callback.
3324   * @param  hdfsdm_filter DFSDM filter handle.
3325   * @retval None
3326   */
3327 __weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3328 {
3329   /* Prevent unused argument(s) compilation warning */
3330   UNUSED(hdfsdm_filter);
3331 
3332   /* NOTE : This function should not be modified, when the callback is needed,
3333             the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file.
3334    */
3335 }
3336 
3337 /**
3338   * @brief  Injected conversion complete callback.
3339   * @note   In interrupt mode, user has to read conversion value in this function
3340   *         using HAL_DFSDM_FilterGetInjectedValue.
3341   * @param  hdfsdm_filter DFSDM filter handle.
3342   * @retval None
3343   */
3344 __weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3345 {
3346   /* Prevent unused argument(s) compilation warning */
3347   UNUSED(hdfsdm_filter);
3348 
3349   /* NOTE : This function should not be modified, when the callback is needed,
3350             the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file.
3351    */
3352 }
3353 
3354 /**
3355   * @brief  Half injected conversion complete callback.
3356   * @param  hdfsdm_filter DFSDM filter handle.
3357   * @retval None
3358   */
3359 __weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3360 {
3361   /* Prevent unused argument(s) compilation warning */
3362   UNUSED(hdfsdm_filter);
3363 
3364   /* NOTE : This function should not be modified, when the callback is needed,
3365             the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file.
3366    */
3367 }
3368 
3369 /**
3370   * @brief  Filter analog watchdog callback.
3371   * @param  hdfsdm_filter DFSDM filter handle.
3372   * @param  Channel Corresponding channel.
3373   * @param  Threshold Low or high threshold has been reached.
3374   * @retval None
3375   */
3376 __weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
3377                                         uint32_t Channel, uint32_t Threshold)
3378 {
3379   /* Prevent unused argument(s) compilation warning */
3380   UNUSED(hdfsdm_filter);
3381   UNUSED(Channel);
3382   UNUSED(Threshold);
3383 
3384   /* NOTE : This function should not be modified, when the callback is needed,
3385             the HAL_DFSDM_FilterAwdCallback could be implemented in the user file.
3386    */
3387 }
3388 
3389 /**
3390   * @brief  Error callback.
3391   * @param  hdfsdm_filter DFSDM filter handle.
3392   * @retval None
3393   */
3394 __weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3395 {
3396   /* Prevent unused argument(s) compilation warning */
3397   UNUSED(hdfsdm_filter);
3398 
3399   /* NOTE : This function should not be modified, when the callback is needed,
3400             the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.
3401    */
3402 }
3403 
3404 /**
3405   * @}
3406   */
3407 
3408 /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
3409   * @ingroup RTEMSBSPsARMSTM32H7
3410  *  @brief    Filter state functions
3411  *
3412 @verbatim
3413   ==============================================================================
3414                      ##### Filter state functions #####
3415   ==============================================================================
3416     [..]  This section provides functions allowing to:
3417       (+) Get the DFSDM filter state.
3418       (+) Get the DFSDM filter error.
3419 @endverbatim
3420   * @{
3421   */
3422 
3423 /**
3424   * @brief  This function allows to get the current DFSDM filter handle state.
3425   * @param  hdfsdm_filter DFSDM filter handle.
3426   * @retval DFSDM filter state.
3427   */
3428 HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3429 {
3430   /* Return DFSDM filter handle state */
3431   return hdfsdm_filter->State;
3432 }
3433 
3434 /**
3435   * @brief  This function allows to get the current DFSDM filter error.
3436   * @param  hdfsdm_filter DFSDM filter handle.
3437   * @retval DFSDM filter error code.
3438   */
3439 uint32_t HAL_DFSDM_FilterGetError(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3440 {
3441   return hdfsdm_filter->ErrorCode;
3442 }
3443 
3444 /**
3445   * @}
3446   */
3447 
3448 /**
3449   * @}
3450   */
3451 /* End of exported functions -------------------------------------------------*/
3452 
3453 /* Private functions ---------------------------------------------------------*/
3454 /** @addtogroup DFSDM_Private_Functions DFSDM Private Functions
3455   * @{
3456   */
3457 
3458 /**
3459   * @brief  DMA half transfer complete callback for regular conversion.
3460   * @param  hdma DMA handle.
3461   * @retval None
3462   */
3463 static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
3464 {
3465   /* Get DFSDM filter handle */
3466   DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3467 
3468   /* Call regular half conversion complete callback */
3469 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3470   hdfsdm_filter->RegConvHalfCpltCallback(hdfsdm_filter);
3471 #else
3472   HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);
3473 #endif
3474 }
3475 
3476 /**
3477   * @brief  DMA transfer complete callback for regular conversion.
3478   * @param  hdma DMA handle.
3479   * @retval None
3480   */
3481 static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
3482 {
3483   /* Get DFSDM filter handle */
3484   DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3485 
3486   /* Call regular conversion complete callback */
3487 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3488   hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter);
3489 #else
3490   HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
3491 #endif
3492 }
3493 
3494 /**
3495   * @brief  DMA half transfer complete callback for injected conversion.
3496   * @param  hdma DMA handle.
3497   * @retval None
3498   */
3499 static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)
3500 {
3501   /* Get DFSDM filter handle */
3502   DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3503 
3504   /* Call injected half conversion complete callback */
3505 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3506   hdfsdm_filter->InjConvHalfCpltCallback(hdfsdm_filter);
3507 #else
3508   HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter);
3509 #endif
3510 }
3511 
3512 /**
3513   * @brief  DMA transfer complete callback for injected conversion.
3514   * @param  hdma DMA handle.
3515   * @retval None
3516   */
3517 static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)
3518 {
3519   /* Get DFSDM filter handle */
3520   DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3521 
3522   /* Call injected conversion complete callback */
3523 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3524   hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter);
3525 #else
3526   HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
3527 #endif
3528 }
3529 
3530 /**
3531   * @brief  DMA error callback.
3532   * @param  hdma DMA handle.
3533   * @retval None
3534   */
3535 static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
3536 {
3537   /* Get DFSDM filter handle */
3538   DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3539 
3540   /* Update error code */
3541   hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;
3542 
3543   /* Call error callback */
3544 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3545   hdfsdm_filter->ErrorCallback(hdfsdm_filter);
3546 #else
3547   HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
3548 #endif
3549 }
3550 
3551 /**
3552   * @brief  This function allows to get the number of injected channels.
3553   * @param  Channels bitfield of injected channels.
3554   * @retval Number of injected channels.
3555   */
3556 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
3557 {
3558   uint32_t nbChannels = 0;
3559   uint32_t tmp;
3560 
3561   /* Get the number of channels from bitfield */
3562   tmp = (uint32_t)(Channels & DFSDM_LSB_MASK);
3563   while(tmp != 0U)
3564   {
3565     if((tmp & 1U) != 0U)
3566     {
3567       nbChannels++;
3568     }
3569     tmp = (uint32_t)(tmp >> 1);
3570   }
3571   return nbChannels;
3572 }
3573 
3574 /**
3575   * @brief  This function allows to get the channel number from channel instance.
3576   * @param  Instance DFSDM channel instance.
3577   * @retval Channel number.
3578   */
3579 static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef* Instance)
3580 {
3581   uint32_t channel;
3582 
3583   /* Get channel from instance */
3584   if(Instance == DFSDM1_Channel0)
3585   {
3586     channel = 0;
3587   }
3588 #if defined(DFSDM2_Channel0)
3589   else if (Instance == DFSDM2_Channel0)
3590   {
3591     channel = 0;
3592   }
3593   else if (Instance == DFSDM2_Channel1)
3594   {
3595     channel = 1;
3596   }
3597 #endif /* DFSDM2_Channel0 */
3598   else if(Instance == DFSDM1_Channel1)
3599   {
3600     channel = 1;
3601   }
3602   else if(Instance == DFSDM1_Channel2)
3603   {
3604     channel = 2;
3605   }
3606   else if(Instance == DFSDM1_Channel3)
3607   {
3608     channel = 3;
3609   }
3610   else if(Instance == DFSDM1_Channel4)
3611   {
3612     channel = 4;
3613   }
3614   else if(Instance == DFSDM1_Channel5)
3615   {
3616     channel = 5;
3617   }
3618   else if(Instance == DFSDM1_Channel6)
3619   {
3620     channel = 6;
3621   }
3622   else /* DFSDM1_Channel7 */
3623   {
3624     channel = 7;
3625   }
3626 
3627   return channel;
3628 }
3629 
3630 /**
3631   * @brief  This function allows to really start regular conversion.
3632   * @param  hdfsdm_filter DFSDM filter handle.
3633   * @retval None
3634   */
3635 static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3636 {
3637   /* Check regular trigger */
3638   if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)
3639   {
3640     /* Software start of regular conversion */
3641     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
3642   }
3643   else /* synchronous trigger */
3644   {
3645     /* Disable DFSDM filter */
3646     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3647 
3648     /* Set RSYNC bit in DFSDM_FLTCR1 register */
3649     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSYNC;
3650 
3651     /* Enable DFSDM  filter */
3652     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3653 
3654     /* If injected conversion was in progress, restart it */
3655     if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)
3656     {
3657       if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3658       {
3659         hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
3660       }
3661       /* Update remaining injected conversions */
3662       hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3663                                         hdfsdm_filter->InjectedChannelsNbr : 1U;
3664     }
3665   }
3666   /* Update DFSDM filter state */
3667   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
3668                          HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;
3669 }
3670 
3671 /**
3672   * @brief  This function allows to really stop regular conversion.
3673   * @param  hdfsdm_filter DFSDM filter handle.
3674   * @retval None
3675   */
3676 static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3677 {
3678   /* Disable DFSDM filter */
3679   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3680 
3681   /* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */
3682   if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)
3683   {
3684     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
3685   }
3686 
3687   /* Enable DFSDM filter */
3688   hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3689 
3690   /* If injected conversion was in progress, restart it */
3691   if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)
3692   {
3693     if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3694     {
3695       hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
3696     }
3697     /* Update remaining injected conversions */
3698     hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3699                                       hdfsdm_filter->InjectedChannelsNbr : 1U;
3700   }
3701 
3702   /* Update DFSDM filter state */
3703   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
3704                          HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
3705 }
3706 
3707 /**
3708   * @brief  This function allows to really start injected conversion.
3709   * @param  hdfsdm_filter DFSDM filter handle.
3710   * @retval None
3711   */
3712 static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3713 {
3714   /* Check injected trigger */
3715   if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3716   {
3717     /* Software start of injected conversion */
3718     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
3719   }
3720   else /* external or synchronous trigger */
3721   {
3722     /* Disable DFSDM filter */
3723     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3724 
3725     if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
3726     {
3727       /* Set JSYNC bit in DFSDM_FLTCR1 register */
3728       hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSYNC;
3729     }
3730     else /* external trigger */
3731     {
3732       /* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
3733       hdfsdm_filter->Instance->FLTCR1 |= hdfsdm_filter->ExtTriggerEdge;
3734     }
3735 
3736     /* Enable DFSDM filter */
3737     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3738 
3739     /* If regular conversion was in progress, restart it */
3740     if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \
3741         (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
3742     {
3743       hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
3744     }
3745   }
3746   /* Update DFSDM filter state */
3747   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
3748                          HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ;
3749 }
3750 
3751 /**
3752   * @brief  This function allows to really stop injected conversion.
3753   * @param  hdfsdm_filter DFSDM filter handle.
3754   * @retval None
3755   */
3756 static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3757 {
3758   /* Disable DFSDM filter */
3759   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3760 
3761   /* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */
3762   if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
3763   {
3764     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC);
3765   }
3766   else if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER)
3767   {
3768     /* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
3769     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN);
3770   }
3771   else
3772   {
3773     /* Nothing to do */
3774   }
3775 
3776   /* Enable DFSDM filter */
3777   hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3778 
3779   /* If regular conversion was in progress, restart it */
3780   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \
3781       (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
3782   {
3783     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
3784   }
3785 
3786   /* Update remaining injected conversions */
3787   hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3788                                     hdfsdm_filter->InjectedChannelsNbr : 1U;
3789 
3790   /* Update DFSDM filter state */
3791   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
3792                          HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
3793 }
3794 
3795 /**
3796   * @}
3797   */
3798 /* End of private functions --------------------------------------------------*/
3799 
3800 /**
3801   * @}
3802   */
3803 
3804 #endif /* HAL_DFSDM_MODULE_ENABLED */
3805 
3806 /**
3807   * @}
3808   */
3809