stm/stm32h757i-eval/stm32h7-bspstarthooks.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*
0004  * Copyright (C) 2020 embedded brains GmbH & Co. KG
0005  *
0006  * Redistribution and use in source and binary forms, with or without
0007  * modification, are permitted provided that the following conditions
0008  * are met:
0009  * 1. Redistributions of source code must retain the above copyright
0010  *    notice, this list of conditions and the following disclaimer.
0011  * 2. Redistributions in binary form must reproduce the above copyright
0012  *    notice, this list of conditions and the following disclaimer in the
0013  *    documentation and/or other materials provided with the distribution.
0014  *
0015  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0016  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0017  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0018  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0019  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0020  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0021  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0022  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0023  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0024  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0025  * POSSIBILITY OF SUCH DAMAGE.
0026  */
0027
0028 #include <bsp.h>
0029 #include <bsp/bootcard.h>
0030 #include <bsp/linker-symbols.h>
0031 #include <bsp/start.h>
0032 #include <stm32h7/hal.h>
0033 #include <stm32h7/memory.h>
0034 #include <stm32h7/mpu-config.h>
0035 #include <rtems/score/armv7m.h>
0036
0037 #include <string.h>
0038
0039 #include <stm32h747i_eval_qspi.h>
0040 static BSP_QSPI_Init_t QSPinit;
0041
0042 void stm32h7_init_qspi(void)
0043 {
0044 #if defined(STM32H7_MEMORY_QUADSPI_SIZE) && STM32H7_MEMORY_QUADSPI_SIZE > 0
0045     /* let's initialize Quad SPI memory here for memory mapped mode */
0046     /* due to usage of static QSPinit variable please call this function
0047        after bsp_start_clear_bss call since otherwise you would hit uninitialized
0048        variable memory while accessing it and in addition the call to bsp_start_clear_bss
0049        would wipe the variable content later after its initialization here. */
0050     BSP_QSPI_Init(0, &QSPinit);
0051     BSP_QSPI_EnableMemoryMappedMode(0);
0052 #endif
0053 }
0054
0055 void bsp_start_hook_0(void)
0056 {
0057   if ((RCC->AHB3ENR & RCC_AHB3ENR_FMCEN) == 0) {
0058     /*
0059      * Only perform the low-level initialization if necessary.  An initialized
0060      * FMC indicates that a boot loader already performed the low-level
0061      * initialization.
0062      */
0063     SystemInit();
0064     stm32h7_init_power();
0065     stm32h7_init_oscillator();
0066     stm32h7_init_clocks();
0067     stm32h7_init_peripheral_clocks();
0068     HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1);
0069     HAL_Init();
0070     SystemInit_ExtMemCtl();
0071   }
0072
0073 #if __CORTEX_M == 0x07U
0074   if ((SCB->CCR & SCB_CCR_IC_Msk) == 0) {
0075     SCB_EnableICache();
0076   }
0077
0078   if ((SCB->CCR & SCB_CCR_DC_Msk) == 0) {
0079     SCB_EnableDCache();
0080   }
0081
0082 #ifdef STM32H7_ENABLE_MPU_ALIGNMENT
0083   _ARMV7M_MPU_Setup(ARMV7M_MPU_CTRL_DEFAULT, stm32h7_config_mpu_region, stm32h7_config_mpu_region_count);
0084 #endif
0085 #endif
0086 }
0087
0088 void bsp_start_hook_1(void)
0089 {
0090   bsp_start_copy_sections_compact();
0091 #if __CORTEX_M == 0x07U
0092   SCB_CleanDCache();
0093   SCB_InvalidateICache();
0094 #endif
0095   bsp_start_clear_bss();
0096   stm32h7_init_qspi();
0097 }