stm32f4/start/rcc.c

0001 /*
0002  * Copyright (c) 2012 Sebastian Huber.  All rights reserved.
0003  *
0004  * The license and distribution terms for this file may be
0005  * found in the file LICENSE in this distribution or at
0006  * http://www.rtems.org/license/LICENSE.
0007  */
0008
0009 #include <bsp/rcc.h>
0010 #include <bsp/stm32f4.h>
0011
0012 #include <rtems.h>
0013
0014 static void rcc_set(
0015   stm32f4_rcc_index index,
0016   bool set,
0017   volatile uint32_t *regs
0018 )
0019 {
0020   int reg = index >> 5;
0021   uint32_t one = 1;
0022   uint32_t bit = one << (index & 0x1f);
0023   rtems_interrupt_level level;
0024   uint32_t val;
0025
0026   rtems_interrupt_disable(level);
0027   val = regs [reg];
0028   if (set) {
0029     val |= bit;
0030   } else {
0031     val &= ~bit;
0032   }
0033   regs [reg] = val;
0034   rtems_interrupt_enable(level);
0035 }
0036
0037 void stm32f4_rcc_reset(stm32f4_rcc_index index)
0038 {
0039   stm32f4_rcc_set_reset(index, true);
0040   stm32f4_rcc_set_reset(index, false);
0041 }
0042
0043 void stm32f4_rcc_set_reset(stm32f4_rcc_index index, bool set)
0044 {
0045   volatile stm32f4_rcc *rcc = STM32F4_RCC;
0046
0047 #ifdef STM32F4_FAMILY_F4XXXX
0048   rcc_set(index, set, &rcc->ahbrstr [0]);
0049 #endif/* STM32F4_FAMILY_F4XXXX */
0050 #ifdef STM32F4_FAMILY_F10XXX
0051   /* The first register is missing for the reset-block */
0052   rcc_set(index, set, &rcc->cir);
0053 #endif /* STM32F4_FAMILY_F10XXX */
0054 }
0055
0056 void stm32f4_rcc_set_clock(stm32f4_rcc_index index, bool set)
0057 {
0058   volatile stm32f4_rcc *rcc = STM32F4_RCC;
0059
0060   rcc_set(index, set, &rcc->ahbenr [0]);
0061 }
0062
0063 #ifdef STM32F4_FAMILY_F4XXXX
0064 void stm32f4_rcc_set_low_power_clock(stm32f4_rcc_index index, bool set)
0065 {
0066   volatile stm32f4_rcc *rcc = STM32F4_RCC;
0067
0068   rcc_set(index, set, &rcc->ahblpenr [0]);
0069 }
0070 #endif /* STM32F4_FAMILY_F4XXXX */