include/bsp/stm32f4xxxx_syscfg.h

0001 /*
0002  * Copyright (c) 2013 Chris Nott.  All rights reserved.
0003  *
0004  *  Virtual Logic
0005  *  21-25 King St.
0006  *  Rockdale NSW 2216
0007  *  Australia
0008  *  <rtems@vl.com.au>
0009  *
0010  * The license and distribution terms for this file may be
0011  * found in the file LICENSE in this distribution or at
0012  * http://www.rtems.org/license/LICENSE.
0013  */
0014
0015 #ifndef LIBBSP_ARM_STM32F4_STM32F4XXXX_SYSCFG_H
0016 #define LIBBSP_ARM_STM32F4_STM32F4XXXX_SYSCFG_H
0017
0018 #include <bsp/utility.h>
0019
0020 #define EXTI_PORTA 0
0021 #define EXTI_PORTB 1
0022 #define EXTI_PORTC 2
0023 #define EXTI_PORTD 3
0024 #define EXTI_PORTE 4
0025 #define EXTI_PORTF 5
0026 #define EXTI_PORTG 6
0027 #define EXTI_PORTH 7
0028 #define EXTI_PORTI 8
0029
0030 struct stm32f4_syscfg_s {
0031   uint32_t memrmp;  // Memory remap
0032 #define STM32F4_SYSCFG_MEM_MODE(val)        BSP_FLD32(val, 0, 1)
0033 #define STM32F4_SYSCFG_MEM_MODE_GET(reg)    BSP_FLD32GET(reg, 0, 1)
0034 #define STM32F4_SYSCFG_MEM_MODE_SET(reg, val) BSP_FLD32SET(reg, val, 0, 1)
0035   uint32_t pmc;     // Peripheral mode configuration
0036 #define STM32F4_SYSCFG_RMII_SEL             BSP_BIT32(23)
0037   uint32_t exticr[4]; // External interrupt configuration
0038 #define STM32F4_SYSCFG_EXTI0_IDX        0
0039 #define STM32F4_SYSCFG_EXTI0(val)       BSP_FLD32(val, 0, 3)
0040 #define STM32F4_SYSCFG_EXTI0_GET(reg)   BSP_FLD32GET(reg, 0, 3)
0041 #define STM32F4_SYSCFG_EXTI0_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
0042 #define STM32F4_SYSCFG_EXTI1_IDX        0
0043 #define STM32F4_SYSCFG_EXTI1(val)       BSP_FLD32(val, 4, 7)
0044 #define STM32F4_SYSCFG_EXTI1_GET(reg)   BSP_FLD32GET(reg, 4, 7)
0045 #define STM32F4_SYSCFG_EXTI1_SET(reg, val) BSP_FLD32SET(reg, val, 4, 7)
0046 #define STM32F4_SYSCFG_EXTI2_IDX        0
0047 #define STM32F4_SYSCFG_EXTI2(val)       BSP_FLD32(val, 8, 11)
0048 #define STM32F4_SYSCFG_EXTI2_GET(reg)   BSP_FLD32GET(reg, 8, 11)
0049 #define STM32F4_SYSCFG_EXTI2_SET(reg, val) BSP_FLD32SET(reg, val, 8, 11)
0050 #define STM32F4_SYSCFG_EXTI3_IDX        0
0051 #define STM32F4_SYSCFG_EXTI3(val)       BSP_FLD32(val, 12, 15)
0052 #define STM32F4_SYSCFG_EXTI3_GET(reg)   BSP_FLD32GET(reg, 12, 15)
0053 #define STM32F4_SYSCFG_EXTI3_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15)
0054 #define STM32F4_SYSCFG_EXTI4_IDX        1
0055 #define STM32F4_SYSCFG_EXTI4(val)       BSP_FLD32(val, 0, 3)
0056 #define STM32F4_SYSCFG_EXTI4_GET(reg)   BSP_FLD32GET(reg, 0, 3)
0057 #define STM32F4_SYSCFG_EXTI4_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
0058 #define STM32F4_SYSCFG_EXTI5_IDX        1
0059 #define STM32F4_SYSCFG_EXTI5(val)       BSP_FLD32(val, 4, 7)
0060 #define STM32F4_SYSCFG_EXTI5_GET(reg)   BSP_FLD32GET(reg, 4, 7)
0061 #define STM32F4_SYSCFG_EXTI5_SET(reg, val) BSP_FLD32SET(reg, val, 4, 7)
0062 #define STM32F4_SYSCFG_EXTI6_IDX        1
0063 #define STM32F4_SYSCFG_EXTI6(val)       BSP_FLD32(val, 8, 11)
0064 #define STM32F4_SYSCFG_EXTI6_GET(reg)   BSP_FLD32GET(reg, 8, 11)
0065 #define STM32F4_SYSCFG_EXTI6_SET(reg, val) BSP_FLD32SET(reg, val, 8, 11)
0066 #define STM32F4_SYSCFG_EXTI7_IDX        1
0067 #define STM32F4_SYSCFG_EXTI7(val)       BSP_FLD32(val, 12, 15)
0068 #define STM32F4_SYSCFG_EXTI7_GET(reg)   BSP_FLD32GET(reg, 12, 15)
0069 #define STM32F4_SYSCFG_EXTI7_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15)
0070 #define STM32F4_SYSCFG_EXTI8_IDX        2
0071 #define STM32F4_SYSCFG_EXTI8(val)       BSP_FLD32(val, 0, 3)
0072 #define STM32F4_SYSCFG_EXTI8_GET(reg)   BSP_FLD32GET(reg, 0, 3)
0073 #define STM32F4_SYSCFG_EXTI8_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
0074 #define STM32F4_SYSCFG_EXTI9_IDX        2
0075 #define STM32F4_SYSCFG_EXTI9(val)       BSP_FLD32(val, 4, 7)
0076 #define STM32F4_SYSCFG_EXTI9_GET(reg)   BSP_FLD32GET(reg, 4, 7)
0077 #define STM32F4_SYSCFG_EXTI9_SET(reg, val) BSP_FLD32SET(reg, val, 4, 7)
0078 #define STM32F4_SYSCFG_EXTI10_IDX       2
0079 #define STM32F4_SYSCFG_EXTI10(val)        BSP_FLD32(val, 8, 11)
0080 #define STM32F4_SYSCFG_EXTI10_GET(reg)    BSP_FLD32GET(reg, 8, 11)
0081 #define STM32F4_SYSCFG_EXTI10_SET(reg, val) BSP_FLD32SET(reg, val, 8, 11)
0082 #define STM32F4_SYSCFG_EXTI11_IDX       2
0083 #define STM32F4_SYSCFG_EXTI11(val)        BSP_FLD32(val, 12, 15)
0084 #define STM32F4_SYSCFG_EXTI11_GET(reg)    BSP_FLD32GET(reg, 12, 15)
0085 #define STM32F4_SYSCFG_EXTI11_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15)
0086 #define STM32F4_SYSCFG_EXTI12_IDX       3
0087 #define STM32F4_SYSCFG_EXTI12(val)        BSP_FLD32(val, 0, 3)
0088 #define STM32F4_SYSCFG_EXTI12_GET(reg)    BSP_FLD32GET(reg, 0, 3)
0089 #define STM32F4_SYSCFG_EXTI12_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
0090 #define STM32F4_SYSCFG_EXTI13_IDX       3
0091 #define STM32F4_SYSCFG_EXTI13(val)        BSP_FLD32(val, 4, 7)
0092 #define STM32F4_SYSCFG_EXTI13_GET(reg)    BSP_FLD32GET(reg, 4, 7)
0093 #define STM32F4_SYSCFG_EXTI13_SET(reg, val) BSP_FLD32SET(reg, val, 4, 7)
0094 #define STM32F4_SYSCFG_EXTI14_IDX       3
0095 #define STM32F4_SYSCFG_EXTI14(val)        BSP_FLD32(val, 8, 11)
0096 #define STM32F4_SYSCFG_EXTI14_GET(reg)    BSP_FLD32GET(reg, 8, 11)
0097 #define STM32F4_SYSCFG_EXTI14_SET(reg, val) BSP_FLD32SET(reg, val, 8, 11)
0098 #define STM32F4_SYSCFG_EXTI15_IDX       3
0099 #define STM32F4_SYSCFG_EXTI15(val)        BSP_FLD32(val, 12, 15)
0100 #define STM32F4_SYSCFG_EXTI15_GET(reg)    BSP_FLD32GET(reg, 12, 15)
0101 #define STM32F4_SYSCFG_EXTI15_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15)
0102   uint32_t cmpcr;   // Compensation cell control register
0103 #define STM32F4_SYSCFG_CMPCR_READY        BSP_BIT32(8)
0104 #define STM32F4_SYSCFG_CMPCR_PD           BSP_BIT32(0)
0105 } __attribute__ ((packed));
0106 typedef struct stm32f4_syscfg_s stm32f4_syscfg;
0107
0108 #endif /* LIBBSP_ARM_STM32F4_STM32F4XXXX_SYSCFG_H */