Back to home page

LXR

 
 

    


File indexing completed on 2025-05-11 08:23:05

0001 /*
0002  * Copyright (c) 2013 Chris Nott.  All rights reserved.
0003  *
0004  *  Virtual Logic
0005  *  21-25 King St.
0006  *  Rockdale NSW 2216
0007  *  Australia
0008  *  <rtems@vl.com.au>
0009  *
0010  * The license and distribution terms for this file may be
0011  * found in the file LICENSE in this distribution or at
0012  * http://www.rtems.org/license/LICENSE.
0013  */
0014 
0015 #ifndef LIBBSP_ARM_STM32F4_STM32F4XXXX_FLASH_H
0016 #define LIBBSP_ARM_STM32F4_STM32F4XXXX_FLASH_H
0017 
0018 #include <bsp/utility.h>
0019 
0020 struct stm32f4_flash_s {
0021 
0022   uint32_t acr;   // Access and control register
0023 #define STM32F4_FLASH_ACR_DCRST   BSP_BIT32(12) // Data cache reset
0024 #define STM32F4_FLASH_ACR_ICRST   BSP_BIT32(11) // Instruction cache reset
0025 #define STM32F4_FLASH_ACR_DCEN    BSP_BIT32(10) // Data cache enable
0026 #define STM32F4_FLASH_ACR_ICEN    BSP_BIT32(9)  // Instruction cache enable
0027 #define STM32F4_FLASH_ACR_PRFTEN  BSP_BIT32(8)  // Prefetch enable
0028 #define STM32F4_FLASH_ACR_LATENCY(val)  BSP_FLD32(val, 0, 2)  // Flash access latency
0029 #define STM32F4_FLASH_ACR_LATENCY_GET(reg)  BSP_FLD32GET(reg, 0, 2)
0030 #define STM32F4_FLASH_ACR_LATENCY_SET(reg, val) BSP_FLD32SET(reg, val, 0, 2)
0031 
0032   uint32_t keyr;  // Key register
0033 #define STM32F4_FLASH_KEYR_KEY1 0x45670123
0034 #define STM32F4_FLASH_KEYR_KEY2 0xCDEF89AB
0035 
0036   uint32_t optkeyr; // Option key register
0037 #define STM32F4_FLASH_OPTKEYR_OPTKEY1 0x08192A3B
0038 #define STM32F4_FLASH_OPTKEYR_OPTKEY2 0x4C5D6E7F
0039 
0040   uint32_t sr;    // Status register
0041 #define STM32F4_FLASH_SR_BSY    BSP_BIT32(16) // Busy
0042 #define STM32F4_FLASH_SR_PGSERR BSP_BIT32(7)  // Programming sequence error
0043 #define STM32F4_FLASH_SR_PGPERR BSP_BIT32(6)  // Programming parallelism error
0044 #define STM32F4_FLASH_SR_PGAERR BSP_BIT32(5)  // Programming alignment error
0045 #define STM32F4_FLASH_SR_WRPERR BSP_BIT32(4)  // Write protection error
0046 #define STM32F4_FLASH_SR_OPERR  BSP_BIT32(1)  // Operation error
0047 #define STM32F4_FLASH_SR_EOP    BSP_BIT32(0)  // End of operation
0048 
0049   uint32_t cr;    // Control register
0050 #define STM32F4_FLASH_CR_LOCK   BSP_BIT32(31) // Lock
0051 #define STM32F4_FLASH_CR_ERRIE  BSP_BIT32(25) // Error interrupt enable
0052 #define STM32F4_FLASH_CR_EOPIE  BSP_BIT32(24) // End of operation interrupt enable
0053 #define STM32F4_FLASH_CR_STRT   BSP_BIT32(16) // Start
0054 #define STM32F4_FLASH_CR_PSIZE(val) BSP_FLD32(val, 8, 9)  // Program size
0055 #define STM32F4_FLASH_CR_PSIZE_GET(reg) BSP_FLD32GET(reg, 8, 9)
0056 #define STM32F4_FLASH_CR_PSIZE_SET(reg, val)  BSP_FLD32SET(reg, val, 8, 9)
0057 #define STM32F4_FLASH_CR_SNB  BSP_FLD32(val, 3, 6)  // Sector number
0058 #define STM32F4_FLASH_CR_SNB_GET(reg) BSP_FLD32GET(reg, 3, 6)
0059 #define STM32F4_FLASH_CR_SNB_SET(reg, val)  BSP_FLD32SET(reg, val, 3, 6)
0060 #define STM32F4_FLASH_CR_MER    BSP_BIT32(2)  // Mass erase
0061 #define STM32F4_FLASH_CR_SER    BSP_BIT32(1)  // Sector erase
0062 #define STM32F4_FLASH_CR_PG     BSP_BIT32(0)  // Programming
0063 
0064   uint32_t optcr;   // Option control register
0065 #define STM32F4_FLASH_OPTCR_NWRP(val) BSP_FLD32(val, 16, 27)  // Not write protect
0066 #define STM32F4_FLASH_OPTCR_NWRP_GET(reg) BSP_FLD32GET(reg, 16, 27)
0067 #define STM32F4_FLASH_OPTCR_NWRP_SET(reg, val)  BSP_FLD32SET(reg, val, 16, 27)
0068 #define STM32F4_FLASH_OPTCR_RDP(val)  BSP_FLD32(val, 8, 15) // Read protect
0069 #define STM32F4_FLASH_OPTCR_RDP_GET(reg)  BSP_FLD32GET(reg, 8, 15)
0070 #define STM32F4_FLASH_OPTCR_RDP_SET(reg, val) BSP_FLD32SET(reg, val, 8, 15)
0071 #define STM32F4_FLASH_OPTCR_USER(val) BSP_FLD32(val, 5, 7)  // User option bytes
0072 #define STM32F4_FLASH_OPTCR_USER_GET(reg) BSP_FLD32GET(reg, 5, 7)
0073 #define STM32F4_FLASH_OPTCR_USER_SET(reg, val)  BSP_FLD32SET(reg, val, 5, 7)
0074 #define STM32F4_FLASH_OPTCR_BOR_LEVEL(val)  BSP_FLD32(val, 2, 3)  // BOR reset level
0075 #define STM32F4_FLASH_OPTCR_BOR_LEVEL_GET(reg)  BSP_FLD32GET(reg, 2, 3)
0076 #define STM32F4_FLASH_OPTCR_BOR_LEVEL_SET(reg, val) BSP_FLD32SET(reg, val, 2, 3)
0077 #define STM32F4_FLASH_CR_OPTSTRT  BSP_BIT32(1)  // Option start
0078 #define STM32F4_FLASH_CR_OPTLOCK  BSP_BIT32(0)  // Option lock
0079 
0080 } __attribute__ ((packed));
0081 typedef struct stm32f4_flash_s stm32f4_flash;
0082 
0083 #endif /* LIBBSP_ARM_STM32F4_STM32F4XXXX_FLASH_H */