![]() |
|
|||
File indexing completed on 2025-05-11 08:23:05
0001 /* 0002 * SMDK2410 Memory Map 0003 */ 0004 0005 /* 0006 * Copyright (c) 2004 by Cogent Computer Systems 0007 * Written by Jay Monkman <jtm@lopingdog.com> 0008 * 0009 * The license and distribution terms for this file may be 0010 * found in the file LICENSE in this distribution or at 0011 * http://www.rtems.org/license/LICENSE. 0012 */ 0013 #include <rtems.h> 0014 #include <libcpu/mmu.h> 0015 0016 /* Remember, the ARM920 has 64 TLBs. If you have more 1MB sections than 0017 * that, you'll have TLB lookups, which could hurt performance. 0018 */ 0019 mmu_sect_map_t mem_map[] = { 0020 /* <phys addr> <virt addr> <size> <flags> */ 0021 {0x30000000, 0x00000000, 1, MMU_CACHE_NONE}, /* SDRAM for vectors */ 0022 {0x30000000, 0x30000000, 32, MMU_CACHE_WTHROUGH}, /* SDRAM W cache */ 0023 {0x32000000, 0x32000000, 32, MMU_CACHE_NONE}, /* SDRAM W/O cache */ 0024 {0x48000000, 0x48000000, 256, MMU_CACHE_NONE}, /* Internals Regs - */ 0025 {0x50000000, 0x50000000, 256, MMU_CACHE_NONE}, /* Internal Regs - */ 0026 {0x00000000, 0x00000000, 0, 0} /* The end */ 0027 };
[ Source navigation ] | [ Diff markup ] | [ Identifier search ] | [ general search ] |
This page was automatically generated by the 2.3.7 LXR engine. The LXR team |
![]() ![]() |