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File indexing completed on 2025-05-11 08:23:05

0001 /*
0002  * This file contains the ARM BSP startup package. It includes application,
0003  * board, and monitor specific initialization and configuration. The generic CPU
0004  * dependent initialization has been performed before this routine is invoked.
0005  */
0006 
0007 /*
0008  *  Copyright (c) 2000 Canon Research Centre France SA.
0009  *  Emmanuel Raguet, mailto:raguet@crf.canon.fr
0010  *
0011  *  The license and distribution terms for this file may be
0012  *  found in the file LICENSE in this distribution or at
0013  *  http://www.rtems.org/license/LICENSE.
0014  */
0015 
0016 #include <bsp.h>
0017 #include <bsp/irq-generic.h>
0018 #include <rtems/bspIo.h>
0019 #include <s3c24xx.h>
0020 
0021 /*
0022  *  BSP Specific Initialization in C
0023  */
0024 static void bsp_start_default( void )
0025 {
0026   uint32_t cr;
0027   uint32_t pend,last;
0028   uint32_t REFCNT;
0029   int i;
0030 
0031   /* stop RTC */
0032   #ifdef CPU_S3C2400
0033     rTICINT = 0x0;
0034   #else
0035     rTICNT = 0x0;
0036   #endif
0037   /* stop watchdog,ADC and timers */
0038   rWTCON = 0x0;
0039   rTCON = 0x0;
0040   rADCCON = 0x0;
0041 
0042   /* disable interrupts */
0043   rINTMOD = 0x0;
0044   rINTMSK = BIT_ALLMSK; /* unmasked by drivers */
0045 
0046   last = 0;
0047   for(i=0; i<4; i++) {
0048     pend = rSRCPND;
0049     if(pend == 0 || pend == last)
0050       break;
0051     rSRCPND = pend;
0052     rINTPND = pend;
0053     last    = pend;
0054   }
0055 
0056   /* setup clocks */
0057   rCLKDIVN = M_CLKDIVN;
0058   rMPLLCON = ((M_MDIV<<12)+(M_PDIV<<4)+M_SDIV);
0059   /* setup rREFRESH
0060    * period = 15.6 us, HCLK=66Mhz, (2048+1-15.6*66)
0061    */
0062   REFCNT   = 2048+1-(15.6*get_HCLK()/1000000);
0063   rREFRESH = ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT);
0064 
0065   /* set prescaler for timers 2,3,4 to 16(15+1) */
0066   cr = rTCFG0 & 0xFFFF00FF;
0067   rTCFG0 = (cr | (15<<8));
0068 
0069   /* set prescaler for timers 0,1 to 1(0+1) */
0070   cr = rTCFG0 & 0xFFFFFF00;
0071   rTCFG0 = (cr | (0<<0));
0072 
0073   /*
0074    * Init rtems interrupt management
0075    */
0076   bsp_interrupt_initialize();
0077 }
0078 
0079 /*
0080  *  By making this a weak alias for bsp_start_default, a brave soul
0081  *  can override the actual bsp_start routine used.
0082  */
0083 void bsp_start (void) __attribute__ ((weak, alias("bsp_start_default")));