shared/start/bsp-start-memcpy.S

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @brief bsp_start_memcpy() implementation.
0007  */
0008
0009 /*
0010  * Copyright (C) 2008, 2011 embedded brains GmbH & Co. KG
0011  *
0012  * Redistribution and use in source and binary forms, with or without
0013  * modification, are permitted provided that the following conditions
0014  * are met:
0015  * 1. Redistributions of source code must retain the above copyright
0016  *    notice, this list of conditions and the following disclaimer.
0017  * 2. Redistributions in binary form must reproduce the above copyright
0018  *    notice, this list of conditions and the following disclaimer in the
0019  *    documentation and/or other materials provided with the distribution.
0020  *
0021  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0022  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0023  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0024  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0025  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0026  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0027  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0028  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0029  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0030  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0031  * POSSIBILITY OF SUCH DAMAGE.
0032  */
0033
0034 #include <rtems/asm.h>
0035 #include <rtems/score/cpu.h>
0036
0037     .section    ".bsp_start_text", "ax"
0038
0039 #if defined(ARM_MULTILIB_ARCH_V4)
0040
0041 DEFINE_FUNCTION_ARM(bsp_start_memcpy)
0042
0043     /* Return if dest == src */
0044     cmp r0, r1
0045 #ifdef __thumb__
0046     bxeq    lr
0047 #else
0048     moveq   pc, lr
0049 #endif
0050
0051     /* Return if length is zero */
0052     mov r3, #0
0053     cmp r3, r2
0054 #ifdef __thumb__
0055     bxeq    lr
0056 #else
0057     moveq   pc, lr
0058 #endif
0059
0060     /* Save non-volatile registers */
0061     push    {r4-r8, lr}
0062
0063     /* Copy worker routine to stack */
0064     adr ip, worker_begin
0065     ldm ip, {r3-r8}
0066     push    {r3-r8}
0067 #ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS
0068     dsb
0069     isb
0070 #endif
0071
0072     /* Execute worker routine */
0073     mov r3, #0
0074     mov ip, sp
0075     mov lr, pc
0076 #ifdef __thumb__
0077     bx  ip
0078 #else
0079     mov pc, ip
0080 #endif
0081
0082     /* Restore stack and non-volatile registers */
0083     add sp, sp, #24
0084     pop {r4-r8, lr}
0085
0086     /* Return */
0087 #ifdef __thumb__
0088     bx  lr
0089 #else
0090     mov pc, lr
0091 #endif
0092
0093 worker_begin:
0094
0095     /* Worker routine */
0096     ldr ip, [r1, r3]
0097     str ip, [r0, r3]
0098     add r3, r3, #4
0099     cmp r3, r2
0100     bcc worker_begin
0101 #ifdef __thumb__
0102     bx  lr
0103 #else
0104     mov pc, lr
0105 #endif
0106
0107 #elif defined(ARM_MULTILIB_ARCH_V7M)
0108
0109     .syntax unified
0110
0111     .align  2
0112     .globl  bsp_start_memcpy
0113     .thumb
0114     .thumb_func
0115     .type   bsp_start_memcpy, %function
0116
0117 bsp_start_memcpy:
0118
0119     /* Return if dest == src */
0120     cmp r0, r1
0121     beq return
0122
0123     /* Return if length is zero */
0124     movs    r3, #0
0125     cmp r3, r2
0126     beq return
0127
0128     /* Save non-volatile registers */
0129     push    {r4-r7, lr}
0130
0131     /* Copy worker routine to stack */
0132     adr r3, worker_begin
0133     ldm r3, {r4-r7}
0134     push    {r4-r7}
0135
0136     /* Execute worker routine */
0137     add r3, sp, #1
0138     adds    r2, r2, #3
0139     bic r2, r2, #3
0140     adds    r2, r2, r1
0141     blx r3
0142
0143     /* Restore stack and non-volatile registers */
0144     add sp, sp, #16
0145     pop {r4-r7, lr}
0146
0147 return:
0148
0149     /* Return */
0150     bx  lr
0151
0152     .align  2
0153
0154 worker_begin:
0155
0156     /* Worker routine */
0157     ldr r3, [r1], #4
0158     cmp r2, r1
0159     str r3, [r0], #4
0160     bne worker_begin
0161     bx  lr
0162
0163 #endif /* defined(ARM_MULTILIB_ARCH_V7M) */