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File indexing completed on 2025-05-11 08:23:05
0001 /* SPDX-License-Identifier: BSD-2-Clause */ 0002 0003 /** 0004 * @file 0005 * 0006 * @ingroup RTEMSBSPsARMShared 0007 * 0008 * @brief This source file contains the implementation of 0009 * arm_cp15_set_exception_handler(). 0010 */ 0011 0012 /* 0013 * Copyright (c) 2013 embedded brains GmbH & Co. KG 0014 * 0015 * Redistribution and use in source and binary forms, with or without 0016 * modification, are permitted provided that the following conditions 0017 * are met: 0018 * 1. Redistributions of source code must retain the above copyright 0019 * notice, this list of conditions and the following disclaimer. 0020 * 2. Redistributions in binary form must reproduce the above copyright 0021 * notice, this list of conditions and the following disclaimer in the 0022 * documentation and/or other materials provided with the distribution. 0023 * 0024 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 0025 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 0026 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 0027 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 0028 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 0029 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 0030 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 0031 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 0032 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 0033 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 0034 * POSSIBILITY OF SUCH DAMAGE. 0035 */ 0036 0037 #include <libcpu/arm-cp15.h> 0038 0039 #include <bsp/linker-symbols.h> 0040 0041 void* arm_cp15_set_exception_handler( 0042 Arm_symbolic_exception_name exception, 0043 void (*handler)(void) 0044 ) 0045 { 0046 uint32_t current_handler = 0; 0047 0048 if ((unsigned) exception < MAX_EXCEPTIONS) { 0049 uint32_t *cpu_table = (uint32_t *) 0 + MAX_EXCEPTIONS; 0050 uint32_t *mirror_table = (uint32_t *) bsp_vector_table_begin + MAX_EXCEPTIONS; 0051 0052 current_handler = mirror_table[exception]; 0053 0054 if (current_handler != (uint32_t) handler) { 0055 size_t table_size = MAX_EXCEPTIONS * sizeof(uint32_t); 0056 uint32_t cls = arm_cp15_get_min_cache_line_size(); 0057 uint32_t ctrl; 0058 rtems_interrupt_level level; 0059 0060 rtems_interrupt_local_disable(level); 0061 0062 ctrl = arm_cp15_mmu_disable(cls); 0063 0064 mirror_table[exception] = (uint32_t) handler; 0065 0066 rtems_cache_flush_multiple_data_lines(mirror_table, table_size); 0067 0068 /* 0069 * On ARMv7 processors with the Security Extension the mirror table might 0070 * be the actual table used by the processor. 0071 */ 0072 rtems_cache_invalidate_multiple_instruction_lines(mirror_table, table_size); 0073 0074 rtems_cache_invalidate_multiple_instruction_lines(cpu_table, table_size); 0075 0076 arm_cp15_set_control(ctrl); 0077 0078 rtems_interrupt_local_enable(level); 0079 } 0080 } 0081 0082 return (void*) current_handler; 0083 }
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