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File indexing completed on 2025-05-11 08:23:04

0001 /*
0002  * Interrupt handler Header file
0003  *
0004  * Copyright (c) 2010 embedded brains GmbH & Co. KG
0005  *
0006  * Copyright (c) 2006 by Ray <rayx.cn@gmail.com> to support LPC ARM
0007  *
0008  *  The license and distribution terms for this file may be
0009  *  found in the file LICENSE in this distribution or at
0010  *  http://www.rtems.org/license/LICENSE.
0011  */
0012 
0013 #ifndef __IRQ_H__
0014 #define __IRQ_H__
0015 
0016 #ifndef __asm__
0017 
0018 #include <rtems.h>
0019 #include <rtems/irq.h>
0020 #include <rtems/irq-extension.h>
0021 
0022 #endif /* __asm__ */
0023 
0024 /* possible interrupt sources on the LPC22xx */
0025 #define LPC22xx_INTERRUPT_WDINT  0  /* Watchdog int. 0 */
0026 #define LPC22xx_INTERRUPT_RSV0   1  /* Reserved int. 1 */
0027 #define LPC22xx_INTERRUPT_DBGRX  2  /* Embedded ICE DbgCommRx receive */
0028 #define LPC22xx_INTERRUPT_DBGTX  3  /* Embedded ICE DbgCommRx Transmit*/
0029 #define LPC22xx_INTERRUPT_TIMER0 4  /* Timer 0 */
0030 #define LPC22xx_INTERRUPT_TIMER1 5  /* Timer 1 */
0031 #define LPC22xx_INTERRUPT_UART0  6  /* UART 0 */
0032 #define LPC22xx_INTERRUPT_UART1  7  /* UART 1 */
0033 #define LPC22xx_INTERRUPT_PWM0   8  /* PWM */
0034 #define LPC22xx_INTERRUPT_I2C    9  /* I2C  */
0035 #define LPC22xx_INTERRUPT_SPI0  10  /* SPI0 */
0036 #define LPC22xx_INTERRUPT_SPI1  11  /* SPI1 */
0037 #define LPC22xx_INTERRUPT_PLL   12  /* PLL */
0038 #define LPC22xx_INTERRUPT_RTC   13  /* RTC */
0039 #define LPC22xx_INTERRUPT_EINT0 14  /* Externel Interrupt 0 */
0040 #define LPC22xx_INTERRUPT_EINT1 15  /* Externel Interrupt 1 */
0041 #define LPC22xx_INTERRUPT_EINT2 16  /* Externel Interrupt 2 */
0042 #define LPC22xx_INTERRUPT_EINT3 17  /* Externel Interrupt 3 */
0043 #define LPC22xx_INTERRUPT_ADC   18  /* AD Converter */
0044 /* Following interrupt used by lpc229x */
0045 #define LPC22xx_INTERRUPT_CANERR 19 /* CAN LUTerr interrupt */
0046 #define LPC22xx_INTERRUPT_CAN1TX 20 /* CAN1 Tx interrupt */
0047 #define LPC22xx_INTERRUPT_CAN1RX 21 /* CAN1 Rx interrupt */
0048 #define LPC22xx_INTERRUPT_CAN2TX 22 /* CAN2 Tx interrupt */
0049 #define LPC22xx_INTERRUPT_CAN2RX 23 /* CAN2 Rx interrupt */
0050 #define LPC22xx_INTERRUPT_CAN3TX 24 /* CAN1 Tx interrupt */
0051 #define LPC22xx_INTERRUPT_CAN3RX 25 /* CAN1 Rx interrupt */
0052 #define LPC22xx_INTERRUPT_CAN4TX 26 /* CAN2 Tx interrupt */
0053 #define LPC22xx_INTERRUPT_CAN4RX 27 /* CAN2 Rx interrupt */
0054 #define BSP_MAX_INT              28
0055 
0056 #define BSP_INTERRUPT_VECTOR_COUNT BSP_MAX_INT
0057 
0058 #define UNDEFINED_INSTRUCTION_VECTOR_ADDR   (*(u_long *)0x00000004L)
0059 #define SOFTWARE_INTERRUPT_VECTOR_ADDR      (*(u_long *)0x00000008L)
0060 #define PREFETCH_ABORT_VECTOR_ADDR          (*(u_long *)0x0000000CL)
0061 #define DATA_ABORT_VECTOR_ADDR              (*(u_long *)0x00000010L)
0062 #define IRQ_VECTOR_ADDR                     (*(u_long *)0x00000018L)
0063 #define FIQ_VECTOR_ADDR                     (*(u_long *)0x0000001CL)
0064 
0065 #define DATA_ABORT_ISR_ADDR                 (*(u_long *)0x00000030L)
0066 #define IRQ_ISR_ADDR                        (*(u_long *)0x00000038L)
0067 #define FIQ_ISR_ADDR                        (*(u_long *)0x0000003CL)
0068 
0069 #endif /* __IRQ_H__ */