rtl22xx/include/bsp.h

0001 /**
0002  * @file
0003  *
0004  * @ingroup RTEMSBSPsARMRTL22XX
0005  *
0006  * @brief Global BSP definitions.
0007  */
0008
0009 /*
0010  * Philips LPC22XX/LPC21xx BSP header file
0011  *
0012  * by Ray,Xu <Rayx.cn@gmail.com>
0013  *
0014  *  The license and distribution terms for this file may be
0015  *  found in the file LICENSE in this distribution or at
0016  *  http://www.rtems.org/license/LICENSE.
0017 */
0018 #ifndef LIBBSP_ARM_RTL22XX_BSP_H
0019 #define LIBBSP_ARM_RTL22XX_BSP_H
0020
0021 /**
0022  * @defgroup RTEMSBSPsARMRTL22XX RTL22XX
0023  *
0024  * @ingroup RTEMSBSPsARM
0025  *
0026  * @brief RTL22XX Board Support Package.
0027  *
0028  * @{
0029  */
0030
0031 #include <bspopts.h>
0032 #include <bsp/default-initial-extension.h>
0033
0034 #include <rtems.h>
0035
0036 #ifdef __cplusplus
0037 extern "C" {
0038 #endif
0039
0040 #define BSP_FEATURE_IRQ_EXTENSION
0041
0042 #define CONFIG_ARM_CLK 60000000L
0043 /* cclk=cco/(2*P) */
0044 /* cco = cclk*2*P   */
0045
0046 /** @brief system clk frequecy,<=60Mhz, defined in system configuration */
0047 #define LPC22xx_Fcclk   CONFIG_ARM_CLK
0048
0049 /* Fcco 156M~320Mhz*/
0050 /** @brief system clk frequecy,<=60Mhz, defined in system configuration */
0051 #define LPC22xx_Fcclk   CONFIG_ARM_CLK
0052 #define LPC22xx_Fcco    LPC22xx_Fcclk * 4
0053 /** @brief VPB clk frequency,1,1/2,1/4 times of Fcclk */
0054 #define LPC22xx_Fpclk   (LPC22xx_Fcclk /4) *1
0055
0056
0057
0058 /**
0059  * @name Fcclk range: 10MHz ~ MCU allowed frequency
0060  * @{
0061  */
0062
0063 #define Fcclk_MIN       10000000L
0064 #define Fcclk_MAX       60000000L
0065
0066 /** @} */
0067
0068 /**
0069  * @name Fcco range: 156MHz ~ 320MHz
0070  * @{
0071  */
0072
0073 #define Fcco_MIN            156000000L
0074 #define Fcco_MAX            320000000L
0075
0076 /** @} */
0077
0078 #define PLLFEED_DATA1       0xAA
0079 #define PLLFEED_DATA2       0x55
0080
0081 /**
0082  * @name PLL PLLCON register bit descriptions
0083  * @{
0084  */
0085
0086 #define PLLCON_ENABLE_BIT   0
0087 #define PLLCON_CONNECT_BIT  1
0088
0089 /** @} */
0090
0091 /**
0092  * @name PLL PLLSTAT register bit descriptions
0093  * @{
0094  */
0095
0096 #define PLLSTAT_ENABLE_BIT  8
0097 #define PLLSTAT_CONNECT_BIT 9
0098 #define PLLSTAT_LOCK_BIT    10
0099
0100 /** @} */
0101
0102 /**
0103  * @name PM Peripheral Type
0104  * @{
0105  */
0106
0107 #define PC_TIMER0       0x2
0108 #define PC_TIMER1       0x4
0109 #define PC_UART0        0x8
0110 #define PC_UART1        0x10
0111 #define PC_PWM0         0x20
0112 #define PC_I2C          0x80
0113 #define PC_SPI0         0x100
0114 #define PC_RTC          0x200
0115
0116 /** @} */
0117
0118 /** @brief OSC [Hz] */
0119 #define FOSC              11059200
0120 /** @brief Core clk [Hz] */
0121 #define FCCLK             FOSC<<2
0122
0123 /**
0124  * @name System Configure
0125  * @{
0126  */
0127
0128 /** @brief osc freq,10MHz~25MHz, change to a real one if needed */
0129 #define Fosc    11059200
0130 /** @brief system freq 2^n time of  Fosc(1~32) <=60MHZ */
0131 #define Fcclk   (Fosc << 2)
0132 /** @brief CCO freq 2,4,8,16 time of Fcclk 156MHz~320MHz */
0133 #define Fcco    (Fcclk <<2)
0134 /** @brief VPB freq only(Fcclk / 4) 1~4 */
0135 #define Fpclk   (Fcclk >>2) * 1
0136 /* This was M.  That is a BAD BAD public constant.  I renamed it to
0137  * JOEL_M so it wouldn't conflict with user code.  If you can find
0138  * a better name, fix this.  But nothing I found uses it.
0139  */
0140
0141 /** @} */
0142
0143 #define JOEL_M       Fcclk / Fosc
0144 #define P_min   Fcco_MIN / (2*Fcclk) + 1;
0145 #define P_max   Fcco_MAX / (2*Fcclk);
0146
0147 #define  UART_BPS   115200
0148
0149 /** @brief Time Precision time [us] */
0150 #define TIMER_PRECISION   10
0151
0152 /** @brief I2C Speed [bit/s] */
0153 #define I2CSPEED          20000         // 20 Kbit/s
0154
0155 /**
0156  * @name Uarts buffers size
0157  * @{
0158  */
0159
0160 #define RXBUFSIZE         32
0161 #define TXBUFSIZE         32
0162
0163 /** @} */
0164
0165 /** @brief SPI Speed [bit/s] */
0166 #define SPISPEED          1500000       // 1.5 Mbit/s
0167 /** @brief SPI EEPROM CS pin
0168  *
0169  *  (SSEL is not suitable for CS, because is used by SPI module for multi master SPI interface)
0170  */
0171 #define SPI_CS_PIN        P0_13
0172 #define SPI_CS_PIN_FUNC   PINSEL0_bit.SPI_CS_PIN
0173
0174 /**
0175  * @name Flash definition
0176  * @{
0177  */
0178
0179 //#define RTL22XX_FLASH_SIZE      (0x200000-RTL22XX_FLASH_BOOT)   // Total area of Flash region in words 8 bit
0180 /** @brief Total area of Flash region in words 8 bit */
0181 #define RTL22XX_FLASH_SIZE        (0x80000-RTL22XX_FLASH_BOOT)
0182 //#define RTL22XX_FLASH_SIZE      (0x80000-RTL22XX_FLASH_BOOT)      // Total area of Flash region in words 8 bit
0183 #define RTL22XX_FLASH_BEGIN       0x80000000
0184 /** @brief First 0x8000 bytes reserved for boot loader etc. */
0185 #define RTL22XX_FLASH_BASE        (RTL22XX_FLASH_BEGIN+RTL22XX_FLASH_BOOT)
0186
0187 /** @} */
0188
0189 /**
0190  * @name SRAM definition
0191  * @{
0192  */
0193
0194 /** @brief Total area of Flash region in words 8 bit */
0195 #define SRAM_SIZE         0x100000
0196 /** @brief First 0x8000 bytes reserved for boot loader etc. */
0197 #define SRAM_BASE         0x81000000
0198
0199 /** @} */
0200
0201 /** @brief CS8900A definition */
0202 #define CS8900A_BASE      0x82000000
0203 /** @brief RTL8019AS definition */
0204 #define RTL8019AS_BASE    0x82000000
0205
0206 struct rtems_bsdnet_ifconfig;
0207 int cs8900_driver_attach (struct rtems_bsdnet_ifconfig *config,
0208                           int                          attaching);
0209
0210 /**
0211  * @name Network driver configuration
0212  * @{
0213  */
0214
0215 #define RTEMS_BSP_NETWORK_DRIVER_NAME   "eth0"
0216 #define RTEMS_BSP_NETWORK_DRIVER_ATTACH cs8900_driver_attach
0217
0218 /** @} */
0219
0220 /*
0221  * Prototypes for methods used across file boundaries in the BSP.
0222  */
0223 extern void  UART0_Ini(void);
0224
0225 #ifdef __cplusplus
0226 }
0227 #endif
0228
0229 /** @} */
0230
0231 #endif /* _BSP_H */