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File indexing completed on 2025-05-11 08:23:04

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /**
0004  * @file
0005  *
0006  * @ingroup raspberrypi
0007  *
0008  * @brief Raspberry pi secondary CPU and IPI HW initialization
0009  */
0010 
0011 /*
0012  * Copyright (c) 2016 Pavel Pisa <pisa@cmp.felk.cvut.cz>
0013  *
0014  * Czech Technical University in Prague
0015  * Zikova 1903/4
0016  * 166 36 Praha 6
0017  * Czech Republic
0018  *
0019  * Reuses some ideas from Rohini Kulkarni <krohini1593@gmail.com>
0020  * GSoC 2015 project and Altera Cyclone-V SMP code
0021  * by embedded brains GmbH & Co. KG
0022  *
0023  * Redistribution and use in source and binary forms, with or without
0024  * modification, are permitted provided that the following conditions
0025  * are met:
0026  * 1. Redistributions of source code must retain the above copyright
0027  *    notice, this list of conditions and the following disclaimer.
0028  * 2. Redistributions in binary form must reproduce the above copyright
0029  *    notice, this list of conditions and the following disclaimer in the
0030  *    documentation and/or other materials provided with the distribution.
0031  *
0032  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0033  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0034  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0035  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0036  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0037  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0038  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0039  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0040  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0041  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0042  * POSSIBILITY OF SUCH DAMAGE.
0043  */
0044 
0045 #include <rtems/score/smpimpl.h>
0046 
0047 #include <bsp/start.h>
0048 #include <bsp/raspberrypi.h>
0049 #include <bsp.h>
0050 #include <bsp/arm-cp15-start.h>
0051 #include <libcpu/arm-cp15.h>
0052 #include <rtems.h>
0053 #include <bsp/irq-generic.h>
0054 #include <assert.h>
0055 
0056 void rpi_ipi_initialize(void)
0057 {
0058   uint32_t cpu_index_self = _SMP_Get_current_processor();
0059 
0060   /*
0061    * Includes support only for mailbox 3 interrupt.
0062    * Further interrupt support has to be added. This will have to be integrated
0063    * with existing interrupt support for Raspberry Pi
0064    */
0065 
0066   /* reset mailbox 3 contents to zero */
0067   BCM2835_REG(BCM2836_MAILBOX_3_READ_CLEAR_BASE + 0x10 * cpu_index_self) = 0xffffffff;
0068 
0069   BCM2835_REG(BCM2836_MAILBOX_IRQ_CTRL(cpu_index_self)) =
0070     BCM2836_MAILBOX_IRQ_CTRL_MBOX3_IRQ;
0071 }
0072 
0073 void rpi_start_rtems_on_secondary_processor(void)
0074 {
0075   uint32_t ctrl;
0076 
0077   /* Change the VBAR from the start to the normal vector table */
0078   arm_cp15_set_vector_base_address(bsp_vector_table_begin);
0079 
0080   ctrl = arm_cp15_start_setup_mmu_and_cache(
0081     0,
0082     ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z
0083   );
0084 
0085   rpi_ipi_initialize();
0086 
0087   arm_cp15_set_domain_access_control(
0088     ARM_CP15_DAC_DOMAIN(ARM_MMU_DEFAULT_CLIENT_DOMAIN, ARM_CP15_DAC_CLIENT)
0089   );
0090 
0091   /* FIXME: Sharing the translation table between processors is brittle */
0092   arm_cp15_set_translation_table_base(
0093     (uint32_t *) bsp_translation_table_base
0094   );
0095 
0096   ctrl |= ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M;
0097   ctrl &= ~ARM_CP15_CTRL_V;
0098   arm_cp15_set_control(ctrl);
0099 
0100   _SMP_Start_multitasking_on_secondary_processor(_Per_CPU_Get());
0101 }