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File indexing completed on 2025-05-11 08:23:04

0001 /**
0002  * @file
0003  *
0004  * @ingroup raspberrypi_i2c
0005  *
0006  * @brief Support for the I2C bus on the Raspberry Pi GPIO P1 header (model A/B)
0007  *        and GPIO J8 header on model B+.
0008  */
0009 
0010 /*
0011  *  Copyright (c) 2014-2015 Andre Marques <andre.lousa.marques at gmail.com>
0012  *
0013  *  The license and distribution terms for this file may be
0014  *  found in the file LICENSE in this distribution or at
0015  *  http://www.rtems.org/license/LICENSE.
0016  */
0017 
0018 /*
0019  * STATUS:
0020  * - 10-bit slave addressing untested
0021  */
0022 
0023 #include <bsp.h>
0024 #include <bsp/raspberrypi.h>
0025 #include <bsp/gpio.h>
0026 #include <bsp/rpi-gpio.h>
0027 #include <bsp/irq.h>
0028 #include <bsp/i2c.h>
0029 #include <assert.h>
0030 
0031 #define TRANSFER_COUNT(buffer_size) (buffer_size + 0xFFFE) / 0xFFFF
0032 
0033 #define ADJUST_TRANSFER_SIZE(transfer_count, remaining_bytes) \
0034   transfer_count > 1 ? 0xFFFF : (remaining_bytes & 0xFFFF)
0035 
0036 #define I2C_POLLING(condition)                  \
0037   while ( condition ) {                         \
0038     ;                                           \
0039   }
0040 
0041 /**
0042  * @brief Object containing relevant information about an I2C bus.
0043  *
0044  * Encapsulates relevant data for a I2C bus transfer.
0045  */
0046 typedef struct
0047 {
0048   i2c_bus base;
0049   uint32_t input_clock;
0050   rtems_id task_id;
0051 
0052   /* Remaining bytes to read/write on the current bus transfer. */
0053   uint32_t remaining_bytes;
0054   /* Each transfer has a limit of 0xFFFF bytes, hence larger transfers
0055    * have to be divided. Each transfer implies a stop condition, signaled
0056    * automatically by the BSC controller. */
0057   uint32_t remaining_transfers;
0058 
0059   uint8_t *current_buffer;
0060   uint32_t current_buffer_size;
0061 
0062   bool read_transfer;
0063 } rpi_i2c_bus;
0064 
0065 static int rpi_i2c_bus_transfer(rpi_i2c_bus *bus)
0066 {
0067   while ( bus->remaining_bytes >= 1 ) {
0068     /* If reading. */
0069     if ( bus->read_transfer ) {
0070       /* Poll RXD bit until there is data on the RX FIFO to read. */
0071       I2C_POLLING((BCM2835_REG(BCM2835_I2C_S) & (1 << 5)) == 0);
0072 
0073       /* Read data from the RX FIFO. */
0074       (*(uint8_t *) bus->current_buffer) = BCM2835_REG(BCM2835_I2C_FIFO) & 0xFF;
0075 
0076       ++bus->current_buffer;
0077 
0078       /* Check for acknowledgment or clock stretching errors. */
0079       if (
0080           (BCM2835_REG(BCM2835_I2C_S) & (1 << 8)) ||
0081           (BCM2835_REG(BCM2835_I2C_S) & (1 << 9))
0082       ) {
0083         return -EIO;
0084       }
0085     }
0086     /* If writing. */
0087     else {
0088       /* If using the I2C bus in interrupt-driven mode. */
0089 #if I2C_IO_MODE == 1
0090       /* Generate interrupts on the TXW bit condition. */
0091       BCM2835_REG(BCM2835_I2C_C) |= (1 << 9);
0092 
0093       /* Sleep until the TX FIFO has free space for a new write. */
0094       bus->task_id = rtems_task_self();
0095       if (
0096           rtems_event_transient_receive(RTEMS_WAIT, bus->base.timeout) !=
0097           RTEMS_SUCCESSFUL
0098       ) {
0099         rtems_event_transient_clear();
0100 
0101         return -ETIMEDOUT;
0102       }
0103 
0104       /* If using the bus in polling mode. */
0105 #else
0106       /* Poll TXW bit until there is space available to write. */
0107       I2C_POLLING((BCM2835_REG(BCM2835_I2C_S) & (1 << 2)) == 0);
0108 #endif
0109 
0110       /* Write data to the TX FIFO. */
0111       BCM2835_REG(BCM2835_I2C_FIFO) = (*(uint8_t *) bus->current_buffer);
0112 
0113       ++bus->current_buffer;
0114 
0115       /* Check for acknowledgment or clock stretching errors. */
0116       if (
0117           (BCM2835_REG(BCM2835_I2C_S) & (1 << 8)) ||
0118           (BCM2835_REG(BCM2835_I2C_S) & (1 << 9))
0119       ) {
0120         return -EIO;
0121       }
0122     }
0123 
0124     --bus->remaining_bytes;
0125     --bus->current_buffer_size;
0126   }
0127 
0128   return 0;
0129 }
0130 
0131 static int rpi_i2c_setup_transfer(rpi_i2c_bus *bus)
0132 {
0133   int rv;
0134 
0135   while ( bus->remaining_transfers > 0 ) {
0136     /* Setup the byte size of the current transfer. */
0137     bus->remaining_bytes = ADJUST_TRANSFER_SIZE(
0138                              bus->remaining_transfers,
0139                              bus->current_buffer_size
0140                            );
0141 
0142     /* Set the DLEN register, which specifies how many data packets
0143      * will be transferred. */
0144     BCM2835_REG(BCM2835_I2C_DLEN) = bus->remaining_bytes;
0145 
0146     /* Clear the acknowledgment and clock stretching error status. */
0147     BCM2835_REG(BCM2835_I2C_S) |= (3 << 8);
0148 
0149     /* Send start bit. */
0150     BCM2835_REG(BCM2835_I2C_C) |= (1 << 7);
0151 
0152     /* Check for an acknowledgment error. */
0153     if ( (BCM2835_REG(BCM2835_I2C_S) & (1 << 8)) != 0 ) {
0154       return -EIO;
0155     }
0156 
0157     rv = rpi_i2c_bus_transfer(bus);
0158 
0159     if ( rv < 0 ) {
0160       return rv;
0161     }
0162 
0163     /* Wait for the current transfer to finish. */
0164 
0165     /* If using the I2C bus in interrupt-driven mode. */
0166 #if I2C_IO_MODE == 1
0167     /* Generate interrupts on the DONE bit condition. */
0168     BCM2835_REG(BCM2835_I2C_C) |= (1 << 8);
0169 
0170     if (
0171         rtems_event_transient_receive(RTEMS_WAIT, bus->base.timeout) !=
0172         RTEMS_SUCCESSFUL
0173     ) {
0174       rtems_event_transient_clear();
0175 
0176       return -ETIMEDOUT;
0177     }
0178     /* If using the bus in polling mode. */
0179 #else
0180     /* Poll DONE bit until all data has been sent. */
0181     I2C_POLLING((BCM2835_REG(BCM2835_I2C_S) & (1 << 1)) == 0);
0182 #endif
0183 
0184     --bus->remaining_transfers;
0185   }
0186 
0187   return 0;
0188 }
0189 
0190 /* Handler function that is called on any I2C interrupt.
0191  *
0192  * There are 3 situations that can generate an interrupt:
0193  *
0194  * 1. Transfer (read/write) complete;
0195  * 2. The TX FIFO has space for more data (during a write transfer);
0196  * 3. The RX FIFO is full.
0197  *
0198  * Because the I2C FIFO has a 16 byte size, the 3. situation is not
0199  * as useful to many applications as knowing that at least 1 byte can
0200  * be read from the RX FIFO. For that reason this information is
0201  * got through polling the RXD bit even in interrupt-driven mode.
0202  *
0203  * This leaves only 2 interrupts to be caught. At any given time
0204  * when no I2C bus transfer is taking place no I2C interrupts are
0205  * generated, and they do they are only enabled one at a time:
0206  *
0207  * - When trying to write, the 2. interrupt is enabled to signal that
0208  *   data can be written on the TX FIFO, avoiding data loss in case
0209  *   it is full. When caught the handler disables that interrupt from
0210  *   being generated and sends a waking event to the transfer task,
0211  *   which will allow the transfer process to continue
0212  *   (by writing to the TX FIFO);
0213  *
0214  * - When the transfer is done on the Raspberry side, the 1. interrupt is
0215  *   enabled for the device to signal it has finished the transfer as
0216  *   well. When caught the handler disables that interrupt from being
0217  *   generated and sends a waking event to the transfer task, marking
0218  *   the end of the transfer.
0219  */
0220 #if I2C_IO_MODE == 1
0221 static void i2c_handler(void *arg)
0222 {
0223   rpi_i2c_bus *bus = (rpi_i2c_bus *) arg;
0224 
0225   /* If the current enabled interrupt is on the TXW condition, disable it. */
0226   if ( (BCM2835_REG(BCM2835_I2C_C) & (1 << 9)) ) {
0227     BCM2835_REG(BCM2835_I2C_C) &= ~(1 << 9);
0228   }
0229   /* If the current enabled interrupt is on the DONE condition, disable it. */
0230   else if ( (BCM2835_REG(BCM2835_I2C_C) & (1 << 8)) ) {
0231     BCM2835_REG(BCM2835_I2C_C) &= ~(1 << 8);
0232   }
0233 
0234   /* Allow the transfer process to continue. */
0235   rtems_event_transient_send(bus->task_id);
0236 }
0237 #endif
0238 
0239 static int rpi_i2c_transfer(i2c_bus *base, i2c_msg *msgs, uint32_t msg_count)
0240 {
0241   rpi_i2c_bus *bus = (rpi_i2c_bus *) base;
0242   int rv = 0;
0243   uint32_t i;
0244 
0245   /* Perform an initial parse through the messages for the I2C_M_RECV_LEN flag,
0246    * which the Pi seems to not support and the I2C framework expects the bus
0247    * to provide as part of the I2C_FUNC_I2C functionality.
0248    *
0249    * It states that the slave device sends an initial byte containing the size
0250    * of the transfer, and for this to work the Pi will likely require two
0251    * transfers, with a stop-start condition in-between. */
0252   for ( i = 0; i < msg_count; ++i ) {
0253     if ( msgs[i].flags & I2C_M_RECV_LEN ) {
0254       return -EINVAL;
0255     }
0256   }
0257 
0258   for ( i = 0; i < msg_count; ++i ) {
0259     /* Clear FIFOs. */
0260     BCM2835_REG(BCM2835_I2C_C) |= (3 << 4);
0261 
0262     /* Setup transfer. */
0263     bus->current_buffer = msgs[i].buf;
0264     bus->current_buffer_size = msgs[i].len;
0265     bus->remaining_transfers = TRANSFER_COUNT(bus->current_buffer_size);
0266 
0267     /* If the slave uses 10-bit addressing. */
0268     if ( msgs[i].flags & I2C_M_TEN ) {
0269       /* Write the 8 least-significative bits of the slave address
0270        * to the bus FIFO. */
0271       BCM2835_REG(BCM2835_I2C_FIFO) = msgs[i].addr & 0xFF;
0272 
0273       /* Address slave device, with the 2 most-significative bits at the end. */
0274       BCM2835_REG(BCM2835_I2C_A) = (0x1E << 2) | (msgs[i].addr >> 8);
0275     }
0276     /* If using the regular 7-bit slave addressing. */
0277     else {
0278       /* Address slave device. */
0279       BCM2835_REG(BCM2835_I2C_A) = msgs[i].addr;
0280     }
0281 
0282     if ( msgs[i].flags & I2C_M_RD ) {
0283       /* If the slave uses 10-bit addressing. */
0284       if ( msgs[i].flags & I2C_M_TEN ) {
0285         /* 10-bit addressing setup for a read transfer. */
0286         BCM2835_REG(BCM2835_I2C_DLEN) = 1;
0287 
0288         /* Set write bit. */
0289         BCM2835_REG(BCM2835_I2C_C) &= ~(1 << 0);
0290 
0291         /* Send start bit. */
0292         BCM2835_REG(BCM2835_I2C_C) |= (1 << 7);
0293 
0294         /* Poll the TA bit until the transfer has started. */
0295         I2C_POLLING((BCM2835_REG(BCM2835_I2C_S) & (1 << 0)) == 0);
0296       }
0297 
0298       /* Set read bit. */
0299       BCM2835_REG(BCM2835_I2C_C) |= (1 << 0);
0300 
0301       bus->read_transfer = true;
0302     }
0303     else if ( msgs[i].flags == 0 || msgs[i].flags == I2C_M_TEN ) {
0304       /* If the slave uses 10-bit addressing. */
0305       if ( msgs[i].flags & I2C_M_TEN ) {
0306         /* 10-bit addressing setup for a write transfer. */
0307         bus->current_buffer_size += 1;
0308 
0309         bus->remaining_transfers = TRANSFER_COUNT(bus->current_buffer_size);
0310       }
0311 
0312       /* Set write bit. */
0313       BCM2835_REG(BCM2835_I2C_C) &= ~(1 << 0);
0314 
0315       bus->read_transfer = false;
0316     }
0317 
0318     rv = rpi_i2c_setup_transfer(bus);
0319 
0320     if ( rv < 0 ) {
0321       return rv;
0322     }
0323   }
0324 
0325   return rv;
0326 }
0327 
0328 /* Calculates a clock divider to be used with the BSC core clock rate
0329  * to set a I2C clock rate the closest (<=) to a desired frequency. */
0330 static int rpi_i2c_set_clock(i2c_bus *base, unsigned long clock)
0331 {
0332   rpi_i2c_bus *bus = (rpi_i2c_bus *) base;
0333   uint32_t clock_rate;
0334   uint16_t divider;
0335 
0336   /* Calculates an initial clock divider. */
0337   divider = BSC_CORE_CLK_HZ / clock;
0338 
0339   clock_rate = BSC_CORE_CLK_HZ / divider;
0340 
0341   /* If the resulting clock rate is greater than desired, try the next greater
0342    * divider. */
0343   while ( clock_rate > clock ) {
0344     ++divider;
0345 
0346     clock_rate = BSC_CORE_CLK_HZ / divider;
0347   }
0348 
0349   /* Set clock divider. */
0350   BCM2835_REG(BCM2835_I2C_DIV) = divider;
0351 
0352   bus->input_clock = clock_rate;
0353 
0354   return 0;
0355 }
0356 
0357 static void rpi_i2c_destroy(i2c_bus *base)
0358 {
0359   rpi_i2c_bus *bus = (rpi_i2c_bus *) base;
0360 
0361   i2c_bus_destroy_and_free(&bus->base);
0362 }
0363 
0364 int rpi_i2c_register_bus(
0365   const char *bus_path,
0366   uint32_t bus_clock
0367 ) {
0368 #if I2C_IO_MODE == 1
0369   rtems_status_code sc;
0370 #endif
0371   rpi_i2c_bus *bus;
0372   int rv;
0373 
0374   bus = (rpi_i2c_bus *) i2c_bus_alloc_and_init(sizeof(*bus));
0375 
0376   if ( bus == NULL ) {
0377     return -1;
0378   }
0379 
0380   /* Enable the I2C BSC interface. */
0381   BCM2835_REG(BCM2835_I2C_C) |= (1 << 15);
0382 
0383   /* If the access to the bus is configured to be interrupt-driven. */
0384 #if I2C_IO_MODE == 1
0385   bus->task_id = rtems_task_self();
0386 
0387   sc = rtems_interrupt_handler_install(
0388          BCM2835_IRQ_ID_I2C,
0389          NULL,
0390          RTEMS_INTERRUPT_UNIQUE,
0391          (rtems_interrupt_handler) i2c_handler,
0392          bus
0393        );
0394 
0395   if ( sc != RTEMS_SUCCESSFUL ) {
0396     return -EIO;
0397   }
0398 #endif
0399 
0400   rv = rpi_i2c_set_clock(&bus->base, bus_clock);
0401 
0402   if ( rv < 0 ) {
0403     (*bus->base.destroy)(&bus->base);
0404 
0405     return -1;
0406   }
0407 
0408   bus->base.transfer = rpi_i2c_transfer;
0409   bus->base.set_clock = rpi_i2c_set_clock;
0410   bus->base.destroy = rpi_i2c_destroy;
0411   bus->base.functionality = I2C_FUNC_I2C | I2C_FUNC_10BIT_ADDR;
0412 
0413   return i2c_bus_register(&bus->base, bus_path);
0414 }
0415 
0416 void rpi_i2c_init(void)
0417 {
0418   /* Enable the I2C interface on the Raspberry Pi. */
0419   rtems_gpio_initialize();
0420 
0421   assert ( rpi_gpio_select_i2c() == RTEMS_SUCCESSFUL );
0422 }