lpc32xx/start/emc.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup lpc32xx_emc
0007  *
0008  * @brief EMC support implementation.
0009  */
0010
0011 /*
0012  * Copyright (c) 2010 embedded brains GmbH & Co. KG
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035
0036 #include <bsp/emc.h>
0037
0038 #include <bsp.h>
0039 #include <bsp/mmu.h>
0040
0041 static volatile lpc_emc *const emc = &lpc32xx.emc;
0042
0043 static volatile lpc32xx_emc_ahb *const emc_ahb = &lpc32xx.emc_ahb [0];
0044
0045 static void dynamic_init(const lpc32xx_emc_dynamic_config *cfg)
0046 {
0047   uint32_t chip_begin = LPC32XX_BASE_EMC_DYCS_0;
0048   uint32_t dynamiccontrol = (cfg->control | EMC_DYN_CTRL_CE | EMC_DYN_CTRL_CS)
0049     & ~EMC_DYN_CTRL_I_MASK;
0050   size_t i = 0;
0051
0052   LPC32XX_SDRAMCLK_CTRL = cfg->sdramclk_ctrl;
0053
0054   emc->dynamicreadconfig = cfg->readconfig;
0055
0056   /* Timings */
0057   emc->dynamictrp = cfg->trp;
0058   emc->dynamictras = cfg->tras;
0059   emc->dynamictsrex = cfg->tsrex;
0060   emc->dynamictwr = cfg->twr;
0061   emc->dynamictrc = cfg->trc;
0062   emc->dynamictrfc = cfg->trfc;
0063   emc->dynamictxsr = cfg->txsr;
0064   emc->dynamictrrd = cfg->trrd;
0065   emc->dynamictmrd = cfg->tmrd;
0066   emc->dynamictcdlr = cfg->tcdlr;
0067   for (i = 0; i < EMC_DYN_CHIP_COUNT; ++i) {
0068     if (cfg->chip [i].size != 0) {
0069       emc->dynamic [i].config = cfg->chip [i].config;
0070       emc->dynamic [i].rascas = cfg->chip [i].rascas;
0071     }
0072   }
0073
0074   /* NOP period */
0075   emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_NOP;
0076   lpc32xx_micro_seconds_delay(cfg->nop_time_in_us);
0077
0078   /* Precharge */
0079   emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_PALL;
0080   emc->dynamicrefresh = 1;
0081   /* FIXME: Why a delay, why this value? */
0082   lpc32xx_micro_seconds_delay(10);
0083
0084   /* Refresh timing */
0085   emc->dynamicrefresh = cfg->refresh;
0086   /* FIXME: Why a delay, why this value? */
0087   lpc32xx_micro_seconds_delay(16);
0088
0089   /* Set modes */
0090   for (i = 0; i < EMC_DYN_CHIP_COUNT; ++i) {
0091     if (cfg->chip [i].size != 0) {
0092       lpc32xx_set_translation_table_entries(
0093         (void *) chip_begin,
0094         (void *) (chip_begin + cfg->chip [i].size),
0095         LPC32XX_MMU_READ_WRITE
0096       );
0097       emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_MODE;
0098       *(volatile uint32_t *)(chip_begin + cfg->chip [i].mode);
0099       emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_MODE;
0100       *(volatile uint32_t *)(chip_begin + cfg->chip [i].extmode);
0101     }
0102     chip_begin += 0x20000000;
0103   }
0104
0105   emc->dynamiccontrol = cfg->control;
0106 }
0107
0108 void lpc32xx_emc_init(const lpc32xx_emc_dynamic_config *dyn_cfg)
0109 {
0110   /* Enable buffers in AHB ports */
0111   emc_ahb [0].control = EMC_AHB_PORT_BUFF_EN;
0112   emc_ahb [3].control = EMC_AHB_PORT_BUFF_EN;
0113   emc_ahb [4].control = EMC_AHB_PORT_BUFF_EN;
0114
0115   /* Set AHB port timeouts */
0116   emc_ahb [0].timeout = EMC_AHB_TIMEOUT(32);
0117   emc_ahb [3].timeout = EMC_AHB_TIMEOUT(32);
0118   emc_ahb [4].timeout = EMC_AHB_TIMEOUT(32);
0119
0120   /* Enable EMC */
0121   emc->control = EMC_CTRL_E,
0122   emc->config = 0;
0123
0124   dynamic_init(dyn_cfg);
0125 }