Back to home page

LXR

 
 

    


File indexing completed on 2025-05-11 08:23:03

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /*
0004  * Copyright (c) 2013 embedded brains GmbH & Co. KG
0005  *
0006  * Redistribution and use in source and binary forms, with or without
0007  * modification, are permitted provided that the following conditions
0008  * are met:
0009  * 1. Redistributions of source code must retain the above copyright
0010  *    notice, this list of conditions and the following disclaimer.
0011  * 2. Redistributions in binary form must reproduce the above copyright
0012  *    notice, this list of conditions and the following disclaimer in the
0013  *    documentation and/or other materials provided with the distribution.
0014  *
0015  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0016  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0017  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0018  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0019  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0020  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0021  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0022  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0023  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0024  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0025  * POSSIBILITY OF SUCH DAMAGE.
0026  */
0027 
0028 #include <bsp/arm-pl111-fb.h>
0029 
0030 #include <bsp.h>
0031 #include <bsp/fatal.h>
0032 #include <bsp/io.h>
0033 #include <bsp/lcd.h>
0034 #include <bsp/lpc24xx.h>
0035 
0036 static const lpc24xx_pin_range tft_16_bit_5_6_5_pins[] = {
0037   LPC24XX_PIN_LCD_DCLK,
0038   LPC24XX_PIN_LCD_FP,
0039   LPC24XX_PIN_LCD_LP,
0040   LPC24XX_PIN_LCD_VD_3_P4_29,
0041   LPC24XX_PIN_LCD_VD_4_P2_6,
0042   LPC24XX_PIN_LCD_VD_5_P2_7,
0043   LPC24XX_PIN_LCD_VD_6_P2_8,
0044   LPC24XX_PIN_LCD_VD_7_P2_9,
0045   LPC24XX_PIN_LCD_VD_10_P1_20,
0046   LPC24XX_PIN_LCD_VD_11_P1_21,
0047   LPC24XX_PIN_LCD_VD_12_P1_22,
0048   LPC24XX_PIN_LCD_VD_13_P1_23,
0049   LPC24XX_PIN_LCD_VD_14_P1_24,
0050   LPC24XX_PIN_LCD_VD_15_P1_25,
0051   LPC24XX_PIN_LCD_VD_19_P2_13,
0052   LPC24XX_PIN_LCD_VD_20_P1_26,
0053   LPC24XX_PIN_LCD_VD_21_P1_27,
0054   LPC24XX_PIN_LCD_VD_22_P1_28,
0055   LPC24XX_PIN_LCD_VD_23_P1_29,
0056   LPC24XX_PIN_TERMINAL
0057 };
0058 
0059 static void fb_set_up(const pl111_fb_config *cfg)
0060 {
0061   rtems_status_code sc;
0062 
0063   sc = lpc24xx_module_enable(LPC24XX_MODULE_LCD, LPC24XX_MODULE_PCLK_DEFAULT);
0064   if (sc != RTEMS_SUCCESSFUL) {
0065     bsp_fatal(LPC24XX_FATAL_PL111_SET_UP);
0066   }
0067 
0068   #ifdef ARM_MULTILIB_ARCH_V4
0069     PINSEL11 = BSP_FLD32(LCD_MODE_TFT_16_BIT_5_6_5, 1, 3) | BSP_BIT32(0);
0070   #endif
0071 
0072   #ifdef ARM_MULTILIB_ARCH_V7M
0073     volatile lpc17xx_scb *scb = &LPC17XX_SCB;
0074 
0075     scb->matrixarb = 0x0c09;
0076   #endif
0077 }
0078 
0079 static void fb_pins_set_up(const pl111_fb_config *cfg)
0080 {
0081   rtems_status_code sc;
0082 
0083   sc = lpc24xx_pin_config(tft_16_bit_5_6_5_pins, LPC24XX_PIN_SET_FUNCTION);
0084   if (sc != RTEMS_SUCCESSFUL) {
0085     bsp_fatal(LPC24XX_FATAL_PL111_PINS_SET_UP);
0086   }
0087 }
0088 
0089 static void fb_pins_tear_down(const pl111_fb_config *cfg)
0090 {
0091   rtems_status_code sc;
0092 
0093   sc = lpc24xx_pin_config(tft_16_bit_5_6_5_pins, LPC24XX_PIN_SET_INPUT);
0094   if (sc != RTEMS_SUCCESSFUL) {
0095     bsp_fatal(LPC24XX_FATAL_PL111_PINS_TEAR_DOWN);
0096   }
0097 }
0098 
0099 static void fb_tear_down(const pl111_fb_config *cfg)
0100 {
0101   rtems_status_code sc;
0102 
0103   #ifdef ARM_MULTILIB_ARCH_V4
0104     PINSEL11 = 0;
0105   #endif
0106 
0107   sc = lpc24xx_module_disable(LPC24XX_MODULE_LCD);
0108   if (sc != RTEMS_SUCCESSFUL) {
0109     bsp_fatal(LPC24XX_FATAL_PL111_TEAR_DOWN);
0110   }
0111 }
0112 
0113 static const pl111_fb_config fb_config = {
0114   .regs = (volatile pl111 *) LCD_BASE_ADDR,
0115 
0116   .timing0 = PL111_LCD_TIMING0_PPL(640 / 16 - 1)
0117     | PL111_LCD_TIMING0_HSW(0x1d)
0118     | PL111_LCD_TIMING0_HFP(0x0f)
0119     | PL111_LCD_TIMING0_HBP(0x71),
0120   .timing1 = PL111_LCD_TIMING1_LPP(480 - 1)
0121     | PL111_LCD_TIMING1_VSW(0x02)
0122     | PL111_LCD_TIMING1_VFP(0x0a)
0123     | PL111_LCD_TIMING1_VBP(0x20),
0124   .timing2 = PL111_LCD_TIMING2_PCD_LO(0x3)
0125     | PL111_LCD_TIMING2_ACB(0x0)
0126     | PL111_LCD_TIMING2_IVS
0127     | PL111_LCD_TIMING2_IHS
0128     | PL111_LCD_TIMING2_IPC
0129     | PL111_LCD_TIMING2_CPL(640 - 1)
0130     | PL111_LCD_TIMING2_PCD_HI(0x0),
0131   .timing3 = 0x0,
0132   .control = PL111_LCD_CONTROL_LCD_TFT
0133     | PL111_LCD_CONTROL_LCD_BPP(PL111_LCD_CONTROL_LCD_BPP_16_5_6_5)
0134     | PL111_LCD_CONTROL_BGR,
0135   .power_delay_in_us = 100000,
0136 
0137   .set_up = fb_set_up,
0138   .pins_set_up = fb_pins_set_up,
0139   .pins_tear_down = fb_pins_tear_down,
0140   .tear_down = fb_tear_down
0141 };
0142 
0143 const pl111_fb_config *arm_pl111_fb_get_config(void)
0144 {
0145   return &fb_config;
0146 }