lpc24xx/start/bspreset-armv4.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMLPC24XX
0007  *
0008  * @brief Reset code.
0009  */
0010
0011 /*
0012  * Copyright (C) 2008, 2013 embedded brains GmbH & Co. KG
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035
0036 #include <rtems.h>
0037
0038 #include <bsp/bootcard.h>
0039 #include <bsp/lpc24xx.h>
0040 #include <bsp/start.h>
0041
0042 #ifdef ARM_MULTILIB_ARCH_V4
0043
0044 BSP_START_TEXT_SECTION __attribute__((flatten)) void
0045 bsp_reset( rtems_fatal_source source, rtems_fatal_code code )
0046 {
0047   rtems_interrupt_level level;
0048
0049   (void) source;
0050   (void) code;
0051
0052   rtems_interrupt_disable(level);
0053   (void) level;
0054
0055   /* Trigger watchdog reset */
0056   WDCLKSEL = 0;
0057   WDTC = 0xff;
0058   WDMOD = 0x3;
0059   WDFEED = 0xaa;
0060   WDFEED = 0x55;
0061
0062   while (true) {
0063     /* Do nothing */
0064   }
0065 }
0066
0067 #endif /* ARM_MULTILIB_ARCH_V4 */