lpc176x/irq/irq.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSImplClassicIntr
0007  *
0008  * @brief LPC176X interrupt support.
0009  */
0010
0011 /*
0012  * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035
0036 #include <rtems/score/armv4.h>
0037 #include <rtems/score/armv7m.h>
0038
0039 #include <bsp.h>
0040 #include <bsp/irq.h>
0041 #include <bsp/irq-generic.h>
0042 #include <bsp/lpc176x.h>
0043 #include <bsp/linker-symbols.h>
0044
0045 /**
0046  * @brief Checks if the current interrupt vector length is valid or not.
0047  *
0048  * @param  vector The current interrupt vector length.
0049  * @return  TRUE if valid.
0050  *          FALSE otherwise.
0051  */
0052 static inline bool lpc176x_irq_is_valid( const rtems_vector_number vector )
0053 {
0054   return vector < BSP_INTERRUPT_VECTOR_COUNT;
0055 }
0056
0057 void lpc176x_irq_set_priority(
0058   const rtems_vector_number vector,
0059   unsigned                  priority
0060 )
0061 {
0062   if ( lpc176x_irq_is_valid( vector ) ) {
0063     if ( priority > LPC176X_IRQ_PRIORITY_VALUE_MAX ) {
0064       priority = LPC176X_IRQ_PRIORITY_VALUE_MAX;
0065     }
0066
0067     /* else implies that the priority is unlocked. Also,
0068        there is nothing to do. */
0069
0070     _ARMV7M_NVIC_Set_priority( (int) vector, (int) ( priority << 3u ) );
0071   }
0072
0073   /* else implies that the rtems vector number is invalid. Also,
0074      there is nothing to do. */
0075 }
0076
0077 unsigned lpc176x_irq_get_priority( const rtems_vector_number vector )
0078 {
0079   unsigned priority;
0080
0081   if ( lpc176x_irq_is_valid( vector ) ) {
0082     priority = (unsigned) ( _ARMV7M_NVIC_Get_priority( (int) vector ) >> 3u );
0083   } else {
0084     priority = LPC176X_IRQ_PRIORITY_VALUE_MIN - 1u;
0085   }
0086
0087   return priority;
0088 }