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File indexing completed on 2025-05-11 08:23:03

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMLPC176X
0007  *
0008  * @brief Clock driver configuration.
0009  */
0010 
0011 /*
0012  * Copyright (c) 2009 embedded brains GmbH & Co. KG
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035 
0036 #ifndef LIBBSP_ARM_LPC176X_LPC_CLOCK_CONFIG_H
0037 #define LIBBSP_ARM_LPC176X_LPC_CLOCK_CONFIG_H
0038 
0039 #include <bsp.h>
0040 #include <bsp/irq.h>
0041 #include <bsp/lpc176x.h>
0042 #include <bsp/io.h>
0043 
0044 #ifdef __cplusplus
0045 extern "C" {
0046 #endif /* __cplusplus */
0047 
0048 #define LPC_CLOCK_INTERRUPT LPC176X_IRQ_TIMER_0
0049 #define LPC_CLOCK_TIMER_BASE TMR0_BASE_ADDR
0050 #define LPC_CLOCK_TIMECOUNTER_BASE TMR1_BASE_ADDR
0051 #define LPC_CLOCK_REFERENCE LPC176X_PCLK
0052 #define LPC_CLOCK_MODULE_ENABLE() \
0053   lpc176x_module_enable( LPC176X_MODULE_TIMER_0, LPC176X_MODULE_PCLK_DEFAULT )
0054 
0055 #ifdef __cplusplus
0056 }
0057 #endif /* __cplusplus */
0058 
0059 #endif /* LIBBSP_ARM_LPC176X_LPC_CLOCK_CONFIG_H */