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File indexing completed on 2025-05-11 08:23:03

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSImplClassicIntr
0007  *
0008  * @brief LPC176X interrupt definitions.
0009  */
0010 
0011 /*
0012  * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035 
0036 #ifndef LIBBSP_ARM_LPC176X_IRQ_H
0037 #define LIBBSP_ARM_LPC176X_IRQ_H
0038 
0039 #ifndef ASM
0040 #include <rtems.h>
0041 #include <rtems/irq.h>
0042 #include <rtems/irq-extension.h>
0043 #endif
0044 
0045 /**
0046  * @addtogroup RTEMSImplClassicIntr
0047  *
0048  * @{
0049  */
0050 
0051 #define LPC176X_IRQ_WDT 0U
0052 #define LPC176X_IRQ_TIMER_0 1U
0053 #define LPC176X_IRQ_TIMER_1 2U
0054 #define LPC176X_IRQ_TIMER_2 3U
0055 #define LPC176X_IRQ_TIMER_3 4U
0056 #define LPC176X_IRQ_UART_0 5U
0057 #define LPC176X_IRQ_UART_1 6U
0058 #define LPC176X_IRQ_UART_2 7U
0059 #define LPC176X_IRQ_UART_3 8U
0060 #define LPC176X_IRQ_PWM_1 9U
0061 #define LPC176X_IRQ_PLL 16U
0062 #define LPC176X_IRQ_RTC 17U
0063 #define LPC176X_IRQ_EINT_0 18U
0064 #define LPC176X_IRQ_EINT_1 19U
0065 #define LPC176X_IRQ_EINT_2 20U
0066 #define LPC176X_IRQ_EINT_3 21U
0067 #define LPC176X_IRQ_ADC_0 22U
0068 #define LPC176X_IRQ_BOD 23U
0069 #define LPC176X_IRQ_USB 24U
0070 #define LPC176X_IRQ_CAN 25U
0071 #define LPC176X_IRQ_DMA 26U
0072 #define LPC176X_IRQ_I2S 27U
0073 #define LPC176X_IRQ_SD_MMC 29U
0074 #define LPC176X_IRQ_MCPWM 30U
0075 #define LPC176X_IRQ_QEI 31U
0076 #define LPC176X_IRQ_PLL_ALT 32U
0077 #define LPC176X_IRQ_USB_ACTIVITY 33U
0078 #define LPC176X_IRQ_CAN_ACTIVITY 34U
0079 #define LPC176X_IRQ_UART_4 35U
0080 #define LPC176X_IRQ_GPIO 38U
0081 #define LPC176X_IRQ_PWM 39U
0082 #define LPC176X_IRQ_EEPROM 40U
0083 
0084 #define BSP_INTERRUPT_VECTOR_COUNT 41
0085 
0086 #define LPC176X_IRQ_PRIORITY_VALUE_MIN 0U
0087 
0088 #define LPC176X_IRQ_PRIORITY_VALUE_MAX 31U
0089 
0090 #define LPC176X_IRQ_PRIORITY_COUNT ( LPC176X_IRQ_PRIORITY_VALUE_MAX + 1U )
0091 #define LPC176X_IRQ_PRIORITY_HIGHEST LPC176X_IRQ_PRIORITY_VALUE_MIN
0092 #define LPC176X_IRQ_PRIORITY_LOWEST LPC176X_IRQ_PRIORITY_VALUE_MAX
0093 
0094 #ifndef ASM
0095 
0096 /**
0097  * @brief Sets the priority according to the current interruption.
0098  *
0099  * @param vector   Interrupt to be attended.
0100  * @param priority Interrupts priority.
0101  */
0102 void lpc176x_irq_set_priority(
0103   rtems_vector_number vector,
0104   unsigned            priority
0105 );
0106 
0107 /**
0108  * @brief Gets the priority number according to the current interruption.
0109  *
0110  * @param  vector Interrupts to be attended.
0111  * @return The priority number according to the current interruption.
0112  */
0113 unsigned lpc176x_irq_get_priority( rtems_vector_number vector );
0114 
0115 #endif /* ASM */
0116 
0117 /** @} */
0118 
0119 #endif /* LIBBSP_ARM_LPC176X_IRQ_H */