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File indexing completed on 2025-05-11 08:23:03

0001 /**
0002  * @file
0003  *
0004  * @ingroup RTEMSBSPsARMLPC176X
0005  *
0006  * @brief CAN controller for the lpc176x controller.
0007  */
0008 
0009 /*
0010  * Copyright (c) 2014 Taller Technologies.
0011  *
0012  * @author  Diaz Marcos (marcos.diaz@tallertechnologies.com)
0013  * @author  Daniel Chicco  (daniel.chicco@tallertechnologies.com)
0014  *
0015  * The license and distribution terms for this file may be
0016  * found in the file LICENSE in this distribution or at
0017  * http://www.rtems.org/license/LICENSE.
0018  */
0019 
0020 #ifndef LPC176X_TIMER_DEFS_H
0021 #define LPC176X_TIMER_DEFS_H
0022 
0023 #include <bsp/common-types.h>
0024 #include <bsp/can.h>
0025 
0026 /* CAN ACCEPTANCE FILTER */
0027 #define CAN_ACCEPT_BASE_ADDR 0x4003C000
0028 
0029 #define CAN_DRIVER_IS_MINOR_VALID( minor ) ( minor < CAN_DEVICES_NUMBER )
0030 #define CAN_DEFAULT_BAUD_RATE 1000000u
0031 #define CAN_DEFAULT_INTERRUPT_CONFIGURATION 0
0032 
0033 #define MAX_NUMBER_OF_CAN_BITS 25u
0034 #define MIN_NUMBER_OF_CAN_BITS 4u
0035 #define CAN_BRP_EXTRA_BIT 1u
0036 #define CAN_TSEG_EXTRA_BITS 3u
0037 #define MAX_TSEG1_TSEG2_BITS 22u
0038 
0039 #define CAN_GSR_RBS_MASK 1u
0040 #define CAN_CMR_RRB_MASK 4u
0041 
0042 #define CAN_MAXIMUM_DATA_SIZE 8u
0043 #define CAN10_MAXIMUM_ID 0x7FFu
0044 
0045 /**
0046  * @brief The Time segments of a CAN bit.
0047  */
0048 typedef enum {
0049   CAN_TSEG1,
0050   CAN_TSEG2,
0051   CAN_NUMBER_OF_TSEG,
0052 } can_tseg_number;
0053 
0054 #define CAN_BTR_TSEG1_SHIFT 16u
0055 #define CAN_BTR_TSEG2_SHIFT 20u
0056 #define CAN_BTR_SJW_SHIFT 14u
0057 #define CAN_BTR_BRP_SHIFT 0u
0058 
0059 #define CAN_BTR_TSEG1_MASK 0x000F0000U
0060 #define CAN_BTR_TSEG2_MASK 0x00700000U
0061 #define CAN_BTR_SJW_MASK 0x0000C000U
0062 #define CAN_BTR_BRP_MASK 0x000003FFU
0063 
0064 #define WRONG_BTR_VALUE 0xFFFFFFFF
0065 
0066 /**
0067  * @brief The transmit buffers of the CAN device.
0068  */
0069 typedef enum {
0070   CAN_TRANSMIT1,
0071   CAN_TRANSMIT2,
0072   CAN_TRANSMIT3,
0073   CAN_NUMBER_OF_TRANSMIT_BUFFERS
0074 } can_transmit_number;
0075 
0076 /**
0077  * @brief The CAN status and control masks to send a message
0078  * for each transmit buffer.
0079  */
0080 typedef struct {
0081   uint32_t can_status_mask;
0082   uint32_t not_cc_cmr_value;
0083 } can_transmit_info;
0084 
0085 /** @brief Represents the CAN controller registers.*/
0086 typedef struct {
0087   volatile uint32_t MOD;
0088   volatile uint32_t CMR;
0089   volatile uint32_t GSR;
0090   volatile uint32_t ICR;
0091   volatile uint32_t IER;
0092   volatile uint32_t BTR;
0093   volatile uint32_t EWL;
0094   volatile uint32_t SR;
0095   volatile registers_can_message receive;
0096   volatile registers_can_message transmit[ CAN_NUMBER_OF_TRANSMIT_BUFFERS ];
0097 } can_device;
0098 
0099 /**
0100  * @brief A TX or RX pin for each CAN device .
0101  */
0102 typedef enum {
0103   CAN_TX_PIN,
0104   CAN_RX_PIN,
0105   NUMBER_OF_CAN_PINS
0106 } can_pin_number;
0107 
0108 /**
0109  * @brief A driver entry for each low level device.
0110  */
0111 typedef struct {
0112   can_device *const device;
0113   const lpc176x_module module;
0114   const uint32_t pconp_pin;
0115   const uint32_t pins[ NUMBER_OF_CAN_PINS ];
0116   const lpc176x_pin_function pinfunction;
0117 } can_driver_entry;
0118 
0119 /** @brief Represents the CAN centralized registers. */
0120 typedef struct {
0121   volatile uint32_t TX_SR;
0122   volatile uint32_t RX_SR;
0123   volatile uint32_t MSR;
0124 } can_central;
0125 
0126 /** @brief Represents the acceptance filter registers. */
0127 typedef struct {
0128   volatile uint32_t AFMR;
0129   volatile uint32_t SFF_SA;
0130   volatile uint32_t SFF_GRP_SA;
0131   volatile uint32_t EFF_SA;
0132   volatile uint32_t EFF_GRP_SA;
0133   volatile uint32_t EOT;
0134   volatile uint32_t LUT_ERR_ADR;
0135   volatile uint32_t LUT_ERR;
0136   volatile uint32_t FCANIE;
0137   volatile uint32_t FCANIC0;
0138   volatile uint32_t FCANIC1;
0139 } can_acceptance_filter;
0140 
0141 /**
0142  * @brief The possible CAN formats for a message.
0143  */
0144 typedef enum {
0145   CANStandard = 0,
0146   CANExtended = 1,
0147   CANAny = 2
0148 } can_format;
0149 
0150 /**
0151  * @brief The types of message.
0152  */
0153 typedef enum {
0154   CANData = 0,
0155   CANRemote = 1
0156 } can_type;
0157 
0158 #define CAN_INTERRUPT_TYPE_MASK 0x1ffu
0159 
0160 /**
0161  * @brief The vector with all the callbacks for the CAN isr.
0162  */
0163 typedef lpc176x_can_isr lpc176x_can_isr_vector[ CAN_IRQ_NUMBER ];
0164 
0165 #define CAN_MOD_RM 0x00000001U
0166 
0167 #define CAN_ACCF_AFMR_ACCOF 0x00000001U
0168 #define CAN_ACCF_AFMR_ACCBP 0x00000002U
0169 #define CAN_ACCF_AFMR_EFCAN 0x00000004U
0170 
0171 #define CAN_IER_RIE 0x000000001U
0172 #define CAN_IER_TIE1 0x000000002U
0173 #define CAN_IER_EIE 0x000000004U
0174 #define CAN_IER_DOIE 0x000000008U
0175 #define CAN_IER_WUIE 0x000000010U
0176 #define CAN_IER_EPIEX 0x000000020U
0177 #define CAN_IER_ALIEX 0x000000040U
0178 #define CAN_IER_BEIEX 0x000000080U
0179 #define CAN_IER_IDIEX 0x000000100U
0180 #define CAN_IER_TIE2 0x000000200U
0181 #define CAN_IER_TIE3 0x000000400U
0182 
0183 #endif /*LPC176X_TIMER_DEFS_H*/