lpc176x/include/bsp.h

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMLPC176X
0007  *
0008  * @brief Global BSP definitions.
0009  */
0010
0011 /*
0012  * Copyright (C) 2008, 2013 embedded brains GmbH & Co. KG
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035
0036 #ifndef LIBBSP_ARM_LPC176X_BSP_H
0037 #define LIBBSP_ARM_LPC176X_BSP_H
0038
0039 /**
0040  * @defgroup RTEMSBSPsARMLPC176X NXP LPC176X
0041  *
0042  * @ingroup RTEMSBSPsARM
0043  *
0044  * @brief NXP LPC176X Board Support Package.
0045  *
0046  * @{
0047  */
0048
0049 #include <bspopts.h>
0050
0051 #define LPC176X_PCLK ( LPC176X_CCLK / LPC176X_PCLKDIV )
0052 #define LPC176X_MPU_REGION_COUNT 8u
0053
0054 #define BSP_FEATURE_IRQ_EXTENSION
0055 #define BSP_ARMV7M_IRQ_PRIORITY_DEFAULT ( 29u << 3u )
0056 #define BSP_ARMV7M_SYSTICK_PRIORITY ( 30u << 3u )
0057 #define BSP_ARMV7M_SYSTICK_FREQUENCY LPC176X_CCLK
0058
0059 #ifndef ASM
0060
0061 #include <rtems.h>
0062 #include <bsp/default-initial-extension.h>
0063
0064 #ifdef __cplusplus
0065 extern "C" {
0066 #endif /* __cplusplus */
0067
0068 struct rtems_bsdnet_ifconfig;
0069
0070 /**
0071  * @brief Optimized idle task.
0072  *
0073  * This idle task sets the power mode to idle.  This causes the processor
0074  * clock to be stopped, while on-chip peripherals remain active.
0075  * Any enabled interrupt from a peripheral or an external interrupt source
0076  *  will cause the processor to resume execution.
0077  *
0078  * To enable the idle task use the following in the system configuration:
0079  *
0080  * @code
0081  * #include <bsp.h>
0082  *
0083  * #define CONFIGURE_INIT
0084  *
0085  * #define CONFIGURE_IDLE_TASK_BODY bsp_idle_thread
0086  *
0087  * #include <confdefs.h>
0088  * @endcode
0089  */
0090 void*bsp_idle_thread( uintptr_t ignored );
0091
0092 #define BSP_CONSOLE_UART_BASE 0x4000C000U
0093
0094 /**
0095  * @brief Restarts the bsp with "addr" address
0096  * @param addr Address used to restart the bsp
0097  */
0098 void bsp_restart( const void *addr );
0099
0100 #ifdef __cplusplus
0101 }
0102 #endif /* __cplusplus */
0103
0104 #endif /* ASM */
0105
0106 /** @} */
0107
0108 #endif /* LIBBSP_ARM_LPC176X_BSP_H */