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File indexing completed on 2025-05-11 08:23:03

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMLPC176X
0007  *
0008  * @brief Console configuration.
0009  */
0010 
0011 /*
0012  * Copyright (C) 2008, 2014 embedded brains GmbH & Co. KG
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035 
0036 #include <libchip/ns16550.h>
0037 
0038 #include <bsp.h>
0039 #include <bsp/io.h>
0040 #include <bsp/irq.h>
0041 #include <bsp/console-termios.h>
0042 
0043 /**
0044  * @brief Gets the uart register according to the current address.
0045  *
0046  * @param  addr Register address.
0047  * @param  i Index register.
0048  * @return  Uart register.
0049  */
0050 static inline uint8_t lpc176x_uart_get_register(
0051   const uintptr_t addr,
0052   const uint8_t   i
0053 )
0054 {
0055   volatile uint32_t *reg = (volatile uint32_t *) addr;
0056 
0057   return (uint8_t) reg[ i ];
0058 }
0059 
0060 /**
0061  * @brief Sets the uart register address according to the value passed.
0062  *
0063  * @param  addr Register address.
0064  * @param  i Index register.
0065  * @param val Value to set.
0066  */
0067 static inline void lpc176x_uart_set_register(
0068   const uintptr_t addr,
0069   const uint8_t   i,
0070   const uint8_t   val
0071 )
0072 {
0073   volatile uint32_t *reg = (volatile uint32_t *) addr;
0074 
0075   reg[ i ] = val;
0076 }
0077 
0078 static bool lpc176x_uart1_probe(rtems_termios_device_context *ctx)
0079 {
0080   (void)ctx;
0081 
0082   lpc176x_module_enable( LPC176X_MODULE_UART_1, LPC176X_MODULE_PCLK_DEFAULT );
0083 
0084   lpc176x_pin_select( LPC176X_PIN_UART_1_TXD, LPC176X_PIN_FUNCTION_01 );
0085   lpc176x_pin_select( LPC176X_PIN_UART_1_RXD, LPC176X_PIN_FUNCTION_01 );
0086 
0087   return true;
0088 }
0089 
0090 #ifdef LPC176X_CONFIG_UART_2
0091 static bool lpc176x_uart2_probe(rtems_termios_device_context *ctx)
0092 {
0093   (void)ctx;
0094 
0095   lpc176x_module_enable( LPC176X_MODULE_UART_2, LPC176X_MODULE_PCLK_DEFAULT );
0096 
0097   lpc176x_pin_select( LPC176X_PIN_UART_2_TXD, LPC176X_PIN_FUNCTION_01 );
0098   lpc176x_pin_select( LPC176X_PIN_UART_2_RXD, LPC176X_PIN_FUNCTION_01 );
0099 
0100   return true;
0101 }
0102 #endif
0103 
0104 #ifdef LPC176X_CONFIG_UART_3
0105 static bool lpc176x_uart3_probe(rtems_termios_device_context *ctx)
0106 {
0107   (void)ctx;
0108 
0109   lpc176x_module_enable( LPC176X_MODULE_UART_3, LPC176X_MODULE_PCLK_DEFAULT );
0110 
0111   lpc176x_pin_select( LPC176X_PIN_UART_3_TXD, LPC176X_PIN_FUNCTION_10 );
0112   lpc176x_pin_select( LPC176X_PIN_UART_3_RXD, LPC176X_PIN_FUNCTION_10 );
0113 
0114   return true;
0115 }
0116 #endif
0117 
0118 #ifdef LPC176X_CONFIG_CONSOLE
0119 static ns16550_context lpc176x_uart_context_0 = {
0120   .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 0"),
0121   .get_reg = lpc176x_uart_get_register,
0122   .set_reg = lpc176x_uart_set_register,
0123   .port = UART0_BASE_ADDR,
0124   .irq = LPC176X_IRQ_UART_0,
0125   .clock = LPC176X_PCLK,
0126   .initial_baud = LPC176X_UART_BAUD,
0127   .has_fractional_divider_register = true
0128 };
0129 #endif
0130 
0131 #ifdef LPC176X_CONFIG_UART_1
0132 static ns16550_context lpc176x_uart_context_1 = {
0133   .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 1"),
0134   .get_reg = lpc176x_uart_get_register,
0135   .set_reg = lpc176x_uart_set_register,
0136   .port = UART1_BASE_ADDR,
0137   .irq = LPC176X_IRQ_UART_1,
0138   .clock = LPC176X_PCLK,
0139   .initial_baud = LPC176X_UART_BAUD,
0140   .has_fractional_divider_register = true
0141 };
0142 #endif
0143 
0144 #ifdef LPC176X_CONFIG_UART_2
0145 static ns16550_context lpc176x_uart_context_2 = {
0146   .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 2"),
0147   .get_reg = lpc176x_uart_get_register,
0148   .set_reg = lpc176x_uart_set_register,
0149   .port = UART2_BASE_ADDR,
0150   .irq = LPC176X_IRQ_UART_2,
0151   .clock = LPC176X_PCLK,
0152   .initial_baud = LPC176X_UART_BAUD,
0153   .has_fractional_divider_register = true
0154 };
0155 #endif
0156 
0157 #ifdef LPC176X_CONFIG_UART_3
0158 static ns16550_context lpc176x_uart_context_3 = {
0159   .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 3"),
0160   .get_reg = lpc176x_uart_get_register,
0161   .set_reg = lpc176x_uart_set_register,
0162   .port = UART3_BASE_ADDR,
0163   .irq = LPC176X_IRQ_UART_3,
0164   .clock = LPC176X_PCLK,
0165   .initial_baud = LPC176X_UART_BAUD,
0166   .has_fractional_divider_register = true
0167 };
0168 #endif
0169 
0170 const console_device console_device_table[] = {
0171   #ifdef LPC176X_CONFIG_CONSOLE
0172     {
0173       .device_file = "/dev/ttyS0",
0174       .probe = console_device_probe_default,
0175       .handler = &ns16550_handler_interrupt,
0176       .context = &lpc176x_uart_context_0.base
0177     },
0178   #endif
0179   #ifdef LPC176X_CONFIG_UART_1
0180     {
0181       .device_file = "/dev/ttyS1",
0182       .probe = lpc176x_uart1_probe,
0183       .handler = &ns16550_handler_interrupt,
0184       .context = &lpc176x_uart_context_1.base
0185     },
0186   #endif
0187   #ifdef LPC176X_CONFIG_UART_2
0188     {
0189       .device_file = "/dev/ttyS2",
0190       .probe = lpc176x_uart2_probe,
0191       .handler = &ns16550_handler_interrupt,
0192       .context = &lpc176x_uart_context_2.base
0193     },
0194   #endif
0195   #ifdef LPC176X_CONFIG_UART_3
0196     {
0197       .device_file = "/dev/ttyS3",
0198       .probe = lpc176x_uart3_probe,
0199       .handler = &ns16550_handler_interrupt,
0200       .context = &lpc176x_uart_context_3.base
0201     },
0202   #endif
0203 };
0204 
0205 const size_t console_device_count = RTEMS_ARRAY_SIZE(console_device_table);