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File indexing completed on 2025-05-11 08:23:02

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMShared
0007  *
0008  * @brief Create #defines which state which erratas shall get applied
0009  */
0010 
0011 /*
0012  * Copyright (c) 2014 embedded brains GmbH & Co. KG
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035 
0036 #ifndef ARM_ERRATA_H_
0037 #define ARM_ERRATA_H_
0038 
0039 #include <bsp/arm-release-id.h>
0040 #include <libcpu/arm-cp15.h>
0041 
0042 #ifdef __cplusplus
0043 extern "C" {
0044 #endif /* __cplusplus */
0045 
0046 static inline arm_release_id arm_errata_get_processor_release(void)
0047 {
0048   const uint32_t MIDR          = arm_cp15_get_id_code();
0049   const uint8_t  REVISION      = (MIDR & 0xF00000U) >> 20;
0050   const uint8_t  PATCH_LEVEL   = (MIDR & 0xFU);
0051 
0052   return ARM_RELEASE_ID_FROM_NUMBER_AND_PATCH_LEVEL(
0053     REVISION,
0054     PATCH_LEVEL
0055   );
0056 }
0057 
0058 static inline bool arm_errata_is_applicable_processor_errata_764369(void)
0059 {
0060 #if defined(RTEMS_SMP)
0061   const arm_release_id RELEASE       = arm_errata_get_processor_release();
0062   bool                 is_applicable = false;
0063 
0064   /* Errata information for Cortex-A9 processors.
0065    * Information taken from ARMs
0066    * "Cortex-A series processors
0067    * - Cortex-A9
0068    * - Software Developers Errata Notice
0069    * - Revision r4 revisions
0070    * - ARM Cortex-A9 processors r4 release Software Developers Errata Notice"
0071    * The corresponding link is: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/BABJFIBA.html
0072    * Please see this document for more information on these erratas */
0073 
0074   switch( RELEASE ) {
0075     case ARM_RELEASE_ID_R4_P1:
0076     case ARM_RELEASE_ID_R4_P4:
0077     case ARM_RELEASE_ID_R3_P0:
0078     case ARM_RELEASE_ID_R2_P10:
0079     case ARM_RELEASE_ID_R2_P8:
0080     case ARM_RELEASE_ID_R2_P6:
0081     case ARM_RELEASE_ID_R2_P4:
0082     case ARM_RELEASE_ID_R2_P3:
0083     case ARM_RELEASE_ID_R2_P2:
0084     case ARM_RELEASE_ID_R2_P0:
0085       is_applicable = true;
0086       break;
0087     default:
0088       is_applicable = false;
0089       break;
0090   }
0091 
0092   return is_applicable;
0093 #else
0094   return false;
0095 #endif
0096 }
0097 
0098 static inline bool arm_errata_is_applicable_processor_errata_775420(void)
0099 {
0100   const arm_release_id RELEASE       = arm_errata_get_processor_release();
0101   bool                 is_applicable = false;
0102 
0103   /* Errata information for Cortex-A9 processors.
0104   * Information taken from ARMs
0105   * "Cortex-A series processors
0106   * - Cortex-A9
0107   * - Software Developers Errata Notice
0108   * - Revision r4 revisions
0109   * - ARM Cortex-A9 processors r4 release Software Developers Errata Notice"
0110   * The corresponding link is: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/BABJFIBA.html
0111   * Please see this document for more information on these erratas */
0112 
0113   switch( RELEASE ) {
0114     case ARM_RELEASE_ID_R2_P10:
0115     case ARM_RELEASE_ID_R2_P8:
0116     case ARM_RELEASE_ID_R2_P6:
0117     case ARM_RELEASE_ID_R2_P4:
0118     case ARM_RELEASE_ID_R2_P3:
0119     case ARM_RELEASE_ID_R2_P2:
0120       is_applicable = true;
0121       break;
0122     default:
0123       is_applicable = false;
0124       break;
0125   }
0126 
0127   return is_applicable;
0128 }
0129 
0130 #ifdef __cplusplus
0131 }
0132 #endif /* __cplusplus */
0133 
0134 #endif /* ARM_ERRATA_H_ */