File indexing completed on 2025-05-11 08:23:02
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0009 #include "fsl_xecc.h"
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0016 #ifndef FSL_COMPONENT_ID
0017 #define FSL_COMPONENT_ID "platform.drivers.xecc"
0018 #endif
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0034 void XECC_Init(XECC_Type *base, const xecc_config_t *config)
0035 {
0036
0037 base->ERR_STAT_EN = kXECC_AllInterruptsStatusEnable;
0038
0039 base->ERR_STATUS = kXECC_AllInterruptsFlag;
0040
0041 base->ERR_SIG_EN = 0U;
0042
0043
0044 base->ECC_BASE_ADDR0 = config->Region0BaseAddress >> 12U;
0045 base->ECC_END_ADDR0 = config->Region0EndAddress >> 12U;
0046 base->ECC_BASE_ADDR1 = config->Region1BaseAddress >> 12U;
0047 base->ECC_END_ADDR1 = config->Region1EndAddress >> 12U;
0048 base->ECC_BASE_ADDR2 = config->Region2BaseAddress >> 12U;
0049 base->ECC_END_ADDR2 = config->Region2EndAddress >> 12U;
0050 base->ECC_BASE_ADDR3 = config->Region3BaseAddress >> 12U;
0051 base->ECC_END_ADDR3 = config->Region3EndAddress >> 12U;
0052
0053
0054 base->ECC_CTRL = XECC_ECC_CTRL_ECC_EN(config->enableXECC);
0055 base->ECC_CTRL |= XECC_ECC_CTRL_WECC_EN(config->enableWriteECC);
0056 base->ECC_CTRL |= XECC_ECC_CTRL_RECC_EN(config->enableReadECC);
0057 base->ECC_CTRL |= XECC_ECC_CTRL_SWAP_EN(config->enableSwap);
0058
0059
0060 __DSB();
0061 }
0062
0063
0064
0065
0066
0067 void XECC_Deinit(XECC_Type *base)
0068 {
0069
0070 base->ECC_CTRL &= ~XECC_ECC_CTRL_ECC_EN(1);
0071 }
0072
0073 void XECC_GetDefaultConfig(xecc_config_t *config)
0074 {
0075 assert(NULL != config);
0076
0077
0078 (void)memset(config, 0, sizeof(*config));
0079
0080
0081 config->enableXECC = false;
0082
0083 config->enableWriteECC = false;
0084
0085 config->enableReadECC = false;
0086
0087 config->enableSwap = false;
0088
0089
0090 config->Region0BaseAddress = 0U;
0091
0092 config->Region0EndAddress = 0U;
0093
0094 config->Region1BaseAddress = 0U;
0095
0096 config->Region1EndAddress = 0U;
0097
0098 config->Region2BaseAddress = 0U;
0099
0100 config->Region2EndAddress = 0U;
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0102 config->Region3BaseAddress = 0U;
0103
0104 config->Region3EndAddress = 0U;
0105 }
0106
0107
0108 status_t XECC_ErrorInjection(XECC_Type *base, uint32_t errordata, uint8_t erroreccdata)
0109 {
0110 status_t status = kStatus_Success;
0111
0112 if ((errordata != 0x00U) || (erroreccdata != 0x00U))
0113 {
0114
0115 base->ERR_DATA_INJ = errordata;
0116
0117 base->ERR_ECC_INJ = erroreccdata;
0118
0119 __DSB();
0120 }
0121 else
0122 {
0123 status = kStatus_Fail;
0124 }
0125
0126 return status;
0127 }
0128
0129 void XECC_GetSingleErrorInfo(XECC_Type *base, xecc_single_error_info_t *info)
0130 {
0131 assert(info != NULL);
0132
0133 info->singleErrorAddress = base->SINGLE_ERR_ADDR;
0134 info->singleErrorData = base->SINGLE_ERR_DATA;
0135 info->singleErrorEccCode = base->SINGLE_ERR_ECC;
0136 info->singleErrorBitField = base->SINGLE_ERR_BIT_FIELD;
0137 info->singleErrorBitPos = base->SINGLE_ERR_POS;
0138 }
0139
0140 void XECC_GetMultiErrorInfo(XECC_Type *base, xecc_multi_error_info_t *info)
0141 {
0142 assert(info != NULL);
0143
0144 info->multiErrorAddress = base->MULTI_ERR_ADDR;
0145 info->multiErrorData = base->MULTI_ERR_DATA;
0146 info->multiErrorEccCode = base->MULTI_ERR_ECC;
0147 info->multiErrorBitField = base->MULTI_ERR_BIT_FIELD;
0148 }