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0001 /* 0002 * Copyright (c) 2016, Freescale Semiconductor, Inc. 0003 * Copyright 2017-2020 NXP 0004 * All rights reserved. 0005 * 0006 * 0007 * SPDX-License-Identifier: BSD-3-Clause 0008 */ 0009 0010 #ifndef _FSL_SPDIF_H_ 0011 #define _FSL_SPDIF_H_ 0012 0013 #include "fsl_common.h" 0014 0015 /*! 0016 * @addtogroup spdif 0017 * @{ 0018 */ 0019 0020 /******************************************************************************* 0021 * Definitions 0022 ******************************************************************************/ 0023 0024 /*! @name Driver version */ 0025 /*@{*/ 0026 #define FSL_SPDIF_DRIVER_VERSION (MAKE_VERSION(2, 0, 6)) /*!< Version 2.0.6 */ 0027 /*@}*/ 0028 0029 /*! @brief SPDIF return status*/ 0030 enum 0031 { 0032 kStatus_SPDIF_RxDPLLLocked = MAKE_STATUS(kStatusGroup_SPDIF, 0), /*!< SPDIF Rx PLL locked. */ 0033 kStatus_SPDIF_TxFIFOError = MAKE_STATUS(kStatusGroup_SPDIF, 1), /*!< SPDIF Tx FIFO error. */ 0034 kStatus_SPDIF_TxFIFOResync = MAKE_STATUS(kStatusGroup_SPDIF, 2), /*!< SPDIF Tx left and right FIFO resync. */ 0035 kStatus_SPDIF_RxCnew = MAKE_STATUS(kStatusGroup_SPDIF, 3), /*!< SPDIF Rx status channel value updated. */ 0036 kStatus_SPDIF_ValidatyNoGood = MAKE_STATUS(kStatusGroup_SPDIF, 4), /*!< SPDIF validaty flag not good. */ 0037 kStatus_SPDIF_RxIllegalSymbol = MAKE_STATUS(kStatusGroup_SPDIF, 5), /*!< SPDIF Rx receive illegal symbol. */ 0038 kStatus_SPDIF_RxParityBitError = MAKE_STATUS(kStatusGroup_SPDIF, 6), /*!< SPDIF Rx parity bit error. */ 0039 kStatus_SPDIF_UChannelOverrun = MAKE_STATUS(kStatusGroup_SPDIF, 7), /*!< SPDIF receive U channel overrun. */ 0040 kStatus_SPDIF_QChannelOverrun = MAKE_STATUS(kStatusGroup_SPDIF, 8), /*!< SPDIF receive Q channel overrun. */ 0041 kStatus_SPDIF_UQChannelSync = MAKE_STATUS(kStatusGroup_SPDIF, 9), /*!< SPDIF U/Q channel sync found. */ 0042 kStatus_SPDIF_UQChannelFrameError = MAKE_STATUS(kStatusGroup_SPDIF, 10), /*!< SPDIF U/Q channel frame error. */ 0043 kStatus_SPDIF_RxFIFOError = MAKE_STATUS(kStatusGroup_SPDIF, 11), /*!< SPDIF Rx FIFO error. */ 0044 kStatus_SPDIF_RxFIFOResync = MAKE_STATUS(kStatusGroup_SPDIF, 12), /*!< SPDIF Rx left and right FIFO resync. */ 0045 kStatus_SPDIF_LockLoss = MAKE_STATUS(kStatusGroup_SPDIF, 13), /*!< SPDIF Rx PLL clock lock loss. */ 0046 kStatus_SPDIF_TxIdle = MAKE_STATUS(kStatusGroup_SPDIF, 14), /*!< SPDIF Tx is idle */ 0047 kStatus_SPDIF_RxIdle = MAKE_STATUS(kStatusGroup_SPDIF, 15), /*!< SPDIF Rx is idle */ 0048 kStatus_SPDIF_QueueFull = MAKE_STATUS(kStatusGroup_SPDIF, 16) /*!< SPDIF queue full */ 0049 }; 0050 0051 /*! @brief SPDIF Rx FIFO full falg select, it decides when assert the rx full flag */ 0052 typedef enum _spdif_rxfull_select 0053 { 0054 kSPDIF_RxFull1Sample = 0x0u, /*!< Rx full at least 1 sample in left and right FIFO */ 0055 kSPDIF_RxFull4Samples, /*!< Rx full at least 4 sample in left and right FIFO*/ 0056 kSPDIF_RxFull8Samples, /*!< Rx full at least 8 sample in left and right FIFO*/ 0057 kSPDIF_RxFull16Samples, /*!< Rx full at least 16 sample in left and right FIFO*/ 0058 } spdif_rxfull_select_t; 0059 0060 /*! @brief SPDIF tx FIFO EMPTY falg select, it decides when assert the tx empty flag */ 0061 typedef enum _spdif_txempty_select 0062 { 0063 kSPDIF_TxEmpty0Sample = 0x0u, /*!< Tx empty at most 0 sample in left and right FIFO */ 0064 kSPDIF_TxEmpty4Samples, /*!< Tx empty at most 4 sample in left and right FIFO*/ 0065 kSPDIF_TxEmpty8Samples, /*!< Tx empty at most 8 sample in left and right FIFO*/ 0066 kSPDIF_TxEmpty12Samples, /*!< Tx empty at most 12 sample in left and right FIFO*/ 0067 } spdif_txempty_select_t; 0068 0069 /*! @brief SPDIF U channel source */ 0070 typedef enum _spdif_uchannel_source 0071 { 0072 kSPDIF_NoUChannel = 0x0U, /*!< No embedded U channel */ 0073 kSPDIF_UChannelFromRx = 0x1U, /*!< U channel from receiver, it is CD mode */ 0074 kSPDIF_UChannelFromTx = 0x3U, /*!< U channel from on chip tx */ 0075 } spdif_uchannel_source_t; 0076 0077 /*! @brief SPDIF clock gain*/ 0078 typedef enum _spdif_gain_select 0079 { 0080 kSPDIF_GAIN_24 = 0x0U, /*!< Gain select is 24 */ 0081 kSPDIF_GAIN_16, /*!< Gain select is 16 */ 0082 kSPDIF_GAIN_12, /*!< Gain select is 12 */ 0083 kSPDIF_GAIN_8, /*!< Gain select is 8 */ 0084 kSPDIF_GAIN_6, /*!< Gain select is 6 */ 0085 kSPDIF_GAIN_4, /*!< Gain select is 4 */ 0086 kSPDIF_GAIN_3, /*!< Gain select is 3 */ 0087 } spdif_gain_select_t; 0088 0089 /*! @brief SPDIF tx data source */ 0090 typedef enum _spdif_tx_source 0091 { 0092 kSPDIF_txFromReceiver = 0x1U, /*!< Tx data directly through SPDIF receiver */ 0093 kSPDIF_txNormal = 0x5U, /*!< Normal operation, data from processor */ 0094 } spdif_tx_source_t; 0095 0096 /*! @brief SPDIF tx data source */ 0097 typedef enum _spdif_validity_config 0098 { 0099 kSPDIF_validityFlagAlwaysSet = 0x0U, /*!< Outgoing validity flags always set */ 0100 kSPDIF_validityFlagAlwaysClear, /*!< Outgoing validity flags always clear */ 0101 } spdif_validity_config_t; 0102 0103 /*! @brief The SPDIF interrupt enable flag */ 0104 enum 0105 { 0106 kSPDIF_RxDPLLLocked = SPDIF_SIE_LOCK_MASK, /*!< SPDIF DPLL locked */ 0107 kSPDIF_TxFIFOError = SPDIF_SIE_TXUNOV_MASK, /*!< Tx FIFO underrun or overrun */ 0108 kSPDIF_TxFIFOResync = SPDIF_SIE_TXRESYN_MASK, /*!< Tx FIFO left and right channel resync */ 0109 kSPDIF_RxControlChannelChange = SPDIF_SIE_CNEW_MASK, /*!< SPDIF Rx control channel value changed */ 0110 kSPDIF_ValidityFlagNoGood = SPDIF_SIE_VALNOGOOD_MASK, /*!< SPDIF validity flag no good */ 0111 kSPDIF_RxIllegalSymbol = SPDIF_SIE_SYMERR_MASK, /*!< SPDIF receiver found illegal symbol */ 0112 kSPDIF_RxParityBitError = SPDIF_SIE_BITERR_MASK, /*!< SPDIF receiver found parity bit error */ 0113 kSPDIF_UChannelReceiveRegisterFull = SPDIF_SIE_URXFUL_MASK, /*!< SPDIF U channel revceive register full */ 0114 kSPDIF_UChannelReceiveRegisterOverrun = SPDIF_SIE_URXOV_MASK, /*!< SPDIF U channel receive register overrun */ 0115 kSPDIF_QChannelReceiveRegisterFull = SPDIF_SIE_QRXFUL_MASK, /*!< SPDIF Q channel receive reigster full */ 0116 kSPDIF_QChannelReceiveRegisterOverrun = SPDIF_SIE_QRXOV_MASK, /*!< SPDIF Q channel receive register overrun */ 0117 kSPDIF_UQChannelSync = SPDIF_SIE_UQSYNC_MASK, /*!< SPDIF U/Q channel sync found */ 0118 kSPDIF_UQChannelFrameError = SPDIF_SIE_UQERR_MASK, /*!< SPDIF U/Q channel frame error */ 0119 kSPDIF_RxFIFOError = SPDIF_SIE_RXFIFOUNOV_MASK, /*!< SPDIF Rx FIFO underrun/overrun */ 0120 kSPDIF_RxFIFOResync = SPDIF_SIE_RXFIFORESYN_MASK, /*!< SPDIF Rx left and right FIFO resync */ 0121 kSPDIF_LockLoss = SPDIF_SIE_LOCKLOSS_MASK, /*!< SPDIF receiver loss of lock */ 0122 kSPDIF_TxFIFOEmpty = SPDIF_SIE_TXEM_MASK, /*!< SPDIF Tx FIFO empty */ 0123 kSPDIF_RxFIFOFull = SPDIF_SIE_RXFIFOFUL_MASK, /*!< SPDIF Rx FIFO full */ 0124 kSPDIF_AllInterrupt = kSPDIF_RxDPLLLocked | kSPDIF_TxFIFOError | kSPDIF_TxFIFOResync | 0125 kSPDIF_RxControlChannelChange | kSPDIF_ValidityFlagNoGood | kSPDIF_RxIllegalSymbol | 0126 kSPDIF_RxParityBitError | kSPDIF_UChannelReceiveRegisterFull | 0127 kSPDIF_UChannelReceiveRegisterOverrun | kSPDIF_QChannelReceiveRegisterFull | 0128 kSPDIF_QChannelReceiveRegisterOverrun | kSPDIF_UQChannelSync | kSPDIF_UQChannelFrameError | 0129 kSPDIF_RxFIFOError | kSPDIF_RxFIFOResync | kSPDIF_LockLoss | kSPDIF_TxFIFOEmpty | 0130 kSPDIF_RxFIFOFull, /*!< all interrupt */ 0131 }; 0132 0133 /*! @brief The DMA request sources */ 0134 enum 0135 { 0136 kSPDIF_RxDMAEnable = SPDIF_SCR_DMA_RX_EN_MASK, /*!< Rx FIFO full */ 0137 kSPDIF_TxDMAEnable = SPDIF_SCR_DMA_TX_EN_MASK, /*!< Tx FIFO empty */ 0138 }; 0139 0140 /*! @brief SPDIF user configuration structure */ 0141 typedef struct _spdif_config 0142 { 0143 bool isTxAutoSync; /*!< If auto sync mechanism open */ 0144 bool isRxAutoSync; /*!< If auto sync mechanism open */ 0145 uint8_t DPLLClkSource; /*!< SPDIF DPLL clock source, range from 0~15, meaning is chip-specific */ 0146 uint8_t txClkSource; /*!< SPDIF tx clock source, range from 0~7, meaning is chip-specific */ 0147 spdif_rxfull_select_t rxFullSelect; /*!< SPDIF rx buffer full select */ 0148 spdif_txempty_select_t txFullSelect; /*!< SPDIF tx buffer empty select */ 0149 spdif_uchannel_source_t uChannelSrc; /*!< U channel source */ 0150 spdif_tx_source_t txSource; /*!< SPDIF tx data source */ 0151 spdif_validity_config_t validityConfig; /*!< Validity flag config */ 0152 spdif_gain_select_t gain; /*!< Rx receive clock measure gain parameter. */ 0153 } spdif_config_t; 0154 0155 /*!@brief SPDIF transfer queue size, user can refine it according to use case. */ 0156 #define SPDIF_XFER_QUEUE_SIZE (4U) 0157 0158 /*! @brief SPDIF transfer structure */ 0159 typedef struct _spdif_transfer 0160 { 0161 uint8_t *data; /*!< Data start address to transfer. */ 0162 uint8_t *qdata; /*!< Data buffer for Q channel */ 0163 uint8_t *udata; /*!< Data buffer for C channel */ 0164 size_t dataSize; /*!< Transfer size. */ 0165 } spdif_transfer_t; 0166 0167 typedef struct _spdif_handle spdif_handle_t; 0168 0169 /*! @brief SPDIF transfer callback prototype */ 0170 typedef void (*spdif_transfer_callback_t)(SPDIF_Type *base, spdif_handle_t *handle, status_t status, void *userData); 0171 0172 /*! @brief SPDIF handle structure */ 0173 struct _spdif_handle 0174 { 0175 uint32_t state; /*!< Transfer status */ 0176 spdif_transfer_callback_t callback; /*!< Callback function called at transfer event*/ 0177 void *userData; /*!< Callback parameter passed to callback function*/ 0178 spdif_transfer_t spdifQueue[SPDIF_XFER_QUEUE_SIZE]; /*!< Transfer queue storing queued transfer */ 0179 size_t transferSize[SPDIF_XFER_QUEUE_SIZE]; /*!< Data bytes need to transfer */ 0180 volatile uint8_t queueUser; /*!< Index for user to queue transfer */ 0181 volatile uint8_t queueDriver; /*!< Index for driver to get the transfer data and size */ 0182 uint8_t watermark; /*!< Watermark value */ 0183 }; 0184 0185 /******************************************************************************* 0186 * API 0187 ******************************************************************************/ 0188 0189 #if defined(__cplusplus) 0190 extern "C" { 0191 #endif /*_cplusplus*/ 0192 0193 /*! 0194 * @name Initialization and deinitialization 0195 * @{ 0196 */ 0197 0198 /*! 0199 * @brief Initializes the SPDIF peripheral. 0200 * 0201 * Ungates the SPDIF clock, resets the module, and configures SPDIF with a configuration structure. 0202 * The configuration structure can be custom filled or set with default values by 0203 * SPDIF_GetDefaultConfig(). 0204 * 0205 * @note This API should be called at the beginning of the application to use 0206 * the SPDIF driver. Otherwise, accessing the SPDIF module can cause a hard fault 0207 * because the clock is not enabled. 0208 * 0209 * @param base SPDIF base pointer 0210 * @param config SPDIF configuration structure. 0211 */ 0212 void SPDIF_Init(SPDIF_Type *base, const spdif_config_t *config); 0213 0214 /*! 0215 * @brief Sets the SPDIF configuration structure to default values. 0216 * 0217 * This API initializes the configuration structure for use in SPDIF_Init. 0218 * The initialized structure can remain unchanged in SPDIF_Init, or it can be modified 0219 * before calling SPDIF_Init. 0220 * This is an example. 0221 @code 0222 spdif_config_t config; 0223 SPDIF_GetDefaultConfig(&config); 0224 @endcode 0225 * 0226 * @param config pointer to master configuration structure 0227 */ 0228 void SPDIF_GetDefaultConfig(spdif_config_t *config); 0229 0230 /*! 0231 * @brief De-initializes the SPDIF peripheral. 0232 * 0233 * This API gates the SPDIF clock. The SPDIF module can't operate unless SPDIF_Init is called to enable the clock. 0234 * 0235 * @param base SPDIF base pointer 0236 */ 0237 void SPDIF_Deinit(SPDIF_Type *base); 0238 0239 /*! 0240 * @brief Get the instance number for SPDIF. 0241 * 0242 * @param base SPDIF base pointer. 0243 */ 0244 uint32_t SPDIF_GetInstance(SPDIF_Type *base); 0245 0246 /*! 0247 * @brief Resets the SPDIF Tx. 0248 * 0249 * This function makes Tx FIFO in reset mode. 0250 * 0251 * @param base SPDIF base pointer 0252 */ 0253 static inline void SPDIF_TxFIFOReset(SPDIF_Type *base) 0254 { 0255 base->SCR |= SPDIF_SCR_RXFIFO_RST_MASK; 0256 } 0257 0258 /*! 0259 * @brief Resets the SPDIF Rx. 0260 * 0261 * This function enables the software reset and FIFO reset of SPDIF Rx. After reset, clear the reset bit. 0262 * 0263 * @param base SPDIF base pointer 0264 */ 0265 static inline void SPDIF_RxFIFOReset(SPDIF_Type *base) 0266 { 0267 base->SCR |= SPDIF_SCR_RXFIFO_RST_MASK; 0268 } 0269 0270 /*! 0271 * @brief Enables/disables the SPDIF Tx. 0272 * 0273 * @param base SPDIF base pointer 0274 * @param enable True means enable SPDIF Tx, false means disable. 0275 */ 0276 void SPDIF_TxEnable(SPDIF_Type *base, bool enable); 0277 0278 /*! 0279 * @brief Enables/disables the SPDIF Rx. 0280 * 0281 * @param base SPDIF base pointer 0282 * @param enable True means enable SPDIF Rx, false means disable. 0283 */ 0284 static inline void SPDIF_RxEnable(SPDIF_Type *base, bool enable) 0285 { 0286 if (enable) 0287 { 0288 /* Open Rx FIFO */ 0289 base->SCR &= ~(SPDIF_SCR_RXFIFO_CTRL_MASK | SPDIF_SCR_RXFIFO_OFF_ON_MASK); 0290 } 0291 else 0292 { 0293 base->SCR |= SPDIF_SCR_RXFIFO_OFF_ON_MASK; 0294 } 0295 } 0296 0297 /*! @} */ 0298 0299 /*! 0300 * @name Status 0301 * @{ 0302 */ 0303 0304 /*! 0305 * @brief Gets the SPDIF status flag state. 0306 * 0307 * @param base SPDIF base pointer 0308 * @return SPDIF status flag value. Use the _spdif_interrupt_enable_t to get the status value needed. 0309 */ 0310 static inline uint32_t SPDIF_GetStatusFlag(SPDIF_Type *base) 0311 { 0312 return base->SIS; 0313 } 0314 0315 /*! 0316 * @brief Clears the SPDIF status flag state. 0317 * 0318 * @param base SPDIF base pointer 0319 * @param mask State mask. It can be a combination of the _spdif_interrupt_enable_t member. Notice these members 0320 * cannot be included, as these flags cannot be cleared by writing 1 to these bits: 0321 * @arg kSPDIF_UChannelReceiveRegisterFull 0322 * @arg kSPDIF_QChannelReceiveRegisterFull 0323 * @arg kSPDIF_TxFIFOEmpty 0324 * @arg kSPDIF_RxFIFOFull 0325 */ 0326 static inline void SPDIF_ClearStatusFlags(SPDIF_Type *base, uint32_t mask) 0327 { 0328 base->SIC = mask; 0329 } 0330 0331 /*! @} */ 0332 0333 /*! 0334 * @name Interrupts 0335 * @{ 0336 */ 0337 0338 /*! 0339 * @brief Enables the SPDIF Tx interrupt requests. 0340 * 0341 * @param base SPDIF base pointer 0342 * @param mask interrupt source 0343 * The parameter can be a combination of the following sources if defined. 0344 * @arg kSPDIF_WordStartInterruptEnable 0345 * @arg kSPDIF_SyncErrorInterruptEnable 0346 * @arg kSPDIF_FIFOWarningInterruptEnable 0347 * @arg kSPDIF_FIFORequestInterruptEnable 0348 * @arg kSPDIF_FIFOErrorInterruptEnable 0349 */ 0350 static inline void SPDIF_EnableInterrupts(SPDIF_Type *base, uint32_t mask) 0351 { 0352 base->SIE |= mask; 0353 } 0354 0355 /*! 0356 * @brief Disables the SPDIF Tx interrupt requests. 0357 * 0358 * @param base SPDIF base pointer 0359 * @param mask interrupt source 0360 * The parameter can be a combination of the following sources if defined. 0361 * @arg kSPDIF_WordStartInterruptEnable 0362 * @arg kSPDIF_SyncErrorInterruptEnable 0363 * @arg kSPDIF_FIFOWarningInterruptEnable 0364 * @arg kSPDIF_FIFORequestInterruptEnable 0365 * @arg kSPDIF_FIFOErrorInterruptEnable 0366 */ 0367 static inline void SPDIF_DisableInterrupts(SPDIF_Type *base, uint32_t mask) 0368 { 0369 base->SIE &= ~mask; 0370 } 0371 0372 /*! @} */ 0373 0374 /*! 0375 * @name DMA Control 0376 * @{ 0377 */ 0378 0379 /*! 0380 * @brief Enables/disables the SPDIF DMA requests. 0381 * @param base SPDIF base pointer 0382 * @param mask SPDIF DMA enable mask, The parameter can be a combination of the following sources if defined 0383 * @arg kSPDIF_RxDMAEnable 0384 * @arg kSPDIF_TxDMAEnable 0385 * @param enable True means enable DMA, false means disable DMA. 0386 */ 0387 static inline void SPDIF_EnableDMA(SPDIF_Type *base, uint32_t mask, bool enable) 0388 { 0389 if (enable) 0390 { 0391 base->SCR |= mask; 0392 } 0393 else 0394 { 0395 base->SCR &= ~mask; 0396 } 0397 } 0398 0399 /*! 0400 * @brief Gets the SPDIF Tx left data register address. 0401 * 0402 * This API is used to provide a transfer address for the SPDIF DMA transfer configuration. 0403 * 0404 * @param base SPDIF base pointer. 0405 * @return data register address. 0406 */ 0407 static inline uint32_t SPDIF_TxGetLeftDataRegisterAddress(SPDIF_Type *base) 0408 { 0409 return (uint32_t)(&(base->STL)); 0410 } 0411 0412 /*! 0413 * @brief Gets the SPDIF Tx right data register address. 0414 * 0415 * This API is used to provide a transfer address for the SPDIF DMA transfer configuration. 0416 * 0417 * @param base SPDIF base pointer. 0418 * @return data register address. 0419 */ 0420 static inline uint32_t SPDIF_TxGetRightDataRegisterAddress(SPDIF_Type *base) 0421 { 0422 return (uint32_t)(&(base->STR)); 0423 } 0424 0425 /*! 0426 * @brief Gets the SPDIF Rx left data register address. 0427 * 0428 * This API is used to provide a transfer address for the SPDIF DMA transfer configuration. 0429 * 0430 * @param base SPDIF base pointer. 0431 * @return data register address. 0432 */ 0433 static inline uint32_t SPDIF_RxGetLeftDataRegisterAddress(SPDIF_Type *base) 0434 { 0435 return (uint32_t)(&(base->SRL)); 0436 } 0437 0438 /*! 0439 * @brief Gets the SPDIF Rx right data register address. 0440 * 0441 * This API is used to provide a transfer address for the SPDIF DMA transfer configuration. 0442 * 0443 * @param base SPDIF base pointer. 0444 * @return data register address. 0445 */ 0446 static inline uint32_t SPDIF_RxGetRightDataRegisterAddress(SPDIF_Type *base) 0447 { 0448 return (uint32_t)(&(base->SRR)); 0449 } 0450 0451 /*! @} */ 0452 0453 /*! 0454 * @name Bus Operations 0455 * @{ 0456 */ 0457 0458 /*! 0459 * @brief Configures the SPDIF Tx sample rate. 0460 * 0461 * The audio format can be changed at run-time. This function configures the sample rate. 0462 * 0463 * @param base SPDIF base pointer. 0464 * @param sampleRate_Hz SPDIF sample rate frequency in Hz. 0465 * @param sourceClockFreq_Hz SPDIF tx clock source frequency in Hz. 0466 */ 0467 void SPDIF_TxSetSampleRate(SPDIF_Type *base, uint32_t sampleRate_Hz, uint32_t sourceClockFreq_Hz); 0468 0469 /*! 0470 * @brief Configures the SPDIF Rx audio format. 0471 * 0472 * The audio format can be changed at run-time. This function configures the sample rate and audio data 0473 * format to be transferred. 0474 * 0475 * @param base SPDIF base pointer. 0476 * @param clockSourceFreq_Hz SPDIF system clock frequency in hz. 0477 */ 0478 uint32_t SPDIF_GetRxSampleRate(SPDIF_Type *base, uint32_t clockSourceFreq_Hz); 0479 0480 /*! 0481 * @brief Sends data using a blocking method. 0482 * 0483 * @note This function blocks by polling until data is ready to be sent. 0484 * 0485 * @param base SPDIF base pointer. 0486 * @param buffer Pointer to the data to be written. 0487 * @param size Bytes to be written. 0488 */ 0489 void SPDIF_WriteBlocking(SPDIF_Type *base, uint8_t *buffer, uint32_t size); 0490 0491 /*! 0492 * @brief Writes data into SPDIF FIFO. 0493 * 0494 * @param base SPDIF base pointer. 0495 * @param data Data needs to be written. 0496 */ 0497 static inline void SPDIF_WriteLeftData(SPDIF_Type *base, uint32_t data) 0498 { 0499 base->STL = data; 0500 } 0501 0502 /*! 0503 * @brief Writes data into SPDIF FIFO. 0504 * 0505 * @param base SPDIF base pointer. 0506 * @param data Data needs to be written. 0507 */ 0508 static inline void SPDIF_WriteRightData(SPDIF_Type *base, uint32_t data) 0509 { 0510 base->STR = data; 0511 } 0512 0513 /*! 0514 * @brief Writes data into SPDIF FIFO. 0515 * 0516 * @param base SPDIF base pointer. 0517 * @param data Data needs to be written. 0518 */ 0519 static inline void SPDIF_WriteChannelStatusHigh(SPDIF_Type *base, uint32_t data) 0520 { 0521 base->STCSCH = data; 0522 } 0523 0524 /*! 0525 * @brief Writes data into SPDIF FIFO. 0526 * 0527 * @param base SPDIF base pointer. 0528 * @param data Data needs to be written. 0529 */ 0530 static inline void SPDIF_WriteChannelStatusLow(SPDIF_Type *base, uint32_t data) 0531 { 0532 base->STCSCL = data; 0533 } 0534 0535 /*! 0536 * @brief Receives data using a blocking method. 0537 * 0538 * @note This function blocks by polling until data is ready to be sent. 0539 * 0540 * @param base SPDIF base pointer. 0541 * @param buffer Pointer to the data to be read. 0542 * @param size Bytes to be read. 0543 */ 0544 void SPDIF_ReadBlocking(SPDIF_Type *base, uint8_t *buffer, uint32_t size); 0545 0546 /*! 0547 * @brief Reads data from the SPDIF FIFO. 0548 * 0549 * @param base SPDIF base pointer. 0550 * @return Data in SPDIF FIFO. 0551 */ 0552 static inline uint32_t SPDIF_ReadLeftData(SPDIF_Type *base) 0553 { 0554 return base->SRL; 0555 } 0556 0557 /*! 0558 * @brief Reads data from the SPDIF FIFO. 0559 * 0560 * @param base SPDIF base pointer. 0561 * @return Data in SPDIF FIFO. 0562 */ 0563 static inline uint32_t SPDIF_ReadRightData(SPDIF_Type *base) 0564 { 0565 return base->SRR; 0566 } 0567 0568 /*! 0569 * @brief Reads data from the SPDIF FIFO. 0570 * 0571 * @param base SPDIF base pointer. 0572 * @return Data in SPDIF FIFO. 0573 */ 0574 static inline uint32_t SPDIF_ReadChannelStatusHigh(SPDIF_Type *base) 0575 { 0576 return base->SRCSH; 0577 } 0578 0579 /*! 0580 * @brief Reads data from the SPDIF FIFO. 0581 * 0582 * @param base SPDIF base pointer. 0583 * @return Data in SPDIF FIFO. 0584 */ 0585 static inline uint32_t SPDIF_ReadChannelStatusLow(SPDIF_Type *base) 0586 { 0587 return base->SRCSL; 0588 } 0589 0590 /*! 0591 * @brief Reads data from the SPDIF FIFO. 0592 * 0593 * @param base SPDIF base pointer. 0594 * @return Data in SPDIF FIFO. 0595 */ 0596 static inline uint32_t SPDIF_ReadQChannel(SPDIF_Type *base) 0597 { 0598 return base->SRQ; 0599 } 0600 0601 /*! 0602 * @brief Reads data from the SPDIF FIFO. 0603 * 0604 * @param base SPDIF base pointer. 0605 * @return Data in SPDIF FIFO. 0606 */ 0607 static inline uint32_t SPDIF_ReadUChannel(SPDIF_Type *base) 0608 { 0609 return base->SRU; 0610 } 0611 0612 /*! @} */ 0613 0614 /*! 0615 * @name Transactional 0616 * @{ 0617 */ 0618 0619 /*! 0620 * @brief Initializes the SPDIF Tx handle. 0621 * 0622 * This function initializes the Tx handle for the SPDIF Tx transactional APIs. Call 0623 * this function once to get the handle initialized. 0624 * 0625 * @param base SPDIF base pointer 0626 * @param handle SPDIF handle pointer. 0627 * @param callback Pointer to the user callback function. 0628 * @param userData User parameter passed to the callback function 0629 */ 0630 void SPDIF_TransferTxCreateHandle(SPDIF_Type *base, 0631 spdif_handle_t *handle, 0632 spdif_transfer_callback_t callback, 0633 void *userData); 0634 0635 /*! 0636 * @brief Initializes the SPDIF Rx handle. 0637 * 0638 * This function initializes the Rx handle for the SPDIF Rx transactional APIs. Call 0639 * this function once to get the handle initialized. 0640 * 0641 * @param base SPDIF base pointer. 0642 * @param handle SPDIF handle pointer. 0643 * @param callback Pointer to the user callback function. 0644 * @param userData User parameter passed to the callback function. 0645 */ 0646 void SPDIF_TransferRxCreateHandle(SPDIF_Type *base, 0647 spdif_handle_t *handle, 0648 spdif_transfer_callback_t callback, 0649 void *userData); 0650 0651 /*! 0652 * @brief Performs an interrupt non-blocking send transfer on SPDIF. 0653 * 0654 * @note This API returns immediately after the transfer initiates. 0655 * Call the SPDIF_TxGetTransferStatusIRQ to poll the transfer status and check whether 0656 * the transfer is finished. If the return status is not kStatus_SPDIF_Busy, the transfer 0657 * is finished. 0658 * 0659 * @param base SPDIF base pointer. 0660 * @param handle Pointer to the spdif_handle_t structure which stores the transfer state. 0661 * @param xfer Pointer to the spdif_transfer_t structure. 0662 * @retval kStatus_Success Successfully started the data receive. 0663 * @retval kStatus_SPDIF_TxBusy Previous receive still not finished. 0664 * @retval kStatus_InvalidArgument The input parameter is invalid. 0665 */ 0666 status_t SPDIF_TransferSendNonBlocking(SPDIF_Type *base, spdif_handle_t *handle, spdif_transfer_t *xfer); 0667 0668 /*! 0669 * @brief Performs an interrupt non-blocking receive transfer on SPDIF. 0670 * 0671 * @note This API returns immediately after the transfer initiates. 0672 * Call the SPDIF_RxGetTransferStatusIRQ to poll the transfer status and check whether 0673 * the transfer is finished. If the return status is not kStatus_SPDIF_Busy, the transfer 0674 * is finished. 0675 * 0676 * @param base SPDIF base pointer 0677 * @param handle Pointer to the spdif_handle_t structure which stores the transfer state. 0678 * @param xfer Pointer to the spdif_transfer_t structure. 0679 * @retval kStatus_Success Successfully started the data receive. 0680 * @retval kStatus_SPDIF_RxBusy Previous receive still not finished. 0681 * @retval kStatus_InvalidArgument The input parameter is invalid. 0682 */ 0683 status_t SPDIF_TransferReceiveNonBlocking(SPDIF_Type *base, spdif_handle_t *handle, spdif_transfer_t *xfer); 0684 0685 /*! 0686 * @brief Gets a set byte count. 0687 * 0688 * @param base SPDIF base pointer. 0689 * @param handle Pointer to the spdif_handle_t structure which stores the transfer state. 0690 * @param count Bytes count sent. 0691 * @retval kStatus_Success Succeed get the transfer count. 0692 * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress. 0693 */ 0694 status_t SPDIF_TransferGetSendCount(SPDIF_Type *base, spdif_handle_t *handle, size_t *count); 0695 0696 /*! 0697 * @brief Gets a received byte count. 0698 * 0699 * @param base SPDIF base pointer. 0700 * @param handle Pointer to the spdif_handle_t structure which stores the transfer state. 0701 * @param count Bytes count received. 0702 * @retval kStatus_Success Succeed get the transfer count. 0703 * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress. 0704 */ 0705 status_t SPDIF_TransferGetReceiveCount(SPDIF_Type *base, spdif_handle_t *handle, size_t *count); 0706 0707 /*! 0708 * @brief Aborts the current send. 0709 * 0710 * @note This API can be called any time when an interrupt non-blocking transfer initiates 0711 * to abort the transfer early. 0712 * 0713 * @param base SPDIF base pointer. 0714 * @param handle Pointer to the spdif_handle_t structure which stores the transfer state. 0715 */ 0716 void SPDIF_TransferAbortSend(SPDIF_Type *base, spdif_handle_t *handle); 0717 0718 /*! 0719 * @brief Aborts the current IRQ receive. 0720 * 0721 * @note This API can be called when an interrupt non-blocking transfer initiates 0722 * to abort the transfer early. 0723 * 0724 * @param base SPDIF base pointer 0725 * @param handle Pointer to the spdif_handle_t structure which stores the transfer state. 0726 */ 0727 void SPDIF_TransferAbortReceive(SPDIF_Type *base, spdif_handle_t *handle); 0728 0729 /*! 0730 * @brief Tx interrupt handler. 0731 * 0732 * @param base SPDIF base pointer. 0733 * @param handle Pointer to the spdif_handle_t structure. 0734 */ 0735 void SPDIF_TransferTxHandleIRQ(SPDIF_Type *base, spdif_handle_t *handle); 0736 0737 /*! 0738 * @brief Tx interrupt handler. 0739 * 0740 * @param base SPDIF base pointer. 0741 * @param handle Pointer to the spdif_handle_t structure. 0742 */ 0743 void SPDIF_TransferRxHandleIRQ(SPDIF_Type *base, spdif_handle_t *handle); 0744 0745 /*! @} */ 0746 0747 #if defined(__cplusplus) 0748 } 0749 #endif /*_cplusplus*/ 0750 0751 /*! @} */ 0752 0753 #endif /* _FSL_SPDIF_H_ */
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