File indexing completed on 2025-05-11 08:23:01
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0009 #include "fsl_snvs_lp.h"
0010
0011
0012
0013
0014
0015
0016 #ifndef FSL_COMPONENT_ID
0017 #define FSL_COMPONENT_ID "platform.drivers.snvs_lp"
0018 #endif
0019
0020 #define SECONDS_IN_A_DAY (86400U)
0021 #define SECONDS_IN_A_HOUR (3600U)
0022 #define SECONDS_IN_A_MINUTE (60U)
0023 #define DAYS_IN_A_YEAR (365U)
0024 #define YEAR_RANGE_START (1970U)
0025 #define YEAR_RANGE_END (2099U)
0026
0027 #define SNVS_DEFAULT_PGD_VALUE (0x41736166U)
0028
0029
0030
0031
0032
0033
0034
0035
0036
0037
0038
0039 static bool SNVS_LP_CheckDatetimeFormat(const snvs_lp_srtc_datetime_t *datetime);
0040
0041
0042
0043
0044
0045
0046
0047
0048 static uint32_t SNVS_LP_ConvertDatetimeToSeconds(const snvs_lp_srtc_datetime_t *datetime);
0049
0050
0051
0052
0053
0054
0055
0056 static void SNVS_LP_ConvertSecondsToDatetime(uint32_t seconds, snvs_lp_srtc_datetime_t *datetime);
0057
0058
0059
0060
0061
0062
0063
0064
0065
0066
0067 static uint32_t SNVS_LP_SRTC_GetSeconds(SNVS_Type *base);
0068
0069 #if (!(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && \
0070 defined(SNVS_LP_CLOCKS))
0071
0072
0073
0074
0075
0076
0077
0078 static uint32_t SNVS_LP_GetInstance(SNVS_Type *base);
0079 #endif
0080
0081
0082
0083
0084 #if (!(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && \
0085 defined(SNVS_LP_CLOCKS))
0086
0087 const clock_ip_name_t s_snvsLpClock[] = SNVS_LP_CLOCKS;
0088 #endif
0089
0090
0091
0092
0093 static bool SNVS_LP_CheckDatetimeFormat(const snvs_lp_srtc_datetime_t *datetime)
0094 {
0095 assert(datetime != NULL);
0096
0097
0098
0099
0100 uint8_t daysPerMonth[] = {0U, 31U, 28U, 31U, 30U, 31U, 30U, 31U, 31U, 30U, 31U, 30U, 31U};
0101
0102
0103 if ((datetime->year < YEAR_RANGE_START) || (datetime->year > YEAR_RANGE_END) || (datetime->month > 12U) ||
0104 (datetime->month < 1U) || (datetime->hour >= 24U) || (datetime->minute >= 60U) || (datetime->second >= 60U))
0105 {
0106
0107 return false;
0108 }
0109
0110
0111 if ((((datetime->year & 3U) == 0U) && (datetime->year % 100U != 0U)) || (datetime->year % 400U == 0U))
0112 {
0113 daysPerMonth[2] = 29U;
0114 }
0115
0116
0117 if ((datetime->day > daysPerMonth[datetime->month]) || (datetime->day < 1U))
0118 {
0119 return false;
0120 }
0121
0122 return true;
0123 }
0124
0125 static uint32_t SNVS_LP_ConvertDatetimeToSeconds(const snvs_lp_srtc_datetime_t *datetime)
0126 {
0127 assert(datetime != NULL);
0128
0129
0130
0131 uint16_t monthDays[] = {0U, 0U, 31U, 59U, 90U, 120U, 151U, 181U, 212U, 243U, 273U, 304U, 334U};
0132 uint32_t seconds;
0133
0134
0135 seconds = ((uint32_t)datetime->year - 1970U) * DAYS_IN_A_YEAR;
0136
0137 seconds += (((uint32_t)datetime->year / 4U) - (1970U / 4U));
0138
0139 seconds += monthDays[datetime->month];
0140
0141
0142 seconds += ((uint32_t)datetime->day - 1U);
0143
0144 if ((0U == (datetime->year & 3U)) && (datetime->month <= 2U))
0145 {
0146 seconds--;
0147 }
0148
0149 seconds = (seconds * SECONDS_IN_A_DAY) + (datetime->hour * SECONDS_IN_A_HOUR) +
0150 (datetime->minute * SECONDS_IN_A_MINUTE) + datetime->second;
0151
0152 return seconds;
0153 }
0154
0155 static void SNVS_LP_ConvertSecondsToDatetime(uint32_t seconds, snvs_lp_srtc_datetime_t *datetime)
0156 {
0157 assert(datetime != NULL);
0158
0159 uint32_t x;
0160 uint32_t secondsRemaining, days;
0161 uint16_t daysInYear;
0162
0163
0164
0165 uint8_t daysPerMonth[] = {0U, 31U, 28U, 31U, 30U, 31U, 30U, 31U, 31U, 30U, 31U, 30U, 31U};
0166
0167
0168 secondsRemaining = seconds;
0169
0170
0171
0172
0173 days = secondsRemaining / SECONDS_IN_A_DAY + 1U;
0174
0175
0176 secondsRemaining = secondsRemaining % SECONDS_IN_A_DAY;
0177
0178
0179 datetime->hour = (uint8_t)(secondsRemaining / SECONDS_IN_A_HOUR);
0180 secondsRemaining = secondsRemaining % SECONDS_IN_A_HOUR;
0181 datetime->minute = (uint8_t)(secondsRemaining / 60U);
0182 datetime->second = (uint8_t)(secondsRemaining % SECONDS_IN_A_MINUTE);
0183
0184
0185 daysInYear = DAYS_IN_A_YEAR;
0186 datetime->year = YEAR_RANGE_START;
0187 while (days > daysInYear)
0188 {
0189
0190 days -= daysInYear;
0191 datetime->year++;
0192
0193
0194 if ((datetime->year & 3U) != 0U)
0195 {
0196 daysInYear = DAYS_IN_A_YEAR;
0197 }
0198 else
0199 {
0200 daysInYear = DAYS_IN_A_YEAR + 1U;
0201 }
0202 }
0203
0204
0205 if (0U == (datetime->year & 3U))
0206 {
0207 daysPerMonth[2] = 29U;
0208 }
0209
0210 for (x = 1U; x <= 12U; x++)
0211 {
0212 if (days <= daysPerMonth[x])
0213 {
0214 datetime->month = (uint8_t)x;
0215 break;
0216 }
0217 else
0218 {
0219 days -= daysPerMonth[x];
0220 }
0221 }
0222
0223 datetime->day = (uint8_t)days;
0224 }
0225
0226 #if (!(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && \
0227 defined(SNVS_LP_CLOCKS))
0228 static uint32_t SNVS_LP_GetInstance(SNVS_Type *base)
0229 {
0230 return 0U;
0231 }
0232 #endif
0233
0234
0235
0236
0237
0238
0239
0240
0241
0242 void SNVS_LP_Init(SNVS_Type *base)
0243 {
0244 #if (!(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && \
0245 defined(SNVS_LP_CLOCKS))
0246 uint32_t instance = SNVS_LP_GetInstance(base);
0247 CLOCK_EnableClock(s_snvsLpClock[instance]);
0248 #endif
0249
0250
0251 #if defined(SNVS_LPPGDR_PGD)
0252 base->LPPGDR = SNVS_DEFAULT_PGD_VALUE;
0253 base->LPSR = SNVS_LPSR_PGD_MASK;
0254 #elif defined(SNVS_LPLVDR_LVD)
0255 base->LPLVDR = SNVS_DEFAULT_PGD_VALUE;
0256 base->LPSR = SNVS_LPSR_LVD_MASK;
0257 #else
0258 #error "No power/voltage detector register defined"
0259 #endif
0260 }
0261
0262
0263
0264
0265
0266
0267 void SNVS_LP_Deinit(SNVS_Type *base)
0268 {
0269 #if (!(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && \
0270 defined(SNVS_LP_CLOCKS))
0271 uint32_t instance = SNVS_LP_GetInstance(base);
0272 CLOCK_DisableClock(s_snvsLpClock[instance]);
0273 #endif
0274 }
0275
0276
0277
0278
0279
0280
0281
0282
0283
0284 void SNVS_LP_SRTC_Init(SNVS_Type *base, const snvs_lp_srtc_config_t *config)
0285 {
0286 assert(config != NULL);
0287
0288 SNVS_LP_Init(base);
0289
0290 if (config->srtcCalEnable)
0291 {
0292 base->LPCR = (base->LPCR & ~SNVS_LPCR_LPCALB_VAL_MASK) | SNVS_LPCR_LPCALB_VAL(config->srtcCalValue);
0293 base->LPCR |= SNVS_LPCR_LPCALB_EN_MASK;
0294 }
0295
0296 #if defined(FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER) && (FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER > 0)
0297
0298 int pin;
0299
0300 for (pin = (int32_t)kSNVS_ExternalTamper1; pin <= (int32_t)SNVS_LP_MAX_TAMPER; pin++)
0301 {
0302 SNVS_LP_DisableExternalTamper(SNVS, (snvs_lp_external_tamper_t)pin);
0303 SNVS_LP_ClearExternalTamperStatus(SNVS, (snvs_lp_external_tamper_t)pin);
0304 }
0305 #endif
0306 }
0307
0308
0309
0310
0311
0312
0313 void SNVS_LP_SRTC_Deinit(SNVS_Type *base)
0314 {
0315 base->LPCR &= ~SNVS_LPCR_SRTC_ENV_MASK;
0316
0317 SNVS_LP_Deinit(base);
0318 }
0319
0320
0321
0322
0323
0324
0325
0326
0327
0328
0329
0330 void SNVS_LP_SRTC_GetDefaultConfig(snvs_lp_srtc_config_t *config)
0331 {
0332 assert(config != NULL);
0333
0334
0335 (void)memset(config, 0, sizeof(*config));
0336
0337 config->srtcCalEnable = false;
0338 config->srtcCalValue = 0U;
0339 }
0340
0341 static uint32_t SNVS_LP_SRTC_GetSeconds(SNVS_Type *base)
0342 {
0343 uint32_t seconds = 0;
0344 uint32_t tmp = 0;
0345
0346
0347 do
0348 {
0349 seconds = tmp;
0350 tmp = (base->LPSRTCMR << 17U);
0351 tmp |= (base->LPSRTCLR >> 15U);
0352 } while (tmp != seconds);
0353
0354 return seconds;
0355 }
0356
0357
0358
0359
0360
0361
0362
0363
0364
0365
0366 status_t SNVS_LP_SRTC_SetDatetime(SNVS_Type *base, const snvs_lp_srtc_datetime_t *datetime)
0367 {
0368 assert(datetime != NULL);
0369
0370 uint32_t seconds = 0U;
0371 uint32_t tmp = base->LPCR;
0372
0373
0374 SNVS_LP_SRTC_StopTimer(base);
0375
0376
0377 if (!(SNVS_LP_CheckDatetimeFormat(datetime)))
0378 {
0379 return kStatus_InvalidArgument;
0380 }
0381
0382
0383 seconds = SNVS_LP_ConvertDatetimeToSeconds(datetime);
0384
0385 base->LPSRTCMR = (uint32_t)(seconds >> 17U);
0386 base->LPSRTCLR = (uint32_t)(seconds << 15U);
0387
0388
0389 if ((tmp & SNVS_LPCR_SRTC_ENV_MASK) != 0U)
0390 {
0391 SNVS_LP_SRTC_StartTimer(base);
0392 }
0393
0394 return kStatus_Success;
0395 }
0396
0397
0398
0399
0400
0401
0402
0403 void SNVS_LP_SRTC_GetDatetime(SNVS_Type *base, snvs_lp_srtc_datetime_t *datetime)
0404 {
0405 assert(datetime != NULL);
0406
0407 SNVS_LP_ConvertSecondsToDatetime(SNVS_LP_SRTC_GetSeconds(base), datetime);
0408 }
0409
0410
0411
0412
0413
0414
0415
0416
0417
0418
0419
0420
0421
0422
0423
0424
0425
0426
0427
0428 status_t SNVS_LP_SRTC_SetAlarm(SNVS_Type *base, const snvs_lp_srtc_datetime_t *alarmTime)
0429 {
0430 assert(alarmTime != NULL);
0431
0432 uint32_t alarmSeconds = 0U;
0433 uint32_t currSeconds = 0U;
0434 uint32_t tmp = base->LPCR;
0435
0436
0437 if (!(SNVS_LP_CheckDatetimeFormat(alarmTime)))
0438 {
0439 return kStatus_InvalidArgument;
0440 }
0441
0442 alarmSeconds = SNVS_LP_ConvertDatetimeToSeconds(alarmTime);
0443 currSeconds = SNVS_LP_SRTC_GetSeconds(base);
0444
0445
0446 if (alarmSeconds <= currSeconds)
0447 {
0448 return kStatus_Fail;
0449 }
0450
0451
0452 base->LPCR &= ~SNVS_LPCR_LPTA_EN_MASK;
0453 while ((base->LPCR & SNVS_LPCR_LPTA_EN_MASK) != 0U)
0454 {
0455 }
0456
0457
0458 base->LPTAR = alarmSeconds;
0459
0460
0461 base->LPCR = tmp;
0462
0463 return kStatus_Success;
0464 }
0465
0466
0467
0468
0469
0470
0471
0472 void SNVS_LP_SRTC_GetAlarm(SNVS_Type *base, snvs_lp_srtc_datetime_t *datetime)
0473 {
0474 assert(datetime != NULL);
0475
0476 uint32_t alarmSeconds = 0U;
0477
0478
0479 alarmSeconds = base->LPTAR;
0480
0481 SNVS_LP_ConvertSecondsToDatetime(alarmSeconds, datetime);
0482 }
0483
0484
0485
0486
0487
0488
0489
0490
0491
0492 uint32_t SNVS_LP_SRTC_GetStatusFlags(SNVS_Type *base)
0493 {
0494 uint32_t flags = 0U;
0495
0496 if ((base->LPSR & SNVS_LPSR_LPTA_MASK) != 0U)
0497 {
0498 flags |= (uint32_t)kSNVS_SRTC_AlarmInterruptFlag;
0499 }
0500
0501 return flags;
0502 }
0503
0504
0505
0506
0507
0508
0509
0510
0511
0512 uint32_t SNVS_LP_SRTC_GetEnabledInterrupts(SNVS_Type *base)
0513 {
0514 uint32_t val = 0U;
0515
0516 if ((base->LPCR & SNVS_LPCR_LPTA_EN_MASK) != 0U)
0517 {
0518 val |= (uint32_t)kSNVS_SRTC_AlarmInterrupt;
0519 }
0520
0521 return val;
0522 }
0523
0524
0525
0526
0527
0528
0529
0530
0531
0532
0533
0534
0535 void SNVS_LP_PassiveTamperPin_GetDefaultConfig(snvs_lp_passive_tamper_t *config)
0536 {
0537 assert(config != NULL);
0538
0539
0540 (void)memset(config, 0, sizeof(*config));
0541
0542 config->polarity = 0U;
0543 #if defined(FSL_FEATURE_SNVS_PASSIVE_TAMPER_FILTER) && (FSL_FEATURE_SNVS_PASSIVE_TAMPER_FILTER > 0)
0544 config->filterenable = 0U;
0545 config->filter = 0U;
0546 #endif
0547 }
0548
0549 #if defined(FSL_FEATURE_SNVS_HAS_ACTIVE_TAMPERS) && (FSL_FEATURE_SNVS_HAS_ACTIVE_TAMPERS > 0)
0550
0551
0552
0553
0554
0555
0556
0557
0558
0559
0560
0561 void SNVS_LP_TamperPinTx_GetDefaultConfig(tamper_active_tx_config_t *config)
0562 {
0563 assert(config != NULL);
0564
0565
0566 (void)memset(config, 0, sizeof(*config));
0567
0568 config->clock = kSNVS_ActiveTamper16HZ;
0569 config->seed = 0U;
0570 config->polynomial = 0U;
0571 }
0572
0573
0574
0575
0576
0577
0578
0579
0580
0581
0582
0583
0584 void SNVS_LP_TamperPinRx_GetDefaultConfig(tamper_active_rx_config_t *config)
0585 {
0586 assert(config != NULL);
0587
0588
0589 (void)memset(config, 0, sizeof(*config));
0590
0591 config->filterenable = 0U;
0592 config->filter = 0U;
0593 config->activeTamper = kSNVS_ActiveTamper1;
0594 }
0595 #endif
0596
0597 #if defined(FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER) && (FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER > 0)
0598
0599
0600
0601
0602
0603
0604
0605
0606 void SNVS_LP_EnablePassiveTamper(SNVS_Type *base, snvs_lp_external_tamper_t pin, snvs_lp_passive_tamper_t config)
0607 {
0608 switch (pin)
0609 {
0610 case (kSNVS_ExternalTamper1):
0611
0612 if (config.polarity != 0U)
0613 {
0614 SNVS->LPTDCR |= SNVS_LPTDCR_ET1P_MASK;
0615 }
0616 else
0617 {
0618 SNVS->LPTDCR &= ~SNVS_LPTDCR_ET1P_MASK;
0619 }
0620 #if defined(FSL_FEATURE_SNVS_PASSIVE_TAMPER_FILTER) && (FSL_FEATURE_SNVS_PASSIVE_TAMPER_FILTER > 0)
0621
0622 if (config.filterenable != 0U)
0623 {
0624 SNVS->LPTGFCR |= SNVS_LPTGFCR_ETGF1_EN_MASK;
0625 SNVS->LPTGFCR |= SNVS_LPTGFCR_ETGF1(config.filter);
0626 }
0627 else
0628 {
0629 SNVS->LPTGFCR &= ~SNVS_LPTGFCR_ETGF1_EN_MASK;
0630 }
0631 #endif
0632
0633 base->LPTDCR |= SNVS_LPTDCR_ET1_EN_MASK;
0634 break;
0635 #if defined(FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER) && (FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER > 1)
0636 case (kSNVS_ExternalTamper2):
0637
0638 base->LPTDCR =
0639 (base->LPTDCR & ~(SNVS_LPTDCR_ET2P_MASK)) | ((uint32_t)config.polarity << SNVS_LPTDCR_ET2P_SHIFT);
0640
0641 if (config.filterenable != 0U)
0642 {
0643 SNVS->LPTGFCR |= SNVS_LPTGFCR_ETGF2_EN_MASK;
0644 SNVS->LPTGFCR |= SNVS_LPTGFCR_ETGF2(config.filter);
0645 }
0646 else
0647 {
0648 SNVS->LPTGFCR &= ~SNVS_LPTGFCR_ETGF2_EN_MASK;
0649 }
0650
0651
0652 SNVS->LPTDCR |= SNVS_LPTDCR_ET2_EN_MASK;
0653
0654 break;
0655 case (kSNVS_ExternalTamper3):
0656
0657 base->LPTDC2R =
0658 (base->LPTDC2R & ~(SNVS_LPTDC2R_ET3P_MASK)) | ((uint32_t)config.polarity << SNVS_LPTDC2R_ET3P_SHIFT);
0659
0660 if (config.filterenable != 0U)
0661 {
0662
0663 SNVS->LPTGF1CR |= SNVS_LPTGF1CR_ETGF3(config.filter);
0664
0665 SNVS->LPTGF1CR |= SNVS_LPTGF1CR_ETGF3_EN(1U);
0666 }
0667
0668 base->LPTDC2R |= SNVS_LPTDC2R_ET3_EN_MASK;
0669 break;
0670 case (kSNVS_ExternalTamper4):
0671
0672 base->LPTDC2R =
0673 (base->LPTDC2R & ~(SNVS_LPTDC2R_ET4P_MASK)) | ((uint32_t)config.polarity << SNVS_LPTDC2R_ET4P_SHIFT);
0674
0675 if (config.filterenable != 0U)
0676 {
0677
0678 SNVS->LPTGF1CR |= SNVS_LPTGF1CR_ETGF4(config.filter);
0679
0680 SNVS->LPTGF1CR |= SNVS_LPTGF1CR_ETGF4_EN(1U);
0681 }
0682
0683 base->LPTDC2R |= SNVS_LPTDC2R_ET4_EN_MASK;
0684 break;
0685 case (kSNVS_ExternalTamper5):
0686
0687 base->LPTDC2R =
0688 (base->LPTDC2R & ~(SNVS_LPTDC2R_ET5P_MASK)) | ((uint32_t)config.polarity << SNVS_LPTDC2R_ET5P_SHIFT);
0689
0690 if (config.filterenable != 0U)
0691 {
0692
0693 SNVS->LPTGF1CR |= SNVS_LPTGF1CR_ETGF5(config.filter);
0694
0695 SNVS->LPTGF1CR |= SNVS_LPTGF1CR_ETGF5_EN(1U);
0696 }
0697
0698 base->LPTDC2R |= SNVS_LPTDC2R_ET5_EN_MASK;
0699 break;
0700 case (kSNVS_ExternalTamper6):
0701
0702 base->LPTDC2R =
0703 (base->LPTDC2R & ~(SNVS_LPTDC2R_ET6P_MASK)) | ((uint32_t)config.polarity << SNVS_LPTDC2R_ET6P_SHIFT);
0704
0705 if (config.filterenable != 0U)
0706 {
0707
0708 SNVS->LPTGF1CR |= SNVS_LPTGF1CR_ETGF6(config.filter);
0709
0710 SNVS->LPTGF1CR |= SNVS_LPTGF1CR_ETGF6_EN(1U);
0711 }
0712
0713 base->LPTDC2R |= SNVS_LPTDC2R_ET6_EN_MASK;
0714 break;
0715 case (kSNVS_ExternalTamper7):
0716
0717 base->LPTDC2R =
0718 (base->LPTDC2R & ~(SNVS_LPTDC2R_ET7P_MASK)) | ((uint32_t)config.polarity << SNVS_LPTDC2R_ET7P_SHIFT);
0719
0720 if (config.filterenable != 0U)
0721 {
0722
0723 SNVS->LPTGF2CR |= SNVS_LPTGF2CR_ETGF7(config.filter);
0724
0725 SNVS->LPTGF2CR |= SNVS_LPTGF2CR_ETGF7_EN(1U);
0726 }
0727
0728 base->LPTDC2R |= SNVS_LPTDC2R_ET7_EN_MASK;
0729 break;
0730 case (kSNVS_ExternalTamper8):
0731
0732 base->LPTDC2R =
0733 (base->LPTDC2R & ~(SNVS_LPTDC2R_ET8P_MASK)) | ((uint32_t)config.polarity << SNVS_LPTDC2R_ET8P_SHIFT);
0734
0735 if (config.filterenable != 0U)
0736 {
0737
0738 SNVS->LPTGF2CR |= SNVS_LPTGF2CR_ETGF8(config.filter);
0739
0740 SNVS->LPTGF2CR |= SNVS_LPTGF2CR_ETGF8_EN(1U);
0741 }
0742
0743 base->LPTDC2R |= SNVS_LPTDC2R_ET8_EN_MASK;
0744 break;
0745 case (kSNVS_ExternalTamper9):
0746
0747 base->LPTDC2R =
0748 (base->LPTDC2R & ~(SNVS_LPTDC2R_ET9P_MASK)) | ((uint32_t)config.polarity << SNVS_LPTDC2R_ET9P_SHIFT);
0749
0750 if (config.filterenable != 0U)
0751 {
0752
0753 SNVS->LPTGF2CR |= SNVS_LPTGF2CR_ETGF9(config.filter);
0754
0755 SNVS->LPTGF2CR |= SNVS_LPTGF2CR_ETGF9_EN(1U);
0756 }
0757
0758 base->LPTDC2R |= SNVS_LPTDC2R_ET9_EN_MASK;
0759 break;
0760 case (kSNVS_ExternalTamper10):
0761
0762 base->LPTDC2R =
0763 (base->LPTDC2R & ~(SNVS_LPTDC2R_ET10P_MASK)) | ((uint32_t)config.polarity << SNVS_LPTDC2R_ET10P_SHIFT);
0764
0765 if (config.filterenable != 0U)
0766 {
0767
0768 SNVS->LPTGF2CR |= SNVS_LPTGF2CR_ETGF10(config.filter);
0769
0770 SNVS->LPTGF2CR |= SNVS_LPTGF2CR_ETGF10_EN(1U);
0771 }
0772
0773 base->LPTDC2R |= SNVS_LPTDC2R_ET10_EN_MASK;
0774 break;
0775 #endif
0776 default:
0777
0778 break;
0779 }
0780 }
0781
0782
0783
0784
0785
0786
0787
0788 void SNVS_LP_DisableExternalTamper(SNVS_Type *base, snvs_lp_external_tamper_t pin)
0789 {
0790 switch (pin)
0791 {
0792 case (kSNVS_ExternalTamper1):
0793 base->LPTDCR &= ~SNVS_LPTDCR_ET1_EN_MASK;
0794 break;
0795 #if defined(FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER) && (FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER > 1)
0796 case (kSNVS_ExternalTamper2):
0797 base->LPTDCR &= ~SNVS_LPTDCR_ET2_EN_MASK;
0798 break;
0799 case (kSNVS_ExternalTamper3):
0800 base->LPTDC2R &= ~SNVS_LPTDC2R_ET3_EN_MASK;
0801 break;
0802 case (kSNVS_ExternalTamper4):
0803 base->LPTDC2R &= ~SNVS_LPTDC2R_ET4_EN_MASK;
0804 break;
0805 case (kSNVS_ExternalTamper5):
0806 base->LPTDC2R &= ~SNVS_LPTDC2R_ET5_EN_MASK;
0807 break;
0808 case (kSNVS_ExternalTamper6):
0809 base->LPTDC2R &= ~SNVS_LPTDC2R_ET6_EN_MASK;
0810 break;
0811 case (kSNVS_ExternalTamper7):
0812 base->LPTDC2R &= ~SNVS_LPTDC2R_ET7_EN_MASK;
0813 break;
0814 case (kSNVS_ExternalTamper8):
0815 base->LPTDC2R &= ~SNVS_LPTDC2R_ET8_EN_MASK;
0816 break;
0817 case (kSNVS_ExternalTamper9):
0818 base->LPTDC2R &= ~SNVS_LPTDC2R_ET9_EN_MASK;
0819 break;
0820 case (kSNVS_ExternalTamper10):
0821 base->LPTDC2R &= ~SNVS_LPTDC2R_ET10_EN_MASK;
0822 break;
0823 #endif
0824 default:
0825
0826 break;
0827 }
0828 }
0829
0830
0831
0832
0833
0834
0835 void SNVS_LP_DisableAllExternalTamper(SNVS_Type *base)
0836 {
0837 for (int pin = (int8_t)kSNVS_ExternalTamper1; pin <= (int8_t)SNVS_LP_MAX_TAMPER; pin++)
0838 {
0839 SNVS_LP_DisableExternalTamper(SNVS, (snvs_lp_external_tamper_t)pin);
0840 }
0841 }
0842
0843
0844
0845
0846
0847
0848
0849
0850
0851 snvs_lp_external_tamper_status_t SNVS_LP_GetExternalTamperStatus(SNVS_Type *base, snvs_lp_external_tamper_t pin)
0852 {
0853 snvs_lp_external_tamper_status_t status = kSNVS_TamperNotDetected;
0854
0855 switch (pin)
0856 {
0857 case (kSNVS_ExternalTamper1):
0858 status = (bool)(base->LPSR & SNVS_LPSR_ET1D_MASK) ? kSNVS_TamperDetected : kSNVS_TamperNotDetected;
0859 break;
0860 #if defined(FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER) && (FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER > 1)
0861 case (kSNVS_ExternalTamper2):
0862 status = (bool)(base->LPSR & SNVS_LPSR_ET2D_MASK) ? kSNVS_TamperDetected : kSNVS_TamperNotDetected;
0863 break;
0864 case (kSNVS_ExternalTamper3):
0865 status = (bool)(base->LPTDSR & SNVS_LPTDSR_ET3D_MASK) ? kSNVS_TamperDetected : kSNVS_TamperNotDetected;
0866 break;
0867 case (kSNVS_ExternalTamper4):
0868 status = (bool)(base->LPTDSR & SNVS_LPTDSR_ET4D_MASK) ? kSNVS_TamperDetected : kSNVS_TamperNotDetected;
0869 break;
0870 case (kSNVS_ExternalTamper5):
0871 status = (bool)(base->LPTDSR & SNVS_LPTDSR_ET5D_MASK) ? kSNVS_TamperDetected : kSNVS_TamperNotDetected;
0872 break;
0873 case (kSNVS_ExternalTamper6):
0874 status = (bool)(base->LPTDSR & SNVS_LPTDSR_ET6D_MASK) ? kSNVS_TamperDetected : kSNVS_TamperNotDetected;
0875 break;
0876 case (kSNVS_ExternalTamper7):
0877 status = (bool)(base->LPTDSR & SNVS_LPTDSR_ET7D_MASK) ? kSNVS_TamperDetected : kSNVS_TamperNotDetected;
0878 break;
0879 case (kSNVS_ExternalTamper8):
0880 status = (bool)(base->LPTDSR & SNVS_LPTDSR_ET8D_MASK) ? kSNVS_TamperDetected : kSNVS_TamperNotDetected;
0881 break;
0882 case (kSNVS_ExternalTamper9):
0883 status = (bool)(base->LPTDSR & SNVS_LPTDSR_ET9D_MASK) ? kSNVS_TamperDetected : kSNVS_TamperNotDetected;
0884 break;
0885 case (kSNVS_ExternalTamper10):
0886 status = (bool)(base->LPTDSR & SNVS_LPTDSR_ET10D_MASK) ? kSNVS_TamperDetected : kSNVS_TamperNotDetected;
0887 break;
0888 #endif
0889 default:
0890
0891 break;
0892 }
0893 return status;
0894 }
0895
0896
0897
0898
0899
0900
0901
0902 void SNVS_LP_ClearExternalTamperStatus(SNVS_Type *base, snvs_lp_external_tamper_t pin)
0903 {
0904 base->LPSR |= SNVS_LPSR_ET1D_MASK;
0905
0906 switch (pin)
0907 {
0908 case (kSNVS_ExternalTamper1):
0909 base->LPSR |= SNVS_LPSR_ET1D_MASK;
0910 break;
0911 #if defined(FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER) && (FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER > 1)
0912 case (kSNVS_ExternalTamper2):
0913 base->LPSR |= SNVS_LPSR_ET2D_MASK;
0914 break;
0915 case (kSNVS_ExternalTamper3):
0916 base->LPTDSR |= SNVS_LPTDSR_ET3D_MASK;
0917 break;
0918 case (kSNVS_ExternalTamper4):
0919 base->LPTDSR |= SNVS_LPTDSR_ET4D_MASK;
0920 break;
0921 case (kSNVS_ExternalTamper5):
0922 base->LPTDSR |= SNVS_LPTDSR_ET5D_MASK;
0923 break;
0924 case (kSNVS_ExternalTamper6):
0925 base->LPTDSR |= SNVS_LPTDSR_ET6D_MASK;
0926 break;
0927 case (kSNVS_ExternalTamper7):
0928 base->LPTDSR |= SNVS_LPTDSR_ET7D_MASK;
0929 break;
0930 case (kSNVS_ExternalTamper8):
0931 base->LPTDSR |= SNVS_LPTDSR_ET8D_MASK;
0932 break;
0933 case (kSNVS_ExternalTamper9):
0934 base->LPTDSR |= SNVS_LPTDSR_ET9D_MASK;
0935 break;
0936 case (kSNVS_ExternalTamper10):
0937 base->LPTDSR |= SNVS_LPTDSR_ET10D_MASK;
0938 break;
0939 #endif
0940 default:
0941
0942 break;
0943 }
0944 }
0945
0946
0947
0948
0949
0950
0951 void SNVS_LP_ClearAllExternalTamperStatus(SNVS_Type *base)
0952 {
0953 for (int pin = (int8_t)kSNVS_ExternalTamper1; pin <= (int8_t)SNVS_LP_MAX_TAMPER; pin++)
0954 {
0955 SNVS_LP_ClearExternalTamperStatus(SNVS, (snvs_lp_external_tamper_t)pin);
0956 }
0957 }
0958
0959 #endif
0960
0961 #if defined(FSL_FEATURE_SNVS_HAS_ACTIVE_TAMPERS) && (FSL_FEATURE_SNVS_HAS_ACTIVE_TAMPERS > 0)
0962
0963
0964
0965
0966
0967
0968 status_t SNVS_LP_EnableTxActiveTamper(SNVS_Type *base, snvs_lp_active_tx_tamper_t pin, tamper_active_tx_config_t config)
0969 {
0970 status_t status = kStatus_Success;
0971
0972 switch (pin)
0973 {
0974 case (kSNVS_ActiveTamper1):
0975 {
0976
0977 base->LPATCTLR |= SNVS_LPATCTLR_AT1_PAD_EN_MASK;
0978
0979 base->LPATCR[0] |= SNVS_LPATCR_Seed(config.seed) | SNVS_LPATCR_Polynomial(config.polynomial);
0980
0981 base->LPATCLKR |= SNVS_LPATCLKR_AT1_CLK_CTL(config.clock);
0982
0983 base->LPATCTLR |= SNVS_LPATCTLR_AT1_EN_MASK;
0984 break;
0985 }
0986 case (kSNVS_ActiveTamper2):
0987 {
0988 base->LPATCTLR |= SNVS_LPATCTLR_AT2_PAD_EN_MASK;
0989 base->LPATCR[1] |= SNVS_LPATCR_Seed(config.seed) | SNVS_LPATCR_Polynomial(config.polynomial);
0990 base->LPATCLKR |= SNVS_LPATCLKR_AT2_CLK_CTL(config.clock);
0991 base->LPATCTLR |= SNVS_LPATCTLR_AT2_EN_MASK;
0992 break;
0993 }
0994 case (kSNVS_ActiveTamper3):
0995 {
0996 base->LPATCTLR |= SNVS_LPATCTLR_AT3_PAD_EN_MASK;
0997 base->LPATCR[2] |= SNVS_LPATCR_Seed(config.seed) | SNVS_LPATCR_Polynomial(config.polynomial);
0998 base->LPATCLKR |= SNVS_LPATCLKR_AT3_CLK_CTL(config.clock);
0999 base->LPATCTLR |= SNVS_LPATCTLR_AT3_EN_MASK;
1000 break;
1001 }
1002 case (kSNVS_ActiveTamper4):
1003 {
1004 base->LPATCTLR |= SNVS_LPATCTLR_AT4_PAD_EN_MASK;
1005 base->LPATCR[3] |= SNVS_LPATCR_Seed(config.seed) | SNVS_LPATCR_Polynomial(config.polynomial);
1006 base->LPATCLKR |= SNVS_LPATCLKR_AT4_CLK_CTL(config.clock);
1007 base->LPATCTLR |= SNVS_LPATCTLR_AT4_EN_MASK;
1008 break;
1009 }
1010 case (kSNVS_ActiveTamper5):
1011 {
1012 base->LPATCTLR |= SNVS_LPATCTLR_AT5_PAD_EN_MASK;
1013 base->LPATCR[4] |= SNVS_LPATCR_Seed(config.seed) | SNVS_LPATCR_Polynomial(config.polynomial);
1014 base->LPATCLKR |= SNVS_LPATCLKR_AT5_CLK_CTL(config.clock);
1015 base->LPATCTLR |= SNVS_LPATCTLR_AT5_EN_MASK;
1016 break;
1017 }
1018 default:
1019 status = kStatus_InvalidArgument;
1020
1021 break;
1022 }
1023 return status;
1024 }
1025
1026
1027
1028
1029
1030
1031
1032
1033 status_t SNVS_LP_EnableRxActiveTamper(SNVS_Type *base, snvs_lp_external_tamper_t rx, tamper_active_rx_config_t config)
1034 {
1035 status_t status = kStatus_Success;
1036
1037 switch (rx)
1038 {
1039 case (kSNVS_ExternalTamper1):
1040
1041 if (config.filterenable != 0U)
1042 {
1043 SNVS->LPTGFCR |= SNVS_LPTGFCR_ETGF1_EN_MASK;
1044 SNVS->LPTGFCR |= SNVS_LPTGFCR_ETGF1(config.filter);
1045 }
1046 else
1047 {
1048 SNVS->LPTGFCR &= ~SNVS_LPTGFCR_ETGF1_EN_MASK;
1049 }
1050
1051
1052 base->LPATRC1R = SNVS_LPATRC1R_ET1RCTL(config.activeTamper);
1053
1054
1055 base->LPTDCR |= SNVS_LPTDCR_ET1_EN_MASK;
1056 break;
1057 #if defined(FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER) && (FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER > 1)
1058 case (kSNVS_ExternalTamper2):
1059
1060 if (config.filterenable != 0U)
1061 {
1062 SNVS->LPTGFCR |= SNVS_LPTGFCR_ETGF2_EN_MASK;
1063 SNVS->LPTGFCR |= SNVS_LPTGFCR_ETGF2(config.filter);
1064 }
1065 else
1066 {
1067 SNVS->LPTGFCR &= ~SNVS_LPTGFCR_ETGF2_EN_MASK;
1068 }
1069
1070
1071 base->LPATRC1R = SNVS_LPATRC1R_ET2RCTL(config.activeTamper);
1072
1073
1074 SNVS->LPTDCR |= SNVS_LPTDCR_ET2_EN_MASK;
1075
1076 break;
1077 case (kSNVS_ExternalTamper3):
1078
1079 if (config.filterenable != 0U)
1080 {
1081
1082 SNVS->LPTGF1CR |= SNVS_LPTGF1CR_ETGF3(config.filter);
1083
1084 SNVS->LPTGF1CR |= SNVS_LPTGF1CR_ETGF3_EN(1U);
1085 }
1086
1087
1088 base->LPATRC1R = SNVS_LPATRC1R_ET3RCTL(config.activeTamper);
1089
1090
1091 base->LPTDC2R |= SNVS_LPTDC2R_ET3_EN_MASK;
1092 break;
1093 case (kSNVS_ExternalTamper4):
1094
1095 if (config.filterenable != 0U)
1096 {
1097
1098 SNVS->LPTGF1CR |= SNVS_LPTGF1CR_ETGF4(config.filter);
1099
1100 SNVS->LPTGF1CR |= SNVS_LPTGF1CR_ETGF4_EN(1U);
1101 }
1102
1103
1104 base->LPATRC1R = SNVS_LPATRC1R_ET4RCTL(config.activeTamper);
1105
1106
1107 base->LPTDC2R |= SNVS_LPTDC2R_ET4_EN_MASK;
1108 break;
1109 case (kSNVS_ExternalTamper5):
1110
1111 if (config.filterenable != 0U)
1112 {
1113
1114 SNVS->LPTGF1CR |= SNVS_LPTGF1CR_ETGF5(config.filter);
1115
1116 SNVS->LPTGF1CR |= SNVS_LPTGF1CR_ETGF5_EN(1U);
1117 }
1118
1119
1120 base->LPATRC1R = SNVS_LPATRC1R_ET5RCTL(config.activeTamper);
1121
1122
1123 base->LPTDC2R |= SNVS_LPTDC2R_ET5_EN_MASK;
1124 break;
1125 case (kSNVS_ExternalTamper6):
1126
1127 if (config.filterenable != 0U)
1128 {
1129
1130 SNVS->LPTGF1CR |= SNVS_LPTGF1CR_ETGF6(config.filter);
1131
1132 SNVS->LPTGF1CR |= SNVS_LPTGF1CR_ETGF6_EN(1U);
1133 }
1134
1135
1136 base->LPATRC1R = SNVS_LPATRC1R_ET6RCTL(config.activeTamper);
1137
1138
1139 base->LPTDC2R |= SNVS_LPTDC2R_ET6_EN_MASK;
1140 break;
1141 case (kSNVS_ExternalTamper7):
1142
1143 if (config.filterenable != 0U)
1144 {
1145
1146 SNVS->LPTGF2CR |= SNVS_LPTGF2CR_ETGF7(config.filter);
1147
1148 SNVS->LPTGF2CR |= SNVS_LPTGF2CR_ETGF7_EN(1U);
1149 }
1150
1151
1152 base->LPATRC1R = SNVS_LPATRC1R_ET7RCTL(config.activeTamper);
1153
1154
1155 base->LPTDC2R |= SNVS_LPTDC2R_ET7_EN_MASK;
1156 break;
1157 case (kSNVS_ExternalTamper8):
1158
1159 if (config.filterenable != 0U)
1160 {
1161
1162 SNVS->LPTGF2CR |= SNVS_LPTGF2CR_ETGF8(config.filter);
1163
1164 SNVS->LPTGF2CR |= SNVS_LPTGF2CR_ETGF8_EN(1U);
1165 }
1166
1167
1168 base->LPATRC1R = SNVS_LPATRC1R_ET8RCTL(config.activeTamper);
1169
1170
1171 base->LPTDC2R |= SNVS_LPTDC2R_ET8_EN_MASK;
1172 break;
1173 case (kSNVS_ExternalTamper9):
1174
1175 if (config.filterenable != 0U)
1176 {
1177
1178 SNVS->LPTGF2CR |= SNVS_LPTGF2CR_ETGF9(config.filter);
1179
1180 SNVS->LPTGF2CR |= SNVS_LPTGF2CR_ETGF9_EN(1U);
1181 }
1182
1183
1184 base->LPATRC1R = SNVS_LPATRC2R_ET9RCTL(config.activeTamper);
1185
1186
1187 base->LPTDC2R |= SNVS_LPTDC2R_ET9_EN_MASK;
1188 break;
1189 case (kSNVS_ExternalTamper10):
1190
1191 if (config.filterenable != 0U)
1192 {
1193
1194 SNVS->LPTGF2CR |= SNVS_LPTGF2CR_ETGF10(config.filter);
1195
1196 SNVS->LPTGF2CR |= SNVS_LPTGF2CR_ETGF10_EN(1U);
1197 }
1198
1199
1200 base->LPATRC1R = SNVS_LPATRC2R_ET10RCTL(config.activeTamper);
1201
1202
1203 base->LPTDC2R |= SNVS_LPTDC2R_ET10_EN_MASK;
1204 break;
1205 #endif
1206 default:
1207 status = kStatus_InvalidArgument;
1208
1209 break;
1210 }
1211
1212 return status;
1213 }
1214
1215
1216
1217
1218
1219
1220
1221 status_t SNVS_LP_SetVoltageTamper(SNVS_Type *base, bool enable)
1222 {
1223 base->LPTDCR |= SNVS_LPTDCR_VT_EN(enable);
1224
1225 return kStatus_Success;
1226 }
1227
1228
1229
1230
1231
1232
1233
1234 status_t SNVS_LP_SetTemperatureTamper(SNVS_Type *base, bool enable)
1235 {
1236 SNVS->LPTDCR |= SNVS_LPTDCR_TT_EN(enable);
1237
1238 return kStatus_Success;
1239 }
1240
1241
1242
1243
1244
1245
1246
1247 status_t SNVS_LP_SetClockTamper(SNVS_Type *base, bool enable)
1248 {
1249 SNVS->LPTDCR |= SNVS_LPTDCR_CT_EN(enable);
1250
1251 return kStatus_Success;
1252 }
1253
1254
1255
1256
1257
1258
1259 snvs_lp_external_tamper_status_t SNVS_LP_CheckVoltageTamper(SNVS_Type *base)
1260 {
1261 return ((SNVS->LPSR & SNVS_LPSR_VTD_MASK) != 0U) ? kSNVS_TamperDetected : kSNVS_TamperNotDetected;
1262 }
1263
1264
1265
1266
1267
1268
1269 snvs_lp_external_tamper_status_t SNVS_LP_CheckTemperatureTamper(SNVS_Type *base)
1270 {
1271 return ((SNVS->LPSR & SNVS_LPSR_TTD_MASK) != 0U) ? kSNVS_TamperDetected : kSNVS_TamperNotDetected;
1272 }
1273
1274
1275
1276
1277
1278
1279 snvs_lp_external_tamper_status_t SNVS_LP_CheckClockTamper(SNVS_Type *base)
1280 {
1281 return ((SNVS->LPSR & SNVS_LPSR_CTD_MASK) != 0U) ? kSNVS_TamperDetected : kSNVS_TamperNotDetected;
1282 }
1283 #endif
1284
1285
1286
1287
1288
1289
1290
1291 uint64_t SNVS_LP_GetMonotonicCounter(SNVS_Type *base)
1292 {
1293 uint32_t mc_lsb, mc_msb;
1294
1295 mc_msb = base->LPSMCMR;
1296 mc_lsb = base->LPSMCLR;
1297
1298 return ((uint64_t)mc_msb << 32UL) | (uint64_t)mc_lsb;
1299 }
1300
1301
1302
1303
1304
1305
1306
1307 void SNVS_LP_WriteZeroizableMasterKey(SNVS_Type *base, uint32_t ZMKey[SNVS_ZMK_REG_COUNT])
1308 {
1309 uint8_t i = 0;
1310
1311 for (i = 0; i < SNVS_ZMK_REG_COUNT; i++)
1312 {
1313 base->LPZMKR[i] = ZMKey[i];
1314 }
1315 }
1316
1317 #if defined(FSL_FEATURE_SNVS_HAS_STATE_TRANSITION) && (FSL_FEATURE_SNVS_HAS_STATE_TRANSITION > 0)
1318
1319
1320
1321
1322
1323
1324
1325
1326 status_t SNVS_LP_SSM_State_Transition(SNVS_Type *base)
1327 {
1328 uint32_t curr_ssm_state = ((base->HPSR & SNVS_HPSR_SSM_STATE_MASK) >> SNVS_HPSR_SSM_STATE_SHIFT);
1329 uint32_t sec_config = ((OCOTP_CTRL->HW_OCOTP_OTFAD_CFG3 & OCOTP_CTRL_HW_OCOTP_SEC_CONFIG1_MASK) >>
1330 OCOTP_CTRL_HW_OCOTP_SEC_CONFIG1_SHIFT);
1331
1332
1333 if (curr_ssm_state == SNVS_SSM_STATE_CHECK)
1334 {
1335 if (sec_config == SEC_CONFIG_OPEN)
1336 {
1337
1338 base->HPCOMR |= SNVS_HPCOMR_SW_SV(1);
1339 }
1340 else
1341 {
1342
1343 base->HPCOMR |= SNVS_HPCOMR_SSM_ST(1);
1344 }
1345 }
1346
1347 uint32_t new_ssm_state = ((base->HPSR & SNVS_HPSR_SSM_STATE_MASK) >> SNVS_HPSR_SSM_STATE_SHIFT);
1348
1349 if (new_ssm_state != SNVS_SSM_STATE_CHECK)
1350 {
1351 return kStatus_Success;
1352 }
1353 else
1354 {
1355 return kStatus_Fail;
1356 }
1357 }
1358 #endif