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0001 /* 0002 * Copyright (c) 2015, Freescale Semiconductor, Inc. 0003 * Copyright 2016-2022 NXP 0004 * All rights reserved. 0005 * 0006 * SPDX-License-Identifier: BSD-3-Clause 0007 */ 0008 0009 #ifndef _FSL_SAI_H_ 0010 #define _FSL_SAI_H_ 0011 0012 #include "fsl_common.h" 0013 0014 /*! 0015 * @addtogroup sai_driver SAI Driver 0016 * @{ 0017 */ 0018 0019 /******************************************************************************* 0020 * Definitions 0021 ******************************************************************************/ 0022 0023 /*! @name Driver version */ 0024 /*@{*/ 0025 #define FSL_SAI_DRIVER_VERSION (MAKE_VERSION(2, 3, 8)) /*!< Version 2.3.8 */ 0026 /*@}*/ 0027 0028 /*! @brief _sai_status_t, SAI return status.*/ 0029 enum 0030 { 0031 kStatus_SAI_TxBusy = MAKE_STATUS(kStatusGroup_SAI, 0), /*!< SAI Tx is busy. */ 0032 kStatus_SAI_RxBusy = MAKE_STATUS(kStatusGroup_SAI, 1), /*!< SAI Rx is busy. */ 0033 kStatus_SAI_TxError = MAKE_STATUS(kStatusGroup_SAI, 2), /*!< SAI Tx FIFO error. */ 0034 kStatus_SAI_RxError = MAKE_STATUS(kStatusGroup_SAI, 3), /*!< SAI Rx FIFO error. */ 0035 kStatus_SAI_QueueFull = MAKE_STATUS(kStatusGroup_SAI, 4), /*!< SAI transfer queue is full. */ 0036 kStatus_SAI_TxIdle = MAKE_STATUS(kStatusGroup_SAI, 5), /*!< SAI Tx is idle */ 0037 kStatus_SAI_RxIdle = MAKE_STATUS(kStatusGroup_SAI, 6) /*!< SAI Rx is idle */ 0038 }; 0039 0040 /*! @brief _sai_channel_mask,.sai channel mask value, actual channel numbers is depend soc specific */ 0041 enum 0042 { 0043 kSAI_Channel0Mask = 1 << 0U, /*!< channel 0 mask value */ 0044 kSAI_Channel1Mask = 1 << 1U, /*!< channel 1 mask value */ 0045 kSAI_Channel2Mask = 1 << 2U, /*!< channel 2 mask value */ 0046 kSAI_Channel3Mask = 1 << 3U, /*!< channel 3 mask value */ 0047 kSAI_Channel4Mask = 1 << 4U, /*!< channel 4 mask value */ 0048 kSAI_Channel5Mask = 1 << 5U, /*!< channel 5 mask value */ 0049 kSAI_Channel6Mask = 1 << 6U, /*!< channel 6 mask value */ 0050 kSAI_Channel7Mask = 1 << 7U, /*!< channel 7 mask value */ 0051 }; 0052 0053 /*! @brief Define the SAI bus type */ 0054 typedef enum _sai_protocol 0055 { 0056 kSAI_BusLeftJustified = 0x0U, /*!< Uses left justified format.*/ 0057 kSAI_BusRightJustified, /*!< Uses right justified format. */ 0058 kSAI_BusI2S, /*!< Uses I2S format. */ 0059 kSAI_BusPCMA, /*!< Uses I2S PCM A format.*/ 0060 kSAI_BusPCMB /*!< Uses I2S PCM B format. */ 0061 } sai_protocol_t; 0062 0063 /*! @brief Master or slave mode */ 0064 typedef enum _sai_master_slave 0065 { 0066 kSAI_Master = 0x0U, /*!< Master mode include bclk and frame sync */ 0067 kSAI_Slave = 0x1U, /*!< Slave mode include bclk and frame sync */ 0068 kSAI_Bclk_Master_FrameSync_Slave = 0x2U, /*!< bclk in master mode, frame sync in slave mode */ 0069 kSAI_Bclk_Slave_FrameSync_Master = 0x3U, /*!< bclk in slave mode, frame sync in master mode */ 0070 } sai_master_slave_t; 0071 0072 /*! @brief Mono or stereo audio format */ 0073 typedef enum _sai_mono_stereo 0074 { 0075 kSAI_Stereo = 0x0U, /*!< Stereo sound. */ 0076 kSAI_MonoRight, /*!< Only Right channel have sound. */ 0077 kSAI_MonoLeft /*!< Only left channel have sound. */ 0078 } sai_mono_stereo_t; 0079 0080 /*! @brief SAI data order, MSB or LSB */ 0081 typedef enum _sai_data_order 0082 { 0083 kSAI_DataLSB = 0x0U, /*!< LSB bit transferred first */ 0084 kSAI_DataMSB /*!< MSB bit transferred first */ 0085 } sai_data_order_t; 0086 0087 /*! @brief SAI clock polarity, active high or low */ 0088 typedef enum _sai_clock_polarity 0089 { 0090 kSAI_PolarityActiveHigh = 0x0U, /*!< Drive outputs on rising edge */ 0091 kSAI_PolarityActiveLow = 0x1U, /*!< Drive outputs on falling edge */ 0092 kSAI_SampleOnFallingEdge = 0x0U, /*!< Sample inputs on falling edge */ 0093 kSAI_SampleOnRisingEdge = 0x1U, /*!< Sample inputs on rising edge */ 0094 } sai_clock_polarity_t; 0095 0096 /*! @brief Synchronous or asynchronous mode */ 0097 typedef enum _sai_sync_mode 0098 { 0099 kSAI_ModeAsync = 0x0U, /*!< Asynchronous mode */ 0100 kSAI_ModeSync, /*!< Synchronous mode (with receiver or transmit) */ 0101 #if defined(FSL_FEATURE_SAI_HAS_SYNC_WITH_ANOTHER_SAI) && (FSL_FEATURE_SAI_HAS_SYNC_WITH_ANOTHER_SAI) 0102 kSAI_ModeSyncWithOtherTx, /*!< Synchronous with another SAI transmit */ 0103 kSAI_ModeSyncWithOtherRx /*!< Synchronous with another SAI receiver */ 0104 #endif /* FSL_FEATURE_SAI_HAS_SYNC_WITH_ANOTHER_SAI */ 0105 } sai_sync_mode_t; 0106 0107 #if !(defined(FSL_FEATURE_SAI_HAS_NO_MCR_MICS) && (FSL_FEATURE_SAI_HAS_NO_MCR_MICS)) 0108 /*! @brief Mater clock source */ 0109 typedef enum _sai_mclk_source 0110 { 0111 kSAI_MclkSourceSysclk = 0x0U, /*!< Master clock from the system clock */ 0112 kSAI_MclkSourceSelect1, /*!< Master clock from source 1 */ 0113 kSAI_MclkSourceSelect2, /*!< Master clock from source 2 */ 0114 kSAI_MclkSourceSelect3 /*!< Master clock from source 3 */ 0115 } sai_mclk_source_t; 0116 #endif 0117 0118 /*! @brief Bit clock source */ 0119 typedef enum _sai_bclk_source 0120 { 0121 kSAI_BclkSourceBusclk = 0x0U, /*!< Bit clock using bus clock */ 0122 /* General device bit source definition */ 0123 kSAI_BclkSourceMclkOption1 = 0x1U, /*!< Bit clock MCLK option 1 */ 0124 kSAI_BclkSourceMclkOption2 = 0x2U, /*!< Bit clock MCLK option2 */ 0125 kSAI_BclkSourceMclkOption3 = 0x3U, /*!< Bit clock MCLK option3 */ 0126 /* Kinetis device bit clock source definition */ 0127 kSAI_BclkSourceMclkDiv = 0x1U, /*!< Bit clock using master clock divider */ 0128 kSAI_BclkSourceOtherSai0 = 0x2U, /*!< Bit clock from other SAI device */ 0129 kSAI_BclkSourceOtherSai1 = 0x3U /*!< Bit clock from other SAI device */ 0130 } sai_bclk_source_t; 0131 0132 /*! @brief _sai_interrupt_enable_t, The SAI interrupt enable flag */ 0133 enum 0134 { 0135 kSAI_WordStartInterruptEnable = 0136 I2S_TCSR_WSIE_MASK, /*!< Word start flag, means the first word in a frame detected */ 0137 kSAI_SyncErrorInterruptEnable = I2S_TCSR_SEIE_MASK, /*!< Sync error flag, means the sync error is detected */ 0138 kSAI_FIFOWarningInterruptEnable = I2S_TCSR_FWIE_MASK, /*!< FIFO warning flag, means the FIFO is empty */ 0139 kSAI_FIFOErrorInterruptEnable = I2S_TCSR_FEIE_MASK, /*!< FIFO error flag */ 0140 #if defined(FSL_FEATURE_SAI_HAS_FIFO) && (FSL_FEATURE_SAI_HAS_FIFO) 0141 kSAI_FIFORequestInterruptEnable = I2S_TCSR_FRIE_MASK, /*!< FIFO request, means reached watermark */ 0142 #endif /* FSL_FEATURE_SAI_HAS_FIFO */ 0143 }; 0144 0145 /*! @brief _sai_dma_enable_t, The DMA request sources */ 0146 enum 0147 { 0148 kSAI_FIFOWarningDMAEnable = I2S_TCSR_FWDE_MASK, /*!< FIFO warning caused by the DMA request */ 0149 #if defined(FSL_FEATURE_SAI_HAS_FIFO) && (FSL_FEATURE_SAI_HAS_FIFO) 0150 kSAI_FIFORequestDMAEnable = I2S_TCSR_FRDE_MASK, /*!< FIFO request caused by the DMA request */ 0151 #endif /* FSL_FEATURE_SAI_HAS_FIFO */ 0152 }; 0153 0154 /*! @brief _sai_flags, The SAI status flag */ 0155 enum 0156 { 0157 kSAI_WordStartFlag = I2S_TCSR_WSF_MASK, /*!< Word start flag, means the first word in a frame detected */ 0158 kSAI_SyncErrorFlag = I2S_TCSR_SEF_MASK, /*!< Sync error flag, means the sync error is detected */ 0159 kSAI_FIFOErrorFlag = I2S_TCSR_FEF_MASK, /*!< FIFO error flag */ 0160 #if defined(FSL_FEATURE_SAI_HAS_FIFO) && (FSL_FEATURE_SAI_HAS_FIFO) 0161 kSAI_FIFORequestFlag = I2S_TCSR_FRF_MASK, /*!< FIFO request flag. */ 0162 #endif /* FSL_FEATURE_SAI_HAS_FIFO */ 0163 kSAI_FIFOWarningFlag = I2S_TCSR_FWF_MASK, /*!< FIFO warning flag */ 0164 }; 0165 0166 /*! @brief The reset type */ 0167 typedef enum _sai_reset_type 0168 { 0169 kSAI_ResetTypeSoftware = I2S_TCSR_SR_MASK, /*!< Software reset, reset the logic state */ 0170 kSAI_ResetTypeFIFO = I2S_TCSR_FR_MASK, /*!< FIFO reset, reset the FIFO read and write pointer */ 0171 kSAI_ResetAll = I2S_TCSR_SR_MASK | I2S_TCSR_FR_MASK /*!< All reset. */ 0172 } sai_reset_type_t; 0173 0174 #if defined(FSL_FEATURE_SAI_HAS_FIFO_PACKING) && FSL_FEATURE_SAI_HAS_FIFO_PACKING 0175 /*! 0176 * @brief The SAI packing mode 0177 * The mode includes 8 bit and 16 bit packing. 0178 */ 0179 typedef enum _sai_fifo_packing 0180 { 0181 kSAI_FifoPackingDisabled = 0x0U, /*!< Packing disabled */ 0182 kSAI_FifoPacking8bit = 0x2U, /*!< 8 bit packing enabled */ 0183 kSAI_FifoPacking16bit = 0x3U /*!< 16bit packing enabled */ 0184 } sai_fifo_packing_t; 0185 #endif /* FSL_FEATURE_SAI_HAS_FIFO_PACKING */ 0186 0187 /*! @brief SAI user configuration structure */ 0188 typedef struct _sai_config 0189 { 0190 sai_protocol_t protocol; /*!< Audio bus protocol in SAI */ 0191 sai_sync_mode_t syncMode; /*!< SAI sync mode, control Tx/Rx clock sync */ 0192 #if defined(FSL_FEATURE_SAI_HAS_MCR) && (FSL_FEATURE_SAI_HAS_MCR) 0193 bool mclkOutputEnable; /*!< Master clock output enable, true means master clock divider enabled */ 0194 #if !(defined(FSL_FEATURE_SAI_HAS_NO_MCR_MICS) && (FSL_FEATURE_SAI_HAS_NO_MCR_MICS)) 0195 sai_mclk_source_t mclkSource; /*!< Master Clock source */ 0196 #endif /* FSL_FEATURE_SAI_HAS_MCR */ 0197 #endif 0198 sai_bclk_source_t bclkSource; /*!< Bit Clock source */ 0199 sai_master_slave_t masterSlave; /*!< Master or slave */ 0200 } sai_config_t; 0201 0202 #ifndef SAI_XFER_QUEUE_SIZE 0203 /*!@brief SAI transfer queue size, user can refine it according to use case. */ 0204 #define SAI_XFER_QUEUE_SIZE (4U) 0205 #endif 0206 0207 /*! @brief Audio sample rate */ 0208 typedef enum _sai_sample_rate 0209 { 0210 kSAI_SampleRate8KHz = 8000U, /*!< Sample rate 8000 Hz */ 0211 kSAI_SampleRate11025Hz = 11025U, /*!< Sample rate 11025 Hz */ 0212 kSAI_SampleRate12KHz = 12000U, /*!< Sample rate 12000 Hz */ 0213 kSAI_SampleRate16KHz = 16000U, /*!< Sample rate 16000 Hz */ 0214 kSAI_SampleRate22050Hz = 22050U, /*!< Sample rate 22050 Hz */ 0215 kSAI_SampleRate24KHz = 24000U, /*!< Sample rate 24000 Hz */ 0216 kSAI_SampleRate32KHz = 32000U, /*!< Sample rate 32000 Hz */ 0217 kSAI_SampleRate44100Hz = 44100U, /*!< Sample rate 44100 Hz */ 0218 kSAI_SampleRate48KHz = 48000U, /*!< Sample rate 48000 Hz */ 0219 kSAI_SampleRate96KHz = 96000U, /*!< Sample rate 96000 Hz */ 0220 kSAI_SampleRate192KHz = 192000U, /*!< Sample rate 192000 Hz */ 0221 kSAI_SampleRate384KHz = 384000U, /*!< Sample rate 384000 Hz */ 0222 } sai_sample_rate_t; 0223 0224 /*! @brief Audio word width */ 0225 typedef enum _sai_word_width 0226 { 0227 kSAI_WordWidth8bits = 8U, /*!< Audio data width 8 bits */ 0228 kSAI_WordWidth16bits = 16U, /*!< Audio data width 16 bits */ 0229 kSAI_WordWidth24bits = 24U, /*!< Audio data width 24 bits */ 0230 kSAI_WordWidth32bits = 32U /*!< Audio data width 32 bits */ 0231 } sai_word_width_t; 0232 0233 #if defined(FSL_FEATURE_SAI_HAS_CHANNEL_MODE) && FSL_FEATURE_SAI_HAS_CHANNEL_MODE 0234 /*! @brief sai data pin state definition */ 0235 typedef enum _sai_data_pin_state 0236 { 0237 kSAI_DataPinStateTriState = 0238 0U, /*!< transmit data pins are tri-stated when slots are masked or channels are disabled */ 0239 kSAI_DataPinStateOutputZero = 1U, /*!< transmit data pins are never tri-stated and will output zero when slots 0240 are masked or channel disabled */ 0241 } sai_data_pin_state_t; 0242 #endif 0243 0244 #if defined(FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE) && FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE 0245 /*! @brief sai fifo combine mode definition */ 0246 typedef enum _sai_fifo_combine 0247 { 0248 kSAI_FifoCombineDisabled = 0U, /*!< sai fifo combine mode disabled */ 0249 kSAI_FifoCombineModeEnabledOnRead, /*!< sai fifo combine mode enabled on FIFO reads */ 0250 kSAI_FifoCombineModeEnabledOnWrite, /*!< sai fifo combine mode enabled on FIFO write */ 0251 kSAI_FifoCombineModeEnabledOnReadWrite, /*!< sai fifo combined mode enabled on FIFO read/writes */ 0252 } sai_fifo_combine_t; 0253 #endif 0254 0255 /*! @brief sai transceiver type */ 0256 typedef enum _sai_transceiver_type 0257 { 0258 kSAI_Transmitter = 0U, /*!< sai transmitter */ 0259 kSAI_Receiver = 1U, /*!< sai receiver */ 0260 } sai_transceiver_type_t; 0261 0262 /*! @brief sai frame sync len */ 0263 typedef enum _sai_frame_sync_len 0264 { 0265 kSAI_FrameSyncLenOneBitClk = 0U, /*!< 1 bit clock frame sync len for DSP mode */ 0266 kSAI_FrameSyncLenPerWordWidth = 1U, /*!< Frame sync length decided by word width */ 0267 } sai_frame_sync_len_t; 0268 0269 /*! @brief sai transfer format */ 0270 typedef struct _sai_transfer_format 0271 { 0272 uint32_t sampleRate_Hz; /*!< Sample rate of audio data */ 0273 uint32_t bitWidth; /*!< Data length of audio data, usually 8/16/24/32 bits */ 0274 sai_mono_stereo_t stereo; /*!< Mono or stereo */ 0275 #if defined(FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER) && (FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER) 0276 uint32_t masterClockHz; /*!< Master clock frequency in Hz */ 0277 #endif /* FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER */ 0278 #if defined(FSL_FEATURE_SAI_HAS_FIFO) && (FSL_FEATURE_SAI_HAS_FIFO) 0279 uint8_t watermark; /*!< Watermark value */ 0280 #endif /* FSL_FEATURE_SAI_HAS_FIFO */ 0281 0282 /* for the multi channel usage, user can provide channelMask Oonly, then sai driver will handle 0283 * other parameter carefully, such as 0284 * channelMask = kSAI_Channel0Mask | kSAI_Channel1Mask | kSAI_Channel4Mask 0285 * then in SAI_RxSetFormat/SAI_TxSetFormat function, channel/endChannel/channelNums will be calculated. 0286 * for the single channel usage, user can provide channel or channel mask only, such as, 0287 * channel = 0 or channelMask = kSAI_Channel0Mask. 0288 */ 0289 uint8_t channel; /*!< Transfer start channel */ 0290 uint8_t channelMask; /*!< enabled channel mask value, reference _sai_channel_mask */ 0291 uint8_t endChannel; /*!< end channel number */ 0292 uint8_t channelNums; /*!< Total enabled channel numbers */ 0293 0294 sai_protocol_t protocol; /*!< Which audio protocol used */ 0295 bool isFrameSyncCompact; /*!< True means Frame sync length is configurable according to bitWidth, false means frame 0296 sync length is 64 times of bit clock. */ 0297 } sai_transfer_format_t; 0298 0299 #if (defined(FSL_FEATURE_SAI_HAS_MCR) && (FSL_FEATURE_SAI_HAS_MCR)) || \ 0300 (defined(FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER) && (FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER)) 0301 /*! @brief master clock configurations */ 0302 typedef struct _sai_master_clock 0303 { 0304 #if defined(FSL_FEATURE_SAI_HAS_MCR) && (FSL_FEATURE_SAI_HAS_MCR) 0305 bool mclkOutputEnable; /*!< master clock output enable */ 0306 #if !(defined(FSL_FEATURE_SAI_HAS_NO_MCR_MICS) && (FSL_FEATURE_SAI_HAS_NO_MCR_MICS)) 0307 sai_mclk_source_t mclkSource; /*!< Master Clock source */ 0308 #endif 0309 #endif 0310 0311 #if (defined(FSL_FEATURE_SAI_HAS_MCR) && (FSL_FEATURE_SAI_HAS_MCR)) || \ 0312 (defined(FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER) && (FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER)) 0313 uint32_t mclkHz; /*!< target mclk frequency */ 0314 uint32_t mclkSourceClkHz; /*!< mclk source frequency*/ 0315 #endif 0316 } sai_master_clock_t; 0317 #endif 0318 0319 /*! @brief sai fifo feature*/ 0320 #if (defined(FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR) && FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR) || \ 0321 (defined(FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE) && FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE) || \ 0322 (defined(FSL_FEATURE_SAI_HAS_FIFO_PACKING) && FSL_FEATURE_SAI_HAS_FIFO_PACKING) || \ 0323 (defined(FSL_FEATURE_SAI_HAS_FIFO) && (FSL_FEATURE_SAI_HAS_FIFO)) 0324 #define FSL_SAI_HAS_FIFO_EXTEND_FEATURE 1 0325 #else 0326 #define FSL_SAI_HAS_FIFO_EXTEND_FEATURE 0 0327 #endif 0328 0329 #if FSL_SAI_HAS_FIFO_EXTEND_FEATURE 0330 /*! @brief sai fifo configurations */ 0331 typedef struct _sai_fifo 0332 { 0333 #if defined(FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR) && FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR 0334 bool fifoContinueOneError; /*!< fifo continues when error occur */ 0335 #endif 0336 0337 #if defined(FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE) && FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE 0338 sai_fifo_combine_t fifoCombine; /*!< fifo combine mode */ 0339 #endif 0340 0341 #if defined(FSL_FEATURE_SAI_HAS_FIFO_PACKING) && FSL_FEATURE_SAI_HAS_FIFO_PACKING 0342 sai_fifo_packing_t fifoPacking; /*!< fifo packing mode */ 0343 #endif 0344 #if defined(FSL_FEATURE_SAI_HAS_FIFO) && (FSL_FEATURE_SAI_HAS_FIFO) 0345 uint8_t fifoWatermark; /*!< fifo watermark */ 0346 #endif 0347 } sai_fifo_t; 0348 #endif 0349 0350 /*! @brief sai bit clock configurations */ 0351 typedef struct _sai_bit_clock 0352 { 0353 bool bclkSrcSwap; /*!< bit clock source swap */ 0354 bool bclkInputDelay; /*!< bit clock actually used by the transmitter is delayed by the pad output delay, 0355 this has effect of decreasing the data input setup time, but increasing the data output valid 0356 time .*/ 0357 sai_clock_polarity_t bclkPolarity; /*!< bit clock polarity */ 0358 sai_bclk_source_t bclkSource; /*!< bit Clock source */ 0359 } sai_bit_clock_t; 0360 0361 /*! @brief sai frame sync configurations */ 0362 typedef struct _sai_frame_sync 0363 { 0364 uint8_t frameSyncWidth; /*!< frame sync width in number of bit clocks */ 0365 bool frameSyncEarly; /*!< TRUE is frame sync assert one bit before the first bit of frame 0366 FALSE is frame sync assert with the first bit of the frame */ 0367 0368 #if defined(FSL_FEATURE_SAI_HAS_ON_DEMAND_MODE) && FSL_FEATURE_SAI_HAS_ON_DEMAND_MODE 0369 bool frameSyncGenerateOnDemand; /*!< internal frame sync is generated when FIFO waring flag is clear */ 0370 #endif 0371 0372 sai_clock_polarity_t frameSyncPolarity; /*!< frame sync polarity */ 0373 0374 } sai_frame_sync_t; 0375 0376 /*! @brief sai serial data configurations */ 0377 typedef struct _sai_serial_data 0378 { 0379 #if defined(FSL_FEATURE_SAI_HAS_CHANNEL_MODE) && FSL_FEATURE_SAI_HAS_CHANNEL_MODE 0380 sai_data_pin_state_t dataMode; /*!< sai data pin state when slots masked or channel disabled */ 0381 #endif 0382 0383 sai_data_order_t dataOrder; /*!< configure whether the LSB or MSB is transmitted first */ 0384 uint8_t dataWord0Length; /*!< configure the number of bits in the first word in each frame */ 0385 uint8_t dataWordNLength; /*!< configure the number of bits in the each word in each frame, except the first word */ 0386 uint8_t dataWordLength; /*!< used to record the data length for dma transfer */ 0387 uint8_t 0388 dataFirstBitShifted; /*!< Configure the bit index for the first bit transmitted for each word in the frame */ 0389 uint8_t dataWordNum; /*!< configure the number of words in each frame */ 0390 uint32_t dataMaskedWord; /*!< configure whether the transmit word is masked */ 0391 } sai_serial_data_t; 0392 0393 /*! @brief sai transceiver configurations */ 0394 typedef struct _sai_transceiver 0395 { 0396 sai_serial_data_t serialData; /*!< serial data configurations */ 0397 sai_frame_sync_t frameSync; /*!< ws configurations */ 0398 sai_bit_clock_t bitClock; /*!< bit clock configurations */ 0399 #if FSL_SAI_HAS_FIFO_EXTEND_FEATURE 0400 sai_fifo_t fifo; /*!< fifo configurations */ 0401 #endif 0402 sai_master_slave_t masterSlave; /*!< transceiver is master or slave */ 0403 0404 sai_sync_mode_t syncMode; /*!< transceiver sync mode */ 0405 0406 uint8_t startChannel; /*!< Transfer start channel */ 0407 uint8_t channelMask; /*!< enabled channel mask value, reference _sai_channel_mask */ 0408 uint8_t endChannel; /*!< end channel number */ 0409 uint8_t channelNums; /*!< Total enabled channel numbers */ 0410 0411 } sai_transceiver_t; 0412 0413 /*! @brief SAI transfer structure */ 0414 typedef struct _sai_transfer 0415 { 0416 uint8_t *data; /*!< Data start address to transfer. */ 0417 size_t dataSize; /*!< Transfer size. */ 0418 } sai_transfer_t; 0419 0420 typedef struct _sai_handle sai_handle_t; 0421 0422 /*! @brief SAI transfer callback prototype */ 0423 typedef void (*sai_transfer_callback_t)(I2S_Type *base, sai_handle_t *handle, status_t status, void *userData); 0424 0425 /*! @brief SAI handle structure */ 0426 struct _sai_handle 0427 { 0428 I2S_Type *base; /*!< base address */ 0429 0430 uint32_t state; /*!< Transfer status */ 0431 sai_transfer_callback_t callback; /*!< Callback function called at transfer event*/ 0432 void *userData; /*!< Callback parameter passed to callback function*/ 0433 uint8_t bitWidth; /*!< Bit width for transfer, 8/16/24/32 bits */ 0434 0435 /* for the multi channel usage, user can provide channelMask Oonly, then sai driver will handle 0436 * other parameter carefully, such as 0437 * channelMask = kSAI_Channel0Mask | kSAI_Channel1Mask | kSAI_Channel4Mask 0438 * then in SAI_RxSetFormat/SAI_TxSetFormat function, channel/endChannel/channelNums will be calculated. 0439 * for the single channel usage, user can provide channel or channel mask only, such as, 0440 * channel = 0 or channelMask = kSAI_Channel0Mask. 0441 */ 0442 uint8_t channel; /*!< Transfer start channel */ 0443 uint8_t channelMask; /*!< enabled channel mask value, refernece _sai_channel_mask */ 0444 uint8_t endChannel; /*!< end channel number */ 0445 uint8_t channelNums; /*!< Total enabled channel numbers */ 0446 0447 sai_transfer_t saiQueue[SAI_XFER_QUEUE_SIZE]; /*!< Transfer queue storing queued transfer */ 0448 size_t transferSize[SAI_XFER_QUEUE_SIZE]; /*!< Data bytes need to transfer */ 0449 volatile uint8_t queueUser; /*!< Index for user to queue transfer */ 0450 volatile uint8_t queueDriver; /*!< Index for driver to get the transfer data and size */ 0451 #if defined(FSL_FEATURE_SAI_HAS_FIFO) && (FSL_FEATURE_SAI_HAS_FIFO) 0452 uint8_t watermark; /*!< Watermark value */ 0453 #endif 0454 }; 0455 0456 /******************************************************************************* 0457 * API 0458 ******************************************************************************/ 0459 0460 #if defined(__cplusplus) 0461 extern "C" { 0462 #endif /*_cplusplus*/ 0463 0464 /*! 0465 * @name Initialization and deinitialization 0466 * @{ 0467 */ 0468 0469 /*! 0470 * @brief Initializes the SAI Tx peripheral. 0471 * @deprecated Do not use this function. It has been superceded by @ref SAI_Init 0472 * 0473 * Ungates the SAI clock, resets the module, and configures SAI Tx with a configuration structure. 0474 * The configuration structure can be custom filled or set with default values by 0475 * SAI_TxGetDefaultConfig(). 0476 * 0477 * @note This API should be called at the beginning of the application to use 0478 * the SAI driver. Otherwise, accessing the SAIM module can cause a hard fault 0479 * because the clock is not enabled. 0480 * 0481 * @param base SAI base pointer 0482 * @param config SAI configuration structure. 0483 */ 0484 void SAI_TxInit(I2S_Type *base, const sai_config_t *config); 0485 0486 /*! 0487 * @brief Initializes the SAI Rx peripheral. 0488 * @deprecated Do not use this function. It has been superceded by @ref SAI_Init 0489 * 0490 * Ungates the SAI clock, resets the module, and configures the SAI Rx with a configuration structure. 0491 * The configuration structure can be custom filled or set with default values by 0492 * SAI_RxGetDefaultConfig(). 0493 * 0494 * @note This API should be called at the beginning of the application to use 0495 * the SAI driver. Otherwise, accessing the SAI module can cause a hard fault 0496 * because the clock is not enabled. 0497 * 0498 * @param base SAI base pointer 0499 * @param config SAI configuration structure. 0500 */ 0501 void SAI_RxInit(I2S_Type *base, const sai_config_t *config); 0502 0503 /*! 0504 * @brief Sets the SAI Tx configuration structure to default values. 0505 * @deprecated Do not use this function. It has been superceded by 0506 * @ref SAI_GetClassicI2SConfig, @ref SAI_GetLeftJustifiedConfig , @ref SAI_GetRightJustifiedConfig, @ref 0507 SAI_GetDSPConfig, @ref SAI_GetTDMConfig 0508 * 0509 * This API initializes the configuration structure for use in SAI_TxConfig(). 0510 * The initialized structure can remain unchanged in SAI_TxConfig(), or it can be modified 0511 * before calling SAI_TxConfig(). 0512 * This is an example. 0513 @code 0514 sai_config_t config; 0515 SAI_TxGetDefaultConfig(&config); 0516 @endcode 0517 * 0518 * @param config pointer to master configuration structure 0519 */ 0520 void SAI_TxGetDefaultConfig(sai_config_t *config); 0521 0522 /*! 0523 * @brief Sets the SAI Rx configuration structure to default values. 0524 * @deprecated Do not use this function. It has been superceded by 0525 * @ref SAI_GetClassicI2SConfig, @ref SAI_GetLeftJustifiedConfig , @ref SAI_GetRightJustifiedConfig, @ref 0526 SAI_GetDSPConfig, @ref SAI_GetTDMConfig 0527 * 0528 * This API initializes the configuration structure for use in SAI_RxConfig(). 0529 * The initialized structure can remain unchanged in SAI_RxConfig() or it can be modified 0530 * before calling SAI_RxConfig(). 0531 * This is an example. 0532 @code 0533 sai_config_t config; 0534 SAI_RxGetDefaultConfig(&config); 0535 @endcode 0536 * 0537 * @param config pointer to master configuration structure 0538 */ 0539 void SAI_RxGetDefaultConfig(sai_config_t *config); 0540 0541 /*! 0542 * @brief Initializes the SAI peripheral. 0543 * 0544 * This API gates the SAI clock. The SAI module can't operate unless SAI_Init is called to enable the clock. 0545 * 0546 * @param base SAI base pointer. 0547 */ 0548 void SAI_Init(I2S_Type *base); 0549 0550 /*! 0551 * @brief De-initializes the SAI peripheral. 0552 * 0553 * This API gates the SAI clock. The SAI module can't operate unless SAI_TxInit 0554 * or SAI_RxInit is called to enable the clock. 0555 * 0556 * @param base SAI base pointer. 0557 */ 0558 void SAI_Deinit(I2S_Type *base); 0559 0560 /*! 0561 * @brief Resets the SAI Tx. 0562 * 0563 * This function enables the software reset and FIFO reset of SAI Tx. After reset, clear the reset bit. 0564 * 0565 * @param base SAI base pointer 0566 */ 0567 void SAI_TxReset(I2S_Type *base); 0568 0569 /*! 0570 * @brief Resets the SAI Rx. 0571 * 0572 * This function enables the software reset and FIFO reset of SAI Rx. After reset, clear the reset bit. 0573 * 0574 * @param base SAI base pointer 0575 */ 0576 void SAI_RxReset(I2S_Type *base); 0577 0578 /*! 0579 * @brief Enables/disables the SAI Tx. 0580 * 0581 * @param base SAI base pointer. 0582 * @param enable True means enable SAI Tx, false means disable. 0583 */ 0584 void SAI_TxEnable(I2S_Type *base, bool enable); 0585 0586 /*! 0587 * @brief Enables/disables the SAI Rx. 0588 * 0589 * @param base SAI base pointer. 0590 * @param enable True means enable SAI Rx, false means disable. 0591 */ 0592 void SAI_RxEnable(I2S_Type *base, bool enable); 0593 0594 /*! 0595 * @brief Set Rx bit clock direction. 0596 * 0597 * Select bit clock direction, master or slave. 0598 * 0599 * @param base SAI base pointer. 0600 * @param masterSlave reference sai_master_slave_t. 0601 */ 0602 static inline void SAI_TxSetBitClockDirection(I2S_Type *base, sai_master_slave_t masterSlave) 0603 { 0604 if (masterSlave == kSAI_Master) 0605 { 0606 base->TCR2 |= I2S_TCR2_BCD_MASK; 0607 } 0608 else 0609 { 0610 base->TCR2 &= ~I2S_TCR2_BCD_MASK; 0611 } 0612 } 0613 0614 /*! 0615 * @brief Set Rx bit clock direction. 0616 * 0617 * Select bit clock direction, master or slave. 0618 * 0619 * @param base SAI base pointer. 0620 * @param masterSlave reference sai_master_slave_t. 0621 */ 0622 static inline void SAI_RxSetBitClockDirection(I2S_Type *base, sai_master_slave_t masterSlave) 0623 { 0624 if (masterSlave == kSAI_Master) 0625 { 0626 base->RCR2 |= I2S_RCR2_BCD_MASK; 0627 } 0628 else 0629 { 0630 base->RCR2 &= ~I2S_RCR2_BCD_MASK; 0631 } 0632 } 0633 0634 /*! 0635 * @brief Set Rx frame sync direction. 0636 * 0637 * Select frame sync direction, master or slave. 0638 * 0639 * @param base SAI base pointer. 0640 * @param masterSlave reference sai_master_slave_t. 0641 */ 0642 static inline void SAI_RxSetFrameSyncDirection(I2S_Type *base, sai_master_slave_t masterSlave) 0643 { 0644 if (masterSlave == kSAI_Master) 0645 { 0646 base->RCR4 |= I2S_RCR4_FSD_MASK; 0647 } 0648 else 0649 { 0650 base->RCR4 &= ~I2S_RCR4_FSD_MASK; 0651 } 0652 } 0653 0654 /*! 0655 * @brief Set Tx frame sync direction. 0656 * 0657 * Select frame sync direction, master or slave. 0658 * 0659 * @param base SAI base pointer. 0660 * @param masterSlave reference sai_master_slave_t. 0661 */ 0662 static inline void SAI_TxSetFrameSyncDirection(I2S_Type *base, sai_master_slave_t masterSlave) 0663 { 0664 if (masterSlave == kSAI_Master) 0665 { 0666 base->TCR4 |= I2S_TCR4_FSD_MASK; 0667 } 0668 else 0669 { 0670 base->TCR4 &= ~I2S_TCR4_FSD_MASK; 0671 } 0672 } 0673 0674 /*! 0675 * @brief Transmitter bit clock rate configurations. 0676 * 0677 * @param base SAI base pointer. 0678 * @param sourceClockHz Bit clock source frequency. 0679 * @param sampleRate Audio data sample rate. 0680 * @param bitWidth Audio data bitWidth. 0681 * @param channelNumbers Audio channel numbers. 0682 */ 0683 void SAI_TxSetBitClockRate( 0684 I2S_Type *base, uint32_t sourceClockHz, uint32_t sampleRate, uint32_t bitWidth, uint32_t channelNumbers); 0685 0686 /*! 0687 * @brief Receiver bit clock rate configurations. 0688 * 0689 * @param base SAI base pointer. 0690 * @param sourceClockHz Bit clock source frequency. 0691 * @param sampleRate Audio data sample rate. 0692 * @param bitWidth Audio data bitWidth. 0693 * @param channelNumbers Audio channel numbers. 0694 */ 0695 void SAI_RxSetBitClockRate( 0696 I2S_Type *base, uint32_t sourceClockHz, uint32_t sampleRate, uint32_t bitWidth, uint32_t channelNumbers); 0697 0698 /*! 0699 * @brief Transmitter Bit clock configurations. 0700 * 0701 * @param base SAI base pointer. 0702 * @param masterSlave master or slave. 0703 * @param config bit clock other configurations, can be NULL in slave mode. 0704 */ 0705 void SAI_TxSetBitclockConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_bit_clock_t *config); 0706 0707 /*! 0708 * @brief Receiver Bit clock configurations. 0709 * 0710 * @param base SAI base pointer. 0711 * @param masterSlave master or slave. 0712 * @param config bit clock other configurations, can be NULL in slave mode. 0713 */ 0714 void SAI_RxSetBitclockConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_bit_clock_t *config); 0715 0716 #if (defined(FSL_FEATURE_SAI_HAS_MCR) && (FSL_FEATURE_SAI_HAS_MCR)) || \ 0717 (defined(FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER) && (FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER)) 0718 /*! 0719 * @brief Master clock configurations. 0720 * 0721 * @param base SAI base pointer. 0722 * @param config master clock configurations. 0723 */ 0724 void SAI_SetMasterClockConfig(I2S_Type *base, sai_master_clock_t *config); 0725 #endif 0726 0727 #if FSL_SAI_HAS_FIFO_EXTEND_FEATURE 0728 /*! 0729 * @brief SAI transmitter fifo configurations. 0730 * 0731 * @param base SAI base pointer. 0732 * @param config fifo configurations. 0733 */ 0734 void SAI_TxSetFifoConfig(I2S_Type *base, sai_fifo_t *config); 0735 0736 /*! 0737 * @brief SAI receiver fifo configurations. 0738 * 0739 * @param base SAI base pointer. 0740 * @param config fifo configurations. 0741 */ 0742 void SAI_RxSetFifoConfig(I2S_Type *base, sai_fifo_t *config); 0743 #endif 0744 0745 /*! 0746 * @brief SAI transmitter Frame sync configurations. 0747 * 0748 * @param base SAI base pointer. 0749 * @param masterSlave master or slave. 0750 * @param config frame sync configurations, can be NULL in slave mode. 0751 */ 0752 void SAI_TxSetFrameSyncConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_frame_sync_t *config); 0753 0754 /*! 0755 * @brief SAI receiver Frame sync configurations. 0756 * 0757 * @param base SAI base pointer. 0758 * @param masterSlave master or slave. 0759 * @param config frame sync configurations, can be NULL in slave mode. 0760 */ 0761 void SAI_RxSetFrameSyncConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_frame_sync_t *config); 0762 0763 /*! 0764 * @brief SAI transmitter Serial data configurations. 0765 * 0766 * @param base SAI base pointer. 0767 * @param config serial data configurations. 0768 */ 0769 void SAI_TxSetSerialDataConfig(I2S_Type *base, sai_serial_data_t *config); 0770 0771 /*! 0772 * @brief SAI receiver Serial data configurations. 0773 * 0774 * @param base SAI base pointer. 0775 * @param config serial data configurations. 0776 */ 0777 void SAI_RxSetSerialDataConfig(I2S_Type *base, sai_serial_data_t *config); 0778 0779 /*! 0780 * @brief SAI transmitter configurations. 0781 * 0782 * @param base SAI base pointer. 0783 * @param config transmitter configurations. 0784 */ 0785 void SAI_TxSetConfig(I2S_Type *base, sai_transceiver_t *config); 0786 0787 /*! 0788 * @brief SAI receiver configurations. 0789 * 0790 * @param base SAI base pointer. 0791 * @param config receiver configurations. 0792 */ 0793 void SAI_RxSetConfig(I2S_Type *base, sai_transceiver_t *config); 0794 0795 /*! 0796 * @brief Get classic I2S mode configurations. 0797 * 0798 * @param config transceiver configurations. 0799 * @param bitWidth audio data bitWidth. 0800 * @param mode audio data channel. 0801 * @param saiChannelMask mask value of the channel to be enable. 0802 */ 0803 void SAI_GetClassicI2SConfig(sai_transceiver_t *config, 0804 sai_word_width_t bitWidth, 0805 sai_mono_stereo_t mode, 0806 uint32_t saiChannelMask); 0807 0808 /*! 0809 * @brief Get left justified mode configurations. 0810 * 0811 * @param config transceiver configurations. 0812 * @param bitWidth audio data bitWidth. 0813 * @param mode audio data channel. 0814 * @param saiChannelMask mask value of the channel to be enable. 0815 */ 0816 void SAI_GetLeftJustifiedConfig(sai_transceiver_t *config, 0817 sai_word_width_t bitWidth, 0818 sai_mono_stereo_t mode, 0819 uint32_t saiChannelMask); 0820 0821 /*! 0822 * @brief Get right justified mode configurations. 0823 * 0824 * @param config transceiver configurations. 0825 * @param bitWidth audio data bitWidth. 0826 * @param mode audio data channel. 0827 * @param saiChannelMask mask value of the channel to be enable. 0828 */ 0829 void SAI_GetRightJustifiedConfig(sai_transceiver_t *config, 0830 sai_word_width_t bitWidth, 0831 sai_mono_stereo_t mode, 0832 uint32_t saiChannelMask); 0833 0834 /*! 0835 * @brief Get TDM mode configurations. 0836 * 0837 * @param config transceiver configurations. 0838 * @param frameSyncWidth length of frame sync. 0839 * @param bitWidth audio data word width. 0840 * @param dataWordNum word number in one frame. 0841 * @param saiChannelMask mask value of the channel to be enable. 0842 */ 0843 void SAI_GetTDMConfig(sai_transceiver_t *config, 0844 sai_frame_sync_len_t frameSyncWidth, 0845 sai_word_width_t bitWidth, 0846 uint32_t dataWordNum, 0847 uint32_t saiChannelMask); 0848 0849 /*! 0850 * @brief Get DSP mode configurations. 0851 * 0852 * @note DSP mode is also called PCM mode which support MODE A and MODE B, 0853 * DSP/PCM MODE A configuration flow. RX is similiar but uses SAI_RxSetConfig instead of SAI_TxSetConfig: 0854 * @code 0855 * SAI_GetDSPConfig(config, kSAI_FrameSyncLenOneBitClk, bitWidth, kSAI_Stereo, channelMask) 0856 * config->frameSync.frameSyncEarly = true; 0857 * SAI_TxSetConfig(base, config) 0858 * @endcode 0859 * 0860 * DSP/PCM MODE B configuration flow for TX. RX is similiar but uses SAI_RxSetConfig instead of SAI_TxSetConfig: 0861 * @code 0862 * SAI_GetDSPConfig(config, kSAI_FrameSyncLenOneBitClk, bitWidth, kSAI_Stereo, channelMask) 0863 * SAI_TxSetConfig(base, config) 0864 * @endcode 0865 * 0866 * @param config transceiver configurations. 0867 * @param frameSyncWidth length of frame sync. 0868 * @param bitWidth audio data bitWidth. 0869 * @param mode audio data channel. 0870 * @param saiChannelMask mask value of the channel to enable. 0871 */ 0872 void SAI_GetDSPConfig(sai_transceiver_t *config, 0873 sai_frame_sync_len_t frameSyncWidth, 0874 sai_word_width_t bitWidth, 0875 sai_mono_stereo_t mode, 0876 uint32_t saiChannelMask); 0877 /*! @} */ 0878 0879 /*! 0880 * @name Status 0881 * @{ 0882 */ 0883 0884 /*! 0885 * @brief Gets the SAI Tx status flag state. 0886 * 0887 * @param base SAI base pointer 0888 * @return SAI Tx status flag value. Use the Status Mask to get the status value needed. 0889 */ 0890 static inline uint32_t SAI_TxGetStatusFlag(I2S_Type *base) 0891 { 0892 return base->TCSR; 0893 } 0894 0895 /*! 0896 * @brief Clears the SAI Tx status flag state. 0897 * 0898 * @param base SAI base pointer 0899 * @param mask State mask. It can be a combination of the following source if defined: 0900 * @arg kSAI_WordStartFlag 0901 * @arg kSAI_SyncErrorFlag 0902 * @arg kSAI_FIFOErrorFlag 0903 */ 0904 static inline void SAI_TxClearStatusFlags(I2S_Type *base, uint32_t mask) 0905 { 0906 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | mask); 0907 } 0908 0909 /*! 0910 * @brief Gets the SAI Tx status flag state. 0911 * 0912 * @param base SAI base pointer 0913 * @return SAI Rx status flag value. Use the Status Mask to get the status value needed. 0914 */ 0915 static inline uint32_t SAI_RxGetStatusFlag(I2S_Type *base) 0916 { 0917 return base->RCSR; 0918 } 0919 0920 /*! 0921 * @brief Clears the SAI Rx status flag state. 0922 * 0923 * @param base SAI base pointer 0924 * @param mask State mask. It can be a combination of the following sources if defined. 0925 * @arg kSAI_WordStartFlag 0926 * @arg kSAI_SyncErrorFlag 0927 * @arg kSAI_FIFOErrorFlag 0928 */ 0929 static inline void SAI_RxClearStatusFlags(I2S_Type *base, uint32_t mask) 0930 { 0931 base->RCSR = ((base->RCSR & 0xFFE3FFFFU) | mask); 0932 } 0933 0934 /*! 0935 * @brief Do software reset or FIFO reset . 0936 * 0937 * FIFO reset means clear all the data in the FIFO, and make the FIFO pointer both to 0. 0938 * Software reset means clear the Tx internal logic, including the bit clock, frame count etc. But software 0939 * reset will not clear any configuration registers like TCR1~TCR5. 0940 * This function will also clear all the error flags such as FIFO error, sync error etc. 0941 * 0942 * @param base SAI base pointer 0943 * @param tresetType Reset type, FIFO reset or software reset 0944 */ 0945 void SAI_TxSoftwareReset(I2S_Type *base, sai_reset_type_t resetType); 0946 0947 /*! 0948 * @brief Do software reset or FIFO reset . 0949 * 0950 * FIFO reset means clear all the data in the FIFO, and make the FIFO pointer both to 0. 0951 * Software reset means clear the Rx internal logic, including the bit clock, frame count etc. But software 0952 * reset will not clear any configuration registers like RCR1~RCR5. 0953 * This function will also clear all the error flags such as FIFO error, sync error etc. 0954 * 0955 * @param base SAI base pointer 0956 * @param resetType Reset type, FIFO reset or software reset 0957 */ 0958 void SAI_RxSoftwareReset(I2S_Type *base, sai_reset_type_t resetType); 0959 0960 /*! 0961 * @brief Set the Tx channel FIFO enable mask. 0962 * 0963 * @param base SAI base pointer 0964 * @param mask Channel enable mask, 0 means all channel FIFO disabled, 1 means channel 0 enabled, 0965 * 3 means both channel 0 and channel 1 enabled. 0966 */ 0967 void SAI_TxSetChannelFIFOMask(I2S_Type *base, uint8_t mask); 0968 0969 /*! 0970 * @brief Set the Rx channel FIFO enable mask. 0971 * 0972 * @param base SAI base pointer 0973 * @param mask Channel enable mask, 0 means all channel FIFO disabled, 1 means channel 0 enabled, 0974 * 3 means both channel 0 and channel 1 enabled. 0975 */ 0976 void SAI_RxSetChannelFIFOMask(I2S_Type *base, uint8_t mask); 0977 0978 /*! 0979 * @brief Set the Tx data order. 0980 * 0981 * @param base SAI base pointer 0982 * @param order Data order MSB or LSB 0983 */ 0984 void SAI_TxSetDataOrder(I2S_Type *base, sai_data_order_t order); 0985 0986 /*! 0987 * @brief Set the Rx data order. 0988 * 0989 * @param base SAI base pointer 0990 * @param order Data order MSB or LSB 0991 */ 0992 void SAI_RxSetDataOrder(I2S_Type *base, sai_data_order_t order); 0993 0994 /*! 0995 * @brief Set the Tx data order. 0996 * 0997 * @param base SAI base pointer 0998 * @param polarity 0999 */ 1000 void SAI_TxSetBitClockPolarity(I2S_Type *base, sai_clock_polarity_t polarity); 1001 1002 /*! 1003 * @brief Set the Rx data order. 1004 * 1005 * @param base SAI base pointer 1006 * @param polarity 1007 */ 1008 void SAI_RxSetBitClockPolarity(I2S_Type *base, sai_clock_polarity_t polarity); 1009 1010 /*! 1011 * @brief Set the Tx data order. 1012 * 1013 * @param base SAI base pointer 1014 * @param polarity 1015 */ 1016 void SAI_TxSetFrameSyncPolarity(I2S_Type *base, sai_clock_polarity_t polarity); 1017 1018 /*! 1019 * @brief Set the Rx data order. 1020 * 1021 * @param base SAI base pointer 1022 * @param polarity 1023 */ 1024 void SAI_RxSetFrameSyncPolarity(I2S_Type *base, sai_clock_polarity_t polarity); 1025 1026 #if defined(FSL_FEATURE_SAI_HAS_FIFO_PACKING) && FSL_FEATURE_SAI_HAS_FIFO_PACKING 1027 /*! 1028 * @brief Set Tx FIFO packing feature. 1029 * 1030 * @param base SAI base pointer. 1031 * @param pack FIFO pack type. It is element of sai_fifo_packing_t. 1032 */ 1033 void SAI_TxSetFIFOPacking(I2S_Type *base, sai_fifo_packing_t pack); 1034 1035 /*! 1036 * @brief Set Rx FIFO packing feature. 1037 * 1038 * @param base SAI base pointer. 1039 * @param pack FIFO pack type. It is element of sai_fifo_packing_t. 1040 */ 1041 void SAI_RxSetFIFOPacking(I2S_Type *base, sai_fifo_packing_t pack); 1042 #endif /* FSL_FEATURE_SAI_HAS_FIFO_PACKING */ 1043 1044 #if defined(FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR) && FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR 1045 /*! 1046 * @brief Set Tx FIFO error continue. 1047 * 1048 * FIFO error continue mode means SAI will keep running while FIFO error occurred. If this feature 1049 * not enabled, SAI will hang and users need to clear FEF flag in TCSR register. 1050 * 1051 * @param base SAI base pointer. 1052 * @param isEnabled Is FIFO error continue enabled, true means enable, false means disable. 1053 */ 1054 static inline void SAI_TxSetFIFOErrorContinue(I2S_Type *base, bool isEnabled) 1055 { 1056 if (isEnabled) 1057 { 1058 base->TCR4 |= I2S_TCR4_FCONT_MASK; 1059 } 1060 else 1061 { 1062 base->TCR4 &= ~I2S_TCR4_FCONT_MASK; 1063 } 1064 } 1065 1066 /*! 1067 * @brief Set Rx FIFO error continue. 1068 * 1069 * FIFO error continue mode means SAI will keep running while FIFO error occurred. If this feature 1070 * not enabled, SAI will hang and users need to clear FEF flag in RCSR register. 1071 * 1072 * @param base SAI base pointer. 1073 * @param isEnabled Is FIFO error continue enabled, true means enable, false means disable. 1074 */ 1075 static inline void SAI_RxSetFIFOErrorContinue(I2S_Type *base, bool isEnabled) 1076 { 1077 if (isEnabled) 1078 { 1079 base->RCR4 |= I2S_RCR4_FCONT_MASK; 1080 } 1081 else 1082 { 1083 base->RCR4 &= ~I2S_RCR4_FCONT_MASK; 1084 } 1085 } 1086 #endif 1087 1088 /*! @} */ 1089 1090 /*! 1091 * @name Interrupts 1092 * @{ 1093 */ 1094 1095 /*! 1096 * @brief Enables the SAI Tx interrupt requests. 1097 * 1098 * @param base SAI base pointer 1099 * @param mask interrupt source 1100 * The parameter can be a combination of the following sources if defined. 1101 * @arg kSAI_WordStartInterruptEnable 1102 * @arg kSAI_SyncErrorInterruptEnable 1103 * @arg kSAI_FIFOWarningInterruptEnable 1104 * @arg kSAI_FIFORequestInterruptEnable 1105 * @arg kSAI_FIFOErrorInterruptEnable 1106 */ 1107 static inline void SAI_TxEnableInterrupts(I2S_Type *base, uint32_t mask) 1108 { 1109 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | mask); 1110 } 1111 1112 /*! 1113 * @brief Enables the SAI Rx interrupt requests. 1114 * 1115 * @param base SAI base pointer 1116 * @param mask interrupt source 1117 * The parameter can be a combination of the following sources if defined. 1118 * @arg kSAI_WordStartInterruptEnable 1119 * @arg kSAI_SyncErrorInterruptEnable 1120 * @arg kSAI_FIFOWarningInterruptEnable 1121 * @arg kSAI_FIFORequestInterruptEnable 1122 * @arg kSAI_FIFOErrorInterruptEnable 1123 */ 1124 static inline void SAI_RxEnableInterrupts(I2S_Type *base, uint32_t mask) 1125 { 1126 base->RCSR = ((base->RCSR & 0xFFE3FFFFU) | mask); 1127 } 1128 1129 /*! 1130 * @brief Disables the SAI Tx interrupt requests. 1131 * 1132 * @param base SAI base pointer 1133 * @param mask interrupt source 1134 * The parameter can be a combination of the following sources if defined. 1135 * @arg kSAI_WordStartInterruptEnable 1136 * @arg kSAI_SyncErrorInterruptEnable 1137 * @arg kSAI_FIFOWarningInterruptEnable 1138 * @arg kSAI_FIFORequestInterruptEnable 1139 * @arg kSAI_FIFOErrorInterruptEnable 1140 */ 1141 static inline void SAI_TxDisableInterrupts(I2S_Type *base, uint32_t mask) 1142 { 1143 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) & (~mask)); 1144 } 1145 1146 /*! 1147 * @brief Disables the SAI Rx interrupt requests. 1148 * 1149 * @param base SAI base pointer 1150 * @param mask interrupt source 1151 * The parameter can be a combination of the following sources if defined. 1152 * @arg kSAI_WordStartInterruptEnable 1153 * @arg kSAI_SyncErrorInterruptEnable 1154 * @arg kSAI_FIFOWarningInterruptEnable 1155 * @arg kSAI_FIFORequestInterruptEnable 1156 * @arg kSAI_FIFOErrorInterruptEnable 1157 */ 1158 static inline void SAI_RxDisableInterrupts(I2S_Type *base, uint32_t mask) 1159 { 1160 base->RCSR = ((base->RCSR & 0xFFE3FFFFU) & (~mask)); 1161 } 1162 1163 /*! @} */ 1164 1165 /*! 1166 * @name DMA Control 1167 * @{ 1168 */ 1169 1170 /*! 1171 * @brief Enables/disables the SAI Tx DMA requests. 1172 * @param base SAI base pointer 1173 * @param mask DMA source 1174 * The parameter can be combination of the following sources if defined. 1175 * @arg kSAI_FIFOWarningDMAEnable 1176 * @arg kSAI_FIFORequestDMAEnable 1177 * @param enable True means enable DMA, false means disable DMA. 1178 */ 1179 static inline void SAI_TxEnableDMA(I2S_Type *base, uint32_t mask, bool enable) 1180 { 1181 if (enable) 1182 { 1183 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | mask); 1184 } 1185 else 1186 { 1187 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) & (~mask)); 1188 } 1189 } 1190 1191 /*! 1192 * @brief Enables/disables the SAI Rx DMA requests. 1193 * @param base SAI base pointer 1194 * @param mask DMA source 1195 * The parameter can be a combination of the following sources if defined. 1196 * @arg kSAI_FIFOWarningDMAEnable 1197 * @arg kSAI_FIFORequestDMAEnable 1198 * @param enable True means enable DMA, false means disable DMA. 1199 */ 1200 static inline void SAI_RxEnableDMA(I2S_Type *base, uint32_t mask, bool enable) 1201 { 1202 if (enable) 1203 { 1204 base->RCSR = ((base->RCSR & 0xFFE3FFFFU) | mask); 1205 } 1206 else 1207 { 1208 base->RCSR = ((base->RCSR & 0xFFE3FFFFU) & (~mask)); 1209 } 1210 } 1211 1212 /*! 1213 * @brief Gets the SAI Tx data register address. 1214 * 1215 * This API is used to provide a transfer address for the SAI DMA transfer configuration. 1216 * 1217 * @param base SAI base pointer. 1218 * @param channel Which data channel used. 1219 * @return data register address. 1220 */ 1221 static inline uintptr_t SAI_TxGetDataRegisterAddress(I2S_Type *base, uint32_t channel) 1222 { 1223 return (uintptr_t)(&(base->TDR)[channel]); 1224 } 1225 1226 /*! 1227 * @brief Gets the SAI Rx data register address. 1228 * 1229 * This API is used to provide a transfer address for the SAI DMA transfer configuration. 1230 * 1231 * @param base SAI base pointer. 1232 * @param channel Which data channel used. 1233 * @return data register address. 1234 */ 1235 static inline uintptr_t SAI_RxGetDataRegisterAddress(I2S_Type *base, uint32_t channel) 1236 { 1237 return (uintptr_t)(&(base->RDR)[channel]); 1238 } 1239 1240 /*! @} */ 1241 1242 /*! 1243 * @name Bus Operations 1244 * @{ 1245 */ 1246 1247 /*! 1248 * @brief Configures the SAI Tx audio format. 1249 * @deprecated Do not use this function. It has been superceded by @ref SAI_TxSetConfig 1250 * 1251 * The audio format can be changed at run-time. This function configures the sample rate and audio data 1252 * format to be transferred. 1253 * 1254 * @param base SAI base pointer. 1255 * @param format Pointer to the SAI audio data format structure. 1256 * @param mclkSourceClockHz SAI master clock source frequency in Hz. 1257 * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If the bit clock source is a master 1258 * clock, this value should equal the masterClockHz. 1259 */ 1260 void SAI_TxSetFormat(I2S_Type *base, 1261 sai_transfer_format_t *format, 1262 uint32_t mclkSourceClockHz, 1263 uint32_t bclkSourceClockHz); 1264 1265 /*! 1266 * @brief Configures the SAI Rx audio format. 1267 * @deprecated Do not use this function. It has been superceded by @ref SAI_RxSetConfig 1268 * 1269 * The audio format can be changed at run-time. This function configures the sample rate and audio data 1270 * format to be transferred. 1271 * 1272 * @param base SAI base pointer. 1273 * @param format Pointer to the SAI audio data format structure. 1274 * @param mclkSourceClockHz SAI master clock source frequency in Hz. 1275 * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If the bit clock source is a master 1276 * clock, this value should equal the masterClockHz. 1277 */ 1278 void SAI_RxSetFormat(I2S_Type *base, 1279 sai_transfer_format_t *format, 1280 uint32_t mclkSourceClockHz, 1281 uint32_t bclkSourceClockHz); 1282 1283 /*! 1284 * @brief Sends data using a blocking method. 1285 * 1286 * @note This function blocks by polling until data is ready to be sent. 1287 * 1288 * @param base SAI base pointer. 1289 * @param channel Data channel used. 1290 * @param bitWidth How many bits in an audio word; usually 8/16/24/32 bits. 1291 * @param buffer Pointer to the data to be written. 1292 * @param size Bytes to be written. 1293 */ 1294 void SAI_WriteBlocking(I2S_Type *base, uint32_t channel, uint32_t bitWidth, uint8_t *buffer, uint32_t size); 1295 1296 /*! 1297 * @brief Sends data to multi channel using a blocking method. 1298 * 1299 * @note This function blocks by polling until data is ready to be sent. 1300 * 1301 * @param base SAI base pointer. 1302 * @param channel Data channel used. 1303 * @param channelMask channel mask. 1304 * @param bitWidth How many bits in an audio word; usually 8/16/24/32 bits. 1305 * @param buffer Pointer to the data to be written. 1306 * @param size Bytes to be written. 1307 */ 1308 void SAI_WriteMultiChannelBlocking( 1309 I2S_Type *base, uint32_t channel, uint32_t channelMask, uint32_t bitWidth, uint8_t *buffer, uint32_t size); 1310 1311 /*! 1312 * @brief Writes data into SAI FIFO. 1313 * 1314 * @param base SAI base pointer. 1315 * @param channel Data channel used. 1316 * @param data Data needs to be written. 1317 */ 1318 static inline void SAI_WriteData(I2S_Type *base, uint32_t channel, uint32_t data) 1319 { 1320 base->TDR[channel] = data; 1321 } 1322 1323 /*! 1324 * @brief Receives data using a blocking method. 1325 * 1326 * @note This function blocks by polling until data is ready to be sent. 1327 * 1328 * @param base SAI base pointer. 1329 * @param channel Data channel used. 1330 * @param bitWidth How many bits in an audio word; usually 8/16/24/32 bits. 1331 * @param buffer Pointer to the data to be read. 1332 * @param size Bytes to be read. 1333 */ 1334 void SAI_ReadBlocking(I2S_Type *base, uint32_t channel, uint32_t bitWidth, uint8_t *buffer, uint32_t size); 1335 1336 /*! 1337 * @brief Receives multi channel data using a blocking method. 1338 * 1339 * @note This function blocks by polling until data is ready to be sent. 1340 * 1341 * @param base SAI base pointer. 1342 * @param channel Data channel used. 1343 * @param channelMask channel mask. 1344 * @param bitWidth How many bits in an audio word; usually 8/16/24/32 bits. 1345 * @param buffer Pointer to the data to be read. 1346 * @param size Bytes to be read. 1347 */ 1348 void SAI_ReadMultiChannelBlocking( 1349 I2S_Type *base, uint32_t channel, uint32_t channelMask, uint32_t bitWidth, uint8_t *buffer, uint32_t size); 1350 1351 /*! 1352 * @brief Reads data from the SAI FIFO. 1353 * 1354 * @param base SAI base pointer. 1355 * @param channel Data channel used. 1356 * @return Data in SAI FIFO. 1357 */ 1358 static inline uint32_t SAI_ReadData(I2S_Type *base, uint32_t channel) 1359 { 1360 return base->RDR[channel]; 1361 } 1362 1363 /*! @} */ 1364 1365 /*! 1366 * @name Transactional 1367 * @{ 1368 */ 1369 1370 /*! 1371 * @brief Initializes the SAI Tx handle. 1372 * 1373 * This function initializes the Tx handle for the SAI Tx transactional APIs. Call 1374 * this function once to get the handle initialized. 1375 * 1376 * @param base SAI base pointer 1377 * @param handle SAI handle pointer. 1378 * @param callback Pointer to the user callback function. 1379 * @param userData User parameter passed to the callback function 1380 */ 1381 void SAI_TransferTxCreateHandle(I2S_Type *base, sai_handle_t *handle, sai_transfer_callback_t callback, void *userData); 1382 1383 /*! 1384 * @brief Initializes the SAI Rx handle. 1385 * 1386 * This function initializes the Rx handle for the SAI Rx transactional APIs. Call 1387 * this function once to get the handle initialized. 1388 * 1389 * @param base SAI base pointer. 1390 * @param handle SAI handle pointer. 1391 * @param callback Pointer to the user callback function. 1392 * @param userData User parameter passed to the callback function. 1393 */ 1394 void SAI_TransferRxCreateHandle(I2S_Type *base, sai_handle_t *handle, sai_transfer_callback_t callback, void *userData); 1395 1396 /*! 1397 * @brief SAI transmitter transfer configurations. 1398 * 1399 * This function initializes the Tx, include bit clock, frame sync, master clock, serial data and fifo 1400 * configurations. 1401 * 1402 * @param base SAI base pointer. 1403 * @param handle SAI handle pointer. 1404 * @param config tranmitter configurations. 1405 */ 1406 void SAI_TransferTxSetConfig(I2S_Type *base, sai_handle_t *handle, sai_transceiver_t *config); 1407 1408 /*! 1409 * @brief SAI receiver transfer configurations. 1410 * 1411 * This function initializes the Rx, include bit clock, frame sync, master clock, serial data and fifo 1412 * configurations. 1413 * 1414 * @param base SAI base pointer. 1415 * @param handle SAI handle pointer. 1416 * @param config receiver configurations. 1417 */ 1418 void SAI_TransferRxSetConfig(I2S_Type *base, sai_handle_t *handle, sai_transceiver_t *config); 1419 1420 /*! 1421 * @brief Configures the SAI Tx audio format. 1422 * @deprecated Do not use this function. It has been superceded by @ref SAI_TransferTxSetConfig 1423 * 1424 * The audio format can be changed at run-time. This function configures the sample rate and audio data 1425 * format to be transferred. 1426 * 1427 * @param base SAI base pointer. 1428 * @param handle SAI handle pointer. 1429 * @param format Pointer to the SAI audio data format structure. 1430 * @param mclkSourceClockHz SAI master clock source frequency in Hz. 1431 * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If a bit clock source is a master 1432 * clock, this value should equal the masterClockHz in format. 1433 * @return Status of this function. Return value is the status_t. 1434 */ 1435 status_t SAI_TransferTxSetFormat(I2S_Type *base, 1436 sai_handle_t *handle, 1437 sai_transfer_format_t *format, 1438 uint32_t mclkSourceClockHz, 1439 uint32_t bclkSourceClockHz); 1440 1441 /*! 1442 * @brief Configures the SAI Rx audio format. 1443 * @deprecated Do not use this function. It has been superceded by @ref SAI_TransferRxSetConfig 1444 * 1445 * The audio format can be changed at run-time. This function configures the sample rate and audio data 1446 * format to be transferred. 1447 * 1448 * @param base SAI base pointer. 1449 * @param handle SAI handle pointer. 1450 * @param format Pointer to the SAI audio data format structure. 1451 * @param mclkSourceClockHz SAI master clock source frequency in Hz. 1452 * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If a bit clock source is a master 1453 * clock, this value should equal the masterClockHz in format. 1454 * @return Status of this function. Return value is one of status_t. 1455 */ 1456 status_t SAI_TransferRxSetFormat(I2S_Type *base, 1457 sai_handle_t *handle, 1458 sai_transfer_format_t *format, 1459 uint32_t mclkSourceClockHz, 1460 uint32_t bclkSourceClockHz); 1461 1462 /*! 1463 * @brief Performs an interrupt non-blocking send transfer on SAI. 1464 * 1465 * @note This API returns immediately after the transfer initiates. 1466 * Call the SAI_TxGetTransferStatusIRQ to poll the transfer status and check whether 1467 * the transfer is finished. If the return status is not kStatus_SAI_Busy, the transfer 1468 * is finished. 1469 * 1470 * @param base SAI base pointer. 1471 * @param handle Pointer to the sai_handle_t structure which stores the transfer state. 1472 * @param xfer Pointer to the sai_transfer_t structure. 1473 * @retval kStatus_Success Successfully started the data receive. 1474 * @retval kStatus_SAI_TxBusy Previous receive still not finished. 1475 * @retval kStatus_InvalidArgument The input parameter is invalid. 1476 */ 1477 status_t SAI_TransferSendNonBlocking(I2S_Type *base, sai_handle_t *handle, sai_transfer_t *xfer); 1478 1479 /*! 1480 * @brief Performs an interrupt non-blocking receive transfer on SAI. 1481 * 1482 * @note This API returns immediately after the transfer initiates. 1483 * Call the SAI_RxGetTransferStatusIRQ to poll the transfer status and check whether 1484 * the transfer is finished. If the return status is not kStatus_SAI_Busy, the transfer 1485 * is finished. 1486 * 1487 * @param base SAI base pointer 1488 * @param handle Pointer to the sai_handle_t structure which stores the transfer state. 1489 * @param xfer Pointer to the sai_transfer_t structure. 1490 * @retval kStatus_Success Successfully started the data receive. 1491 * @retval kStatus_SAI_RxBusy Previous receive still not finished. 1492 * @retval kStatus_InvalidArgument The input parameter is invalid. 1493 */ 1494 status_t SAI_TransferReceiveNonBlocking(I2S_Type *base, sai_handle_t *handle, sai_transfer_t *xfer); 1495 1496 /*! 1497 * @brief Gets a set byte count. 1498 * 1499 * @param base SAI base pointer. 1500 * @param handle Pointer to the sai_handle_t structure which stores the transfer state. 1501 * @param count Bytes count sent. 1502 * @retval kStatus_Success Succeed get the transfer count. 1503 * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress. 1504 */ 1505 status_t SAI_TransferGetSendCount(I2S_Type *base, sai_handle_t *handle, size_t *count); 1506 1507 /*! 1508 * @brief Gets a received byte count. 1509 * 1510 * @param base SAI base pointer. 1511 * @param handle Pointer to the sai_handle_t structure which stores the transfer state. 1512 * @param count Bytes count received. 1513 * @retval kStatus_Success Succeed get the transfer count. 1514 * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress. 1515 */ 1516 status_t SAI_TransferGetReceiveCount(I2S_Type *base, sai_handle_t *handle, size_t *count); 1517 1518 /*! 1519 * @brief Aborts the current send. 1520 * 1521 * @note This API can be called any time when an interrupt non-blocking transfer initiates 1522 * to abort the transfer early. 1523 * 1524 * @param base SAI base pointer. 1525 * @param handle Pointer to the sai_handle_t structure which stores the transfer state. 1526 */ 1527 void SAI_TransferAbortSend(I2S_Type *base, sai_handle_t *handle); 1528 1529 /*! 1530 * @brief Aborts the current IRQ receive. 1531 * 1532 * @note This API can be called when an interrupt non-blocking transfer initiates 1533 * to abort the transfer early. 1534 * 1535 * @param base SAI base pointer 1536 * @param handle Pointer to the sai_handle_t structure which stores the transfer state. 1537 */ 1538 void SAI_TransferAbortReceive(I2S_Type *base, sai_handle_t *handle); 1539 1540 /*! 1541 * @brief Terminate all SAI send. 1542 * 1543 * This function will clear all transfer slots buffered in the sai queue. If users only want to abort the 1544 * current transfer slot, please call SAI_TransferAbortSend. 1545 * 1546 * @param base SAI base pointer. 1547 * @param handle SAI eDMA handle pointer. 1548 */ 1549 void SAI_TransferTerminateSend(I2S_Type *base, sai_handle_t *handle); 1550 1551 /*! 1552 * @brief Terminate all SAI receive. 1553 * 1554 * This function will clear all transfer slots buffered in the sai queue. If users only want to abort the 1555 * current transfer slot, please call SAI_TransferAbortReceive. 1556 * 1557 * @param base SAI base pointer. 1558 * @param handle SAI eDMA handle pointer. 1559 */ 1560 void SAI_TransferTerminateReceive(I2S_Type *base, sai_handle_t *handle); 1561 1562 /*! 1563 * @brief Tx interrupt handler. 1564 * 1565 * @param base SAI base pointer. 1566 * @param handle Pointer to the sai_handle_t structure. 1567 */ 1568 void SAI_TransferTxHandleIRQ(I2S_Type *base, sai_handle_t *handle); 1569 1570 /*! 1571 * @brief Tx interrupt handler. 1572 * 1573 * @param base SAI base pointer. 1574 * @param handle Pointer to the sai_handle_t structure. 1575 */ 1576 void SAI_TransferRxHandleIRQ(I2S_Type *base, sai_handle_t *handle); 1577 1578 /*! @} */ 1579 1580 #if defined(__cplusplus) 1581 } 1582 #endif /*_cplusplus*/ 1583 1584 /*! @} */ 1585 1586 #endif /* _FSL_SAI_H_ */
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