drivers/rtwdog/fsl_rtwdog.c

0001 /*
0002  * Copyright (c) 2016, Freescale Semiconductor, Inc.
0003  * Copyright 2016-2019 NXP
0004  * All rights reserved.
0005  *
0006  * SPDX-License-Identifier: BSD-3-Clause
0007  */
0008
0009 #include "fsl_rtwdog.h"
0010
0011 /* Component ID definition, used by tools. */
0012 #ifndef FSL_COMPONENT_ID
0013 #define FSL_COMPONENT_ID "platform.drivers.rtwdog"
0014 #endif
0015
0016 /*******************************************************************************
0017  * Code
0018  ******************************************************************************/
0019
0020 /*!
0021  * brief Clears the RTWDOG flag.
0022  *
0023  * This function clears the RTWDOG status flag.
0024  *
0025  * Example to clear an interrupt flag:
0026  * code
0027  *   RTWDOG_ClearStatusFlags(wdog_base,kRTWDOG_InterruptFlag);
0028  * endcode
0029  * param base        RTWDOG peripheral base address.
0030  * param mask        The status flags to clear.
0031  *                    The parameter can be any combination of the following values:
0032  *                    arg kRTWDOG_InterruptFlag
0033  */
0034 void RTWDOG_ClearStatusFlags(RTWDOG_Type *base, uint32_t mask)
0035 {
0036     if ((mask & (uint32_t)kRTWDOG_InterruptFlag) != 0U)
0037     {
0038         base->CS |= RTWDOG_CS_FLG_MASK;
0039     }
0040 }
0041
0042 /*!
0043  * brief Initializes the RTWDOG configuration structure.
0044  *
0045  * This function initializes the RTWDOG configuration structure to default values. The default
0046  * values are:
0047  * code
0048  *   rtwdogConfig->enableRtwdog = true;
0049  *   rtwdogConfig->clockSource = kRTWDOG_ClockSource1;
0050  *   rtwdogConfig->prescaler = kRTWDOG_ClockPrescalerDivide1;
0051  *   rtwdogConfig->workMode.enableWait = true;
0052  *   rtwdogConfig->workMode.enableStop = false;
0053  *   rtwdogConfig->workMode.enableDebug = false;
0054  *   rtwdogConfig->testMode = kRTWDOG_TestModeDisabled;
0055  *   rtwdogConfig->enableUpdate = true;
0056  *   rtwdogConfig->enableInterrupt = false;
0057  *   rtwdogConfig->enableWindowMode = false;
0058  *   rtwdogConfig->windowValue = 0U;
0059  *   rtwdogConfig->timeoutValue = 0xFFFFU;
0060  * endcode
0061  *
0062  * param config Pointer to the RTWDOG configuration structure.
0063  * see rtwdog_config_t
0064  */
0065 void RTWDOG_GetDefaultConfig(rtwdog_config_t *config)
0066 {
0067     assert(config != NULL);
0068
0069     /* Initializes the configure structure to zero. */
0070     (void)memset(config, 0, sizeof(*config));
0071
0072     config->enableRtwdog         = true;
0073     config->clockSource          = kRTWDOG_ClockSource1;
0074     config->prescaler            = kRTWDOG_ClockPrescalerDivide1;
0075     config->workMode.enableWait  = true;
0076     config->workMode.enableStop  = false;
0077     config->workMode.enableDebug = false;
0078     config->testMode             = kRTWDOG_TestModeDisabled;
0079     config->enableUpdate         = true;
0080     config->enableInterrupt      = false;
0081     config->enableWindowMode     = false;
0082     config->windowValue          = 0U;
0083     config->timeoutValue         = 0xFFFFU;
0084 }
0085
0086 /*!
0087  * brief Initializes the RTWDOG module.
0088  *
0089  * This function initializes the RTWDOG.
0090  * To reconfigure the RTWDOG without forcing a reset first, enableUpdate must be set to true
0091  * in the configuration.
0092  *
0093  * Example:
0094  * code
0095  *   rtwdog_config_t config;
0096  *   RTWDOG_GetDefaultConfig(&config);
0097  *   config.timeoutValue = 0x7ffU;
0098  *   config.enableUpdate = true;
0099  *   RTWDOG_Init(wdog_base,&config);
0100  * endcode
0101  *
0102  * param base   RTWDOG peripheral base address.
0103  * param config The configuration of the RTWDOG.
0104  */
0105 void RTWDOG_Init(RTWDOG_Type *base, const rtwdog_config_t *config)
0106 {
0107     assert(NULL != config);
0108
0109     uint32_t value        = 0U;
0110     uint32_t primaskValue = 0U;
0111
0112     value = RTWDOG_CS_EN(config->enableRtwdog) | RTWDOG_CS_CLK(config->clockSource) |
0113             RTWDOG_CS_INT(config->enableInterrupt) | RTWDOG_CS_WIN(config->enableWindowMode) |
0114             RTWDOG_CS_UPDATE(config->enableUpdate) | RTWDOG_CS_DBG(config->workMode.enableDebug) |
0115             RTWDOG_CS_STOP(config->workMode.enableStop) | RTWDOG_CS_WAIT(config->workMode.enableWait) |
0116             RTWDOG_CS_PRES(config->prescaler) | RTWDOG_CS_CMD32EN(1U) | RTWDOG_CS_TST(config->testMode);
0117
0118     /* Disable the global interrupts. Otherwise, an interrupt could effectively invalidate the unlock sequence
0119      * and the WCT may expire. After the configuration finishes, re-enable the global interrupts. */
0120     primaskValue = DisableGlobalIRQ();
0121     RTWDOG_Unlock(base);
0122     base->WIN   = config->windowValue;
0123     base->TOVAL = config->timeoutValue;
0124     base->CS    = value;
0125     while ((base->CS & RTWDOG_CS_RCS_MASK) == 0U)
0126     {
0127     }
0128     EnableGlobalIRQ(primaskValue);
0129 }
0130
0131 /*!
0132  * brief De-initializes the RTWDOG module.
0133  *
0134  * This function shuts down the RTWDOG.
0135  * Ensure that the WDOG_CS.UPDATE is 1, which means that the register update is enabled.
0136  *
0137  * param base   RTWDOG peripheral base address.
0138  */
0139 void RTWDOG_Deinit(RTWDOG_Type *base)
0140 {
0141     uint32_t primaskValue = 0U;
0142
0143     /* Disable the global interrupts */
0144     primaskValue = DisableGlobalIRQ();
0145     RTWDOG_Unlock(base);
0146     RTWDOG_Disable(base);
0147     EnableGlobalIRQ(primaskValue);
0148 }