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0001 /* 0002 * Copyright (c) 2015, Freescale Semiconductor, Inc. 0003 * Copyright 2016-2022 NXP 0004 * All rights reserved. 0005 * 0006 * SPDX-License-Identifier: BSD-3-Clause 0007 */ 0008 #ifndef _FSL_PWM_H_ 0009 #define _FSL_PWM_H_ 0010 0011 #include "fsl_common.h" 0012 0013 /*! 0014 * @addtogroup pwm_driver 0015 * @{ 0016 */ 0017 0018 /******************************************************************************* 0019 * Definitions 0020 ******************************************************************************/ 0021 /*! @name Driver version */ 0022 /*@{*/ 0023 #define FSL_PWM_DRIVER_VERSION (MAKE_VERSION(2, 5, 1)) /*!< Version 2.5.1 */ 0024 /*@}*/ 0025 0026 /*! Number of bits per submodule for software output control */ 0027 #define PWM_SUBMODULE_SWCONTROL_WIDTH 2 0028 /*! Because setting the pwm duty cycle doesn't support PWMX, getting the pwm duty cycle also doesn't support PWMX. */ 0029 #define PWM_SUBMODULE_CHANNEL 2 0030 0031 /*! @brief List of PWM submodules */ 0032 typedef enum _pwm_submodule 0033 { 0034 kPWM_Module_0 = 0U, /*!< Submodule 0 */ 0035 kPWM_Module_1, /*!< Submodule 1 */ 0036 kPWM_Module_2, /*!< Submodule 2 */ 0037 kPWM_Module_3 /*!< Submodule 3 */ 0038 } pwm_submodule_t; 0039 0040 /*! @brief List of PWM channels in each module */ 0041 typedef enum _pwm_channels 0042 { 0043 kPWM_PwmB = 0U, 0044 kPWM_PwmA, 0045 kPWM_PwmX 0046 } pwm_channels_t; 0047 0048 /*! @brief List of PWM value registers */ 0049 typedef enum _pwm_value_register 0050 { 0051 kPWM_ValueRegister_0 = 0U, /*!< PWM Value0 register */ 0052 kPWM_ValueRegister_1, /*!< PWM Value1 register */ 0053 kPWM_ValueRegister_2, /*!< PWM Value2 register */ 0054 kPWM_ValueRegister_3, /*!< PWM Value3 register */ 0055 kPWM_ValueRegister_4, /*!< PWM Value4 register */ 0056 kPWM_ValueRegister_5 /*!< PWM Value5 register */ 0057 } pwm_value_register_t; 0058 0059 /*! @brief List of PWM value registers mask */ 0060 enum _pwm_value_register_mask 0061 { 0062 kPWM_ValueRegisterMask_0 = (1U << 0), /*!< PWM Value0 register mask */ 0063 kPWM_ValueRegisterMask_1 = (1U << 1), /*!< PWM Value1 register mask */ 0064 kPWM_ValueRegisterMask_2 = (1U << 2), /*!< PWM Value2 register mask */ 0065 kPWM_ValueRegisterMask_3 = (1U << 3), /*!< PWM Value3 register mask */ 0066 kPWM_ValueRegisterMask_4 = (1U << 4), /*!< PWM Value4 register mask */ 0067 kPWM_ValueRegisterMask_5 = (1U << 5) /*!< PWM Value5 register mask */ 0068 }; 0069 0070 /*! @brief PWM clock source selection.*/ 0071 typedef enum _pwm_clock_source 0072 { 0073 kPWM_BusClock = 0U, /*!< The IPBus clock is used as the clock */ 0074 kPWM_ExternalClock, /*!< EXT_CLK is used as the clock */ 0075 kPWM_Submodule0Clock /*!< Clock of the submodule 0 (AUX_CLK) is used as the source clock */ 0076 } pwm_clock_source_t; 0077 0078 /*! @brief PWM prescaler factor selection for clock source*/ 0079 typedef enum _pwm_clock_prescale 0080 { 0081 kPWM_Prescale_Divide_1 = 0U, /*!< PWM clock frequency = fclk/1 */ 0082 kPWM_Prescale_Divide_2, /*!< PWM clock frequency = fclk/2 */ 0083 kPWM_Prescale_Divide_4, /*!< PWM clock frequency = fclk/4 */ 0084 kPWM_Prescale_Divide_8, /*!< PWM clock frequency = fclk/8 */ 0085 kPWM_Prescale_Divide_16, /*!< PWM clock frequency = fclk/16 */ 0086 kPWM_Prescale_Divide_32, /*!< PWM clock frequency = fclk/32 */ 0087 kPWM_Prescale_Divide_64, /*!< PWM clock frequency = fclk/64 */ 0088 kPWM_Prescale_Divide_128 /*!< PWM clock frequency = fclk/128 */ 0089 } pwm_clock_prescale_t; 0090 0091 /*! @brief Options that can trigger a PWM FORCE_OUT */ 0092 typedef enum _pwm_force_output_trigger 0093 { 0094 kPWM_Force_Local = 0U, /*!< The local force signal, CTRL2[FORCE], from the submodule is used to force updates */ 0095 kPWM_Force_Master, /*!< The master force signal from submodule 0 is used to force updates */ 0096 kPWM_Force_LocalReload, /*!< The local reload signal from this submodule is used to force updates without regard to 0097 the state of LDOK */ 0098 kPWM_Force_MasterReload, /*!< The master reload signal from submodule 0 is used to force updates if LDOK is set */ 0099 kPWM_Force_LocalSync, /*!< The local sync signal from this submodule is used to force updates */ 0100 kPWM_Force_MasterSync, /*!< The master sync signal from submodule0 is used to force updates */ 0101 kPWM_Force_External, /*!< The external force signal, EXT_FORCE, from outside the PWM module causes updates */ 0102 kPWM_Force_ExternalSync /*!< The external sync signal, EXT_SYNC, from outside the PWM module causes updates */ 0103 } pwm_force_output_trigger_t; 0104 0105 /*! @brief PWM channel output status */ 0106 typedef enum _pwm_output_state 0107 { 0108 kPWM_HighState = 0, /*!< The output state of PWM channel is high */ 0109 kPWM_LowState, /*!< The output state of PWM channel is low */ 0110 kPWM_NormalState, /*!< The output state of PWM channel is normal */ 0111 kPWM_InvertState, /*!< The output state of PWM channel is invert */ 0112 kPWM_MaskState /*!< The output state of PWM channel is mask */ 0113 } pwm_output_state_t; 0114 0115 /*! @brief PWM counter initialization options */ 0116 typedef enum _pwm_init_source 0117 { 0118 kPWM_Initialize_LocalSync = 0U, /*!< Local sync causes initialization */ 0119 kPWM_Initialize_MasterReload, /*!< Master reload from submodule 0 causes initialization */ 0120 kPWM_Initialize_MasterSync, /*!< Master sync from submodule 0 causes initialization */ 0121 kPWM_Initialize_ExtSync /*!< EXT_SYNC causes initialization */ 0122 } pwm_init_source_t; 0123 0124 /*! @brief PWM load frequency selection */ 0125 typedef enum _pwm_load_frequency 0126 { 0127 kPWM_LoadEveryOportunity = 0U, /*!< Every PWM opportunity */ 0128 kPWM_LoadEvery2Oportunity, /*!< Every 2 PWM opportunities */ 0129 kPWM_LoadEvery3Oportunity, /*!< Every 3 PWM opportunities */ 0130 kPWM_LoadEvery4Oportunity, /*!< Every 4 PWM opportunities */ 0131 kPWM_LoadEvery5Oportunity, /*!< Every 5 PWM opportunities */ 0132 kPWM_LoadEvery6Oportunity, /*!< Every 6 PWM opportunities */ 0133 kPWM_LoadEvery7Oportunity, /*!< Every 7 PWM opportunities */ 0134 kPWM_LoadEvery8Oportunity, /*!< Every 8 PWM opportunities */ 0135 kPWM_LoadEvery9Oportunity, /*!< Every 9 PWM opportunities */ 0136 kPWM_LoadEvery10Oportunity, /*!< Every 10 PWM opportunities */ 0137 kPWM_LoadEvery11Oportunity, /*!< Every 11 PWM opportunities */ 0138 kPWM_LoadEvery12Oportunity, /*!< Every 12 PWM opportunities */ 0139 kPWM_LoadEvery13Oportunity, /*!< Every 13 PWM opportunities */ 0140 kPWM_LoadEvery14Oportunity, /*!< Every 14 PWM opportunities */ 0141 kPWM_LoadEvery15Oportunity, /*!< Every 15 PWM opportunities */ 0142 kPWM_LoadEvery16Oportunity /*!< Every 16 PWM opportunities */ 0143 } pwm_load_frequency_t; 0144 0145 /*! @brief List of PWM fault selections */ 0146 typedef enum _pwm_fault_input 0147 { 0148 kPWM_Fault_0 = 0U, /*!< Fault 0 input pin */ 0149 kPWM_Fault_1, /*!< Fault 1 input pin */ 0150 kPWM_Fault_2, /*!< Fault 2 input pin */ 0151 kPWM_Fault_3 /*!< Fault 3 input pin */ 0152 } pwm_fault_input_t; 0153 0154 /*! @brief List of PWM fault disable mapping selections */ 0155 typedef enum _pwm_fault_disable 0156 { 0157 kPWM_FaultDisable_0 = (1U << 0), /*!< Fault 0 disable mapping */ 0158 kPWM_FaultDisable_1 = (1U << 1), /*!< Fault 1 disable mapping */ 0159 kPWM_FaultDisable_2 = (1U << 2), /*!< Fault 2 disable mapping */ 0160 kPWM_FaultDisable_3 = (1U << 3) /*!< Fault 3 disable mapping */ 0161 } pwm_fault_disable_t; 0162 0163 /*! @brief List of PWM fault channels */ 0164 typedef enum _pwm_fault_channels 0165 { 0166 kPWM_faultchannel_0 = 0U, 0167 kPWM_faultchannel_1 0168 } pwm_fault_channels_t; 0169 0170 /*! @brief PWM capture edge select */ 0171 typedef enum _pwm_input_capture_edge 0172 { 0173 kPWM_Disable = 0U, /*!< Disabled */ 0174 kPWM_FallingEdge, /*!< Capture on falling edge only */ 0175 kPWM_RisingEdge, /*!< Capture on rising edge only */ 0176 kPWM_RiseAndFallEdge /*!< Capture on rising or falling edge */ 0177 } pwm_input_capture_edge_t; 0178 0179 /*! @brief PWM output options when a FORCE_OUT signal is asserted */ 0180 typedef enum _pwm_force_signal 0181 { 0182 kPWM_UsePwm = 0U, /*!< Generated PWM signal is used by the deadtime logic.*/ 0183 kPWM_InvertedPwm, /*!< Inverted PWM signal is used by the deadtime logic.*/ 0184 kPWM_SoftwareControl, /*!< Software controlled value is used by the deadtime logic. */ 0185 kPWM_UseExternal /*!< PWM_EXTA signal is used by the deadtime logic. */ 0186 } pwm_force_signal_t; 0187 0188 /*! @brief Options available for the PWM A & B pair operation */ 0189 typedef enum _pwm_chnl_pair_operation 0190 { 0191 kPWM_Independent = 0U, /*!< PWM A & PWM B operate as 2 independent channels */ 0192 kPWM_ComplementaryPwmA, /*!< PWM A & PWM B are complementary channels, PWM A generates the signal */ 0193 kPWM_ComplementaryPwmB /*!< PWM A & PWM B are complementary channels, PWM B generates the signal */ 0194 } pwm_chnl_pair_operation_t; 0195 0196 /*! @brief Options available on how to load the buffered-registers with new values */ 0197 typedef enum _pwm_register_reload 0198 { 0199 kPWM_ReloadImmediate = 0U, /*!< Buffered-registers get loaded with new values as soon as LDOK bit is set */ 0200 kPWM_ReloadPwmHalfCycle, /*!< Registers loaded on a PWM half cycle */ 0201 kPWM_ReloadPwmFullCycle, /*!< Registers loaded on a PWM full cycle */ 0202 kPWM_ReloadPwmHalfAndFullCycle /*!< Registers loaded on a PWM half & full cycle */ 0203 } pwm_register_reload_t; 0204 0205 /*! @brief Options available on how to re-enable the PWM output when recovering from a fault */ 0206 typedef enum _pwm_fault_recovery_mode 0207 { 0208 kPWM_NoRecovery = 0U, /*!< PWM output will stay inactive */ 0209 kPWM_RecoverHalfCycle, /*!< PWM output re-enabled at the first half cycle */ 0210 kPWM_RecoverFullCycle, /*!< PWM output re-enabled at the first full cycle */ 0211 kPWM_RecoverHalfAndFullCycle /*!< PWM output re-enabled at the first half or full cycle */ 0212 } pwm_fault_recovery_mode_t; 0213 0214 /*! @brief List of PWM interrupt options */ 0215 typedef enum _pwm_interrupt_enable 0216 { 0217 kPWM_CompareVal0InterruptEnable = (1U << 0), /*!< PWM VAL0 compare interrupt */ 0218 kPWM_CompareVal1InterruptEnable = (1U << 1), /*!< PWM VAL1 compare interrupt */ 0219 kPWM_CompareVal2InterruptEnable = (1U << 2), /*!< PWM VAL2 compare interrupt */ 0220 kPWM_CompareVal3InterruptEnable = (1U << 3), /*!< PWM VAL3 compare interrupt */ 0221 kPWM_CompareVal4InterruptEnable = (1U << 4), /*!< PWM VAL4 compare interrupt */ 0222 kPWM_CompareVal5InterruptEnable = (1U << 5), /*!< PWM VAL5 compare interrupt */ 0223 kPWM_CaptureX0InterruptEnable = (1U << 6), /*!< PWM capture X0 interrupt */ 0224 kPWM_CaptureX1InterruptEnable = (1U << 7), /*!< PWM capture X1 interrupt */ 0225 kPWM_CaptureB0InterruptEnable = (1U << 8), /*!< PWM capture B0 interrupt */ 0226 kPWM_CaptureB1InterruptEnable = (1U << 9), /*!< PWM capture B1 interrupt */ 0227 kPWM_CaptureA0InterruptEnable = (1U << 10), /*!< PWM capture A0 interrupt */ 0228 kPWM_CaptureA1InterruptEnable = (1U << 11), /*!< PWM capture A1 interrupt */ 0229 kPWM_ReloadInterruptEnable = (1U << 12), /*!< PWM reload interrupt */ 0230 kPWM_ReloadErrorInterruptEnable = (1U << 13), /*!< PWM reload error interrupt */ 0231 kPWM_Fault0InterruptEnable = (1U << 16), /*!< PWM fault 0 interrupt */ 0232 kPWM_Fault1InterruptEnable = (1U << 17), /*!< PWM fault 1 interrupt */ 0233 kPWM_Fault2InterruptEnable = (1U << 18), /*!< PWM fault 2 interrupt */ 0234 kPWM_Fault3InterruptEnable = (1U << 19) /*!< PWM fault 3 interrupt */ 0235 } pwm_interrupt_enable_t; 0236 0237 /*! @brief List of PWM status flags */ 0238 typedef enum _pwm_status_flags 0239 { 0240 kPWM_CompareVal0Flag = (1U << 0), /*!< PWM VAL0 compare flag */ 0241 kPWM_CompareVal1Flag = (1U << 1), /*!< PWM VAL1 compare flag */ 0242 kPWM_CompareVal2Flag = (1U << 2), /*!< PWM VAL2 compare flag */ 0243 kPWM_CompareVal3Flag = (1U << 3), /*!< PWM VAL3 compare flag */ 0244 kPWM_CompareVal4Flag = (1U << 4), /*!< PWM VAL4 compare flag */ 0245 kPWM_CompareVal5Flag = (1U << 5), /*!< PWM VAL5 compare flag */ 0246 kPWM_CaptureX0Flag = (1U << 6), /*!< PWM capture X0 flag */ 0247 kPWM_CaptureX1Flag = (1U << 7), /*!< PWM capture X1 flag */ 0248 kPWM_CaptureB0Flag = (1U << 8), /*!< PWM capture B0 flag */ 0249 kPWM_CaptureB1Flag = (1U << 9), /*!< PWM capture B1 flag */ 0250 kPWM_CaptureA0Flag = (1U << 10), /*!< PWM capture A0 flag */ 0251 kPWM_CaptureA1Flag = (1U << 11), /*!< PWM capture A1 flag */ 0252 kPWM_ReloadFlag = (1U << 12), /*!< PWM reload flag */ 0253 kPWM_ReloadErrorFlag = (1U << 13), /*!< PWM reload error flag */ 0254 kPWM_RegUpdatedFlag = (1U << 14), /*!< PWM registers updated flag */ 0255 kPWM_Fault0Flag = (1U << 16), /*!< PWM fault 0 flag */ 0256 kPWM_Fault1Flag = (1U << 17), /*!< PWM fault 1 flag */ 0257 kPWM_Fault2Flag = (1U << 18), /*!< PWM fault 2 flag */ 0258 kPWM_Fault3Flag = (1U << 19) /*!< PWM fault 3 flag */ 0259 } pwm_status_flags_t; 0260 0261 /*! @brief List of PWM DMA options */ 0262 typedef enum _pwm_dma_enable 0263 { 0264 kPWM_CaptureX0DMAEnable = (1U << 0), /*!< PWM capture X0 DMA */ 0265 kPWM_CaptureX1DMAEnable = (1U << 1), /*!< PWM capture X1 DMA */ 0266 kPWM_CaptureB0DMAEnable = (1U << 2), /*!< PWM capture B0 DMA */ 0267 kPWM_CaptureB1DMAEnable = (1U << 3), /*!< PWM capture B1 DMA */ 0268 kPWM_CaptureA0DMAEnable = (1U << 4), /*!< PWM capture A0 DMA */ 0269 kPWM_CaptureA1DMAEnable = (1U << 5) /*!< PWM capture A1 DMA */ 0270 } pwm_dma_enable_t; 0271 0272 /*! @brief List of PWM capture DMA enable source select */ 0273 typedef enum _pwm_dma_source_select 0274 { 0275 kPWM_DMARequestDisable = 0U, /*!< Read DMA requests disabled */ 0276 kPWM_DMAWatermarksEnable, /*!< Exceeding a FIFO watermark sets the DMA read request */ 0277 kPWM_DMALocalSync, /*!< A local sync (VAL1 matches counter) sets the read DMA request */ 0278 kPWM_DMALocalReload /*!< A local reload (STS[RF] being set) sets the read DMA request */ 0279 } pwm_dma_source_select_t; 0280 0281 /*! @brief PWM FIFO Watermark AND Control */ 0282 typedef enum _pwm_watermark_control 0283 { 0284 kPWM_FIFOWatermarksOR = 0U, /*!< Selected FIFO watermarks are OR'ed together */ 0285 kPWM_FIFOWatermarksAND /*!< Selected FIFO watermarks are AND'ed together */ 0286 } pwm_watermark_control_t; 0287 0288 /*! @brief PWM operation mode */ 0289 typedef enum _pwm_mode 0290 { 0291 kPWM_SignedCenterAligned = 0U, /*!< Signed center-aligned */ 0292 kPWM_CenterAligned, /*!< Unsigned cente-aligned */ 0293 kPWM_SignedEdgeAligned, /*!< Signed edge-aligned */ 0294 kPWM_EdgeAligned /*!< Unsigned edge-aligned */ 0295 } pwm_mode_t; 0296 0297 /*! @brief PWM output pulse mode, high-true or low-true */ 0298 typedef enum _pwm_level_select 0299 { 0300 kPWM_HighTrue = 0U, /*!< High level represents "on" or "active" state */ 0301 kPWM_LowTrue /*!< Low level represents "on" or "active" state */ 0302 } pwm_level_select_t; 0303 0304 /*! @brief PWM output fault status */ 0305 typedef enum _pwm_fault_state 0306 { 0307 kPWM_PwmFaultState0 = 0308 0U, /*!< Output is forced to logic 0 state prior to consideration of output polarity control. */ 0309 kPWM_PwmFaultState1, /*!< Output is forced to logic 1 state prior to consideration of output polarity control. */ 0310 kPWM_PwmFaultState2, /*!< Output is tristated. */ 0311 kPWM_PwmFaultState3 /*!< Output is tristated. */ 0312 } pwm_fault_state_t; 0313 0314 /*! @brief PWM reload source select */ 0315 typedef enum _pwm_reload_source_select 0316 { 0317 kPWM_LocalReload = 0U, /*!< The local reload signal is used to reload registers */ 0318 kPWM_MasterReload /*!< The master reload signal (from submodule 0) is used to reload */ 0319 } pwm_reload_source_select_t; 0320 0321 /*! @brief PWM fault clearing options */ 0322 typedef enum _pwm_fault_clear 0323 { 0324 kPWM_Automatic = 0U, /*!< Automatic fault clearing */ 0325 kPWM_ManualNormal, /*!< Manual fault clearing with no fault safety mode */ 0326 kPWM_ManualSafety /*!< Manual fault clearing with fault safety mode */ 0327 } pwm_fault_clear_t; 0328 0329 /*! @brief Options for submodule master control operation */ 0330 typedef enum _pwm_module_control 0331 { 0332 kPWM_Control_Module_0 = (1U << 0), /*!< Control submodule 0's start/stop,buffer reload operation */ 0333 kPWM_Control_Module_1 = (1U << 1), /*!< Control submodule 1's start/stop,buffer reload operation */ 0334 kPWM_Control_Module_2 = (1U << 2), /*!< Control submodule 2's start/stop,buffer reload operation */ 0335 kPWM_Control_Module_3 = (1U << 3) /*!< Control submodule 3's start/stop,buffer reload operation */ 0336 } pwm_module_control_t; 0337 0338 /*! @brief Structure for the user to define the PWM signal characteristics */ 0339 typedef struct _pwm_signal_param 0340 { 0341 pwm_channels_t pwmChannel; /*!< PWM channel being configured; PWM A or PWM B */ 0342 uint8_t dutyCyclePercent; /*!< PWM pulse width, value should be between 0 to 100 0343 0=inactive signal(0% duty cycle)... 0344 100=always active signal (100% duty cycle)*/ 0345 pwm_level_select_t level; /*!< PWM output active level select */ 0346 uint16_t deadtimeValue; /*!< The deadtime value; only used if channel pair is operating in complementary mode */ 0347 pwm_fault_state_t faultState; /*!< PWM output fault status */ 0348 bool pwmchannelenable; /*!< Enable PWM output */ 0349 } pwm_signal_param_t; 0350 0351 /*! 0352 * @brief PWM config structure 0353 * 0354 * This structure holds the configuration settings for the PWM peripheral. To initialize this 0355 * structure to reasonable defaults, call the PWM_GetDefaultConfig() function and pass a 0356 * pointer to your config structure instance. 0357 * 0358 * The config struct can be made const so it resides in flash 0359 */ 0360 typedef struct _pwm_config 0361 { 0362 bool enableDebugMode; /*!< true: PWM continues to run in debug mode; 0363 false: PWM is paused in debug mode */ 0364 #if !defined(FSL_FEATURE_PWM_HAS_NO_WAITEN) || (!FSL_FEATURE_PWM_HAS_NO_WAITEN) 0365 bool enableWait; /*!< true: PWM continues to run in WAIT mode; 0366 false: PWM is paused in WAIT mode */ 0367 #endif /* FSL_FEATURE_PWM_HAS_NO_WAITEN */ 0368 pwm_init_source_t initializationControl; /*!< Option to initialize the counter */ 0369 pwm_clock_source_t clockSource; /*!< Clock source for the counter */ 0370 pwm_clock_prescale_t prescale; /*!< Pre-scaler to divide down the clock */ 0371 pwm_chnl_pair_operation_t pairOperation; /*!< Channel pair in indepedent or complementary mode */ 0372 pwm_register_reload_t reloadLogic; /*!< PWM Reload logic setup */ 0373 pwm_reload_source_select_t reloadSelect; /*!< Reload source select */ 0374 pwm_load_frequency_t reloadFrequency; /*!< Specifies when to reload, used when user's choice 0375 is not immediate reload */ 0376 pwm_force_output_trigger_t forceTrigger; /*!< Specify which signal will trigger a FORCE_OUT */ 0377 } pwm_config_t; 0378 0379 /*! @brief Structure for the user to configure the fault input filter. */ 0380 typedef struct _pwm_fault_input_filter_param 0381 { 0382 uint8_t faultFilterCount; /*!< Fault filter count */ 0383 uint8_t faultFilterPeriod; /*!< Fault filter period;value of 0 will bypass the filter */ 0384 bool faultGlitchStretch; /*!< Fault Glitch Stretch Enable: A logic 1 means that input 0385 fault signals will be stretched to at least 2 IPBus clock cycles */ 0386 } pwm_fault_input_filter_param_t; 0387 0388 /*! @brief Structure is used to hold the parameters to configure a PWM fault */ 0389 typedef struct _pwm_fault_param 0390 { 0391 pwm_fault_clear_t faultClearingMode; /*!< Fault clearing mode to use */ 0392 bool faultLevel; /*!< true: Logic 1 indicates fault; 0393 false: Logic 0 indicates fault */ 0394 bool enableCombinationalPath; /*!< true: Combinational Path from fault input is enabled; 0395 false: No combination path is available */ 0396 pwm_fault_recovery_mode_t recoverMode; /*!< Specify when to re-enable the PWM output */ 0397 } pwm_fault_param_t; 0398 0399 /*! 0400 * @brief Structure is used to hold parameters to configure the capture capability of a signal pin 0401 */ 0402 typedef struct _pwm_input_capture_param 0403 { 0404 bool captureInputSel; /*!< true: Use the edge counter signal as source 0405 false: Use the raw input signal from the pin as source */ 0406 uint8_t edgeCompareValue; /*!< Compare value, used only if edge counter is used as source */ 0407 pwm_input_capture_edge_t edge0; /*!< Specify which edge causes a capture for input circuitry 0 */ 0408 pwm_input_capture_edge_t edge1; /*!< Specify which edge causes a capture for input circuitry 1 */ 0409 bool enableOneShotCapture; /*!< true: Use one-shot capture mode; 0410 false: Use free-running capture mode */ 0411 uint8_t fifoWatermark; /*!< Watermark level for capture FIFO. The capture flags in 0412 the status register will set if the word count in the FIFO 0413 is greater than this watermark level */ 0414 } pwm_input_capture_param_t; 0415 0416 /******************************************************************************* 0417 * API 0418 ******************************************************************************/ 0419 0420 #if defined(__cplusplus) 0421 extern "C" { 0422 #endif 0423 0424 /*! 0425 * @name Initialization and deinitialization 0426 * @{ 0427 */ 0428 0429 /*! 0430 * @brief Ungates the PWM submodule clock and configures the peripheral for basic operation. 0431 * 0432 * @note This API should be called at the beginning of the application using the PWM driver. 0433 * 0434 * @param base PWM peripheral base address 0435 * @param subModule PWM submodule to configure 0436 * @param config Pointer to user's PWM config structure. 0437 * 0438 * @return kStatus_Success means success; else failed. 0439 */ 0440 status_t PWM_Init(PWM_Type *base, pwm_submodule_t subModule, const pwm_config_t *config); 0441 0442 /*! 0443 * @brief Gate the PWM submodule clock 0444 * 0445 * @param base PWM peripheral base address 0446 * @param subModule PWM submodule to deinitialize 0447 */ 0448 void PWM_Deinit(PWM_Type *base, pwm_submodule_t subModule); 0449 0450 /*! 0451 * @brief Fill in the PWM config struct with the default settings 0452 * 0453 * The default values are: 0454 * @code 0455 * config->enableDebugMode = false; 0456 * config->enableWait = false; 0457 * config->reloadSelect = kPWM_LocalReload; 0458 * config->clockSource = kPWM_BusClock; 0459 * config->prescale = kPWM_Prescale_Divide_1; 0460 * config->initializationControl = kPWM_Initialize_LocalSync; 0461 * config->forceTrigger = kPWM_Force_Local; 0462 * config->reloadFrequency = kPWM_LoadEveryOportunity; 0463 * config->reloadLogic = kPWM_ReloadImmediate; 0464 * config->pairOperation = kPWM_Independent; 0465 * @endcode 0466 * @param config Pointer to user's PWM config structure. 0467 */ 0468 void PWM_GetDefaultConfig(pwm_config_t *config); 0469 0470 /*! @}*/ 0471 0472 /*! 0473 * @name Module PWM output 0474 * @{ 0475 */ 0476 /*! 0477 * @brief Sets up the PWM signals for a PWM submodule. 0478 * 0479 * The function initializes the submodule according to the parameters passed in by the user. The function 0480 * also sets up the value compare registers to match the PWM signal requirements. 0481 * If the dead time insertion logic is enabled, the pulse period is reduced by the 0482 * dead time period specified by the user. 0483 * 0484 * @param base PWM peripheral base address 0485 * @param subModule PWM submodule to configure 0486 * @param chnlParams Array of PWM channel parameters to configure the channel(s), PWMX submodule is not supported. 0487 * @param numOfChnls Number of channels to configure, this should be the size of the array passed in. 0488 * Array size should not be more than 2 as each submodule has 2 pins to output PWM 0489 * @param mode PWM operation mode, options available in enumeration ::pwm_mode_t 0490 * @param pwmFreq_Hz PWM signal frequency in Hz 0491 * @param srcClock_Hz PWM main counter clock in Hz. 0492 * 0493 * @return Returns kStatus_Fail if there was error setting up the signal; kStatus_Success otherwise 0494 */ 0495 status_t PWM_SetupPwm(PWM_Type *base, 0496 pwm_submodule_t subModule, 0497 const pwm_signal_param_t *chnlParams, 0498 uint8_t numOfChnls, 0499 pwm_mode_t mode, 0500 uint32_t pwmFreq_Hz, 0501 uint32_t srcClock_Hz); 0502 0503 /*! 0504 * @brief Set PWM phase shift for PWM channel running on channel PWM_A, PWM_B which with 50% duty cycle.. 0505 * 0506 * @param base PWM peripheral base address 0507 * @param subModule PWM submodule to configure 0508 * @param pwmChannel PWM channel to configure 0509 * @param pwmFreq_Hz PWM signal frequency in Hz 0510 * @param srcClock_Hz PWM main counter clock in Hz. 0511 * @param shiftvalue Phase shift value 0512 * @param doSync true: Set LDOK bit for the submodule list; 0513 * false: LDOK bit don't set, need to call PWM_SetPwmLdok to sync update. 0514 * 0515 * @return Returns kStatus_Fail if there was error setting up the signal; kStatus_Success otherwise 0516 */ 0517 status_t PWM_SetupPwmPhaseShift(PWM_Type *base, 0518 pwm_submodule_t subModule, 0519 pwm_channels_t pwmChannel, 0520 uint32_t pwmFreq_Hz, 0521 uint32_t srcClock_Hz, 0522 uint8_t shiftvalue, 0523 bool doSync); 0524 0525 /*! 0526 * @brief Updates the PWM signal's dutycycle. 0527 * 0528 * The function updates the PWM dutycyle to the new value that is passed in. 0529 * If the dead time insertion logic is enabled then the pulse period is reduced by the 0530 * dead time period specified by the user. 0531 * 0532 * @param base PWM peripheral base address 0533 * @param subModule PWM submodule to configure 0534 * @param pwmSignal Signal (PWM A or PWM B) to update 0535 * @param currPwmMode The current PWM mode set during PWM setup 0536 * @param dutyCyclePercent New PWM pulse width, value should be between 0 to 100 0537 * 0=inactive signal(0% duty cycle)... 0538 * 100=active signal (100% duty cycle) 0539 */ 0540 void PWM_UpdatePwmDutycycle(PWM_Type *base, 0541 pwm_submodule_t subModule, 0542 pwm_channels_t pwmSignal, 0543 pwm_mode_t currPwmMode, 0544 uint8_t dutyCyclePercent); 0545 0546 /*! 0547 * @brief Updates the PWM signal's dutycycle with 16-bit accuracy. 0548 * 0549 * The function updates the PWM dutycyle to the new value that is passed in. 0550 * If the dead time insertion logic is enabled then the pulse period is reduced by the 0551 * dead time period specified by the user. 0552 * 0553 * @param base PWM peripheral base address 0554 * @param subModule PWM submodule to configure 0555 * @param pwmSignal Signal (PWM A or PWM B) to update 0556 * @param currPwmMode The current PWM mode set during PWM setup 0557 * @param dutyCycle New PWM pulse width, value should be between 0 to 65535 0558 * 0=inactive signal(0% duty cycle)... 0559 * 65535=active signal (100% duty cycle) 0560 */ 0561 void PWM_UpdatePwmDutycycleHighAccuracy( 0562 PWM_Type *base, pwm_submodule_t subModule, pwm_channels_t pwmSignal, pwm_mode_t currPwmMode, uint16_t dutyCycle); 0563 0564 /*! @}*/ 0565 0566 /*! 0567 * @brief Sets up the PWM input capture 0568 * 0569 * Each PWM submodule has 3 pins that can be configured for use as input capture pins. This function 0570 * sets up the capture parameters for each pin and enables the pin for input capture operation. 0571 * 0572 * @param base PWM peripheral base address 0573 * @param subModule PWM submodule to configure 0574 * @param pwmChannel Channel in the submodule to setup 0575 * @param inputCaptureParams Parameters passed in to set up the input pin 0576 */ 0577 void PWM_SetupInputCapture(PWM_Type *base, 0578 pwm_submodule_t subModule, 0579 pwm_channels_t pwmChannel, 0580 const pwm_input_capture_param_t *inputCaptureParams); 0581 0582 /*! 0583 * @brief Sets up the PWM fault input filter. 0584 * 0585 * @param base PWM peripheral base address 0586 * @param faultInputFilterParams Parameters passed in to set up the fault input filter. 0587 */ 0588 void PWM_SetupFaultInputFilter(PWM_Type *base, const pwm_fault_input_filter_param_t *faultInputFilterParams); 0589 0590 /*! 0591 * @brief Sets up the PWM fault protection. 0592 * 0593 * PWM has 4 fault inputs. 0594 * 0595 * @param base PWM peripheral base address 0596 * @param faultNum PWM fault to configure. 0597 * @param faultParams Pointer to the PWM fault config structure 0598 */ 0599 void PWM_SetupFaults(PWM_Type *base, pwm_fault_input_t faultNum, const pwm_fault_param_t *faultParams); 0600 0601 /*! 0602 * @brief Fill in the PWM fault config struct with the default settings 0603 * 0604 * The default values are: 0605 * @code 0606 * config->faultClearingMode = kPWM_Automatic; 0607 * config->faultLevel = false; 0608 * config->enableCombinationalPath = true; 0609 * config->recoverMode = kPWM_NoRecovery; 0610 * @endcode 0611 * @param config Pointer to user's PWM fault config structure. 0612 */ 0613 void PWM_FaultDefaultConfig(pwm_fault_param_t *config); 0614 0615 /*! 0616 * @brief Selects the signal to output on a PWM pin when a FORCE_OUT signal is asserted. 0617 * 0618 * The user specifies which channel to configure by supplying the submodule number and whether 0619 * to modify PWM A or PWM B within that submodule. 0620 * 0621 * @param base PWM peripheral base address 0622 * @param subModule PWM submodule to configure 0623 * @param pwmChannel Channel to configure 0624 * @param mode Signal to output when a FORCE_OUT is triggered 0625 */ 0626 void PWM_SetupForceSignal(PWM_Type *base, 0627 pwm_submodule_t subModule, 0628 pwm_channels_t pwmChannel, 0629 pwm_force_signal_t mode); 0630 0631 /*! 0632 * @name Interrupts Interface 0633 * @{ 0634 */ 0635 0636 /*! 0637 * @brief Enables the selected PWM interrupts 0638 * 0639 * @param base PWM peripheral base address 0640 * @param subModule PWM submodule to configure 0641 * @param mask The interrupts to enable. This is a logical OR of members of the 0642 * enumeration ::pwm_interrupt_enable_t 0643 */ 0644 void PWM_EnableInterrupts(PWM_Type *base, pwm_submodule_t subModule, uint32_t mask); 0645 0646 /*! 0647 * @brief Disables the selected PWM interrupts 0648 * 0649 * @param base PWM peripheral base address 0650 * @param subModule PWM submodule to configure 0651 * @param mask The interrupts to enable. This is a logical OR of members of the 0652 * enumeration ::pwm_interrupt_enable_t 0653 */ 0654 void PWM_DisableInterrupts(PWM_Type *base, pwm_submodule_t subModule, uint32_t mask); 0655 0656 /*! 0657 * @brief Gets the enabled PWM interrupts 0658 * 0659 * @param base PWM peripheral base address 0660 * @param subModule PWM submodule to configure 0661 * 0662 * @return The enabled interrupts. This is the logical OR of members of the 0663 * enumeration ::pwm_interrupt_enable_t 0664 */ 0665 uint32_t PWM_GetEnabledInterrupts(PWM_Type *base, pwm_submodule_t subModule); 0666 0667 /*! @}*/ 0668 0669 /*! 0670 * @name DMA Interface 0671 * @{ 0672 */ 0673 0674 /*! 0675 * @brief Capture DMA Enable Source Select. 0676 * 0677 * @param base PWM peripheral base address 0678 * @param subModule PWM submodule to configure 0679 * @param pwm_watermark_control PWM FIFO watermark and control 0680 */ 0681 static inline void PWM_DMAFIFOWatermarkControl(PWM_Type *base, 0682 pwm_submodule_t subModule, 0683 pwm_watermark_control_t pwm_watermark_control) 0684 { 0685 uint16_t reg = base->SM[subModule].DMAEN; 0686 if (pwm_watermark_control == kPWM_FIFOWatermarksOR) 0687 { 0688 reg &= ~((uint16_t)PWM_DMAEN_FAND_MASK); 0689 } 0690 else 0691 { 0692 reg |= ((uint16_t)PWM_DMAEN_FAND_MASK); 0693 } 0694 base->SM[subModule].DMAEN = reg; 0695 } 0696 0697 /*! 0698 * @brief Capture DMA Enable Source Select. 0699 * 0700 * @param base PWM peripheral base address 0701 * @param subModule PWM submodule to configure 0702 * @param pwm_dma_source_select PWM capture DMA enable source select 0703 */ 0704 static inline void PWM_DMACaptureSourceSelect(PWM_Type *base, 0705 pwm_submodule_t subModule, 0706 pwm_dma_source_select_t pwm_dma_source_select) 0707 { 0708 uint16_t reg = base->SM[subModule].DMAEN; 0709 0710 reg &= ~((uint16_t)PWM_DMAEN_CAPTDE_MASK); 0711 reg |= (((uint16_t)pwm_dma_source_select << (uint16_t)PWM_DMAEN_CAPTDE_SHIFT) & (uint16_t)PWM_DMAEN_CAPTDE_MASK); 0712 0713 base->SM[subModule].DMAEN = reg; 0714 } 0715 0716 /*! 0717 * @brief Enables or disables the selected PWM DMA Capture read request. 0718 * 0719 * @param base PWM peripheral base address 0720 * @param subModule PWM submodule to configure 0721 * @param mask The DMA to enable or disable. This is a logical OR of members of the 0722 * enumeration ::pwm_dma_enable_t 0723 * @param activate true: Enable DMA read request; false: Disable DMA read request 0724 */ 0725 static inline void PWM_EnableDMACapture(PWM_Type *base, pwm_submodule_t subModule, uint16_t mask, bool activate) 0726 { 0727 uint16_t reg = base->SM[subModule].DMAEN; 0728 if (activate) 0729 { 0730 reg |= (uint16_t)(mask); 0731 } 0732 else 0733 { 0734 reg &= ~((uint16_t)(mask)); 0735 } 0736 base->SM[subModule].DMAEN = reg; 0737 } 0738 0739 /*! 0740 * @brief Enables or disables the PWM DMA write request. 0741 * 0742 * @param base PWM peripheral base address 0743 * @param subModule PWM submodule to configure 0744 * @param activate true: Enable DMA write request; false: Disable DMA write request 0745 */ 0746 static inline void PWM_EnableDMAWrite(PWM_Type *base, pwm_submodule_t subModule, bool activate) 0747 { 0748 uint16_t reg = base->SM[subModule].DMAEN; 0749 if (activate) 0750 { 0751 reg |= ((uint16_t)PWM_DMAEN_VALDE_MASK); 0752 } 0753 else 0754 { 0755 reg &= ~((uint16_t)PWM_DMAEN_VALDE_MASK); 0756 } 0757 base->SM[subModule].DMAEN = reg; 0758 } 0759 0760 /*! @}*/ 0761 0762 /*! 0763 * @name Status Interface 0764 * @{ 0765 */ 0766 0767 /*! 0768 * @brief Gets the PWM status flags 0769 * 0770 * @param base PWM peripheral base address 0771 * @param subModule PWM submodule to configure 0772 * 0773 * @return The status flags. This is the logical OR of members of the 0774 * enumeration ::pwm_status_flags_t 0775 */ 0776 uint32_t PWM_GetStatusFlags(PWM_Type *base, pwm_submodule_t subModule); 0777 0778 /*! 0779 * @brief Clears the PWM status flags 0780 * 0781 * @param base PWM peripheral base address 0782 * @param subModule PWM submodule to configure 0783 * @param mask The status flags to clear. This is a logical OR of members of the 0784 * enumeration ::pwm_status_flags_t 0785 */ 0786 void PWM_ClearStatusFlags(PWM_Type *base, pwm_submodule_t subModule, uint32_t mask); 0787 0788 /*! @}*/ 0789 0790 /*! 0791 * @name Timer Start and Stop 0792 * @{ 0793 */ 0794 0795 /*! 0796 * @brief Starts the PWM counter for a single or multiple submodules. 0797 * 0798 * Sets the Run bit which enables the clocks to the PWM submodule. This function can start multiple 0799 * submodules at the same time. 0800 * 0801 * @param base PWM peripheral base address 0802 * @param subModulesToStart PWM submodules to start. This is a logical OR of members of the 0803 * enumeration ::pwm_module_control_t 0804 */ 0805 static inline void PWM_StartTimer(PWM_Type *base, uint8_t subModulesToStart) 0806 { 0807 base->MCTRL |= PWM_MCTRL_RUN(subModulesToStart); 0808 } 0809 0810 /*! 0811 * @brief Stops the PWM counter for a single or multiple submodules. 0812 * 0813 * Clears the Run bit which resets the submodule's counter. This function can stop multiple 0814 * submodules at the same time. 0815 * 0816 * @param base PWM peripheral base address 0817 * @param subModulesToStop PWM submodules to stop. This is a logical OR of members of the 0818 * enumeration ::pwm_module_control_t 0819 */ 0820 static inline void PWM_StopTimer(PWM_Type *base, uint8_t subModulesToStop) 0821 { 0822 base->MCTRL &= ~(PWM_MCTRL_RUN(subModulesToStop)); 0823 } 0824 0825 /*! @}*/ 0826 0827 /*! 0828 * @brief Set the PWM VALx registers. 0829 * 0830 * This function allows the user to write value into VAL registers directly. And it will destroying the PWM clock period 0831 * set by the PWM_SetupPwm()/PWM_SetupPwmPhaseShift() functions. 0832 * Due to VALx registers are bufferd, the new value will not active uless call PWM_SetPwmLdok() and the reload point is 0833 * reached. 0834 * 0835 * @param base PWM peripheral base address 0836 * @param subModule PWM submodule to configure 0837 * @param valueRegister VALx register that will be writen new value 0838 * @param value Value that will been write into VALx register 0839 */ 0840 static inline void PWM_SetVALxValue(PWM_Type *base, 0841 pwm_submodule_t subModule, 0842 pwm_value_register_t valueRegister, 0843 uint16_t value) 0844 { 0845 switch (valueRegister) 0846 { 0847 case kPWM_ValueRegister_0: 0848 base->SM[subModule].VAL0 = value; 0849 break; 0850 case kPWM_ValueRegister_1: 0851 base->SM[subModule].VAL1 = value; 0852 break; 0853 case kPWM_ValueRegister_2: 0854 base->SM[subModule].VAL2 = value; 0855 break; 0856 case kPWM_ValueRegister_3: 0857 base->SM[subModule].VAL3 = value; 0858 break; 0859 case kPWM_ValueRegister_4: 0860 base->SM[subModule].VAL4 = value; 0861 break; 0862 case kPWM_ValueRegister_5: 0863 base->SM[subModule].VAL5 = value; 0864 break; 0865 default: 0866 assert(false); 0867 break; 0868 } 0869 } 0870 0871 /*! 0872 * @brief Get the PWM VALx registers. 0873 * 0874 * @param base PWM peripheral base address 0875 * @param subModule PWM submodule to configure 0876 * @param valueRegister VALx register that will be read value 0877 * @return The VALx register value 0878 */ 0879 static inline uint16_t PWM_GetVALxValue(PWM_Type *base, pwm_submodule_t subModule, pwm_value_register_t valueRegister) 0880 { 0881 uint16_t temp = 0U; 0882 0883 switch (valueRegister) 0884 { 0885 case kPWM_ValueRegister_0: 0886 temp = base->SM[subModule].VAL0; 0887 break; 0888 case kPWM_ValueRegister_1: 0889 temp = base->SM[subModule].VAL1; 0890 break; 0891 case kPWM_ValueRegister_2: 0892 temp = base->SM[subModule].VAL2; 0893 break; 0894 case kPWM_ValueRegister_3: 0895 temp = base->SM[subModule].VAL3; 0896 break; 0897 case kPWM_ValueRegister_4: 0898 temp = base->SM[subModule].VAL4; 0899 break; 0900 case kPWM_ValueRegister_5: 0901 temp = base->SM[subModule].VAL5; 0902 break; 0903 default: 0904 assert(false); 0905 break; 0906 } 0907 0908 return temp; 0909 } 0910 0911 /*! 0912 * @brief Enables or disables the PWM output trigger. 0913 * 0914 * This function allows the user to enable or disable the PWM trigger. The PWM has 2 triggers. Trigger 0 0915 * is activated when the counter matches VAL 0, VAL 2, or VAL 4 register. Trigger 1 is activated 0916 * when the counter matches VAL 1, VAL 3, or VAL 5 register. 0917 * 0918 * @param base PWM peripheral base address 0919 * @param subModule PWM submodule to configure 0920 * @param valueRegister Value register that will activate the trigger 0921 * @param activate true: Enable the trigger; false: Disable the trigger 0922 */ 0923 static inline void PWM_OutputTriggerEnable(PWM_Type *base, 0924 pwm_submodule_t subModule, 0925 pwm_value_register_t valueRegister, 0926 bool activate) 0927 { 0928 if (activate) 0929 { 0930 base->SM[subModule].TCTRL |= ((uint16_t)1U << (uint16_t)valueRegister); 0931 } 0932 else 0933 { 0934 base->SM[subModule].TCTRL &= ~((uint16_t)1U << (uint16_t)valueRegister); 0935 } 0936 } 0937 0938 /*! 0939 * @brief Enables the PWM output trigger. 0940 * 0941 * This function allows the user to enable one or more (VAL0-5) PWM trigger. 0942 * 0943 * @param base PWM peripheral base address 0944 * @param subModule PWM submodule to configure 0945 * @param valueRegisterMask Value register mask that will activate one or more (VAL0-5) trigger 0946 * enumeration ::_pwm_value_register_mask 0947 */ 0948 static inline void PWM_ActivateOutputTrigger(PWM_Type *base, pwm_submodule_t subModule, uint16_t valueRegisterMask) 0949 { 0950 base->SM[subModule].TCTRL |= (PWM_TCTRL_OUT_TRIG_EN_MASK & (valueRegisterMask)); 0951 } 0952 0953 /*! 0954 * @brief Disables the PWM output trigger. 0955 * 0956 * This function allows the user to disables one or more (VAL0-5) PWM trigger. 0957 * 0958 * @param base PWM peripheral base address 0959 * @param subModule PWM submodule to configure 0960 * @param valueRegisterMask Value register mask that will Deactivate one or more (VAL0-5) trigger 0961 * enumeration ::_pwm_value_register_mask 0962 */ 0963 static inline void PWM_DeactivateOutputTrigger(PWM_Type *base, pwm_submodule_t subModule, uint16_t valueRegisterMask) 0964 { 0965 base->SM[subModule].TCTRL &= ~(PWM_TCTRL_OUT_TRIG_EN_MASK & (valueRegisterMask)); 0966 } 0967 0968 /*! 0969 * @brief Sets the software control output for a pin to high or low. 0970 * 0971 * The user specifies which channel to modify by supplying the submodule number and whether 0972 * to modify PWM A or PWM B within that submodule. 0973 * 0974 * @param base PWM peripheral base address 0975 * @param subModule PWM submodule to configure 0976 * @param pwmChannel Channel to configure 0977 * @param value true: Supply a logic 1, false: Supply a logic 0. 0978 */ 0979 static inline void PWM_SetupSwCtrlOut(PWM_Type *base, pwm_submodule_t subModule, pwm_channels_t pwmChannel, bool value) 0980 { 0981 if (value) 0982 { 0983 base->SWCOUT |= 0984 ((uint16_t)1U << (((uint16_t)subModule * (uint16_t)PWM_SUBMODULE_SWCONTROL_WIDTH) + (uint16_t)pwmChannel)); 0985 } 0986 else 0987 { 0988 base->SWCOUT &= 0989 ~((uint16_t)1U << (((uint16_t)subModule * (uint16_t)PWM_SUBMODULE_SWCONTROL_WIDTH) + (uint16_t)pwmChannel)); 0990 } 0991 } 0992 0993 /*! 0994 * @brief Sets or clears the PWM LDOK bit on a single or multiple submodules 0995 * 0996 * Set LDOK bit to load buffered values into CTRL[PRSC] and the INIT, FRACVAL and VAL registers. The 0997 * values are loaded immediately if kPWM_ReloadImmediate option was choosen during config. Else the 0998 * values are loaded at the next PWM reload point. 0999 * This function can issue the load command to multiple submodules at the same time. 1000 * 1001 * @param base PWM peripheral base address 1002 * @param subModulesToUpdate PWM submodules to update with buffered values. This is a logical OR of 1003 * members of the enumeration ::pwm_module_control_t 1004 * @param value true: Set LDOK bit for the submodule list; false: Clear LDOK bit 1005 */ 1006 static inline void PWM_SetPwmLdok(PWM_Type *base, uint8_t subModulesToUpdate, bool value) 1007 { 1008 if (value) 1009 { 1010 base->MCTRL |= PWM_MCTRL_LDOK(subModulesToUpdate); 1011 } 1012 else 1013 { 1014 base->MCTRL |= PWM_MCTRL_CLDOK(subModulesToUpdate); 1015 } 1016 } 1017 1018 /*! 1019 * @brief Set PWM output fault status 1020 * 1021 * These bits determine the fault state for the PWM_A output in fault conditions 1022 * and STOP mode. It may also define the output state in WAIT and DEBUG modes 1023 * depending on the settings of CTRL2[WAITEN] and CTRL2[DBGEN]. 1024 * This function can update PWM output fault status. 1025 * 1026 * @param base PWM peripheral base address 1027 * @param subModule PWM submodule to configure 1028 * @param pwmChannel Channel to configure 1029 * @param faultState PWM output fault status 1030 */ 1031 static inline void PWM_SetPwmFaultState(PWM_Type *base, 1032 pwm_submodule_t subModule, 1033 pwm_channels_t pwmChannel, 1034 pwm_fault_state_t faultState) 1035 { 1036 uint16_t reg = base->SM[subModule].OCTRL; 1037 switch (pwmChannel) 1038 { 1039 case kPWM_PwmA: 1040 reg &= ~((uint16_t)PWM_OCTRL_PWMAFS_MASK); 1041 reg |= (((uint16_t)faultState << (uint16_t)PWM_OCTRL_PWMAFS_SHIFT) & (uint16_t)PWM_OCTRL_PWMAFS_MASK); 1042 break; 1043 case kPWM_PwmB: 1044 reg &= ~((uint16_t)PWM_OCTRL_PWMBFS_MASK); 1045 reg |= (((uint16_t)faultState << (uint16_t)PWM_OCTRL_PWMBFS_SHIFT) & (uint16_t)PWM_OCTRL_PWMBFS_MASK); 1046 break; 1047 case kPWM_PwmX: 1048 reg &= ~((uint16_t)PWM_OCTRL_PWMXFS_MASK); 1049 reg |= (((uint16_t)faultState << (uint16_t)PWM_OCTRL_PWMXFS_SHIFT) & (uint16_t)PWM_OCTRL_PWMXFS_MASK); 1050 break; 1051 default: 1052 assert(false); 1053 break; 1054 } 1055 base->SM[subModule].OCTRL = reg; 1056 } 1057 1058 /*! 1059 * @brief Set PWM fault disable mapping 1060 * 1061 * Each of the four bits of this read/write field is one-to-one associated 1062 * with the four FAULTx inputs of fault channel 0/1. The PWM output will be turned 1063 * off if there is a logic 1 on an FAULTx input and a 1 in the corresponding 1064 * bit of this field. A reset sets all bits in this field. 1065 * 1066 * @param base PWM peripheral base address 1067 * @param subModule PWM submodule to configure 1068 * @param pwmChannel PWM channel to configure 1069 * @param pwm_fault_channels PWM fault channel to configure 1070 * @param value Fault disable mapping mask value 1071 * enumeration ::pwm_fault_disable_t 1072 */ 1073 static inline void PWM_SetupFaultDisableMap(PWM_Type *base, 1074 pwm_submodule_t subModule, 1075 pwm_channels_t pwmChannel, 1076 pwm_fault_channels_t pwm_fault_channels, 1077 uint16_t value) 1078 { 1079 uint16_t reg = base->SM[subModule].DISMAP[pwm_fault_channels]; 1080 switch (pwmChannel) 1081 { 1082 case kPWM_PwmA: 1083 reg &= ~((uint16_t)PWM_DISMAP_DIS0A_MASK); 1084 reg |= (((uint16_t)(value) << (uint16_t)PWM_DISMAP_DIS0A_SHIFT) & (uint16_t)PWM_DISMAP_DIS0A_MASK); 1085 break; 1086 case kPWM_PwmB: 1087 reg &= ~((uint16_t)PWM_DISMAP_DIS0B_MASK); 1088 reg |= (((uint16_t)(value) << (uint16_t)PWM_DISMAP_DIS0B_SHIFT) & (uint16_t)PWM_DISMAP_DIS0B_MASK); 1089 break; 1090 case kPWM_PwmX: 1091 reg &= ~((uint16_t)PWM_DISMAP_DIS0X_MASK); 1092 reg |= (((uint16_t)(value) << (uint16_t)PWM_DISMAP_DIS0X_SHIFT) & (uint16_t)PWM_DISMAP_DIS0X_MASK); 1093 break; 1094 default: 1095 assert(false); 1096 break; 1097 } 1098 base->SM[subModule].DISMAP[pwm_fault_channels] = reg; 1099 } 1100 1101 /*! 1102 * @brief Set PWM output enable 1103 * 1104 * This feature allows the user to enable the PWM Output. 1105 * 1106 * @param base PWM peripheral base address 1107 * @param pwmChannel PWM channel to configure 1108 * @param subModule PWM submodule to configure 1109 */ 1110 static inline void PWM_OutputEnable(PWM_Type *base, pwm_channels_t pwmChannel, pwm_submodule_t subModule) 1111 { 1112 /* Set PWM output */ 1113 switch (pwmChannel) 1114 { 1115 case kPWM_PwmA: 1116 base->OUTEN |= ((uint16_t)1U << ((uint16_t)PWM_OUTEN_PWMA_EN_SHIFT + (uint16_t)subModule)); 1117 break; 1118 case kPWM_PwmB: 1119 base->OUTEN |= ((uint16_t)1U << ((uint16_t)PWM_OUTEN_PWMB_EN_SHIFT + (uint16_t)subModule)); 1120 break; 1121 case kPWM_PwmX: 1122 base->OUTEN |= ((uint16_t)1U << ((uint16_t)PWM_OUTEN_PWMX_EN_SHIFT + (uint16_t)subModule)); 1123 break; 1124 default: 1125 assert(false); 1126 break; 1127 } 1128 } 1129 1130 /*! 1131 * @brief Set PWM output disable 1132 * 1133 *This feature allows the user to disable the PWM output. 1134 * 1135 * @param base PWM peripheral base address 1136 * @param pwmChannel PWM channel to configure 1137 * @param subModule PWM submodule to configure 1138 */ 1139 static inline void PWM_OutputDisable(PWM_Type *base, pwm_channels_t pwmChannel, pwm_submodule_t subModule) 1140 { 1141 switch (pwmChannel) 1142 { 1143 case kPWM_PwmA: 1144 base->OUTEN &= ~((uint16_t)1U << ((uint16_t)PWM_OUTEN_PWMA_EN_SHIFT + (uint16_t)subModule)); 1145 break; 1146 case kPWM_PwmB: 1147 base->OUTEN &= ~((uint16_t)1U << ((uint16_t)PWM_OUTEN_PWMB_EN_SHIFT + (uint16_t)subModule)); 1148 break; 1149 case kPWM_PwmX: 1150 base->OUTEN &= ~((uint16_t)1U << ((uint16_t)PWM_OUTEN_PWMX_EN_SHIFT + (uint16_t)subModule)); 1151 break; 1152 default: 1153 assert(false); 1154 break; 1155 } 1156 } 1157 1158 /*! 1159 * @brief Get the dutycycle value. 1160 * 1161 * @param base PWM peripheral base address 1162 * @param subModule PWM submodule to configure 1163 * @param pwmChannel PWM channel to configure 1164 * 1165 * @return Current channel dutycycle value. 1166 */ 1167 uint8_t PWM_GetPwmChannelState(PWM_Type *base, pwm_submodule_t subModule, pwm_channels_t pwmChannel); 1168 1169 /*! 1170 * @brief Set PWM output in idle status (high or low). 1171 * 1172 * @note This API should call after PWM_SetupPwm() APIs, and PWMX submodule is not supported. 1173 * 1174 * @param base PWM peripheral base address 1175 * @param pwmChannel PWM channel to configure 1176 * @param subModule PWM submodule to configure 1177 * @param idleStatus True: PWM output is high in idle status; false: PWM output is low in idle status. 1178 * 1179 * @return kStatus_Fail if there was error setting up the signal; kStatus_Success if set output idle success 1180 */ 1181 status_t PWM_SetOutputToIdle(PWM_Type *base, pwm_channels_t pwmChannel, pwm_submodule_t subModule, bool idleStatus); 1182 1183 /*! 1184 * @brief Set the pwm submodule prescaler. 1185 * 1186 * @param base PWM peripheral base address 1187 * @param subModule PWM submodule to configure 1188 * @param prescaler Set prescaler value 1189 */ 1190 void PWM_SetClockMode(PWM_Type *base, pwm_submodule_t subModule, pwm_clock_prescale_t prescaler); 1191 1192 /*! 1193 * @brief This function enables-disables the forcing of the output of a given eFlexPwm channel to logic 0. 1194 * 1195 * @param base PWM peripheral base address 1196 * @param pwmChannel PWM channel to configure 1197 * @param subModule PWM submodule to configure 1198 * @param forcetozero True: Enable the pwm force output to zero; False: Disable the pwm output resumes normal 1199 * function. 1200 */ 1201 void PWM_SetPwmForceOutputToZero(PWM_Type *base, 1202 pwm_submodule_t subModule, 1203 pwm_channels_t pwmChannel, 1204 bool forcetozero); 1205 1206 /*! 1207 * @brief This function set the output state of the PWM pin as requested for the current cycle. 1208 * 1209 * @param base PWM peripheral base address 1210 * @param subModule PWM submodule to configure 1211 * @param pwmChannel PWM channel to configure 1212 * @param outputstate Set pwm output state, see @ref pwm_output_state_t. 1213 */ 1214 void PWM_SetChannelOutput(PWM_Type *base, 1215 pwm_submodule_t subModule, 1216 pwm_channels_t pwmChannel, 1217 pwm_output_state_t outputstate); 1218 1219 #if defined(__cplusplus) 1220 } 1221 #endif 1222 1223 /*! @}*/ 1224 1225 #endif /* _FSL_PWM_H_ */
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