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File indexing completed on 2025-05-11 08:23:00
0001 /* 0002 * Copyright (c) 2015-2016, Freescale Semiconductor, Inc. 0003 * Copyright 2016-2022 NXP 0004 * All rights reserved. 0005 * 0006 * SPDX-License-Identifier: BSD-3-Clause 0007 */ 0008 #ifndef _FSL_LPUART_H_ 0009 #define _FSL_LPUART_H_ 0010 0011 #include "fsl_common.h" 0012 0013 /*! 0014 * @addtogroup lpuart_driver 0015 * @{ 0016 */ 0017 0018 /******************************************************************************* 0019 * Definitions 0020 ******************************************************************************/ 0021 0022 /*! @name Driver version */ 0023 /*@{*/ 0024 /*! @brief LPUART driver version. */ 0025 #define FSL_LPUART_DRIVER_VERSION (MAKE_VERSION(2, 7, 0)) 0026 /*@}*/ 0027 0028 /*! @brief Retry times for waiting flag. */ 0029 #ifndef UART_RETRY_TIMES 0030 #define UART_RETRY_TIMES 0U /* Defining to zero means to keep waiting for the flag until it is assert/deassert. */ 0031 #endif 0032 0033 /*! @brief Error codes for the LPUART driver. */ 0034 enum 0035 { 0036 kStatus_LPUART_TxBusy = MAKE_STATUS(kStatusGroup_LPUART, 0), /*!< TX busy */ 0037 kStatus_LPUART_RxBusy = MAKE_STATUS(kStatusGroup_LPUART, 1), /*!< RX busy */ 0038 kStatus_LPUART_TxIdle = MAKE_STATUS(kStatusGroup_LPUART, 2), /*!< LPUART transmitter is idle. */ 0039 kStatus_LPUART_RxIdle = MAKE_STATUS(kStatusGroup_LPUART, 3), /*!< LPUART receiver is idle. */ 0040 kStatus_LPUART_TxWatermarkTooLarge = MAKE_STATUS(kStatusGroup_LPUART, 4), /*!< TX FIFO watermark too large */ 0041 kStatus_LPUART_RxWatermarkTooLarge = MAKE_STATUS(kStatusGroup_LPUART, 5), /*!< RX FIFO watermark too large */ 0042 kStatus_LPUART_FlagCannotClearManually = MAKE_STATUS(kStatusGroup_LPUART, 6), /*!< Some flag can't manually clear */ 0043 kStatus_LPUART_Error = MAKE_STATUS(kStatusGroup_LPUART, 7), /*!< Error happens on LPUART. */ 0044 kStatus_LPUART_RxRingBufferOverrun = 0045 MAKE_STATUS(kStatusGroup_LPUART, 8), /*!< LPUART RX software ring buffer overrun. */ 0046 kStatus_LPUART_RxHardwareOverrun = MAKE_STATUS(kStatusGroup_LPUART, 9), /*!< LPUART RX receiver overrun. */ 0047 kStatus_LPUART_NoiseError = MAKE_STATUS(kStatusGroup_LPUART, 10), /*!< LPUART noise error. */ 0048 kStatus_LPUART_FramingError = MAKE_STATUS(kStatusGroup_LPUART, 11), /*!< LPUART framing error. */ 0049 kStatus_LPUART_ParityError = MAKE_STATUS(kStatusGroup_LPUART, 12), /*!< LPUART parity error. */ 0050 kStatus_LPUART_BaudrateNotSupport = 0051 MAKE_STATUS(kStatusGroup_LPUART, 13), /*!< Baudrate is not support in current clock source */ 0052 kStatus_LPUART_IdleLineDetected = MAKE_STATUS(kStatusGroup_LPUART, 14), /*!< IDLE flag. */ 0053 kStatus_LPUART_Timeout = MAKE_STATUS(kStatusGroup_LPUART, 15), /*!< LPUART times out. */ 0054 }; 0055 0056 /*! @brief LPUART parity mode. */ 0057 typedef enum _lpuart_parity_mode 0058 { 0059 kLPUART_ParityDisabled = 0x0U, /*!< Parity disabled */ 0060 kLPUART_ParityEven = 0x2U, /*!< Parity enabled, type even, bit setting: PE|PT = 10 */ 0061 kLPUART_ParityOdd = 0x3U, /*!< Parity enabled, type odd, bit setting: PE|PT = 11 */ 0062 } lpuart_parity_mode_t; 0063 0064 /*! @brief LPUART data bits count. */ 0065 typedef enum _lpuart_data_bits 0066 { 0067 kLPUART_EightDataBits = 0x0U, /*!< Eight data bit */ 0068 #if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT 0069 kLPUART_SevenDataBits = 0x1U, /*!< Seven data bit */ 0070 #endif 0071 } lpuart_data_bits_t; 0072 0073 /*! @brief LPUART stop bit count. */ 0074 typedef enum _lpuart_stop_bit_count 0075 { 0076 kLPUART_OneStopBit = 0U, /*!< One stop bit */ 0077 kLPUART_TwoStopBit = 1U, /*!< Two stop bits */ 0078 } lpuart_stop_bit_count_t; 0079 0080 #if defined(FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT) && FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT 0081 /*! @brief LPUART transmit CTS source. */ 0082 typedef enum _lpuart_transmit_cts_source 0083 { 0084 kLPUART_CtsSourcePin = 0U, /*!< CTS resource is the LPUART_CTS pin. */ 0085 kLPUART_CtsSourceMatchResult = 1U, /*!< CTS resource is the match result. */ 0086 } lpuart_transmit_cts_source_t; 0087 0088 /*! @brief LPUART transmit CTS configure. */ 0089 typedef enum _lpuart_transmit_cts_config 0090 { 0091 kLPUART_CtsSampleAtStart = 0U, /*!< CTS input is sampled at the start of each character. */ 0092 kLPUART_CtsSampleAtIdle = 1U, /*!< CTS input is sampled when the transmitter is idle */ 0093 } lpuart_transmit_cts_config_t; 0094 #endif 0095 0096 /*! @brief LPUART idle flag type defines when the receiver starts counting. */ 0097 typedef enum _lpuart_idle_type_select 0098 { 0099 kLPUART_IdleTypeStartBit = 0U, /*!< Start counting after a valid start bit. */ 0100 kLPUART_IdleTypeStopBit = 1U, /*!< Start counting after a stop bit. */ 0101 } lpuart_idle_type_select_t; 0102 0103 /*! @brief LPUART idle detected configuration. 0104 * This structure defines the number of idle characters that must be received before 0105 * the IDLE flag is set. 0106 */ 0107 typedef enum _lpuart_idle_config 0108 { 0109 kLPUART_IdleCharacter1 = 0U, /*!< the number of idle characters. */ 0110 kLPUART_IdleCharacter2 = 1U, /*!< the number of idle characters. */ 0111 kLPUART_IdleCharacter4 = 2U, /*!< the number of idle characters. */ 0112 kLPUART_IdleCharacter8 = 3U, /*!< the number of idle characters. */ 0113 kLPUART_IdleCharacter16 = 4U, /*!< the number of idle characters. */ 0114 kLPUART_IdleCharacter32 = 5U, /*!< the number of idle characters. */ 0115 kLPUART_IdleCharacter64 = 6U, /*!< the number of idle characters. */ 0116 kLPUART_IdleCharacter128 = 7U, /*!< the number of idle characters. */ 0117 } lpuart_idle_config_t; 0118 0119 /*! 0120 * @brief LPUART interrupt configuration structure, default settings all disabled. 0121 * 0122 * This structure contains the settings for all LPUART interrupt configurations. 0123 */ 0124 enum _lpuart_interrupt_enable 0125 { 0126 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT 0127 kLPUART_LinBreakInterruptEnable = (LPUART_BAUD_LBKDIE_MASK >> 8U), /*!< LIN break detect. bit 7 */ 0128 #endif 0129 kLPUART_RxActiveEdgeInterruptEnable = (LPUART_BAUD_RXEDGIE_MASK >> 8U), /*!< Receive Active Edge. bit 6 */ 0130 kLPUART_TxDataRegEmptyInterruptEnable = (LPUART_CTRL_TIE_MASK), /*!< Transmit data register empty. bit 23 */ 0131 kLPUART_TransmissionCompleteInterruptEnable = (LPUART_CTRL_TCIE_MASK), /*!< Transmission complete. bit 22 */ 0132 kLPUART_RxDataRegFullInterruptEnable = (LPUART_CTRL_RIE_MASK), /*!< Receiver data register full. bit 21 */ 0133 kLPUART_IdleLineInterruptEnable = (LPUART_CTRL_ILIE_MASK), /*!< Idle line. bit 20 */ 0134 kLPUART_RxOverrunInterruptEnable = (LPUART_CTRL_ORIE_MASK), /*!< Receiver Overrun. bit 27 */ 0135 kLPUART_NoiseErrorInterruptEnable = (LPUART_CTRL_NEIE_MASK), /*!< Noise error flag. bit 26 */ 0136 kLPUART_FramingErrorInterruptEnable = (LPUART_CTRL_FEIE_MASK), /*!< Framing error flag. bit 25 */ 0137 kLPUART_ParityErrorInterruptEnable = (LPUART_CTRL_PEIE_MASK), /*!< Parity error flag. bit 24 */ 0138 #if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING 0139 kLPUART_Match1InterruptEnable = (LPUART_CTRL_MA1IE_MASK), /*!< Parity error flag. bit 15 */ 0140 kLPUART_Match2InterruptEnable = (LPUART_CTRL_MA2IE_MASK), /*!< Parity error flag. bit 14 */ 0141 #endif 0142 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO 0143 kLPUART_TxFifoOverflowInterruptEnable = (LPUART_FIFO_TXOFE_MASK), /*!< Transmit FIFO Overflow. bit 9 */ 0144 kLPUART_RxFifoUnderflowInterruptEnable = (LPUART_FIFO_RXUFE_MASK), /*!< Receive FIFO Underflow. bit 8 */ 0145 #endif 0146 0147 kLPUART_AllInterruptEnable = kLPUART_RxActiveEdgeInterruptEnable | kLPUART_TxDataRegEmptyInterruptEnable | 0148 kLPUART_TransmissionCompleteInterruptEnable | kLPUART_RxDataRegFullInterruptEnable | 0149 kLPUART_IdleLineInterruptEnable | kLPUART_RxOverrunInterruptEnable | 0150 kLPUART_NoiseErrorInterruptEnable | kLPUART_FramingErrorInterruptEnable | 0151 kLPUART_ParityErrorInterruptEnable 0152 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT 0153 | kLPUART_LinBreakInterruptEnable 0154 #endif 0155 #if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING 0156 | kLPUART_Match1InterruptEnable | kLPUART_Match2InterruptEnable 0157 #endif 0158 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO 0159 | kLPUART_TxFifoOverflowInterruptEnable | kLPUART_RxFifoUnderflowInterruptEnable 0160 #endif 0161 , 0162 }; 0163 0164 /*! 0165 * @brief LPUART status flags. 0166 * 0167 * This provides constants for the LPUART status flags for use in the LPUART functions. 0168 */ 0169 enum _lpuart_flags 0170 { 0171 kLPUART_TxDataRegEmptyFlag = 0172 (LPUART_STAT_TDRE_MASK), /*!< Transmit data register empty flag, sets when transmit buffer is empty. bit 23 */ 0173 kLPUART_TransmissionCompleteFlag = 0174 (LPUART_STAT_TC_MASK), /*!< Transmission complete flag, sets when transmission activity complete. bit 22 */ 0175 kLPUART_RxDataRegFullFlag = (LPUART_STAT_RDRF_MASK), /*!< Receive data register full flag, sets when the receive 0176 data buffer is full. bit 21 */ 0177 kLPUART_IdleLineFlag = (LPUART_STAT_IDLE_MASK), /*!< Idle line detect flag, sets when idle line detected. bit 20 */ 0178 kLPUART_RxOverrunFlag = (LPUART_STAT_OR_MASK), /*!< Receive Overrun, sets when new data is received before data is 0179 read from receive register. bit 19 */ 0180 kLPUART_NoiseErrorFlag = (LPUART_STAT_NF_MASK), /*!< Receive takes 3 samples of each received bit. If any of these 0181 samples differ, noise flag sets. bit 18 */ 0182 kLPUART_FramingErrorFlag = 0183 (LPUART_STAT_FE_MASK), /*!< Frame error flag, sets if logic 0 was detected where stop bit expected. bit 17 */ 0184 kLPUART_ParityErrorFlag = (LPUART_STAT_PF_MASK), /*!< If parity enabled, sets upon parity error detection. bit 16 */ 0185 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT 0186 kLPUART_LinBreakFlag = (LPUART_STAT_LBKDIF_MASK), /*!< LIN break detect interrupt flag, sets when LIN break 0187 char detected and LIN circuit enabled. bit 31 */ 0188 #endif 0189 kLPUART_RxActiveEdgeFlag = (LPUART_STAT_RXEDGIF_MASK), /*!< Receive pin active edge interrupt flag, sets when active 0190 edge detected. bit 30 */ 0191 kLPUART_RxActiveFlag = 0192 (LPUART_STAT_RAF_MASK), /*!< Receiver Active Flag (RAF), sets at beginning of valid start. bit 24 */ 0193 #if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING 0194 kLPUART_DataMatch1Flag = 0195 LPUART_STAT_MA1F_MASK, /*!< The next character to be read from LPUART_DATA matches MA1. bit 15 */ 0196 kLPUART_DataMatch2Flag = 0197 LPUART_STAT_MA2F_MASK, /*!< The next character to be read from LPUART_DATA matches MA2. bit 14 */ 0198 #endif 0199 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO 0200 kLPUART_TxFifoEmptyFlag = 0201 (LPUART_FIFO_TXEMPT_MASK >> 16), /*!< TXEMPT bit, sets if transmit buffer is empty. bit 7 */ 0202 kLPUART_RxFifoEmptyFlag = 0203 (LPUART_FIFO_RXEMPT_MASK >> 16), /*!< RXEMPT bit, sets if receive buffer is empty. bit 6 */ 0204 kLPUART_TxFifoOverflowFlag = 0205 (LPUART_FIFO_TXOF_MASK >> 16), /*!< TXOF bit, sets if transmit buffer overflow occurred. bit 1 */ 0206 kLPUART_RxFifoUnderflowFlag = 0207 (LPUART_FIFO_RXUF_MASK >> 16), /*!< RXUF bit, sets if receive buffer underflow occurred. bit 0 */ 0208 #endif 0209 0210 kLPUART_AllClearFlags = kLPUART_RxActiveEdgeFlag | kLPUART_IdleLineFlag | kLPUART_RxOverrunFlag | 0211 kLPUART_NoiseErrorFlag | kLPUART_FramingErrorFlag | kLPUART_ParityErrorFlag 0212 #if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING 0213 | kLPUART_DataMatch1Flag | kLPUART_DataMatch2Flag 0214 #endif 0215 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO 0216 | kLPUART_TxFifoOverflowFlag | kLPUART_RxFifoUnderflowFlag 0217 #endif 0218 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT 0219 | kLPUART_LinBreakFlag 0220 #endif 0221 , 0222 0223 kLPUART_AllFlags = 0224 kLPUART_RxActiveEdgeFlag | kLPUART_IdleLineFlag | kLPUART_RxOverrunFlag | kLPUART_TxDataRegEmptyFlag | 0225 kLPUART_TransmissionCompleteFlag | kLPUART_RxDataRegFullFlag | kLPUART_RxActiveFlag | kLPUART_NoiseErrorFlag | 0226 kLPUART_FramingErrorFlag | kLPUART_ParityErrorFlag 0227 #if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING 0228 | kLPUART_DataMatch1Flag | kLPUART_DataMatch2Flag 0229 #endif 0230 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO 0231 | kLPUART_TxFifoOverflowFlag | kLPUART_RxFifoUnderflowFlag | kLPUART_TxFifoEmptyFlag | kLPUART_RxFifoEmptyFlag 0232 #endif 0233 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT 0234 | kLPUART_LinBreakFlag 0235 #endif 0236 , 0237 }; 0238 0239 /*! @brief LPUART configuration structure. */ 0240 typedef struct _lpuart_config 0241 { 0242 uint32_t baudRate_Bps; /*!< LPUART baud rate */ 0243 lpuart_parity_mode_t parityMode; /*!< Parity mode, disabled (default), even, odd */ 0244 lpuart_data_bits_t dataBitsCount; /*!< Data bits count, eight (default), seven */ 0245 bool isMsb; /*!< Data bits order, LSB (default), MSB */ 0246 #if defined(FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT) && FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT 0247 lpuart_stop_bit_count_t stopBitCount; /*!< Number of stop bits, 1 stop bit (default) or 2 stop bits */ 0248 #endif 0249 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO 0250 uint8_t txFifoWatermark; /*!< TX FIFO watermark */ 0251 uint8_t rxFifoWatermark; /*!< RX FIFO watermark */ 0252 #endif 0253 #if defined(FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT) && FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT 0254 bool enableRxRTS; /*!< RX RTS enable */ 0255 bool enableTxCTS; /*!< TX CTS enable */ 0256 lpuart_transmit_cts_source_t txCtsSource; /*!< TX CTS source */ 0257 lpuart_transmit_cts_config_t txCtsConfig; /*!< TX CTS configure */ 0258 #endif 0259 lpuart_idle_type_select_t rxIdleType; /*!< RX IDLE type. */ 0260 lpuart_idle_config_t rxIdleConfig; /*!< RX IDLE configuration. */ 0261 bool enableTx; /*!< Enable TX */ 0262 bool enableRx; /*!< Enable RX */ 0263 } lpuart_config_t; 0264 0265 /*! @brief LPUART transfer structure. */ 0266 typedef struct _lpuart_transfer 0267 { 0268 /* 0269 * Use separate TX and RX data pointer, because TX data is const data. 0270 * The member data is kept for backward compatibility. 0271 */ 0272 union 0273 { 0274 uint8_t *data; /*!< The buffer of data to be transfer.*/ 0275 uint8_t *rxData; /*!< The buffer to receive data. */ 0276 const uint8_t *txData; /*!< The buffer of data to be sent. */ 0277 }; 0278 size_t dataSize; /*!< The byte count to be transfer. */ 0279 } lpuart_transfer_t; 0280 0281 /* Forward declaration of the handle typedef. */ 0282 typedef struct _lpuart_handle lpuart_handle_t; 0283 0284 /*! @brief LPUART transfer callback function. */ 0285 typedef void (*lpuart_transfer_callback_t)(LPUART_Type *base, lpuart_handle_t *handle, status_t status, void *userData); 0286 0287 /*! @brief LPUART handle structure. */ 0288 struct _lpuart_handle 0289 { 0290 const uint8_t *volatile txData; /*!< Address of remaining data to send. */ 0291 volatile size_t txDataSize; /*!< Size of the remaining data to send. */ 0292 size_t txDataSizeAll; /*!< Size of the data to send out. */ 0293 uint8_t *volatile rxData; /*!< Address of remaining data to receive. */ 0294 volatile size_t rxDataSize; /*!< Size of the remaining data to receive. */ 0295 size_t rxDataSizeAll; /*!< Size of the data to receive. */ 0296 0297 uint8_t *rxRingBuffer; /*!< Start address of the receiver ring buffer. */ 0298 size_t rxRingBufferSize; /*!< Size of the ring buffer. */ 0299 volatile uint16_t rxRingBufferHead; /*!< Index for the driver to store received data into ring buffer. */ 0300 volatile uint16_t rxRingBufferTail; /*!< Index for the user to get data from the ring buffer. */ 0301 0302 lpuart_transfer_callback_t callback; /*!< Callback function. */ 0303 void *userData; /*!< LPUART callback function parameter.*/ 0304 0305 volatile uint8_t txState; /*!< TX transfer state. */ 0306 volatile uint8_t rxState; /*!< RX transfer state. */ 0307 0308 #if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT 0309 bool isSevenDataBits; /*!< Seven data bits flag. */ 0310 #endif 0311 }; 0312 0313 /* Typedef for interrupt handler. */ 0314 typedef void (*lpuart_isr_t)(LPUART_Type *base, void *handle); 0315 0316 /******************************************************************************* 0317 * Variables 0318 ******************************************************************************/ 0319 /* Array of LPUART handle. */ 0320 extern void *s_lpuartHandle[]; 0321 0322 /* Array of LPUART IRQ number. */ 0323 #if defined(FSL_FEATURE_LPUART_HAS_SEPARATE_RX_TX_IRQ) && FSL_FEATURE_LPUART_HAS_SEPARATE_RX_TX_IRQ 0324 extern const IRQn_Type s_lpuartTxIRQ[]; 0325 #else 0326 extern const IRQn_Type s_lpuartIRQ[]; 0327 #endif 0328 0329 /* LPUART ISR for transactional APIs. */ 0330 extern lpuart_isr_t s_lpuartIsr[]; 0331 0332 /******************************************************************************* 0333 * API 0334 ******************************************************************************/ 0335 0336 #if defined(__cplusplus) 0337 extern "C" { 0338 #endif /* _cplusplus */ 0339 0340 #if defined(FSL_FEATURE_LPUART_HAS_GLOBAL) && FSL_FEATURE_LPUART_HAS_GLOBAL 0341 0342 /*! 0343 * @name Software Reset 0344 * @{ 0345 */ 0346 0347 /*! 0348 * @brief Resets the LPUART using software. 0349 * 0350 * This function resets all internal logic and registers except the Global Register. 0351 * Remains set until cleared by software. 0352 * 0353 * @param base LPUART peripheral base address. 0354 */ 0355 static inline void LPUART_SoftwareReset(LPUART_Type *base) 0356 { 0357 base->GLOBAL |= LPUART_GLOBAL_RST_MASK; 0358 base->GLOBAL &= ~LPUART_GLOBAL_RST_MASK; 0359 } 0360 /* @} */ 0361 #endif /*FSL_FEATURE_LPUART_HAS_GLOBAL*/ 0362 0363 /*! 0364 * @name Initialization and deinitialization 0365 * @{ 0366 */ 0367 0368 /*! 0369 * @brief Initializes an LPUART instance with the user configuration structure and the peripheral clock. 0370 * 0371 * This function configures the LPUART module with user-defined settings. Call the LPUART_GetDefaultConfig() function 0372 * to configure the configuration structure and get the default configuration. 0373 * The example below shows how to use this API to configure the LPUART. 0374 * @code 0375 * lpuart_config_t lpuartConfig; 0376 * lpuartConfig.baudRate_Bps = 115200U; 0377 * lpuartConfig.parityMode = kLPUART_ParityDisabled; 0378 * lpuartConfig.dataBitsCount = kLPUART_EightDataBits; 0379 * lpuartConfig.isMsb = false; 0380 * lpuartConfig.stopBitCount = kLPUART_OneStopBit; 0381 * lpuartConfig.txFifoWatermark = 0; 0382 * lpuartConfig.rxFifoWatermark = 1; 0383 * LPUART_Init(LPUART1, &lpuartConfig, 20000000U); 0384 * @endcode 0385 * 0386 * @param base LPUART peripheral base address. 0387 * @param config Pointer to a user-defined configuration structure. 0388 * @param srcClock_Hz LPUART clock source frequency in HZ. 0389 * @retval kStatus_LPUART_BaudrateNotSupport Baudrate is not support in current clock source. 0390 * @retval kStatus_Success LPUART initialize succeed 0391 */ 0392 #ifndef __rtems__ 0393 status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz); 0394 #else /* __rtems__ */ 0395 status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz, bool do_reset); 0396 #endif /* __rtems__ */ 0397 0398 /*! 0399 * @brief Deinitializes a LPUART instance. 0400 * 0401 * This function waits for transmit to complete, disables TX and RX, and disables the LPUART clock. 0402 * 0403 * @param base LPUART peripheral base address. 0404 */ 0405 void LPUART_Deinit(LPUART_Type *base); 0406 0407 /*! 0408 * @brief Gets the default configuration structure. 0409 * 0410 * This function initializes the LPUART configuration structure to a default value. The default 0411 * values are: 0412 * lpuartConfig->baudRate_Bps = 115200U; 0413 * lpuartConfig->parityMode = kLPUART_ParityDisabled; 0414 * lpuartConfig->dataBitsCount = kLPUART_EightDataBits; 0415 * lpuartConfig->isMsb = false; 0416 * lpuartConfig->stopBitCount = kLPUART_OneStopBit; 0417 * lpuartConfig->txFifoWatermark = 0; 0418 * lpuartConfig->rxFifoWatermark = 1; 0419 * lpuartConfig->rxIdleType = kLPUART_IdleTypeStartBit; 0420 * lpuartConfig->rxIdleConfig = kLPUART_IdleCharacter1; 0421 * lpuartConfig->enableTx = false; 0422 * lpuartConfig->enableRx = false; 0423 * 0424 * @param config Pointer to a configuration structure. 0425 */ 0426 void LPUART_GetDefaultConfig(lpuart_config_t *config); 0427 /* @} */ 0428 0429 /*! 0430 * @name Module configuration 0431 * @{ 0432 */ 0433 /*! 0434 * @brief Sets the LPUART instance baudrate. 0435 * 0436 * This function configures the LPUART module baudrate. This function is used to update 0437 * the LPUART module baudrate after the LPUART module is initialized by the LPUART_Init. 0438 * @code 0439 * LPUART_SetBaudRate(LPUART1, 115200U, 20000000U); 0440 * @endcode 0441 * 0442 * @param base LPUART peripheral base address. 0443 * @param baudRate_Bps LPUART baudrate to be set. 0444 * @param srcClock_Hz LPUART clock source frequency in HZ. 0445 * @retval kStatus_LPUART_BaudrateNotSupport Baudrate is not supported in the current clock source. 0446 * @retval kStatus_Success Set baudrate succeeded. 0447 */ 0448 status_t LPUART_SetBaudRate(LPUART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz); 0449 0450 /*! 0451 * @brief Enable 9-bit data mode for LPUART. 0452 * 0453 * This function set the 9-bit mode for LPUART module. The 9th bit is not used for parity thus can be modified by user. 0454 * 0455 * @param base LPUART peripheral base address. 0456 * @param enable true to enable, flase to disable. 0457 */ 0458 void LPUART_Enable9bitMode(LPUART_Type *base, bool enable); 0459 0460 /*! 0461 * @brief Set the LPUART address. 0462 * 0463 * This function configures the address for LPUART module that works as slave in 9-bit data mode. One or two address 0464 * fields can be configured. When the address field's match enable bit is set, the frame it receices with MSB being 0465 * 1 is considered as an address frame, otherwise it is considered as data frame. Once the address frame matches one 0466 * of slave's own addresses, this slave is addressed. This address frame and its following data frames are stored in 0467 * the receive buffer, otherwise the frames will be discarded. To un-address a slave, just send an address frame with 0468 * unmatched address. 0469 * 0470 * @note Any LPUART instance joined in the multi-slave system can work as slave. The position of the address mark is the 0471 * same as the parity bit when parity is enabled for 8 bit and 9 bit data formats. 0472 * 0473 * @param base LPUART peripheral base address. 0474 * @param address1 LPUART slave address1. 0475 * @param address2 LPUART slave address2. 0476 */ 0477 static inline void LPUART_SetMatchAddress(LPUART_Type *base, uint16_t address1, uint16_t address2) 0478 { 0479 /* Configure match address. */ 0480 uint32_t address = ((uint32_t)address2 << 16U) | (uint32_t)address1 | 0x1000100UL; 0481 base->MATCH = address; 0482 } 0483 0484 /*! 0485 * @brief Enable the LPUART match address feature. 0486 * 0487 * @param base LPUART peripheral base address. 0488 * @param match1 true to enable match address1, false to disable. 0489 * @param match2 true to enable match address2, false to disable. 0490 */ 0491 static inline void LPUART_EnableMatchAddress(LPUART_Type *base, bool match1, bool match2) 0492 { 0493 /* Configure match address1 enable bit. */ 0494 if (match1) 0495 { 0496 base->BAUD |= (uint32_t)LPUART_BAUD_MAEN1_MASK; 0497 } 0498 else 0499 { 0500 base->BAUD &= ~(uint32_t)LPUART_BAUD_MAEN1_MASK; 0501 } 0502 /* Configure match address2 enable bit. */ 0503 if (match2) 0504 { 0505 base->BAUD |= (uint32_t)LPUART_BAUD_MAEN2_MASK; 0506 } 0507 else 0508 { 0509 base->BAUD &= ~(uint32_t)LPUART_BAUD_MAEN2_MASK; 0510 } 0511 } 0512 0513 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO 0514 /*! 0515 * @brief Sets the rx FIFO watermark. 0516 * 0517 * @param base LPUART peripheral base address. 0518 * @param water Rx FIFO watermark. 0519 */ 0520 static inline void LPUART_SetRxFifoWatermark(LPUART_Type *base, uint8_t water) 0521 { 0522 assert((uint8_t)FSL_FEATURE_LPUART_FIFO_SIZEn(base) > water); 0523 base->WATER = (base->WATER & ~LPUART_WATER_RXWATER_MASK) | LPUART_WATER_RXWATER(water); 0524 } 0525 0526 /*! 0527 * @brief Sets the tx FIFO watermark. 0528 * 0529 * @param base LPUART peripheral base address. 0530 * @param water Tx FIFO watermark. 0531 */ 0532 static inline void LPUART_SetTxFifoWatermark(LPUART_Type *base, uint8_t water) 0533 { 0534 assert((uint8_t)FSL_FEATURE_LPUART_FIFO_SIZEn(base) > water); 0535 base->WATER = (base->WATER & ~LPUART_WATER_TXWATER_MASK) | LPUART_WATER_TXWATER(water); 0536 } 0537 #endif 0538 /* @} */ 0539 0540 /*! 0541 * @name Status 0542 * @{ 0543 */ 0544 0545 /*! 0546 * @brief Gets LPUART status flags. 0547 * 0548 * This function gets all LPUART status flags. The flags are returned as the logical 0549 * OR value of the enumerators @ref _lpuart_flags. To check for a specific status, 0550 * compare the return value with enumerators in the @ref _lpuart_flags. 0551 * For example, to check whether the TX is empty: 0552 * @code 0553 * if (kLPUART_TxDataRegEmptyFlag & LPUART_GetStatusFlags(LPUART1)) 0554 * { 0555 * ... 0556 * } 0557 * @endcode 0558 * 0559 * @param base LPUART peripheral base address. 0560 * @return LPUART status flags which are ORed by the enumerators in the _lpuart_flags. 0561 */ 0562 uint32_t LPUART_GetStatusFlags(LPUART_Type *base); 0563 0564 /*! 0565 * @brief Clears status flags with a provided mask. 0566 * 0567 * This function clears LPUART status flags with a provided mask. Automatically cleared flags 0568 * can't be cleared by this function. 0569 * Flags that can only cleared or set by hardware are: 0570 * kLPUART_TxDataRegEmptyFlag, kLPUART_TransmissionCompleteFlag, kLPUART_RxDataRegFullFlag, 0571 * kLPUART_RxActiveFlag, kLPUART_NoiseErrorFlag, kLPUART_ParityErrorFlag, 0572 * kLPUART_TxFifoEmptyFlag,kLPUART_RxFifoEmptyFlag 0573 * Note: This API should be called when the Tx/Rx is idle, otherwise it takes no effects. 0574 * 0575 * @param base LPUART peripheral base address. 0576 * @param mask the status flags to be cleared. The user can use the enumerators in the 0577 * _lpuart_status_flag_t to do the OR operation and get the mask. 0578 * @return 0 succeed, others failed. 0579 * @retval kStatus_LPUART_FlagCannotClearManually The flag can't be cleared by this function but 0580 * it is cleared automatically by hardware. 0581 * @retval kStatus_Success Status in the mask are cleared. 0582 */ 0583 status_t LPUART_ClearStatusFlags(LPUART_Type *base, uint32_t mask); 0584 /* @} */ 0585 0586 /*! 0587 * @name Interrupts 0588 * @{ 0589 */ 0590 0591 /*! 0592 * @brief Enables LPUART interrupts according to a provided mask. 0593 * 0594 * This function enables the LPUART interrupts according to a provided mask. The mask 0595 * is a logical OR of enumeration members. See the @ref _lpuart_interrupt_enable. 0596 * This examples shows how to enable TX empty interrupt and RX full interrupt: 0597 * @code 0598 * LPUART_EnableInterrupts(LPUART1,kLPUART_TxDataRegEmptyInterruptEnable | kLPUART_RxDataRegFullInterruptEnable); 0599 * @endcode 0600 * 0601 * @param base LPUART peripheral base address. 0602 * @param mask The interrupts to enable. Logical OR of @ref _lpuart_interrupt_enable. 0603 */ 0604 void LPUART_EnableInterrupts(LPUART_Type *base, uint32_t mask); 0605 0606 /*! 0607 * @brief Disables LPUART interrupts according to a provided mask. 0608 * 0609 * This function disables the LPUART interrupts according to a provided mask. The mask 0610 * is a logical OR of enumeration members. See @ref _lpuart_interrupt_enable. 0611 * This example shows how to disable the TX empty interrupt and RX full interrupt: 0612 * @code 0613 * LPUART_DisableInterrupts(LPUART1,kLPUART_TxDataRegEmptyInterruptEnable | kLPUART_RxDataRegFullInterruptEnable); 0614 * @endcode 0615 * 0616 * @param base LPUART peripheral base address. 0617 * @param mask The interrupts to disable. Logical OR of @ref _lpuart_interrupt_enable. 0618 */ 0619 void LPUART_DisableInterrupts(LPUART_Type *base, uint32_t mask); 0620 0621 /*! 0622 * @brief Gets enabled LPUART interrupts. 0623 * 0624 * This function gets the enabled LPUART interrupts. The enabled interrupts are returned 0625 * as the logical OR value of the enumerators @ref _lpuart_interrupt_enable. To check 0626 * a specific interrupt enable status, compare the return value with enumerators 0627 * in @ref _lpuart_interrupt_enable. 0628 * For example, to check whether the TX empty interrupt is enabled: 0629 * @code 0630 * uint32_t enabledInterrupts = LPUART_GetEnabledInterrupts(LPUART1); 0631 * 0632 * if (kLPUART_TxDataRegEmptyInterruptEnable & enabledInterrupts) 0633 * { 0634 * ... 0635 * } 0636 * @endcode 0637 * 0638 * @param base LPUART peripheral base address. 0639 * @return LPUART interrupt flags which are logical OR of the enumerators in @ref _lpuart_interrupt_enable. 0640 */ 0641 uint32_t LPUART_GetEnabledInterrupts(LPUART_Type *base); 0642 /* @} */ 0643 0644 #if defined(FSL_FEATURE_LPUART_HAS_DMA_ENABLE) && FSL_FEATURE_LPUART_HAS_DMA_ENABLE 0645 /*! 0646 * @name DMA Configuration 0647 * @{ 0648 */ 0649 /*! 0650 * @brief Gets the LPUART data register address. 0651 * 0652 * This function returns the LPUART data register address, which is mainly used by the DMA/eDMA. 0653 * 0654 * @param base LPUART peripheral base address. 0655 * @return LPUART data register addresses which are used both by the transmitter and receiver. 0656 */ 0657 static inline uint32_t LPUART_GetDataRegisterAddress(LPUART_Type *base) 0658 { 0659 return (uint32_t) & (base->DATA); 0660 } 0661 0662 /*! 0663 * @brief Enables or disables the LPUART transmitter DMA request. 0664 * 0665 * This function enables or disables the transmit data register empty flag, STAT[TDRE], to generate DMA requests. 0666 * 0667 * @param base LPUART peripheral base address. 0668 * @param enable True to enable, false to disable. 0669 */ 0670 static inline void LPUART_EnableTxDMA(LPUART_Type *base, bool enable) 0671 { 0672 if (enable) 0673 { 0674 base->BAUD |= LPUART_BAUD_TDMAE_MASK; 0675 } 0676 else 0677 { 0678 base->BAUD &= ~LPUART_BAUD_TDMAE_MASK; 0679 } 0680 } 0681 0682 /*! 0683 * @brief Enables or disables the LPUART receiver DMA. 0684 * 0685 * This function enables or disables the receiver data register full flag, STAT[RDRF], to generate DMA requests. 0686 * 0687 * @param base LPUART peripheral base address. 0688 * @param enable True to enable, false to disable. 0689 */ 0690 static inline void LPUART_EnableRxDMA(LPUART_Type *base, bool enable) 0691 { 0692 if (enable) 0693 { 0694 base->BAUD |= LPUART_BAUD_RDMAE_MASK; 0695 } 0696 else 0697 { 0698 base->BAUD &= ~LPUART_BAUD_RDMAE_MASK; 0699 } 0700 } 0701 /* @} */ 0702 #endif /* FSL_FEATURE_LPUART_HAS_DMA_ENABLE */ 0703 0704 /*! 0705 * @name Bus Operations 0706 * @{ 0707 */ 0708 0709 /*! 0710 * @brief Get the LPUART instance from peripheral base address. 0711 * 0712 * @param base LPUART peripheral base address. 0713 * @return LPUART instance. 0714 */ 0715 uint32_t LPUART_GetInstance(LPUART_Type *base); 0716 0717 /*! 0718 * @brief Enables or disables the LPUART transmitter. 0719 * 0720 * This function enables or disables the LPUART transmitter. 0721 * 0722 * @param base LPUART peripheral base address. 0723 * @param enable True to enable, false to disable. 0724 */ 0725 static inline void LPUART_EnableTx(LPUART_Type *base, bool enable) 0726 { 0727 if (enable) 0728 { 0729 base->CTRL |= LPUART_CTRL_TE_MASK; 0730 } 0731 else 0732 { 0733 base->CTRL &= ~LPUART_CTRL_TE_MASK; 0734 } 0735 } 0736 0737 /*! 0738 * @brief Enables or disables the LPUART receiver. 0739 * 0740 * This function enables or disables the LPUART receiver. 0741 * 0742 * @param base LPUART peripheral base address. 0743 * @param enable True to enable, false to disable. 0744 */ 0745 static inline void LPUART_EnableRx(LPUART_Type *base, bool enable) 0746 { 0747 if (enable) 0748 { 0749 base->CTRL |= LPUART_CTRL_RE_MASK; 0750 } 0751 else 0752 { 0753 base->CTRL &= ~LPUART_CTRL_RE_MASK; 0754 } 0755 } 0756 0757 /*! 0758 * @brief Writes to the transmitter register. 0759 * 0760 * This function writes data to the transmitter register directly. The upper layer must 0761 * ensure that the TX register is empty or that the TX FIFO has room before calling this function. 0762 * 0763 * @param base LPUART peripheral base address. 0764 * @param data Data write to the TX register. 0765 */ 0766 static inline void LPUART_WriteByte(LPUART_Type *base, uint8_t data) 0767 { 0768 base->DATA = data; 0769 } 0770 0771 /*! 0772 * @brief Reads the receiver register. 0773 * 0774 * This function reads data from the receiver register directly. The upper layer must 0775 * ensure that the receiver register is full or that the RX FIFO has data before calling this function. 0776 * 0777 * @param base LPUART peripheral base address. 0778 * @return Data read from data register. 0779 */ 0780 static inline uint8_t LPUART_ReadByte(LPUART_Type *base) 0781 { 0782 #if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT 0783 uint32_t ctrl = base->CTRL; 0784 uint8_t result; 0785 bool isSevenDataBits = (((ctrl & LPUART_CTRL_M7_MASK) != 0U) || 0786 (((ctrl & LPUART_CTRL_M7_MASK) == 0U) && ((ctrl & LPUART_CTRL_M_MASK) == 0U) && 0787 ((ctrl & LPUART_CTRL_PE_MASK) != 0U))); 0788 0789 if (isSevenDataBits) 0790 { 0791 result = (uint8_t)(base->DATA & 0x7FU); 0792 } 0793 else 0794 { 0795 result = (uint8_t)base->DATA; 0796 } 0797 0798 return result; 0799 #else 0800 return (uint8_t)(base->DATA); 0801 #endif 0802 } 0803 0804 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO 0805 /*! 0806 * @brief Gets the rx FIFO data count. 0807 * 0808 * @param base LPUART peripheral base address. 0809 * @return rx FIFO data count. 0810 */ 0811 static inline uint8_t LPUART_GetRxFifoCount(LPUART_Type *base) 0812 { 0813 return (uint8_t)((base->WATER & LPUART_WATER_RXCOUNT_MASK) >> LPUART_WATER_RXCOUNT_SHIFT); 0814 } 0815 0816 /*! 0817 * @brief Gets the tx FIFO data count. 0818 * 0819 * @param base LPUART peripheral base address. 0820 * @return tx FIFO data count. 0821 */ 0822 static inline uint8_t LPUART_GetTxFifoCount(LPUART_Type *base) 0823 { 0824 return (uint8_t)((base->WATER & LPUART_WATER_TXCOUNT_MASK) >> LPUART_WATER_TXCOUNT_SHIFT); 0825 } 0826 #endif 0827 0828 /*! 0829 * @brief Transmit an address frame in 9-bit data mode. 0830 * 0831 * @param base LPUART peripheral base address. 0832 * @param address LPUART slave address. 0833 */ 0834 void LPUART_SendAddress(LPUART_Type *base, uint8_t address); 0835 0836 /*! 0837 * @brief Writes to the transmitter register using a blocking method. 0838 * 0839 * This function polls the transmitter register, first waits for the register to be empty or TX FIFO to have room, 0840 * and writes data to the transmitter buffer, then waits for the dat to be sent out to the bus. 0841 * 0842 * @param base LPUART peripheral base address. 0843 * @param data Start address of the data to write. 0844 * @param length Size of the data to write. 0845 * @retval kStatus_LPUART_Timeout Transmission timed out and was aborted. 0846 * @retval kStatus_Success Successfully wrote all data. 0847 */ 0848 status_t LPUART_WriteBlocking(LPUART_Type *base, const uint8_t *data, size_t length); 0849 0850 /*! 0851 * @brief Reads the receiver data register using a blocking method. 0852 * 0853 * This function polls the receiver register, waits for the receiver register full or receiver FIFO 0854 * has data, and reads data from the TX register. 0855 * 0856 * @param base LPUART peripheral base address. 0857 * @param data Start address of the buffer to store the received data. 0858 * @param length Size of the buffer. 0859 * @retval kStatus_LPUART_RxHardwareOverrun Receiver overrun happened while receiving data. 0860 * @retval kStatus_LPUART_NoiseError Noise error happened while receiving data. 0861 * @retval kStatus_LPUART_FramingError Framing error happened while receiving data. 0862 * @retval kStatus_LPUART_ParityError Parity error happened while receiving data. 0863 * @retval kStatus_LPUART_Timeout Transmission timed out and was aborted. 0864 * @retval kStatus_Success Successfully received all data. 0865 */ 0866 status_t LPUART_ReadBlocking(LPUART_Type *base, uint8_t *data, size_t length); 0867 0868 /* @} */ 0869 0870 /*! 0871 * @name Transactional 0872 * @{ 0873 */ 0874 0875 /*! 0876 * @brief Initializes the LPUART handle. 0877 * 0878 * This function initializes the LPUART handle, which can be used for other LPUART 0879 * transactional APIs. Usually, for a specified LPUART instance, 0880 * call this API once to get the initialized handle. 0881 * 0882 * The LPUART driver supports the "background" receiving, which means that user can set up 0883 * an RX ring buffer optionally. Data received is stored into the ring buffer even when the 0884 * user doesn't call the LPUART_TransferReceiveNonBlocking() API. If there is already data received 0885 * in the ring buffer, the user can get the received data from the ring buffer directly. 0886 * The ring buffer is disabled if passing NULL as @p ringBuffer. 0887 * 0888 * @param base LPUART peripheral base address. 0889 * @param handle LPUART handle pointer. 0890 * @param callback Callback function. 0891 * @param userData User data. 0892 */ 0893 void LPUART_TransferCreateHandle(LPUART_Type *base, 0894 lpuart_handle_t *handle, 0895 lpuart_transfer_callback_t callback, 0896 void *userData); 0897 /*! 0898 * @brief Transmits a buffer of data using the interrupt method. 0899 * 0900 * This function send data using an interrupt method. This is a non-blocking function, which 0901 * returns directly without waiting for all data written to the transmitter register. When 0902 * all data is written to the TX register in the ISR, the LPUART driver calls the callback 0903 * function and passes the @ref kStatus_LPUART_TxIdle as status parameter. 0904 * 0905 * @note The kStatus_LPUART_TxIdle is passed to the upper layer when all data are written 0906 * to the TX register. However, there is no check to ensure that all the data sent out. Before disabling the TX, 0907 * check the kLPUART_TransmissionCompleteFlag to ensure that the transmit is finished. 0908 * 0909 * @param base LPUART peripheral base address. 0910 * @param handle LPUART handle pointer. 0911 * @param xfer LPUART transfer structure, see #lpuart_transfer_t. 0912 * @retval kStatus_Success Successfully start the data transmission. 0913 * @retval kStatus_LPUART_TxBusy Previous transmission still not finished, data not all written to the TX register. 0914 * @retval kStatus_InvalidArgument Invalid argument. 0915 */ 0916 status_t LPUART_TransferSendNonBlocking(LPUART_Type *base, lpuart_handle_t *handle, lpuart_transfer_t *xfer); 0917 0918 /*! 0919 * @brief Sets up the RX ring buffer. 0920 * 0921 * This function sets up the RX ring buffer to a specific UART handle. 0922 * 0923 * When the RX ring buffer is used, data received is stored into the ring buffer even when 0924 * the user doesn't call the UART_TransferReceiveNonBlocking() API. If there is already data received 0925 * in the ring buffer, the user can get the received data from the ring buffer directly. 0926 * 0927 * @note When using RX ring buffer, one byte is reserved for internal use. In other 0928 * words, if @p ringBufferSize is 32, then only 31 bytes are used for saving data. 0929 * 0930 * @param base LPUART peripheral base address. 0931 * @param handle LPUART handle pointer. 0932 * @param ringBuffer Start address of ring buffer for background receiving. Pass NULL to disable the ring buffer. 0933 * @param ringBufferSize size of the ring buffer. 0934 */ 0935 void LPUART_TransferStartRingBuffer(LPUART_Type *base, 0936 lpuart_handle_t *handle, 0937 uint8_t *ringBuffer, 0938 size_t ringBufferSize); 0939 0940 /*! 0941 * @brief Aborts the background transfer and uninstalls the ring buffer. 0942 * 0943 * This function aborts the background transfer and uninstalls the ring buffer. 0944 * 0945 * @param base LPUART peripheral base address. 0946 * @param handle LPUART handle pointer. 0947 */ 0948 void LPUART_TransferStopRingBuffer(LPUART_Type *base, lpuart_handle_t *handle); 0949 0950 /*! 0951 * @brief Get the length of received data in RX ring buffer. 0952 * 0953 * @param base LPUART peripheral base address. 0954 * @param handle LPUART handle pointer. 0955 * @return Length of received data in RX ring buffer. 0956 */ 0957 size_t LPUART_TransferGetRxRingBufferLength(LPUART_Type *base, lpuart_handle_t *handle); 0958 0959 /*! 0960 * @brief Aborts the interrupt-driven data transmit. 0961 * 0962 * This function aborts the interrupt driven data sending. The user can get the remainBtyes to find out 0963 * how many bytes are not sent out. 0964 * 0965 * @param base LPUART peripheral base address. 0966 * @param handle LPUART handle pointer. 0967 */ 0968 void LPUART_TransferAbortSend(LPUART_Type *base, lpuart_handle_t *handle); 0969 0970 /*! 0971 * @brief Gets the number of bytes that have been sent out to bus. 0972 * 0973 * This function gets the number of bytes that have been sent out to bus by an interrupt method. 0974 * 0975 * @param base LPUART peripheral base address. 0976 * @param handle LPUART handle pointer. 0977 * @param count Send bytes count. 0978 * @retval kStatus_NoTransferInProgress No send in progress. 0979 * @retval kStatus_InvalidArgument Parameter is invalid. 0980 * @retval kStatus_Success Get successfully through the parameter \p count; 0981 */ 0982 status_t LPUART_TransferGetSendCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count); 0983 0984 /*! 0985 * @brief Receives a buffer of data using the interrupt method. 0986 * 0987 * This function receives data using an interrupt method. This is a non-blocking function 0988 * which returns without waiting to ensure that all data are received. 0989 * If the RX ring buffer is used and not empty, the data in the ring buffer is copied and 0990 * the parameter @p receivedBytes shows how many bytes are copied from the ring buffer. 0991 * After copying, if the data in the ring buffer is not enough for read, the receive 0992 * request is saved by the LPUART driver. When the new data arrives, the receive request 0993 * is serviced first. When all data is received, the LPUART driver notifies the upper layer 0994 * through a callback function and passes a status parameter kStatus_UART_RxIdle. 0995 * For example, the upper layer needs 10 bytes but there are only 5 bytes in ring buffer. 0996 * The 5 bytes are copied to xfer->data, which returns with the 0997 * parameter @p receivedBytes set to 5. For the remaining 5 bytes, the newly arrived data is 0998 * saved from xfer->data[5]. When 5 bytes are received, the LPUART driver notifies the upper layer. 0999 * If the RX ring buffer is not enabled, this function enables the RX and RX interrupt 1000 * to receive data to xfer->data. When all data is received, the upper layer is notified. 1001 * 1002 * @param base LPUART peripheral base address. 1003 * @param handle LPUART handle pointer. 1004 * @param xfer LPUART transfer structure, see uart_transfer_t. 1005 * @param receivedBytes Bytes received from the ring buffer directly. 1006 * @retval kStatus_Success Successfully queue the transfer into the transmit queue. 1007 * @retval kStatus_LPUART_RxBusy Previous receive request is not finished. 1008 * @retval kStatus_InvalidArgument Invalid argument. 1009 */ 1010 status_t LPUART_TransferReceiveNonBlocking(LPUART_Type *base, 1011 lpuart_handle_t *handle, 1012 lpuart_transfer_t *xfer, 1013 size_t *receivedBytes); 1014 1015 /*! 1016 * @brief Aborts the interrupt-driven data receiving. 1017 * 1018 * This function aborts the interrupt-driven data receiving. The user can get the remainBytes to find out 1019 * how many bytes not received yet. 1020 * 1021 * @param base LPUART peripheral base address. 1022 * @param handle LPUART handle pointer. 1023 */ 1024 void LPUART_TransferAbortReceive(LPUART_Type *base, lpuart_handle_t *handle); 1025 1026 /*! 1027 * @brief Gets the number of bytes that have been received. 1028 * 1029 * This function gets the number of bytes that have been received. 1030 * 1031 * @param base LPUART peripheral base address. 1032 * @param handle LPUART handle pointer. 1033 * @param count Receive bytes count. 1034 * @retval kStatus_NoTransferInProgress No receive in progress. 1035 * @retval kStatus_InvalidArgument Parameter is invalid. 1036 * @retval kStatus_Success Get successfully through the parameter \p count; 1037 */ 1038 status_t LPUART_TransferGetReceiveCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count); 1039 1040 /*! 1041 * @brief LPUART IRQ handle function. 1042 * 1043 * This function handles the LPUART transmit and receive IRQ request. 1044 * 1045 * @param base LPUART peripheral base address. 1046 * @param irqHandle LPUART handle pointer. 1047 */ 1048 void LPUART_TransferHandleIRQ(LPUART_Type *base, void *irqHandle); 1049 1050 /*! 1051 * @brief LPUART Error IRQ handle function. 1052 * 1053 * This function handles the LPUART error IRQ request. 1054 * 1055 * @param base LPUART peripheral base address. 1056 * @param irqHandle LPUART handle pointer. 1057 */ 1058 void LPUART_TransferHandleErrorIRQ(LPUART_Type *base, void *irqHandle); 1059 1060 /* @} */ 1061 1062 #if defined(__cplusplus) 1063 } 1064 #endif 1065 1066 /*! @}*/ 1067 1068 #endif /* _FSL_LPUART_H_ */
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