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0001 /* 0002 * Copyright (c) 2015, Freescale Semiconductor, Inc. 0003 * Copyright 2016-2022 NXP 0004 * All rights reserved. 0005 * 0006 * SPDX-License-Identifier: BSD-3-Clause 0007 */ 0008 #ifndef _FSL_LPI2C_H_ 0009 #define _FSL_LPI2C_H_ 0010 0011 #include <stddef.h> 0012 #include "fsl_device_registers.h" 0013 #include "fsl_common.h" 0014 0015 /******************************************************************************* 0016 * Definitions 0017 ******************************************************************************/ 0018 0019 /*! 0020 * @addtogroup lpi2c 0021 * @{ 0022 */ 0023 0024 /*! @name Driver version */ 0025 /*@{*/ 0026 /*! @brief LPI2C driver version. */ 0027 #define FSL_LPI2C_DRIVER_VERSION (MAKE_VERSION(2, 4, 1)) 0028 /*@}*/ 0029 0030 /*! @brief Retry times for waiting flag. */ 0031 #ifndef I2C_RETRY_TIMES 0032 #define I2C_RETRY_TIMES 0U /* Define to zero means keep waiting until the flag is assert/deassert. */ 0033 #endif 0034 0035 /*! @brief LPI2C status return codes. */ 0036 enum 0037 { 0038 kStatus_LPI2C_Busy = MAKE_STATUS(kStatusGroup_LPI2C, 0), /*!< The master is already performing a transfer. */ 0039 kStatus_LPI2C_Idle = MAKE_STATUS(kStatusGroup_LPI2C, 1), /*!< The slave driver is idle. */ 0040 kStatus_LPI2C_Nak = MAKE_STATUS(kStatusGroup_LPI2C, 2), /*!< The slave device sent a NAK in response to a byte. */ 0041 kStatus_LPI2C_FifoError = MAKE_STATUS(kStatusGroup_LPI2C, 3), /*!< FIFO under run or overrun. */ 0042 kStatus_LPI2C_BitError = MAKE_STATUS(kStatusGroup_LPI2C, 4), /*!< Transferred bit was not seen on the bus. */ 0043 kStatus_LPI2C_ArbitrationLost = MAKE_STATUS(kStatusGroup_LPI2C, 5), /*!< Arbitration lost error. */ 0044 kStatus_LPI2C_PinLowTimeout = 0045 MAKE_STATUS(kStatusGroup_LPI2C, 6), /*!< SCL or SDA were held low longer than the timeout. */ 0046 kStatus_LPI2C_NoTransferInProgress = 0047 MAKE_STATUS(kStatusGroup_LPI2C, 7), /*!< Attempt to abort a transfer when one is not in progress. */ 0048 kStatus_LPI2C_DmaRequestFail = MAKE_STATUS(kStatusGroup_LPI2C, 8), /*!< DMA request failed. */ 0049 kStatus_LPI2C_Timeout = MAKE_STATUS(kStatusGroup_LPI2C, 9), /*!< Timeout polling status flags. */ 0050 }; 0051 0052 /*! @} */ 0053 0054 /*! 0055 * @addtogroup lpi2c_master_driver 0056 * @{ 0057 */ 0058 0059 /*! 0060 * @brief LPI2C master peripheral flags. 0061 * 0062 * The following status register flags can be cleared: 0063 * - #kLPI2C_MasterEndOfPacketFlag 0064 * - #kLPI2C_MasterStopDetectFlag 0065 * - #kLPI2C_MasterNackDetectFlag 0066 * - #kLPI2C_MasterArbitrationLostFlag 0067 * - #kLPI2C_MasterFifoErrFlag 0068 * - #kLPI2C_MasterPinLowTimeoutFlag 0069 * - #kLPI2C_MasterDataMatchFlag 0070 * 0071 * All flags except #kLPI2C_MasterBusyFlag and #kLPI2C_MasterBusBusyFlag can be enabled as 0072 * interrupts. 0073 * 0074 * @note These enums are meant to be OR'd together to form a bit mask. 0075 */ 0076 enum _lpi2c_master_flags 0077 { 0078 kLPI2C_MasterTxReadyFlag = LPI2C_MSR_TDF_MASK, /*!< Transmit data flag */ 0079 kLPI2C_MasterRxReadyFlag = LPI2C_MSR_RDF_MASK, /*!< Receive data flag */ 0080 kLPI2C_MasterEndOfPacketFlag = LPI2C_MSR_EPF_MASK, /*!< End Packet flag */ 0081 kLPI2C_MasterStopDetectFlag = LPI2C_MSR_SDF_MASK, /*!< Stop detect flag */ 0082 kLPI2C_MasterNackDetectFlag = LPI2C_MSR_NDF_MASK, /*!< NACK detect flag */ 0083 kLPI2C_MasterArbitrationLostFlag = LPI2C_MSR_ALF_MASK, /*!< Arbitration lost flag */ 0084 kLPI2C_MasterFifoErrFlag = LPI2C_MSR_FEF_MASK, /*!< FIFO error flag */ 0085 kLPI2C_MasterPinLowTimeoutFlag = LPI2C_MSR_PLTF_MASK, /*!< Pin low timeout flag */ 0086 kLPI2C_MasterDataMatchFlag = LPI2C_MSR_DMF_MASK, /*!< Data match flag */ 0087 kLPI2C_MasterBusyFlag = LPI2C_MSR_MBF_MASK, /*!< Master busy flag */ 0088 kLPI2C_MasterBusBusyFlag = LPI2C_MSR_BBF_MASK, /*!< Bus busy flag */ 0089 0090 /*! All flags which are cleared by the driver upon starting a transfer. */ 0091 kLPI2C_MasterClearFlags = kLPI2C_MasterEndOfPacketFlag | kLPI2C_MasterStopDetectFlag | kLPI2C_MasterNackDetectFlag | 0092 kLPI2C_MasterArbitrationLostFlag | kLPI2C_MasterFifoErrFlag | 0093 kLPI2C_MasterPinLowTimeoutFlag | kLPI2C_MasterDataMatchFlag, 0094 /*! IRQ sources enabled by the non-blocking transactional API. */ 0095 kLPI2C_MasterIrqFlags = kLPI2C_MasterArbitrationLostFlag | kLPI2C_MasterTxReadyFlag | kLPI2C_MasterRxReadyFlag | 0096 kLPI2C_MasterStopDetectFlag | kLPI2C_MasterNackDetectFlag | kLPI2C_MasterPinLowTimeoutFlag | 0097 kLPI2C_MasterFifoErrFlag, 0098 /*! Errors to check for. */ 0099 kLPI2C_MasterErrorFlags = kLPI2C_MasterNackDetectFlag | kLPI2C_MasterArbitrationLostFlag | 0100 kLPI2C_MasterFifoErrFlag | kLPI2C_MasterPinLowTimeoutFlag 0101 }; 0102 0103 /*! @brief Direction of master and slave transfers. */ 0104 typedef enum _lpi2c_direction 0105 { 0106 kLPI2C_Write = 0U, /*!< Master transmit. */ 0107 kLPI2C_Read = 1U /*!< Master receive. */ 0108 } lpi2c_direction_t; 0109 0110 /*! @brief LPI2C pin configuration. */ 0111 typedef enum _lpi2c_master_pin_config 0112 { 0113 kLPI2C_2PinOpenDrain = 0x0U, /*!< LPI2C Configured for 2-pin open drain mode */ 0114 kLPI2C_2PinOutputOnly = 0x1U, /*!< LPI2C Configured for 2-pin output only mode (ultra-fast mode) */ 0115 kLPI2C_2PinPushPull = 0x2U, /*!< LPI2C Configured for 2-pin push-pull mode */ 0116 kLPI2C_4PinPushPull = 0x3U, /*!< LPI2C Configured for 4-pin push-pull mode */ 0117 kLPI2C_2PinOpenDrainWithSeparateSlave = 0118 0x4U, /*!< LPI2C Configured for 2-pin open drain mode with separate LPI2C slave */ 0119 kLPI2C_2PinOutputOnlyWithSeparateSlave = 0120 0x5U, /*!< LPI2C Configured for 2-pin output only mode(ultra-fast mode) with separate LPI2C slave */ 0121 kLPI2C_2PinPushPullWithSeparateSlave = 0122 0x6U, /*!< LPI2C Configured for 2-pin push-pull mode with separate LPI2C slave */ 0123 kLPI2C_4PinPushPullWithInvertedOutput = 0x7U /*!< LPI2C Configured for 4-pin push-pull mode(inverted outputs) */ 0124 } lpi2c_master_pin_config_t; 0125 0126 /*! @brief LPI2C master host request selection. */ 0127 typedef enum _lpi2c_host_request_source 0128 { 0129 kLPI2C_HostRequestExternalPin = 0x0U, /*!< Select the LPI2C_HREQ pin as the host request input */ 0130 kLPI2C_HostRequestInputTrigger = 0x1U, /*!< Select the input trigger as the host request input */ 0131 } lpi2c_host_request_source_t; 0132 0133 /*! @brief LPI2C master host request pin polarity configuration. */ 0134 typedef enum _lpi2c_host_request_polarity 0135 { 0136 kLPI2C_HostRequestPinActiveLow = 0x0U, /*!< Configure the LPI2C_HREQ pin active low */ 0137 kLPI2C_HostRequestPinActiveHigh = 0x1U /*!< Configure the LPI2C_HREQ pin active high */ 0138 } lpi2c_host_request_polarity_t; 0139 0140 /*! 0141 * @brief Structure with settings to initialize the LPI2C master module. 0142 * 0143 * This structure holds configuration settings for the LPI2C peripheral. To initialize this 0144 * structure to reasonable defaults, call the LPI2C_MasterGetDefaultConfig() function and 0145 * pass a pointer to your configuration structure instance. 0146 * 0147 * The configuration structure can be made constant so it resides in flash. 0148 */ 0149 typedef struct _lpi2c_master_config 0150 { 0151 bool enableMaster; /*!< Whether to enable master mode. */ 0152 bool enableDoze; /*!< Whether master is enabled in doze mode. */ 0153 bool debugEnable; /*!< Enable transfers to continue when halted in debug mode. */ 0154 bool ignoreAck; /*!< Whether to ignore ACK/NACK. */ 0155 lpi2c_master_pin_config_t pinConfig; /*!< The pin configuration option. */ 0156 uint32_t baudRate_Hz; /*!< Desired baud rate in Hertz. */ 0157 uint32_t busIdleTimeout_ns; /*!< Bus idle timeout in nanoseconds. Set to 0 to disable. */ 0158 uint32_t pinLowTimeout_ns; /*!< Pin low timeout in nanoseconds. Set to 0 to disable. */ 0159 uint8_t sdaGlitchFilterWidth_ns; /*!< Width in nanoseconds of glitch filter on SDA pin. Set to 0 to disable. */ 0160 uint8_t sclGlitchFilterWidth_ns; /*!< Width in nanoseconds of glitch filter on SCL pin. Set to 0 to disable. */ 0161 struct 0162 { 0163 bool enable; /*!< Enable host request. */ 0164 lpi2c_host_request_source_t source; /*!< Host request source. */ 0165 lpi2c_host_request_polarity_t polarity; /*!< Host request pin polarity. */ 0166 } hostRequest; /*!< Host request options. */ 0167 } lpi2c_master_config_t; 0168 0169 /*! @brief LPI2C master data match configuration modes. */ 0170 typedef enum _lpi2c_data_match_config_mode 0171 { 0172 kLPI2C_MatchDisabled = 0x0U, /*!< LPI2C Match Disabled */ 0173 kLPI2C_1stWordEqualsM0OrM1 = 0x2U, /*!< LPI2C Match Enabled and 1st data word equals MATCH0 OR MATCH1 */ 0174 kLPI2C_AnyWordEqualsM0OrM1 = 0x3U, /*!< LPI2C Match Enabled and any data word equals MATCH0 OR MATCH1 */ 0175 kLPI2C_1stWordEqualsM0And2ndWordEqualsM1 = 0176 0x4U, /*!< LPI2C Match Enabled and 1st data word equals MATCH0, 2nd data equals MATCH1 */ 0177 kLPI2C_AnyWordEqualsM0AndNextWordEqualsM1 = 0178 0x5U, /*!< LPI2C Match Enabled and any data word equals MATCH0, next data equals MATCH1 */ 0179 kLPI2C_1stWordAndM1EqualsM0AndM1 = 0180 0x6U, /*!< LPI2C Match Enabled and 1st data word and MATCH0 equals MATCH0 and MATCH1 */ 0181 kLPI2C_AnyWordAndM1EqualsM0AndM1 = 0182 0x7U /*!< LPI2C Match Enabled and any data word and MATCH0 equals MATCH0 and MATCH1 */ 0183 } lpi2c_data_match_config_mode_t; 0184 0185 /*! @brief LPI2C master data match configuration structure. */ 0186 typedef struct _lpi2c_match_config 0187 { 0188 lpi2c_data_match_config_mode_t matchMode; /*!< Data match configuration setting. */ 0189 bool rxDataMatchOnly; /*!< When set to true, received data is ignored until a successful match. */ 0190 uint32_t match0; /*!< Match value 0. */ 0191 uint32_t match1; /*!< Match value 1. */ 0192 } lpi2c_data_match_config_t; 0193 0194 /* Forward declaration of the transfer descriptor and handle typedefs. */ 0195 typedef struct _lpi2c_master_transfer lpi2c_master_transfer_t; 0196 typedef struct _lpi2c_master_handle lpi2c_master_handle_t; 0197 0198 /*! 0199 * @brief Master completion callback function pointer type. 0200 * 0201 * This callback is used only for the non-blocking master transfer API. Specify the callback you wish to use 0202 * in the call to LPI2C_MasterTransferCreateHandle(). 0203 * 0204 * @param base The LPI2C peripheral base address. 0205 * @param completionStatus Either kStatus_Success or an error code describing how the transfer completed. 0206 * @param userData Arbitrary pointer-sized value passed from the application. 0207 */ 0208 typedef void (*lpi2c_master_transfer_callback_t)(LPI2C_Type *base, 0209 lpi2c_master_handle_t *handle, 0210 status_t completionStatus, 0211 void *userData); 0212 0213 /*! 0214 * @brief Transfer option flags. 0215 * 0216 * @note These enumerations are intended to be OR'd together to form a bit mask of options for 0217 * the #_lpi2c_master_transfer::flags field. 0218 */ 0219 enum _lpi2c_master_transfer_flags 0220 { 0221 kLPI2C_TransferDefaultFlag = 0x00U, /*!< Transfer starts with a start signal, stops with a stop signal. */ 0222 kLPI2C_TransferNoStartFlag = 0x01U, /*!< Don't send a start condition, address, and sub address */ 0223 kLPI2C_TransferRepeatedStartFlag = 0x02U, /*!< Send a repeated start condition */ 0224 kLPI2C_TransferNoStopFlag = 0x04U, /*!< Don't send a stop condition. */ 0225 }; 0226 0227 /*! 0228 * @brief Non-blocking transfer descriptor structure. 0229 * 0230 * This structure is used to pass transaction parameters to the LPI2C_MasterTransferNonBlocking() API. 0231 */ 0232 struct _lpi2c_master_transfer 0233 { 0234 uint32_t flags; /*!< Bit mask of options for the transfer. See enumeration #_lpi2c_master_transfer_flags for 0235 available options. Set to 0 or #kLPI2C_TransferDefaultFlag for normal transfers. */ 0236 uint16_t slaveAddress; /*!< The 7-bit slave address. */ 0237 lpi2c_direction_t direction; /*!< Either #kLPI2C_Read or #kLPI2C_Write. */ 0238 uint32_t subaddress; /*!< Sub address. Transferred MSB first. */ 0239 size_t subaddressSize; /*!< Length of sub address to send in bytes. Maximum size is 4 bytes. */ 0240 void *data; /*!< Pointer to data to transfer. */ 0241 size_t dataSize; /*!< Number of bytes to transfer. */ 0242 }; 0243 0244 /*! 0245 * @brief Driver handle for master non-blocking APIs. 0246 * @note The contents of this structure are private and subject to change. 0247 */ 0248 struct _lpi2c_master_handle 0249 { 0250 uint8_t state; /*!< Transfer state machine current state. */ 0251 uint16_t remainingBytes; /*!< Remaining byte count in current state. */ 0252 uint8_t *buf; /*!< Buffer pointer for current state. */ 0253 uint16_t commandBuffer[6]; /*!< LPI2C command sequence. When all 6 command words are used: 0254 Start&addr&write[1 word] + subaddr[4 words] + restart&addr&read[1 word] */ 0255 lpi2c_master_transfer_t transfer; /*!< Copy of the current transfer info. */ 0256 lpi2c_master_transfer_callback_t completionCallback; /*!< Callback function pointer. */ 0257 void *userData; /*!< Application data passed to callback. */ 0258 }; 0259 0260 /*! @brief Typedef for master interrupt handler, used internally for LPI2C master interrupt and EDMA transactional APIs. 0261 */ 0262 typedef void (*lpi2c_master_isr_t)(LPI2C_Type *base, void *handle); 0263 0264 /*! @} */ 0265 0266 /*! 0267 * @addtogroup lpi2c_slave_driver 0268 * @{ 0269 */ 0270 0271 /*! 0272 * @brief LPI2C slave peripheral flags. 0273 * 0274 * The following status register flags can be cleared: 0275 * - #kLPI2C_SlaveRepeatedStartDetectFlag 0276 * - #kLPI2C_SlaveStopDetectFlag 0277 * - #kLPI2C_SlaveBitErrFlag 0278 * - #kLPI2C_SlaveFifoErrFlag 0279 * 0280 * All flags except #kLPI2C_SlaveBusyFlag and #kLPI2C_SlaveBusBusyFlag can be enabled as 0281 * interrupts. 0282 * 0283 * @note These enumerations are meant to be OR'd together to form a bit mask. 0284 */ 0285 enum _lpi2c_slave_flags 0286 { 0287 kLPI2C_SlaveTxReadyFlag = LPI2C_SSR_TDF_MASK, /*!< Transmit data flag */ 0288 kLPI2C_SlaveRxReadyFlag = LPI2C_SSR_RDF_MASK, /*!< Receive data flag */ 0289 kLPI2C_SlaveAddressValidFlag = LPI2C_SSR_AVF_MASK, /*!< Address valid flag */ 0290 kLPI2C_SlaveTransmitAckFlag = LPI2C_SSR_TAF_MASK, /*!< Transmit ACK flag */ 0291 kLPI2C_SlaveRepeatedStartDetectFlag = LPI2C_SSR_RSF_MASK, /*!< Repeated start detect flag */ 0292 kLPI2C_SlaveStopDetectFlag = LPI2C_SSR_SDF_MASK, /*!< Stop detect flag */ 0293 kLPI2C_SlaveBitErrFlag = LPI2C_SSR_BEF_MASK, /*!< Bit error flag */ 0294 kLPI2C_SlaveFifoErrFlag = LPI2C_SSR_FEF_MASK, /*!< FIFO error flag */ 0295 kLPI2C_SlaveAddressMatch0Flag = LPI2C_SSR_AM0F_MASK, /*!< Address match 0 flag */ 0296 kLPI2C_SlaveAddressMatch1Flag = LPI2C_SSR_AM1F_MASK, /*!< Address match 1 flag */ 0297 kLPI2C_SlaveGeneralCallFlag = LPI2C_SSR_GCF_MASK, /*!< General call flag */ 0298 kLPI2C_SlaveBusyFlag = LPI2C_SSR_SBF_MASK, /*!< Master busy flag */ 0299 kLPI2C_SlaveBusBusyFlag = LPI2C_SSR_BBF_MASK, /*!< Bus busy flag */ 0300 /*! All flags which are cleared by the driver upon starting a transfer. */ 0301 kLPI2C_SlaveClearFlags = kLPI2C_SlaveRepeatedStartDetectFlag | kLPI2C_SlaveStopDetectFlag | kLPI2C_SlaveBitErrFlag | 0302 kLPI2C_SlaveFifoErrFlag, 0303 /*! IRQ sources enabled by the non-blocking transactional API. */ 0304 kLPI2C_SlaveIrqFlags = kLPI2C_SlaveTxReadyFlag | kLPI2C_SlaveRxReadyFlag | kLPI2C_SlaveStopDetectFlag | 0305 kLPI2C_SlaveRepeatedStartDetectFlag | kLPI2C_SlaveFifoErrFlag | kLPI2C_SlaveBitErrFlag | 0306 kLPI2C_SlaveTransmitAckFlag | kLPI2C_SlaveAddressValidFlag, 0307 /*! Errors to check for. */ 0308 kLPI2C_SlaveErrorFlags = kLPI2C_SlaveFifoErrFlag | kLPI2C_SlaveBitErrFlag 0309 }; 0310 0311 /*! @brief LPI2C slave address match options. */ 0312 typedef enum _lpi2c_slave_address_match 0313 { 0314 kLPI2C_MatchAddress0 = 0U, /*!< Match only address 0. */ 0315 kLPI2C_MatchAddress0OrAddress1 = 2U, /*!< Match either address 0 or address 1. */ 0316 kLPI2C_MatchAddress0ThroughAddress1 = 6U, /*!< Match a range of slave addresses from address 0 through address 1. */ 0317 } lpi2c_slave_address_match_t; 0318 0319 /*! 0320 * @brief Structure with settings to initialize the LPI2C slave module. 0321 * 0322 * This structure holds configuration settings for the LPI2C slave peripheral. To initialize this 0323 * structure to reasonable defaults, call the LPI2C_SlaveGetDefaultConfig() function and 0324 * pass a pointer to your configuration structure instance. 0325 * 0326 * The configuration structure can be made constant so it resides in flash. 0327 */ 0328 typedef struct _lpi2c_slave_config 0329 { 0330 bool enableSlave; /*!< Enable slave mode. */ 0331 uint8_t address0; /*!< Slave's 7-bit address. */ 0332 uint8_t address1; /*!< Alternate slave 7-bit address. */ 0333 lpi2c_slave_address_match_t addressMatchMode; /*!< Address matching options. */ 0334 bool filterDozeEnable; /*!< Enable digital glitch filter in doze mode. */ 0335 bool filterEnable; /*!< Enable digital glitch filter. */ 0336 bool enableGeneralCall; /*!< Enable general call address matching. */ 0337 struct 0338 { 0339 bool enableAck; /*!< Enables SCL clock stretching during slave-transmit address byte(s) 0340 and slave-receiver address and data byte(s) to allow software to 0341 write the Transmit ACK Register before the ACK or NACK is transmitted. 0342 Clock stretching occurs when transmitting the 9th bit. When 0343 enableAckSCLStall is enabled, there is no need to set either 0344 enableRxDataSCLStall or enableAddressSCLStall. */ 0345 bool enableTx; /*!< Enables SCL clock stretching when the transmit data flag is set 0346 during a slave-transmit transfer. */ 0347 bool enableRx; /*!< Enables SCL clock stretching when receive data flag is set during 0348 a slave-receive transfer. */ 0349 bool enableAddress; /*!< Enables SCL clock stretching when the address valid flag is asserted. */ 0350 } sclStall; 0351 bool ignoreAck; /*!< Continue transfers after a NACK is detected. */ 0352 bool enableReceivedAddressRead; /*!< Enable reading the address received address as the first byte of data. */ 0353 uint32_t sdaGlitchFilterWidth_ns; /*!< Width in nanoseconds of the digital filter on the SDA signal. Set to 0 to 0354 disable. */ 0355 uint32_t sclGlitchFilterWidth_ns; /*!< Width in nanoseconds of the digital filter on the SCL signal. Set to 0 to 0356 disable. */ 0357 uint32_t dataValidDelay_ns; /*!< Width in nanoseconds of the data valid delay. */ 0358 uint32_t clockHoldTime_ns; /*!< Width in nanoseconds of the clock hold time. */ 0359 } lpi2c_slave_config_t; 0360 0361 /*! 0362 * @brief Set of events sent to the callback for non blocking slave transfers. 0363 * 0364 * These event enumerations are used for two related purposes. First, a bit mask created by OR'ing together 0365 * events is passed to LPI2C_SlaveTransferNonBlocking() in order to specify which events to enable. 0366 * Then, when the slave callback is invoked, it is passed the current event through its @a transfer 0367 * parameter. 0368 * 0369 * @note These enumerations are meant to be OR'd together to form a bit mask of events. 0370 */ 0371 typedef enum _lpi2c_slave_transfer_event 0372 { 0373 kLPI2C_SlaveAddressMatchEvent = 0x01U, /*!< Received the slave address after a start or repeated start. */ 0374 kLPI2C_SlaveTransmitEvent = 0x02U, /*!< Callback is requested to provide data to transmit 0375 (slave-transmitter role). */ 0376 kLPI2C_SlaveReceiveEvent = 0x04U, /*!< Callback is requested to provide a buffer in which to place received 0377 data (slave-receiver role). */ 0378 kLPI2C_SlaveTransmitAckEvent = 0x08U, /*!< Callback needs to either transmit an ACK or NACK. */ 0379 kLPI2C_SlaveRepeatedStartEvent = 0x10U, /*!< A repeated start was detected. */ 0380 kLPI2C_SlaveCompletionEvent = 0x20U, /*!< A stop was detected, completing the transfer. */ 0381 0382 /*! Bit mask of all available events. */ 0383 kLPI2C_SlaveAllEvents = kLPI2C_SlaveAddressMatchEvent | kLPI2C_SlaveTransmitEvent | kLPI2C_SlaveReceiveEvent | 0384 kLPI2C_SlaveTransmitAckEvent | kLPI2C_SlaveRepeatedStartEvent | kLPI2C_SlaveCompletionEvent, 0385 } lpi2c_slave_transfer_event_t; 0386 0387 /*! @brief LPI2C slave transfer structure */ 0388 typedef struct _lpi2c_slave_transfer 0389 { 0390 lpi2c_slave_transfer_event_t event; /*!< Reason the callback is being invoked. */ 0391 uint8_t receivedAddress; /*!< Matching address send by master. */ 0392 uint8_t *data; /*!< Transfer buffer */ 0393 size_t dataSize; /*!< Transfer size */ 0394 status_t completionStatus; /*!< Success or error code describing how the transfer completed. Only applies for 0395 #kLPI2C_SlaveCompletionEvent. */ 0396 size_t transferredCount; /*!< Number of bytes actually transferred since start or last repeated start. */ 0397 } lpi2c_slave_transfer_t; 0398 0399 /* Forward declaration. */ 0400 typedef struct _lpi2c_slave_handle lpi2c_slave_handle_t; 0401 0402 /*! 0403 * @brief Slave event callback function pointer type. 0404 * 0405 * This callback is used only for the slave non-blocking transfer API. To install a callback, 0406 * use the LPI2C_SlaveSetCallback() function after you have created a handle. 0407 * 0408 * @param base Base address for the LPI2C instance on which the event occurred. 0409 * @param transfer Pointer to transfer descriptor containing values passed to and/or from the callback. 0410 * @param userData Arbitrary pointer-sized value passed from the application. 0411 */ 0412 typedef void (*lpi2c_slave_transfer_callback_t)(LPI2C_Type *base, lpi2c_slave_transfer_t *transfer, void *userData); 0413 0414 /*! 0415 * @brief LPI2C slave handle structure. 0416 * @note The contents of this structure are private and subject to change. 0417 */ 0418 struct _lpi2c_slave_handle 0419 { 0420 lpi2c_slave_transfer_t transfer; /*!< LPI2C slave transfer copy. */ 0421 bool isBusy; /*!< Whether transfer is busy. */ 0422 bool wasTransmit; /*!< Whether the last transfer was a transmit. */ 0423 uint32_t eventMask; /*!< Mask of enabled events. */ 0424 uint32_t transferredCount; /*!< Count of bytes transferred. */ 0425 lpi2c_slave_transfer_callback_t callback; /*!< Callback function called at transfer event. */ 0426 void *userData; /*!< Callback parameter passed to callback. */ 0427 }; 0428 0429 /*! @} */ 0430 0431 /******************************************************************************* 0432 * Variables 0433 ******************************************************************************/ 0434 /*! Array to map LPI2C instance number to IRQ number, used internally for LPI2C master interrupt and EDMA transactional 0435 APIs. */ 0436 extern IRQn_Type const kLpi2cIrqs[]; 0437 0438 /*! Pointer to master IRQ handler for each instance, used internally for LPI2C master interrupt and EDMA transactional 0439 APIs. */ 0440 extern lpi2c_master_isr_t s_lpi2cMasterIsr; 0441 0442 /*! Pointers to master handles for each instance, used internally for LPI2C master interrupt and EDMA transactional 0443 APIs. */ 0444 extern void *s_lpi2cMasterHandle[]; 0445 0446 /******************************************************************************* 0447 * API 0448 ******************************************************************************/ 0449 0450 #if defined(__cplusplus) 0451 extern "C" { 0452 #endif 0453 0454 /*! 0455 * @brief Returns an instance number given a base address. 0456 * 0457 * If an invalid base address is passed, debug builds will assert. Release builds will just return 0458 * instance number 0. 0459 * 0460 * @param base The LPI2C peripheral base address. 0461 * @return LPI2C instance number starting from 0. 0462 */ 0463 uint32_t LPI2C_GetInstance(LPI2C_Type *base); 0464 0465 /*! 0466 * @addtogroup lpi2c_master_driver 0467 * @{ 0468 */ 0469 0470 /*! @name Initialization and deinitialization */ 0471 /*@{*/ 0472 0473 /*! 0474 * @brief Provides a default configuration for the LPI2C master peripheral. 0475 * 0476 * This function provides the following default configuration for the LPI2C master peripheral: 0477 * @code 0478 * masterConfig->enableMaster = true; 0479 * masterConfig->debugEnable = false; 0480 * masterConfig->ignoreAck = false; 0481 * masterConfig->pinConfig = kLPI2C_2PinOpenDrain; 0482 * masterConfig->baudRate_Hz = 100000U; 0483 * masterConfig->busIdleTimeout_ns = 0; 0484 * masterConfig->pinLowTimeout_ns = 0; 0485 * masterConfig->sdaGlitchFilterWidth_ns = 0; 0486 * masterConfig->sclGlitchFilterWidth_ns = 0; 0487 * masterConfig->hostRequest.enable = false; 0488 * masterConfig->hostRequest.source = kLPI2C_HostRequestExternalPin; 0489 * masterConfig->hostRequest.polarity = kLPI2C_HostRequestPinActiveHigh; 0490 * @endcode 0491 * 0492 * After calling this function, you can override any settings in order to customize the configuration, 0493 * prior to initializing the master driver with LPI2C_MasterInit(). 0494 * 0495 * @param[out] masterConfig User provided configuration structure for default values. Refer to #lpi2c_master_config_t. 0496 */ 0497 void LPI2C_MasterGetDefaultConfig(lpi2c_master_config_t *masterConfig); 0498 0499 /*! 0500 * @brief Initializes the LPI2C master peripheral. 0501 * 0502 * This function enables the peripheral clock and initializes the LPI2C master peripheral as described by the user 0503 * provided configuration. A software reset is performed prior to configuration. 0504 * 0505 * @param base The LPI2C peripheral base address. 0506 * @param masterConfig User provided peripheral configuration. Use LPI2C_MasterGetDefaultConfig() to get a set of 0507 * defaults 0508 * that you can override. 0509 * @param sourceClock_Hz Frequency in Hertz of the LPI2C functional clock. Used to calculate the baud rate divisors, 0510 * filter widths, and timeout periods. 0511 */ 0512 void LPI2C_MasterInit(LPI2C_Type *base, const lpi2c_master_config_t *masterConfig, uint32_t sourceClock_Hz); 0513 0514 /*! 0515 * @brief Deinitializes the LPI2C master peripheral. 0516 * 0517 * This function disables the LPI2C master peripheral and gates the clock. It also performs a software 0518 * reset to restore the peripheral to reset conditions. 0519 * 0520 * @param base The LPI2C peripheral base address. 0521 */ 0522 void LPI2C_MasterDeinit(LPI2C_Type *base); 0523 0524 /*! 0525 * @brief Configures LPI2C master data match feature. 0526 * 0527 * @param base The LPI2C peripheral base address. 0528 * @param matchConfig Settings for the data match feature. 0529 */ 0530 void LPI2C_MasterConfigureDataMatch(LPI2C_Type *base, const lpi2c_data_match_config_t *matchConfig); 0531 0532 /* Not static so it can be used from fsl_lpi2c_edma.c. */ 0533 status_t LPI2C_MasterCheckAndClearError(LPI2C_Type *base, uint32_t status); 0534 0535 /* Not static so it can be used from fsl_lpi2c_edma.c. */ 0536 status_t LPI2C_CheckForBusyBus(LPI2C_Type *base); 0537 0538 /*! 0539 * @brief Performs a software reset. 0540 * 0541 * Restores the LPI2C master peripheral to reset conditions. 0542 * 0543 * @param base The LPI2C peripheral base address. 0544 */ 0545 static inline void LPI2C_MasterReset(LPI2C_Type *base) 0546 { 0547 base->MCR = LPI2C_MCR_RST_MASK; 0548 base->MCR = 0; 0549 } 0550 0551 /*! 0552 * @brief Enables or disables the LPI2C module as master. 0553 * 0554 * @param base The LPI2C peripheral base address. 0555 * @param enable Pass true to enable or false to disable the specified LPI2C as master. 0556 */ 0557 static inline void LPI2C_MasterEnable(LPI2C_Type *base, bool enable) 0558 { 0559 base->MCR = (base->MCR & ~LPI2C_MCR_MEN_MASK) | LPI2C_MCR_MEN(enable); 0560 } 0561 0562 /*@}*/ 0563 0564 /*! @name Status */ 0565 /*@{*/ 0566 0567 /*! 0568 * @brief Gets the LPI2C master status flags. 0569 * 0570 * A bit mask with the state of all LPI2C master status flags is returned. For each flag, the corresponding bit 0571 * in the return value is set if the flag is asserted. 0572 * 0573 * @param base The LPI2C peripheral base address. 0574 * @return State of the status flags: 0575 * - 1: related status flag is set. 0576 * - 0: related status flag is not set. 0577 * @see _lpi2c_master_flags 0578 */ 0579 static inline uint32_t LPI2C_MasterGetStatusFlags(LPI2C_Type *base) 0580 { 0581 return base->MSR; 0582 } 0583 0584 /*! 0585 * @brief Clears the LPI2C master status flag state. 0586 * 0587 * The following status register flags can be cleared: 0588 * - #kLPI2C_MasterEndOfPacketFlag 0589 * - #kLPI2C_MasterStopDetectFlag 0590 * - #kLPI2C_MasterNackDetectFlag 0591 * - #kLPI2C_MasterArbitrationLostFlag 0592 * - #kLPI2C_MasterFifoErrFlag 0593 * - #kLPI2C_MasterPinLowTimeoutFlag 0594 * - #kLPI2C_MasterDataMatchFlag 0595 * 0596 * Attempts to clear other flags has no effect. 0597 * 0598 * @param base The LPI2C peripheral base address. 0599 * @param statusMask A bitmask of status flags that are to be cleared. The mask is composed of 0600 * _lpi2c_master_flags enumerators OR'd together. You may pass the result of a previous call to 0601 * LPI2C_MasterGetStatusFlags(). 0602 * @see _lpi2c_master_flags. 0603 */ 0604 static inline void LPI2C_MasterClearStatusFlags(LPI2C_Type *base, uint32_t statusMask) 0605 { 0606 base->MSR = statusMask; 0607 } 0608 0609 /*@}*/ 0610 0611 /*! @name Interrupts */ 0612 /*@{*/ 0613 0614 /*! 0615 * @brief Enables the LPI2C master interrupt requests. 0616 * 0617 * All flags except #kLPI2C_MasterBusyFlag and #kLPI2C_MasterBusBusyFlag can be enabled as 0618 * interrupts. 0619 * 0620 * @param base The LPI2C peripheral base address. 0621 * @param interruptMask Bit mask of interrupts to enable. See _lpi2c_master_flags for the set 0622 * of constants that should be OR'd together to form the bit mask. 0623 */ 0624 static inline void LPI2C_MasterEnableInterrupts(LPI2C_Type *base, uint32_t interruptMask) 0625 { 0626 base->MIER |= interruptMask; 0627 } 0628 0629 /*! 0630 * @brief Disables the LPI2C master interrupt requests. 0631 * 0632 * All flags except #kLPI2C_MasterBusyFlag and #kLPI2C_MasterBusBusyFlag can be enabled as 0633 * interrupts. 0634 * 0635 * @param base The LPI2C peripheral base address. 0636 * @param interruptMask Bit mask of interrupts to disable. See _lpi2c_master_flags for the set 0637 * of constants that should be OR'd together to form the bit mask. 0638 */ 0639 static inline void LPI2C_MasterDisableInterrupts(LPI2C_Type *base, uint32_t interruptMask) 0640 { 0641 base->MIER &= ~interruptMask; 0642 } 0643 0644 /*! 0645 * @brief Returns the set of currently enabled LPI2C master interrupt requests. 0646 * 0647 * @param base The LPI2C peripheral base address. 0648 * @return A bitmask composed of _lpi2c_master_flags enumerators OR'd together to indicate the 0649 * set of enabled interrupts. 0650 */ 0651 static inline uint32_t LPI2C_MasterGetEnabledInterrupts(LPI2C_Type *base) 0652 { 0653 return base->MIER; 0654 } 0655 0656 /*@}*/ 0657 0658 /*! @name DMA control */ 0659 /*@{*/ 0660 0661 /*! 0662 * @brief Enables or disables LPI2C master DMA requests. 0663 * 0664 * @param base The LPI2C peripheral base address. 0665 * @param enableTx Enable flag for transmit DMA request. Pass true for enable, false for disable. 0666 * @param enableRx Enable flag for receive DMA request. Pass true for enable, false for disable. 0667 */ 0668 static inline void LPI2C_MasterEnableDMA(LPI2C_Type *base, bool enableTx, bool enableRx) 0669 { 0670 base->MDER = LPI2C_MDER_TDDE(enableTx) | LPI2C_MDER_RDDE(enableRx); 0671 } 0672 0673 /*! 0674 * @brief Gets LPI2C master transmit data register address for DMA transfer. 0675 * 0676 * @param base The LPI2C peripheral base address. 0677 * @return The LPI2C Master Transmit Data Register address. 0678 */ 0679 static inline uint32_t LPI2C_MasterGetTxFifoAddress(LPI2C_Type *base) 0680 { 0681 return (uint32_t)&base->MTDR; 0682 } 0683 0684 /*! 0685 * @brief Gets LPI2C master receive data register address for DMA transfer. 0686 * 0687 * @param base The LPI2C peripheral base address. 0688 * @return The LPI2C Master Receive Data Register address. 0689 */ 0690 static inline uint32_t LPI2C_MasterGetRxFifoAddress(LPI2C_Type *base) 0691 { 0692 return (uint32_t)&base->MRDR; 0693 } 0694 0695 /*@}*/ 0696 0697 /*! @name FIFO control */ 0698 /*@{*/ 0699 0700 /*! 0701 * @brief Sets the watermarks for LPI2C master FIFOs. 0702 * 0703 * @param base The LPI2C peripheral base address. 0704 * @param txWords Transmit FIFO watermark value in words. The #kLPI2C_MasterTxReadyFlag flag is set whenever 0705 * the number of words in the transmit FIFO is equal or less than @a txWords. Writing a value equal or 0706 * greater than the FIFO size is truncated. 0707 * @param rxWords Receive FIFO watermark value in words. The #kLPI2C_MasterRxReadyFlag flag is set whenever 0708 * the number of words in the receive FIFO is greater than @a rxWords. Writing a value equal or greater 0709 * than the FIFO size is truncated. 0710 */ 0711 static inline void LPI2C_MasterSetWatermarks(LPI2C_Type *base, size_t txWords, size_t rxWords) 0712 { 0713 base->MFCR = LPI2C_MFCR_TXWATER(txWords) | LPI2C_MFCR_RXWATER(rxWords); 0714 } 0715 0716 /*! 0717 * @brief Gets the current number of words in the LPI2C master FIFOs. 0718 * 0719 * @param base The LPI2C peripheral base address. 0720 * @param[out] txCount Pointer through which the current number of words in the transmit FIFO is returned. 0721 * Pass NULL if this value is not required. 0722 * @param[out] rxCount Pointer through which the current number of words in the receive FIFO is returned. 0723 * Pass NULL if this value is not required. 0724 */ 0725 static inline void LPI2C_MasterGetFifoCounts(LPI2C_Type *base, size_t *rxCount, size_t *txCount) 0726 { 0727 if (NULL != txCount) 0728 { 0729 *txCount = (base->MFSR & LPI2C_MFSR_TXCOUNT_MASK) >> LPI2C_MFSR_TXCOUNT_SHIFT; 0730 } 0731 if (NULL != rxCount) 0732 { 0733 *rxCount = (base->MFSR & LPI2C_MFSR_RXCOUNT_MASK) >> LPI2C_MFSR_RXCOUNT_SHIFT; 0734 } 0735 } 0736 0737 /*@}*/ 0738 0739 /*! @name Bus operations */ 0740 /*@{*/ 0741 0742 /*! 0743 * @brief Sets the I2C bus frequency for master transactions. 0744 * 0745 * The LPI2C master is automatically disabled and re-enabled as necessary to configure the baud 0746 * rate. Do not call this function during a transfer, or the transfer is aborted. 0747 * 0748 * @note Please note that the second parameter is the clock frequency of LPI2C module, the third 0749 * parameter means user configured bus baudrate, this implementation is different from other I2C drivers 0750 * which use baudrate configuration as second parameter and source clock frequency as third parameter. 0751 * 0752 * @param base The LPI2C peripheral base address. 0753 * @param sourceClock_Hz LPI2C functional clock frequency in Hertz. 0754 * @param baudRate_Hz Requested bus frequency in Hertz. 0755 */ 0756 void LPI2C_MasterSetBaudRate(LPI2C_Type *base, uint32_t sourceClock_Hz, uint32_t baudRate_Hz); 0757 0758 /*! 0759 * @brief Returns whether the bus is idle. 0760 * 0761 * Requires the master mode to be enabled. 0762 * 0763 * @param base The LPI2C peripheral base address. 0764 * @retval true Bus is busy. 0765 * @retval false Bus is idle. 0766 */ 0767 static inline bool LPI2C_MasterGetBusIdleState(LPI2C_Type *base) 0768 { 0769 return ((base->MSR & LPI2C_MSR_BBF_MASK) >> LPI2C_MSR_BBF_SHIFT) == 1U ? true : false; 0770 } 0771 0772 /*! 0773 * @brief Sends a START signal and slave address on the I2C bus. 0774 * 0775 * This function is used to initiate a new master mode transfer. First, the bus state is checked to ensure 0776 * that another master is not occupying the bus. Then a START signal is transmitted, followed by the 0777 * 7-bit address specified in the @a address parameter. Note that this function does not actually wait 0778 * until the START and address are successfully sent on the bus before returning. 0779 * 0780 * @param base The LPI2C peripheral base address. 0781 * @param address 7-bit slave device address, in bits [6:0]. 0782 * @param dir Master transfer direction, either #kLPI2C_Read or #kLPI2C_Write. This parameter is used to set 0783 * the R/w bit (bit 0) in the transmitted slave address. 0784 * @retval kStatus_Success START signal and address were successfully enqueued in the transmit FIFO. 0785 * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus. 0786 */ 0787 status_t LPI2C_MasterStart(LPI2C_Type *base, uint8_t address, lpi2c_direction_t dir); 0788 0789 /*! 0790 * @brief Sends a repeated START signal and slave address on the I2C bus. 0791 * 0792 * This function is used to send a Repeated START signal when a transfer is already in progress. Like 0793 * LPI2C_MasterStart(), it also sends the specified 7-bit address. 0794 * 0795 * @note This function exists primarily to maintain compatible APIs between LPI2C and I2C drivers, 0796 * as well as to better document the intent of code that uses these APIs. 0797 * 0798 * @param base The LPI2C peripheral base address. 0799 * @param address 7-bit slave device address, in bits [6:0]. 0800 * @param dir Master transfer direction, either #kLPI2C_Read or #kLPI2C_Write. This parameter is used to set 0801 * the R/w bit (bit 0) in the transmitted slave address. 0802 * @retval kStatus_Success Repeated START signal and address were successfully enqueued in the transmit FIFO. 0803 * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus. 0804 */ 0805 static inline status_t LPI2C_MasterRepeatedStart(LPI2C_Type *base, uint8_t address, lpi2c_direction_t dir) 0806 { 0807 return LPI2C_MasterStart(base, address, dir); 0808 } 0809 0810 /*! 0811 * @brief Performs a polling send transfer on the I2C bus. 0812 * 0813 * Sends up to @a txSize number of bytes to the previously addressed slave device. The slave may 0814 * reply with a NAK to any byte in order to terminate the transfer early. If this happens, this 0815 * function returns #kStatus_LPI2C_Nak. 0816 * 0817 * @param base The LPI2C peripheral base address. 0818 * @param txBuff The pointer to the data to be transferred. 0819 * @param txSize The length in bytes of the data to be transferred. 0820 * @retval kStatus_Success Data was sent successfully. 0821 * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus. 0822 * @retval #kStatus_LPI2C_Nak The slave device sent a NAK in response to a byte. 0823 * @retval #kStatus_LPI2C_FifoError FIFO under run or over run. 0824 * @retval #kStatus_LPI2C_ArbitrationLost Arbitration lost error. 0825 * @retval #kStatus_LPI2C_PinLowTimeout SCL or SDA were held low longer than the timeout. 0826 */ 0827 status_t LPI2C_MasterSend(LPI2C_Type *base, void *txBuff, size_t txSize); 0828 0829 /*! 0830 * @brief Performs a polling receive transfer on the I2C bus. 0831 * 0832 * @param base The LPI2C peripheral base address. 0833 * @param rxBuff The pointer to the data to be transferred. 0834 * @param rxSize The length in bytes of the data to be transferred. 0835 * @retval kStatus_Success Data was received successfully. 0836 * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus. 0837 * @retval #kStatus_LPI2C_Nak The slave device sent a NAK in response to a byte. 0838 * @retval #kStatus_LPI2C_FifoError FIFO under run or overrun. 0839 * @retval #kStatus_LPI2C_ArbitrationLost Arbitration lost error. 0840 * @retval #kStatus_LPI2C_PinLowTimeout SCL or SDA were held low longer than the timeout. 0841 */ 0842 status_t LPI2C_MasterReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize); 0843 0844 /*! 0845 * @brief Sends a STOP signal on the I2C bus. 0846 * 0847 * This function does not return until the STOP signal is seen on the bus, or an error occurs. 0848 * 0849 * @param base The LPI2C peripheral base address. 0850 * @retval kStatus_Success The STOP signal was successfully sent on the bus and the transaction terminated. 0851 * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus. 0852 * @retval #kStatus_LPI2C_Nak The slave device sent a NAK in response to a byte. 0853 * @retval #kStatus_LPI2C_FifoError FIFO under run or overrun. 0854 * @retval #kStatus_LPI2C_ArbitrationLost Arbitration lost error. 0855 * @retval #kStatus_LPI2C_PinLowTimeout SCL or SDA were held low longer than the timeout. 0856 */ 0857 status_t LPI2C_MasterStop(LPI2C_Type *base); 0858 0859 /*! 0860 * @brief Performs a master polling transfer on the I2C bus. 0861 * 0862 * @note The API does not return until the transfer succeeds or fails due 0863 * to error happens during transfer. 0864 * 0865 * @param base The LPI2C peripheral base address. 0866 * @param transfer Pointer to the transfer structure. 0867 * @retval kStatus_Success Data was received successfully. 0868 * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus. 0869 * @retval #kStatus_LPI2C_Nak The slave device sent a NAK in response to a byte. 0870 * @retval #kStatus_LPI2C_FifoError FIFO under run or overrun. 0871 * @retval #kStatus_LPI2C_ArbitrationLost Arbitration lost error. 0872 * @retval #kStatus_LPI2C_PinLowTimeout SCL or SDA were held low longer than the timeout. 0873 */ 0874 status_t LPI2C_MasterTransferBlocking(LPI2C_Type *base, lpi2c_master_transfer_t *transfer); 0875 0876 /*@}*/ 0877 0878 /*! @name Non-blocking */ 0879 /*@{*/ 0880 0881 /*! 0882 * @brief Creates a new handle for the LPI2C master non-blocking APIs. 0883 * 0884 * The creation of a handle is for use with the non-blocking APIs. Once a handle 0885 * is created, there is not a corresponding destroy handle. If the user wants to 0886 * terminate a transfer, the LPI2C_MasterTransferAbort() API shall be called. 0887 * 0888 * 0889 * @note The function also enables the NVIC IRQ for the input LPI2C. Need to notice 0890 * that on some SoCs the LPI2C IRQ is connected to INTMUX, in this case user needs to 0891 * enable the associated INTMUX IRQ in application. 0892 * 0893 * @param base The LPI2C peripheral base address. 0894 * @param[out] handle Pointer to the LPI2C master driver handle. 0895 * @param callback User provided pointer to the asynchronous callback function. 0896 * @param userData User provided pointer to the application callback data. 0897 */ 0898 void LPI2C_MasterTransferCreateHandle(LPI2C_Type *base, 0899 lpi2c_master_handle_t *handle, 0900 lpi2c_master_transfer_callback_t callback, 0901 void *userData); 0902 0903 /*! 0904 * @brief Performs a non-blocking transaction on the I2C bus. 0905 * 0906 * @param base The LPI2C peripheral base address. 0907 * @param handle Pointer to the LPI2C master driver handle. 0908 * @param transfer The pointer to the transfer descriptor. 0909 * @retval kStatus_Success The transaction was started successfully. 0910 * @retval #kStatus_LPI2C_Busy Either another master is currently utilizing the bus, or a non-blocking 0911 * transaction is already in progress. 0912 */ 0913 status_t LPI2C_MasterTransferNonBlocking(LPI2C_Type *base, 0914 lpi2c_master_handle_t *handle, 0915 lpi2c_master_transfer_t *transfer); 0916 0917 /*! 0918 * @brief Returns number of bytes transferred so far. 0919 * @param base The LPI2C peripheral base address. 0920 * @param handle Pointer to the LPI2C master driver handle. 0921 * @param[out] count Number of bytes transferred so far by the non-blocking transaction. 0922 * @retval kStatus_Success 0923 * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress. 0924 */ 0925 status_t LPI2C_MasterTransferGetCount(LPI2C_Type *base, lpi2c_master_handle_t *handle, size_t *count); 0926 0927 /*! 0928 * @brief Terminates a non-blocking LPI2C master transmission early. 0929 * 0930 * @note It is not safe to call this function from an IRQ handler that has a higher priority than the 0931 * LPI2C peripheral's IRQ priority. 0932 * 0933 * @param base The LPI2C peripheral base address. 0934 * @param handle Pointer to the LPI2C master driver handle. 0935 * @retval kStatus_Success A transaction was successfully aborted. 0936 * @retval #kStatus_LPI2C_Idle There is not a non-blocking transaction currently in progress. 0937 */ 0938 void LPI2C_MasterTransferAbort(LPI2C_Type *base, lpi2c_master_handle_t *handle); 0939 0940 /*@}*/ 0941 0942 /*! @name IRQ handler */ 0943 /*@{*/ 0944 0945 /*! 0946 * @brief Reusable routine to handle master interrupts. 0947 * @note This function does not need to be called unless you are reimplementing the 0948 * nonblocking API's interrupt handler routines to add special functionality. 0949 * @param base The LPI2C peripheral base address. 0950 * @param lpi2cMasterHandle Pointer to the LPI2C master driver handle. 0951 */ 0952 void LPI2C_MasterTransferHandleIRQ(LPI2C_Type *base, void *lpi2cMasterHandle); 0953 0954 /*@}*/ 0955 0956 /*! @} */ 0957 0958 /*! 0959 * @addtogroup lpi2c_slave_driver 0960 * @{ 0961 */ 0962 0963 /*! @name Slave initialization and deinitialization */ 0964 /*@{*/ 0965 0966 /*! 0967 * @brief Provides a default configuration for the LPI2C slave peripheral. 0968 * 0969 * This function provides the following default configuration for the LPI2C slave peripheral: 0970 * @code 0971 * slaveConfig->enableSlave = true; 0972 * slaveConfig->address0 = 0U; 0973 * slaveConfig->address1 = 0U; 0974 * slaveConfig->addressMatchMode = kLPI2C_MatchAddress0; 0975 * slaveConfig->filterDozeEnable = true; 0976 * slaveConfig->filterEnable = true; 0977 * slaveConfig->enableGeneralCall = false; 0978 * slaveConfig->sclStall.enableAck = false; 0979 * slaveConfig->sclStall.enableTx = true; 0980 * slaveConfig->sclStall.enableRx = true; 0981 * slaveConfig->sclStall.enableAddress = true; 0982 * slaveConfig->ignoreAck = false; 0983 * slaveConfig->enableReceivedAddressRead = false; 0984 * slaveConfig->sdaGlitchFilterWidth_ns = 0; 0985 * slaveConfig->sclGlitchFilterWidth_ns = 0; 0986 * slaveConfig->dataValidDelay_ns = 0; 0987 * slaveConfig->clockHoldTime_ns = 0; 0988 * @endcode 0989 * 0990 * After calling this function, override any settings to customize the configuration, 0991 * prior to initializing the master driver with LPI2C_SlaveInit(). Be sure to override at least the @a 0992 * address0 member of the configuration structure with the desired slave address. 0993 * 0994 * @param[out] slaveConfig User provided configuration structure that is set to default values. Refer to 0995 * #lpi2c_slave_config_t. 0996 */ 0997 void LPI2C_SlaveGetDefaultConfig(lpi2c_slave_config_t *slaveConfig); 0998 0999 /*! 1000 * @brief Initializes the LPI2C slave peripheral. 1001 * 1002 * This function enables the peripheral clock and initializes the LPI2C slave peripheral as described by the user 1003 * provided configuration. 1004 * 1005 * @param base The LPI2C peripheral base address. 1006 * @param slaveConfig User provided peripheral configuration. Use LPI2C_SlaveGetDefaultConfig() to get a set of defaults 1007 * that you can override. 1008 * @param sourceClock_Hz Frequency in Hertz of the LPI2C functional clock. Used to calculate the filter widths, 1009 * data valid delay, and clock hold time. 1010 */ 1011 void LPI2C_SlaveInit(LPI2C_Type *base, const lpi2c_slave_config_t *slaveConfig, uint32_t sourceClock_Hz); 1012 1013 /*! 1014 * @brief Deinitializes the LPI2C slave peripheral. 1015 * 1016 * This function disables the LPI2C slave peripheral and gates the clock. It also performs a software 1017 * reset to restore the peripheral to reset conditions. 1018 * 1019 * @param base The LPI2C peripheral base address. 1020 */ 1021 void LPI2C_SlaveDeinit(LPI2C_Type *base); 1022 1023 /*! 1024 * @brief Performs a software reset of the LPI2C slave peripheral. 1025 * 1026 * @param base The LPI2C peripheral base address. 1027 */ 1028 static inline void LPI2C_SlaveReset(LPI2C_Type *base) 1029 { 1030 base->SCR = LPI2C_SCR_RST_MASK; 1031 base->SCR = 0; 1032 } 1033 1034 /*! 1035 * @brief Enables or disables the LPI2C module as slave. 1036 * 1037 * @param base The LPI2C peripheral base address. 1038 * @param enable Pass true to enable or false to disable the specified LPI2C as slave. 1039 */ 1040 static inline void LPI2C_SlaveEnable(LPI2C_Type *base, bool enable) 1041 { 1042 base->SCR = (base->SCR & ~LPI2C_SCR_SEN_MASK) | LPI2C_SCR_SEN(enable); 1043 } 1044 1045 /*@}*/ 1046 1047 /*! @name Slave status */ 1048 /*@{*/ 1049 1050 /*! 1051 * @brief Gets the LPI2C slave status flags. 1052 * 1053 * A bit mask with the state of all LPI2C slave status flags is returned. For each flag, the corresponding bit 1054 * in the return value is set if the flag is asserted. 1055 * 1056 * @param base The LPI2C peripheral base address. 1057 * @return State of the status flags: 1058 * - 1: related status flag is set. 1059 * - 0: related status flag is not set. 1060 * @see _lpi2c_slave_flags 1061 */ 1062 static inline uint32_t LPI2C_SlaveGetStatusFlags(LPI2C_Type *base) 1063 { 1064 return base->SSR; 1065 } 1066 1067 /*! 1068 * @brief Clears the LPI2C status flag state. 1069 * 1070 * The following status register flags can be cleared: 1071 * - #kLPI2C_SlaveRepeatedStartDetectFlag 1072 * - #kLPI2C_SlaveStopDetectFlag 1073 * - #kLPI2C_SlaveBitErrFlag 1074 * - #kLPI2C_SlaveFifoErrFlag 1075 * 1076 * Attempts to clear other flags has no effect. 1077 * 1078 * @param base The LPI2C peripheral base address. 1079 * @param statusMask A bitmask of status flags that are to be cleared. The mask is composed of 1080 * #_lpi2c_slave_flags enumerators OR'd together. You may pass the result of a previous call to 1081 * LPI2C_SlaveGetStatusFlags(). 1082 * @see _lpi2c_slave_flags. 1083 */ 1084 static inline void LPI2C_SlaveClearStatusFlags(LPI2C_Type *base, uint32_t statusMask) 1085 { 1086 base->SSR = statusMask; 1087 } 1088 1089 /*@}*/ 1090 1091 /*! @name Slave interrupts */ 1092 /*@{*/ 1093 1094 /*! 1095 * @brief Enables the LPI2C slave interrupt requests. 1096 * 1097 * All flags except #kLPI2C_SlaveBusyFlag and #kLPI2C_SlaveBusBusyFlag can be enabled as 1098 * interrupts. 1099 * 1100 * @param base The LPI2C peripheral base address. 1101 * @param interruptMask Bit mask of interrupts to enable. See #_lpi2c_slave_flags for the set 1102 * of constants that should be OR'd together to form the bit mask. 1103 */ 1104 static inline void LPI2C_SlaveEnableInterrupts(LPI2C_Type *base, uint32_t interruptMask) 1105 { 1106 base->SIER |= interruptMask; 1107 } 1108 1109 /*! 1110 * @brief Disables the LPI2C slave interrupt requests. 1111 * 1112 * All flags except #kLPI2C_SlaveBusyFlag and #kLPI2C_SlaveBusBusyFlag can be enabled as 1113 * interrupts. 1114 * 1115 * @param base The LPI2C peripheral base address. 1116 * @param interruptMask Bit mask of interrupts to disable. See #_lpi2c_slave_flags for the set 1117 * of constants that should be OR'd together to form the bit mask. 1118 */ 1119 static inline void LPI2C_SlaveDisableInterrupts(LPI2C_Type *base, uint32_t interruptMask) 1120 { 1121 base->SIER &= ~interruptMask; 1122 } 1123 1124 /*! 1125 * @brief Returns the set of currently enabled LPI2C slave interrupt requests. 1126 * @param base The LPI2C peripheral base address. 1127 * @return A bitmask composed of #_lpi2c_slave_flags enumerators OR'd together to indicate the 1128 * set of enabled interrupts. 1129 */ 1130 static inline uint32_t LPI2C_SlaveGetEnabledInterrupts(LPI2C_Type *base) 1131 { 1132 return base->SIER; 1133 } 1134 1135 /*@}*/ 1136 1137 /*! @name Slave DMA control */ 1138 /*@{*/ 1139 1140 /*! 1141 * @brief Enables or disables the LPI2C slave peripheral DMA requests. 1142 * 1143 * @param base The LPI2C peripheral base address. 1144 * @param enableAddressValid Enable flag for the address valid DMA request. Pass true for enable, false for disable. 1145 * The address valid DMA request is shared with the receive data DMA request. 1146 * @param enableRx Enable flag for the receive data DMA request. Pass true for enable, false for disable. 1147 * @param enableTx Enable flag for the transmit data DMA request. Pass true for enable, false for disable. 1148 */ 1149 static inline void LPI2C_SlaveEnableDMA(LPI2C_Type *base, bool enableAddressValid, bool enableRx, bool enableTx) 1150 { 1151 base->SDER = (base->SDER & ~(LPI2C_SDER_AVDE_MASK | LPI2C_SDER_RDDE_MASK | LPI2C_SDER_TDDE_MASK)) | 1152 LPI2C_SDER_AVDE(enableAddressValid) | LPI2C_SDER_RDDE(enableRx) | LPI2C_SDER_TDDE(enableTx); 1153 } 1154 1155 /*@}*/ 1156 1157 /*! @name Slave bus operations */ 1158 /*@{*/ 1159 1160 /*! 1161 * @brief Returns whether the bus is idle. 1162 * 1163 * Requires the slave mode to be enabled. 1164 * 1165 * @param base The LPI2C peripheral base address. 1166 * @retval true Bus is busy. 1167 * @retval false Bus is idle. 1168 */ 1169 static inline bool LPI2C_SlaveGetBusIdleState(LPI2C_Type *base) 1170 { 1171 return ((base->SSR & LPI2C_SSR_BBF_MASK) >> LPI2C_SSR_BBF_SHIFT) == 1U ? true : false; 1172 } 1173 1174 /*! 1175 * @brief Transmits either an ACK or NAK on the I2C bus in response to a byte from the master. 1176 * 1177 * Use this function to send an ACK or NAK when the #kLPI2C_SlaveTransmitAckFlag is asserted. This 1178 * only happens if you enable the sclStall.enableAck field of the ::lpi2c_slave_config_t configuration 1179 * structure used to initialize the slave peripheral. 1180 * 1181 * @param base The LPI2C peripheral base address. 1182 * @param ackOrNack Pass true for an ACK or false for a NAK. 1183 */ 1184 static inline void LPI2C_SlaveTransmitAck(LPI2C_Type *base, bool ackOrNack) 1185 { 1186 base->STAR = LPI2C_STAR_TXNACK(!ackOrNack); 1187 } 1188 1189 /*! 1190 * @brief Returns the slave address sent by the I2C master. 1191 * 1192 * This function should only be called if the #kLPI2C_SlaveAddressValidFlag is asserted. 1193 * 1194 * @param base The LPI2C peripheral base address. 1195 * @return The 8-bit address matched by the LPI2C slave. Bit 0 contains the R/w direction bit, and 1196 * the 7-bit slave address is in the upper 7 bits. 1197 */ 1198 static inline uint32_t LPI2C_SlaveGetReceivedAddress(LPI2C_Type *base) 1199 { 1200 return base->SASR & LPI2C_SASR_RADDR_MASK; 1201 } 1202 1203 /*! 1204 * @brief Performs a polling send transfer on the I2C bus. 1205 * 1206 * @param base The LPI2C peripheral base address. 1207 * @param txBuff The pointer to the data to be transferred. 1208 * @param txSize The length in bytes of the data to be transferred. 1209 * @param[out] actualTxSize 1210 * @return Error or success status returned by API. 1211 */ 1212 status_t LPI2C_SlaveSend(LPI2C_Type *base, void *txBuff, size_t txSize, size_t *actualTxSize); 1213 1214 /*! 1215 * @brief Performs a polling receive transfer on the I2C bus. 1216 * 1217 * @param base The LPI2C peripheral base address. 1218 * @param rxBuff The pointer to the data to be transferred. 1219 * @param rxSize The length in bytes of the data to be transferred. 1220 * @param[out] actualRxSize 1221 * @return Error or success status returned by API. 1222 */ 1223 status_t LPI2C_SlaveReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize, size_t *actualRxSize); 1224 1225 /*@}*/ 1226 1227 /*! @name Slave non-blocking */ 1228 /*@{*/ 1229 1230 /*! 1231 * @brief Creates a new handle for the LPI2C slave non-blocking APIs. 1232 * 1233 * The creation of a handle is for use with the non-blocking APIs. Once a handle 1234 * is created, there is not a corresponding destroy handle. If the user wants to 1235 * terminate a transfer, the LPI2C_SlaveTransferAbort() API shall be called. 1236 * 1237 * @note The function also enables the NVIC IRQ for the input LPI2C. Need to notice 1238 * that on some SoCs the LPI2C IRQ is connected to INTMUX, in this case user needs to 1239 * enable the associated INTMUX IRQ in application. 1240 1241 * @param base The LPI2C peripheral base address. 1242 * @param[out] handle Pointer to the LPI2C slave driver handle. 1243 * @param callback User provided pointer to the asynchronous callback function. 1244 * @param userData User provided pointer to the application callback data. 1245 */ 1246 void LPI2C_SlaveTransferCreateHandle(LPI2C_Type *base, 1247 lpi2c_slave_handle_t *handle, 1248 lpi2c_slave_transfer_callback_t callback, 1249 void *userData); 1250 1251 /*! 1252 * @brief Starts accepting slave transfers. 1253 * 1254 * Call this API after calling I2C_SlaveInit() and LPI2C_SlaveTransferCreateHandle() to start processing 1255 * transactions driven by an I2C master. The slave monitors the I2C bus and pass events to the 1256 * callback that was passed into the call to LPI2C_SlaveTransferCreateHandle(). The callback is always invoked 1257 * from the interrupt context. 1258 * 1259 * The set of events received by the callback is customizable. To do so, set the @a eventMask parameter to 1260 * the OR'd combination of #lpi2c_slave_transfer_event_t enumerators for the events you wish to receive. 1261 * The #kLPI2C_SlaveTransmitEvent and #kLPI2C_SlaveReceiveEvent events are always enabled and do not need 1262 * to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and 1263 * receive events that are always enabled. In addition, the #kLPI2C_SlaveAllEvents constant is provided as 1264 * a convenient way to enable all events. 1265 * 1266 * @param base The LPI2C peripheral base address. 1267 * @param handle Pointer to lpi2c_slave_handle_t structure which stores the transfer state. 1268 * @param eventMask Bit mask formed by OR'ing together #lpi2c_slave_transfer_event_t enumerators to specify 1269 * which events to send to the callback. Other accepted values are 0 to get a default set of 1270 * only the transmit and receive events, and #kLPI2C_SlaveAllEvents to enable all events. 1271 * 1272 * @retval kStatus_Success Slave transfers were successfully started. 1273 * @retval #kStatus_LPI2C_Busy Slave transfers have already been started on this handle. 1274 */ 1275 status_t LPI2C_SlaveTransferNonBlocking(LPI2C_Type *base, lpi2c_slave_handle_t *handle, uint32_t eventMask); 1276 1277 /*! 1278 * @brief Gets the slave transfer status during a non-blocking transfer. 1279 * @param base The LPI2C peripheral base address. 1280 * @param handle Pointer to i2c_slave_handle_t structure. 1281 * @param[out] count Pointer to a value to hold the number of bytes transferred. May be NULL if the count is not 1282 * required. 1283 * @retval kStatus_Success 1284 * @retval kStatus_NoTransferInProgress 1285 */ 1286 status_t LPI2C_SlaveTransferGetCount(LPI2C_Type *base, lpi2c_slave_handle_t *handle, size_t *count); 1287 1288 /*! 1289 * @brief Aborts the slave non-blocking transfers. 1290 * @note This API could be called at any time to stop slave for handling the bus events. 1291 * @param base The LPI2C peripheral base address. 1292 * @param handle Pointer to lpi2c_slave_handle_t structure which stores the transfer state. 1293 * @retval kStatus_Success 1294 * @retval #kStatus_LPI2C_Idle 1295 */ 1296 void LPI2C_SlaveTransferAbort(LPI2C_Type *base, lpi2c_slave_handle_t *handle); 1297 1298 /*@}*/ 1299 1300 /*! @name Slave IRQ handler */ 1301 /*@{*/ 1302 1303 /*! 1304 * @brief Reusable routine to handle slave interrupts. 1305 * @note This function does not need to be called unless you are reimplementing the 1306 * non blocking API's interrupt handler routines to add special functionality. 1307 * @param base The LPI2C peripheral base address. 1308 * @param handle Pointer to lpi2c_slave_handle_t structure which stores the transfer state. 1309 */ 1310 void LPI2C_SlaveTransferHandleIRQ(LPI2C_Type *base, lpi2c_slave_handle_t *handle); 1311 1312 /*@}*/ 1313 1314 /*! @} */ 1315 1316 #if defined(__cplusplus) 1317 } 1318 #endif 1319 1320 #endif /* _FSL_LPI2C_H_ */
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