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File indexing completed on 2025-05-11 08:22:59

0001 /*
0002  * Copyright (c) 2016, Freescale Semiconductor, Inc.
0003  * Copyright 2017-2021 NXP
0004  * All rights reserved.
0005  *
0006  * SPDX-License-Identifier: BSD-3-Clause
0007  */
0008 
0009 #include "fsl_iee.h"
0010 
0011 /*******************************************************************************
0012  * Definitions
0013  ******************************************************************************/
0014 
0015 /* Component ID definition, used by tools. */
0016 #ifndef FSL_COMPONENT_ID
0017 #define FSL_COMPONENT_ID "platform.drivers.iee"
0018 #endif
0019 
0020 /*******************************************************************************
0021  * Prototypes
0022  ******************************************************************************/
0023 
0024 /*******************************************************************************
0025  * Code
0026  ******************************************************************************/
0027 /*!
0028  * brief Resets IEE module to factory default values.
0029  *
0030  * This function performs hardware reset of IEE module. Attributes and keys of all regions are cleared.
0031  *
0032  * param base IEER peripheral address.
0033  */
0034 void IEE_Init(IEE_Type *base)
0035 {
0036 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
0037     /* Enable IEE clock. */
0038     CLOCK_EnableClock(kCLOCK_Iee);
0039 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
0040 
0041     /* Reset IEE module and wait the reset operation done. */
0042     base->GCFG |= IEE_GCFG_RST_MASK;
0043 }
0044 
0045 /*!
0046  * brief Loads default values to the IEE configuration structure.
0047  *
0048  * Loads default values to the IEE region configuration structure. The default values are as follows.
0049  * code
0050  *   config->bypass = kIEE_AesUseMdField;
0051  *   config->mode = kIEE_ModeNone;
0052  *   config->keySize = kIEE_AesCTR128XTS256;
0053  *   config->pageOffset = 0U;
0054  * endcode
0055  *
0056  * param config Configuration for the selected IEE region.
0057  */
0058 void IEE_GetDefaultConfig(iee_config_t *config)
0059 {
0060     /* Initializes the configure structure to zero. */
0061     (void)memset(config, 0, sizeof(*config));
0062 
0063     config->bypass     = kIEE_AesUseMdField;
0064     config->mode       = kIEE_ModeNone;
0065     config->keySize    = kIEE_AesCTR128XTS256;
0066     config->pageOffset = 0U;
0067 }
0068 
0069 /*!
0070  * brief Sets the IEE module according to the configuration structure.
0071  *
0072  * This function configures IEE region according to configuration structure.
0073  *
0074  * param base IEE peripheral address.
0075  * param region Selection of the IEE region to be configured.
0076  * param config Configuration for the selected IEE region.
0077  */
0078 void IEE_SetRegionConfig(IEE_Type *base, iee_region_t region, iee_config_t *config)
0079 {
0080     base->REGX[region].REGATTR =
0081         IEE_REGATTR_BYP(config->bypass) | IEE_REGATTR_MD(config->mode) | IEE_REGATTR_KS(config->keySize);
0082 #if (defined(FSL_IEE_USE_PAGE_OFFSET) && (FSL_IEE_USE_PAGE_OFFSET > 0U))
0083     base->REGX[region].REGPO = IEE_REGPO_PGOFF(config->pageOffset);
0084 #endif /* FSL_IEE_USE_PAGE_OFFSET */
0085 }
0086 
0087 /*!
0088  * brief Sets the IEE module key.
0089  *
0090  * This function sets specified AES key for the given region.
0091  *
0092  * param base IEE peripheral address.
0093  * param region Selection of the IEE region to be configured.
0094  * param keyNum Selection of AES KEY1 or KEY2.
0095  * param key AES key.
0096  * param keySize Size of AES key.
0097  */
0098 status_t IEE_SetRegionKey(
0099     IEE_Type *base, iee_region_t region, iee_aes_key_num_t keyNum, const uint8_t *key, size_t keySize)
0100 {
0101     register const uint32_t *from32  = (const uint32_t *)(uintptr_t)key;
0102     register volatile uint32_t *to32 = NULL;
0103 
0104     if (keyNum == kIEE_AesKey1)
0105     {
0106         to32 = &base->REGX[region].REGKEY1[0];
0107     }
0108 
0109     else if (keyNum == kIEE_AesKey2)
0110     {
0111         to32 = &base->REGX[region].REGKEY2[0];
0112     }
0113     else
0114     {
0115         return kStatus_InvalidArgument;
0116     }
0117 
0118     while (keySize >= sizeof(uint32_t))
0119     {
0120         *to32 = *from32;
0121         keySize -= sizeof(uint32_t);
0122         from32++;
0123         to32++;
0124     }
0125 
0126     return kStatus_Success;
0127 }
0128 
0129 /*!
0130  * brief Lock the IEE region configuration.
0131  *
0132  * IEE region Key, Offset and Attribute registers are locked.
0133  * Only system reset can clear the Lock bit.
0134  *
0135  * param base IEE peripheral address.
0136  * param region Selection of the IEE region to be locked.
0137  */
0138 void IEE_LockRegionConfig(IEE_Type *base, iee_region_t region)
0139 {
0140     base->GCFG |= (uint32_t)(0x1UL << (uint32_t)region);
0141 }