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File indexing completed on 2025-05-11 08:22:59
0001 /* 0002 * Copyright 2019-2021 NXP 0003 * All rights reserved. 0004 * 0005 * SPDX-License-Identifier: BSD-3-Clause 0006 */ 0007 0008 #ifndef _FSL_FLEXSPI_DMA_H_ 0009 #define _FSL_FLEXSPI_DMA_H_ 0010 0011 #include "fsl_flexspi.h" 0012 #include "fsl_dma.h" 0013 0014 /*! 0015 * @addtogroup flexspi_dma 0016 * @{ 0017 */ 0018 0019 /******************************************************************************* 0020 * Definitions 0021 ******************************************************************************/ 0022 0023 /*! @name Driver version */ 0024 /*@{*/ 0025 /*! @brief FLEXSPI DMA driver version 2.2.1. */ 0026 #define FSL_FLEXSPI_DMA_DRIVER_VERSION (MAKE_VERSION(2, 2, 1)) 0027 /*@}*/ 0028 0029 typedef struct _flexspi_dma_handle flexspi_dma_handle_t; 0030 0031 /*! @brief FLEXSPI dma transfer callback function for finish and error */ 0032 typedef void (*flexspi_dma_callback_t)(FLEXSPI_Type *base, 0033 flexspi_dma_handle_t *handle, 0034 status_t status, 0035 void *userData); 0036 0037 /*! @brief dma transfer configuration */ 0038 typedef enum _flexspi_dma_ntransfer_size 0039 { 0040 kFLEXPSI_DMAnSize1Bytes = 0x1U, /*!< Source/Destination data transfer size is 1 byte every time */ 0041 kFLEXPSI_DMAnSize2Bytes = 0x2U, /*!< Source/Destination data transfer size is 2 bytes every time */ 0042 kFLEXPSI_DMAnSize4Bytes = 0x4U, /*!< Source/Destination data transfer size is 4 bytes every time */ 0043 } flexspi_dma_transfer_nsize_t; 0044 0045 /*! @brief FLEXSPI DMA transfer handle, users should not touch the content of the handle.*/ 0046 struct _flexspi_dma_handle 0047 { 0048 dma_handle_t *txDmaHandle; /*!< dma handler for FLEXSPI Tx. */ 0049 dma_handle_t *rxDmaHandle; /*!< dma handler for FLEXSPI Rx. */ 0050 size_t transferSize; /*!< Bytes need to transfer. */ 0051 flexspi_dma_transfer_nsize_t nsize; /*!< dma SSIZE/DSIZE in each transfer. */ 0052 uint8_t nbytes; /*!< dma minor byte transfer count initially configured. */ 0053 uint8_t count; /*!< The transfer data count in a DMA request. */ 0054 uint32_t state; /*!< Internal state for FLEXSPI dma transfer. */ 0055 flexspi_dma_callback_t completionCallback; /*!< A callback function called after the dma transfer is finished. */ 0056 void *userData; /*!< User callback parameter */ 0057 }; 0058 0059 /******************************************************************************* 0060 * APIs 0061 ******************************************************************************/ 0062 #if defined(__cplusplus) 0063 extern "C" { 0064 #endif 0065 0066 /*! 0067 * @name FLEXSPI dma Transactional 0068 * @{ 0069 */ 0070 0071 /*! 0072 * @brief Initializes the FLEXSPI handle for transfer which is used in transactional functions and set the callback. 0073 * 0074 * @param base FLEXSPI peripheral base address 0075 * @param handle Pointer to flexspi_dma_handle_t structure 0076 * @param callback FLEXSPI callback, NULL means no callback. 0077 * @param userData User callback function data. 0078 * @param txDmaHandle User requested DMA handle for TX DMA transfer. 0079 * @param rxDmaHandle User requested DMA handle for RX DMA transfer. 0080 */ 0081 void FLEXSPI_TransferCreateHandleDMA(FLEXSPI_Type *base, 0082 flexspi_dma_handle_t *handle, 0083 flexspi_dma_callback_t callback, 0084 void *userData, 0085 dma_handle_t *txDmaHandle, 0086 dma_handle_t *rxDmaHandle); 0087 0088 /*! 0089 * @brief Update FLEXSPI DMA transfer source data transfer size(SSIZE) and destination data transfer size(DSIZE). 0090 * 0091 * @param base FLEXSPI peripheral base address 0092 * @param handle Pointer to flexspi_dma_handle_t structure 0093 * @param nsize FLEXSPI DMA transfer data transfer size(SSIZE/DSIZE), by default the size is 0094 * kFLEXPSI_DMAnSize1Bytes(one byte). 0095 * @see flexspi_dma_transfer_nsize_t . 0096 */ 0097 void FLEXSPI_TransferUpdateSizeDMA(FLEXSPI_Type *base, 0098 flexspi_dma_handle_t *handle, 0099 flexspi_dma_transfer_nsize_t nsize); 0100 0101 /*! 0102 * @brief Transfers FLEXSPI data using an dma non-blocking method. 0103 * 0104 * This function writes/receives data to/from the FLEXSPI transmit/receive FIFO. This function is non-blocking. 0105 * @param base FLEXSPI peripheral base address. 0106 * @param handle Pointer to flexspi_dma_handle_t structure 0107 * @param xfer FLEXSPI transfer structure. 0108 * @retval kStatus_FLEXSPI_Busy FLEXSPI is busy transfer. 0109 * @retval kStatus_InvalidArgument The watermark configuration is invalid, the watermark should be power of 0110 2 to do successfully DMA transfer. 0111 * @retval kStatus_Success FLEXSPI successfully start dma transfer. 0112 */ 0113 status_t FLEXSPI_TransferDMA(FLEXSPI_Type *base, flexspi_dma_handle_t *handle, flexspi_transfer_t *xfer); 0114 0115 /*! 0116 * @brief Aborts the transfer data using dma. 0117 * 0118 * This function aborts the transfer data using dma. 0119 * 0120 * @param base FLEXSPI peripheral base address. 0121 * @param handle Pointer to flexspi_dma_handle_t structure 0122 */ 0123 void FLEXSPI_TransferAbortDMA(FLEXSPI_Type *base, flexspi_dma_handle_t *handle); 0124 0125 /*! 0126 * @brief Gets the transferred counts of transfer. 0127 * 0128 * @param base FLEXSPI peripheral base address. 0129 * @param handle Pointer to flexspi_dma_handle_t structure. 0130 * @param count Bytes transfer. 0131 * @retval kStatus_Success Succeed get the transfer count. 0132 * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress. 0133 */ 0134 status_t FLEXSPI_TransferGetTransferCountDMA(FLEXSPI_Type *base, flexspi_dma_handle_t *handle, size_t *count); 0135 0136 /* @} */ 0137 0138 #if defined(__cplusplus) 0139 } 0140 #endif 0141 0142 /* @} */ 0143 0144 #endif /* _FSL_FLEXSPI_DMA_H_ */
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