File indexing completed on 2025-05-11 08:22:59
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0009 #include "fsl_flexio_i2s_edma.h"
0010
0011
0012 #ifndef FSL_COMPONENT_ID
0013 #define FSL_COMPONENT_ID "platform.drivers.flexio_i2s_edma"
0014 #endif
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0016
0017
0018
0019
0020 #define STCD_ADDR(address) (edma_tcd_t *)(((uint32_t)(address) + 32U) & ~0x1FU)
0021
0022
0023 typedef struct _flexio_i2s_edma_private_handle
0024 {
0025 FLEXIO_I2S_Type *base;
0026 flexio_i2s_edma_handle_t *handle;
0027 } flexio_i2s_edma_private_handle_t;
0028
0029
0030 enum
0031 {
0032 kFLEXIO_I2S_Busy = 0x0U,
0033 kFLEXIO_I2S_Idle,
0034 };
0035
0036
0037 static flexio_i2s_edma_private_handle_t s_edmaPrivateHandle[2];
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0049
0050 static void FLEXIO_I2S_TxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds);
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0060 static void FLEXIO_I2S_RxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds);
0061
0062
0063
0064
0065 static void FLEXIO_I2S_TxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds)
0066 {
0067 flexio_i2s_edma_private_handle_t *privHandle = (flexio_i2s_edma_private_handle_t *)userData;
0068 flexio_i2s_edma_handle_t *flexio_i2sHandle = privHandle->handle;
0069
0070
0071 (void)memset(&flexio_i2sHandle->queue[flexio_i2sHandle->queueDriver], 0, sizeof(flexio_i2s_transfer_t));
0072 flexio_i2sHandle->queueDriver = (flexio_i2sHandle->queueDriver + 1U) % FLEXIO_I2S_XFER_QUEUE_SIZE;
0073 if (flexio_i2sHandle->callback != NULL)
0074 {
0075 (flexio_i2sHandle->callback)(privHandle->base, flexio_i2sHandle, kStatus_Success, flexio_i2sHandle->userData);
0076 }
0077
0078
0079 if (flexio_i2sHandle->queue[flexio_i2sHandle->queueDriver].data == NULL)
0080 {
0081 FLEXIO_I2S_TransferAbortSendEDMA(privHandle->base, flexio_i2sHandle);
0082 }
0083 }
0084
0085 static void FLEXIO_I2S_RxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds)
0086 {
0087 flexio_i2s_edma_private_handle_t *privHandle = (flexio_i2s_edma_private_handle_t *)userData;
0088 flexio_i2s_edma_handle_t *flexio_i2sHandle = privHandle->handle;
0089
0090
0091 (void)memset(&flexio_i2sHandle->queue[flexio_i2sHandle->queueDriver], 0, sizeof(flexio_i2s_transfer_t));
0092 flexio_i2sHandle->queueDriver = (flexio_i2sHandle->queueDriver + 1U) % FLEXIO_I2S_XFER_QUEUE_SIZE;
0093 if (flexio_i2sHandle->callback != NULL)
0094 {
0095 (flexio_i2sHandle->callback)(privHandle->base, flexio_i2sHandle, kStatus_Success, flexio_i2sHandle->userData);
0096 }
0097
0098
0099 if (flexio_i2sHandle->queue[flexio_i2sHandle->queueDriver].data == NULL)
0100 {
0101 FLEXIO_I2S_TransferAbortReceiveEDMA(privHandle->base, flexio_i2sHandle);
0102 }
0103 }
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0118 void FLEXIO_I2S_TransferTxCreateHandleEDMA(FLEXIO_I2S_Type *base,
0119 flexio_i2s_edma_handle_t *handle,
0120 flexio_i2s_edma_callback_t callback,
0121 void *userData,
0122 edma_handle_t *dmaHandle)
0123 {
0124 assert((handle != NULL) && (dmaHandle != NULL));
0125
0126
0127 (void)memset(handle, 0, sizeof(*handle));
0128
0129
0130 handle->dmaHandle = dmaHandle;
0131 handle->callback = callback;
0132 handle->userData = userData;
0133
0134
0135 handle->state = (uint32_t)kFLEXIO_I2S_Idle;
0136
0137 s_edmaPrivateHandle[0].base = base;
0138 s_edmaPrivateHandle[0].handle = handle;
0139
0140
0141 EDMA_InstallTCDMemory(dmaHandle, STCD_ADDR(handle->tcd), FLEXIO_I2S_XFER_QUEUE_SIZE);
0142
0143
0144 EDMA_SetCallback(dmaHandle, FLEXIO_I2S_TxEDMACallback, &s_edmaPrivateHandle[0]);
0145 }
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0160 void FLEXIO_I2S_TransferRxCreateHandleEDMA(FLEXIO_I2S_Type *base,
0161 flexio_i2s_edma_handle_t *handle,
0162 flexio_i2s_edma_callback_t callback,
0163 void *userData,
0164 edma_handle_t *dmaHandle)
0165 {
0166 assert((handle != NULL) && (dmaHandle != NULL));
0167
0168
0169 (void)memset(handle, 0, sizeof(*handle));
0170
0171
0172 handle->dmaHandle = dmaHandle;
0173 handle->callback = callback;
0174 handle->userData = userData;
0175
0176
0177 handle->state = (uint32_t)kFLEXIO_I2S_Idle;
0178
0179 s_edmaPrivateHandle[1].base = base;
0180 s_edmaPrivateHandle[1].handle = handle;
0181
0182
0183 EDMA_InstallTCDMemory(dmaHandle, STCD_ADDR(handle->tcd), FLEXIO_I2S_XFER_QUEUE_SIZE);
0184
0185
0186 EDMA_SetCallback(dmaHandle, FLEXIO_I2S_RxEDMACallback, &s_edmaPrivateHandle[1]);
0187 }
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0200 void FLEXIO_I2S_TransferSetFormatEDMA(FLEXIO_I2S_Type *base,
0201 flexio_i2s_edma_handle_t *handle,
0202 flexio_i2s_format_t *format,
0203 uint32_t srcClock_Hz)
0204 {
0205 assert((handle != NULL) && (format != NULL));
0206
0207
0208 if (srcClock_Hz != 0UL)
0209 {
0210
0211 FLEXIO_I2S_MasterSetFormat(base, format, srcClock_Hz);
0212 }
0213 else
0214 {
0215 FLEXIO_I2S_SlaveSetFormat(base, format);
0216 }
0217
0218
0219 handle->bytesPerFrame = format->bitWidth / 8U;
0220 }
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0235 status_t FLEXIO_I2S_TransferSendEDMA(FLEXIO_I2S_Type *base,
0236 flexio_i2s_edma_handle_t *handle,
0237 flexio_i2s_transfer_t *xfer)
0238 {
0239 assert((handle != NULL) && (xfer != NULL));
0240
0241 edma_transfer_config_t config = {0};
0242 uint32_t destAddr = FLEXIO_I2S_TxGetDataRegisterAddress(base) + (4UL - handle->bytesPerFrame);
0243
0244
0245 if ((xfer->data == NULL) || (xfer->dataSize == 0U))
0246 {
0247 return kStatus_InvalidArgument;
0248 }
0249
0250 if (handle->queue[handle->queueUser].data != NULL)
0251 {
0252 return kStatus_FLEXIO_I2S_QueueFull;
0253 }
0254
0255
0256 handle->state = (uint32_t)kFLEXIO_I2S_Busy;
0257
0258
0259 handle->queue[handle->queueUser].data = xfer->data;
0260 handle->queue[handle->queueUser].dataSize = xfer->dataSize;
0261 handle->transferSize[handle->queueUser] = xfer->dataSize;
0262 handle->queueUser = (handle->queueUser + 1U) % FLEXIO_I2S_XFER_QUEUE_SIZE;
0263
0264
0265 EDMA_PrepareTransfer(&config, xfer->data, handle->bytesPerFrame, (uint32_t *)destAddr, handle->bytesPerFrame,
0266 handle->bytesPerFrame, xfer->dataSize, kEDMA_MemoryToPeripheral);
0267
0268
0269 handle->nbytes = handle->bytesPerFrame;
0270
0271 (void)EDMA_SubmitTransfer(handle->dmaHandle, &config);
0272
0273
0274 EDMA_StartTransfer(handle->dmaHandle);
0275
0276
0277 FLEXIO_I2S_TxEnableDMA(base, true);
0278
0279
0280 FLEXIO_I2S_Enable(base, true);
0281
0282 return kStatus_Success;
0283 }
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0299 status_t FLEXIO_I2S_TransferReceiveEDMA(FLEXIO_I2S_Type *base,
0300 flexio_i2s_edma_handle_t *handle,
0301 flexio_i2s_transfer_t *xfer)
0302 {
0303 assert((handle != NULL) && (xfer != NULL));
0304
0305 edma_transfer_config_t config = {0};
0306 uint32_t srcAddr = FLEXIO_I2S_RxGetDataRegisterAddress(base);
0307
0308
0309 if ((xfer->data == NULL) || (xfer->dataSize == 0U))
0310 {
0311 return kStatus_InvalidArgument;
0312 }
0313
0314 if (handle->queue[handle->queueUser].data != NULL)
0315 {
0316 return kStatus_FLEXIO_I2S_QueueFull;
0317 }
0318
0319
0320 handle->state = (uint32_t)kFLEXIO_I2S_Busy;
0321
0322
0323 handle->queue[handle->queueUser].data = xfer->data;
0324 handle->queue[handle->queueUser].dataSize = xfer->dataSize;
0325 handle->transferSize[handle->queueUser] = xfer->dataSize;
0326 handle->queueUser = (handle->queueUser + 1U) % FLEXIO_I2S_XFER_QUEUE_SIZE;
0327
0328
0329 EDMA_PrepareTransfer(&config, (uint32_t *)srcAddr, handle->bytesPerFrame, xfer->data, handle->bytesPerFrame,
0330 handle->bytesPerFrame, xfer->dataSize, kEDMA_PeripheralToMemory);
0331
0332
0333 handle->nbytes = handle->bytesPerFrame;
0334
0335 (void)EDMA_SubmitTransfer(handle->dmaHandle, &config);
0336
0337
0338 EDMA_StartTransfer(handle->dmaHandle);
0339
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0341 FLEXIO_I2S_RxEnableDMA(base, true);
0342
0343
0344 FLEXIO_I2S_Enable(base, true);
0345
0346 return kStatus_Success;
0347 }
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0355 void FLEXIO_I2S_TransferAbortSendEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle)
0356 {
0357 assert(handle != NULL);
0358
0359
0360 EDMA_AbortTransfer(handle->dmaHandle);
0361
0362
0363 FLEXIO_I2S_TxEnableDMA(base, false);
0364
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0366 handle->state = (uint32_t)kFLEXIO_I2S_Idle;
0367 }
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0375 void FLEXIO_I2S_TransferAbortReceiveEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle)
0376 {
0377 assert(handle != NULL);
0378
0379
0380 EDMA_AbortTransfer(handle->dmaHandle);
0381
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0383 FLEXIO_I2S_RxEnableDMA(base, false);
0384
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0386 handle->state = (uint32_t)kFLEXIO_I2S_Idle;
0387 }
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0398 status_t FLEXIO_I2S_TransferGetSendCountEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, size_t *count)
0399 {
0400 assert(handle != NULL);
0401
0402 status_t status = kStatus_Success;
0403
0404 if (handle->state != (uint32_t)kFLEXIO_I2S_Busy)
0405 {
0406 status = kStatus_NoTransferInProgress;
0407 }
0408 else
0409 {
0410 *count = handle->transferSize[handle->queueDriver] -
0411 (uint32_t)handle->nbytes *
0412 EDMA_GetRemainingMajorLoopCount(handle->dmaHandle->base, handle->dmaHandle->channel);
0413 }
0414
0415 return status;
0416 }
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0427 status_t FLEXIO_I2S_TransferGetReceiveCountEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, size_t *count)
0428 {
0429 assert(handle != NULL);
0430
0431 status_t status = kStatus_Success;
0432
0433 if (handle->state != (uint32_t)kFLEXIO_I2S_Busy)
0434 {
0435 status = kStatus_NoTransferInProgress;
0436 }
0437 else
0438 {
0439 *count = handle->transferSize[handle->queueDriver] -
0440 (uint32_t)handle->nbytes *
0441 EDMA_GetRemainingMajorLoopCount(handle->dmaHandle->base, handle->dmaHandle->channel);
0442 }
0443
0444 return status;
0445 }