LXR |
|
|
|
|||
File indexing completed on 2025-05-11 08:22:59
0001 /* 0002 * Copyright (c) 2015, Freescale Semiconductor, Inc. 0003 * Copyright 2016-2022 NXP 0004 * All rights reserved. 0005 * 0006 * SPDX-License-Identifier: BSD-3-Clause 0007 */ 0008 #ifndef _FSL_FLEXCAN_H_ 0009 #define _FSL_FLEXCAN_H_ 0010 0011 #include "fsl_common.h" 0012 0013 /*! 0014 * @addtogroup flexcan_driver 0015 * @{ 0016 */ 0017 0018 /****************************************************************************** 0019 * Definitions 0020 *****************************************************************************/ 0021 0022 /*! @name Driver version */ 0023 /*@{*/ 0024 /*! @brief FlexCAN driver version. */ 0025 #define FSL_FLEXCAN_DRIVER_VERSION (MAKE_VERSION(2, 9, 2)) 0026 /*@}*/ 0027 0028 #if !(defined(FLEXCAN_WAIT_TIMEOUT) && FLEXCAN_WAIT_TIMEOUT) 0029 /* Define to 1000 means keep waiting 1000 times until the flag is assert/deassert. */ 0030 #define FLEXCAN_WAIT_TIMEOUT (1000U) 0031 #endif 0032 0033 /*! @brief FlexCAN frame length helper macro. */ 0034 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 0035 #define DLC_LENGTH_DECODE(dlc) (((dlc) <= 8U) ? (dlc) : (((dlc) <= 12U) ? (((dlc)-6U) * 4U) : (((dlc)-11U) * 16U))) 0036 #endif 0037 0038 /*! @brief FlexCAN Frame ID helper macro. */ 0039 #define FLEXCAN_ID_STD(id) \ 0040 (((uint32_t)(((uint32_t)(id)) << CAN_ID_STD_SHIFT)) & CAN_ID_STD_MASK) /*!< Standard Frame ID helper macro. */ 0041 #define FLEXCAN_ID_EXT(id) \ 0042 (((uint32_t)(((uint32_t)(id)) << CAN_ID_EXT_SHIFT)) & \ 0043 (CAN_ID_EXT_MASK | CAN_ID_STD_MASK)) /*!< Extend Frame ID helper macro. */ 0044 0045 /*! @brief FlexCAN Rx Message Buffer Mask helper macro. */ 0046 #define FLEXCAN_RX_MB_STD_MASK(id, rtr, ide) \ 0047 (((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \ 0048 FLEXCAN_ID_STD(id)) /*!< Standard Rx Message Buffer Mask helper macro. */ 0049 #define FLEXCAN_RX_MB_EXT_MASK(id, rtr, ide) \ 0050 (((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \ 0051 FLEXCAN_ID_EXT(id)) /*!< Extend Rx Message Buffer Mask helper macro. */ 0052 0053 /*! @brief FlexCAN Legacy Rx FIFO Mask helper macro. */ 0054 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_A(id, rtr, ide) \ 0055 (((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \ 0056 (FLEXCAN_ID_STD(id) << 1)) /*!< Standard Rx FIFO Mask helper macro Type A helper macro. */ 0057 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_HIGH(id, rtr, ide) \ 0058 (((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \ 0059 (((uint32_t)(id)&0x7FF) << 19)) /*!< Standard Rx FIFO Mask helper macro Type B upper part helper macro. */ 0060 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_LOW(id, rtr, ide) \ 0061 (((uint32_t)((uint32_t)(rtr) << 15) | (uint32_t)((uint32_t)(ide) << 14)) | \ 0062 (((uint32_t)(id)&0x7FF) << 3)) /*!< Standard Rx FIFO Mask helper macro Type B lower part helper macro. */ 0063 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_HIGH(id) \ 0064 (((uint32_t)(id)&0x7F8) << 21) /*!< Standard Rx FIFO Mask helper macro Type C upper part helper macro. */ 0065 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_HIGH(id) \ 0066 (((uint32_t)(id)&0x7F8) << 13) /*!< Standard Rx FIFO Mask helper macro Type C mid-upper part helper macro. */ 0067 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_LOW(id) \ 0068 (((uint32_t)(id)&0x7F8) << 5) /*!< Standard Rx FIFO Mask helper macro Type C mid-lower part helper macro. */ 0069 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_LOW(id) \ 0070 (((uint32_t)(id)&0x7F8) >> 3) /*!< Standard Rx FIFO Mask helper macro Type C lower part helper macro. */ 0071 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_A(id, rtr, ide) \ 0072 (((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \ 0073 (FLEXCAN_ID_EXT(id) << 1)) /*!< Extend Rx FIFO Mask helper macro Type A helper macro. */ 0074 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_HIGH(id, rtr, ide) \ 0075 ( \ 0076 ((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \ 0077 ((FLEXCAN_ID_EXT(id) & 0x1FFF8000) \ 0078 << 1)) /*!< Extend Rx FIFO Mask helper macro Type B upper part helper macro. */ 0079 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_LOW(id, rtr, ide) \ 0080 (((uint32_t)((uint32_t)(rtr) << 15) | (uint32_t)((uint32_t)(ide) << 14)) | \ 0081 ((FLEXCAN_ID_EXT(id) & 0x1FFF8000) >> \ 0082 15)) /*!< Extend Rx FIFO Mask helper macro Type B lower part helper macro. */ 0083 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_HIGH(id) \ 0084 ((FLEXCAN_ID_EXT(id) & 0x1FE00000) << 3) /*!< Extend Rx FIFO Mask helper macro Type C upper part helper macro. */ 0085 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_HIGH(id) \ 0086 ((FLEXCAN_ID_EXT(id) & 0x1FE00000) >> \ 0087 5) /*!< Extend Rx FIFO Mask helper macro Type C mid-upper part helper macro. */ 0088 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_LOW(id) \ 0089 ((FLEXCAN_ID_EXT(id) & 0x1FE00000) >> \ 0090 13) /*!< Extend Rx FIFO Mask helper macro Type C mid-lower part helper macro. */ 0091 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_LOW(id) \ 0092 ((FLEXCAN_ID_EXT(id) & 0x1FE00000) >> 21) /*!< Extend Rx FIFO Mask helper macro Type C lower part helper macro. */ 0093 0094 /*! @brief FlexCAN Rx FIFO Filter helper macro. */ 0095 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_A(id, rtr, ide) \ 0096 FLEXCAN_RX_FIFO_STD_MASK_TYPE_A(id, rtr, ide) /*!< Standard Rx FIFO Filter helper macro Type A helper macro. */ 0097 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_B_HIGH(id, rtr, ide) \ 0098 FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_HIGH( \ 0099 id, rtr, ide) /*!< Standard Rx FIFO Filter helper macro Type B upper part helper macro. */ 0100 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_B_LOW(id, rtr, ide) \ 0101 FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_LOW( \ 0102 id, rtr, ide) /*!< Standard Rx FIFO Filter helper macro Type B lower part helper macro. */ 0103 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_HIGH(id) \ 0104 FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_HIGH( \ 0105 id) /*!< Standard Rx FIFO Filter helper macro Type C upper part helper macro. */ 0106 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_MID_HIGH(id) \ 0107 FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_HIGH( \ 0108 id) /*!< Standard Rx FIFO Filter helper macro Type C mid-upper part helper macro. */ 0109 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_MID_LOW(id) \ 0110 FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_LOW( \ 0111 id) /*!< Standard Rx FIFO Filter helper macro Type C mid-lower part helper macro. */ 0112 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_LOW(id) \ 0113 FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_LOW( \ 0114 id) /*!< Standard Rx FIFO Filter helper macro Type C lower part helper macro. */ 0115 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_A(id, rtr, ide) \ 0116 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_A(id, rtr, ide) /*!< Extend Rx FIFO Filter helper macro Type A helper macro. */ 0117 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_B_HIGH(id, rtr, ide) \ 0118 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_HIGH( \ 0119 id, rtr, ide) /*!< Extend Rx FIFO Filter helper macro Type B upper part helper macro. */ 0120 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_B_LOW(id, rtr, ide) \ 0121 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_LOW( \ 0122 id, rtr, ide) /*!< Extend Rx FIFO Filter helper macro Type B lower part helper macro. */ 0123 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_HIGH(id) \ 0124 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_HIGH( \ 0125 id) /*!< Extend Rx FIFO Filter helper macro Type C upper part helper macro. */ 0126 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_MID_HIGH(id) \ 0127 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_HIGH( \ 0128 id) /*!< Extend Rx FIFO Filter helper macro Type C mid-upper part helper macro. */ 0129 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_MID_LOW(id) \ 0130 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_LOW( \ 0131 id) /*!< Extend Rx FIFO Filter helper macro Type C mid-lower part helper macro. */ 0132 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_LOW(id) \ 0133 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_LOW(id) /*!< Extend Rx FIFO Filter helper macro Type C lower part helper macro. */ 0134 0135 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 0136 /*! @brief FlexCAN Enhanced Rx FIFO Filter and Mask helper macro. */ 0137 #define ENHANCED_RX_FIFO_FSCH(x) (((uint32_t)(((uint32_t)(x)) << 30)) & 0xC0000000U) 0138 #define RTR_STD_HIGH(x) (((uint32_t)(((uint32_t)(x)) << 27)) & 0x08000000U) 0139 #define RTR_STD_LOW(x) (((uint32_t)(((uint32_t)(x)) << 11)) & 0x00000800U) 0140 #define RTR_EXT(x) (((uint32_t)(((uint32_t)(x)) << 29)) & 0x40000000U) 0141 #define ID_STD_LOW(id) (((uint32_t)id) & 0x7FFU) 0142 #define ID_STD_HIGH(id) (((uint32_t)(((uint32_t)(id)) << 16)) & 0x07FF0000U) 0143 #define ID_EXT(id) (((uint32_t)id) & 0x1FFFFFFFU) 0144 0145 /*! Standard ID filter element with filter + mask scheme. */ 0146 #define FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(id, rtr, id_mask, rtr_mask) \ 0147 (ENHANCED_RX_FIFO_FSCH(0x0) | RTR_STD_HIGH(rtr) | ID_STD_HIGH(id) | RTR_STD_LOW(rtr_mask) | ID_STD_LOW(id_mask)) 0148 /*! Standard ID filter element with filter range. */ 0149 #define FLEXCAN_ENHANCED_RX_FIFO_STD_FILTER_WITH_RANGE(id_upper, rtr, id_lower, rtr_mask) \ 0150 (ENHANCED_RX_FIFO_FSCH(0x1) | RTR_STD_HIGH(rtr) | ID_STD_HIGH(id_upper) | RTR_STD_LOW(rtr_mask) | \ 0151 ID_STD_LOW(id_lower)) 0152 /*! Standard ID filter element with two filters without masks. */ 0153 #define FLEXCAN_ENHANCED_RX_FIFO_STD_TWO_FILTERS(id1, rtr1, id2, rtr2) \ 0154 (ENHANCED_RX_FIFO_FSCH(0x2) | RTR_STD_HIGH(rtr1) | ID_STD_HIGH(id1) | RTR_STD_LOW(rtr2) | ID_STD_LOW(id2)) 0155 /*! Extended ID filter element with filter + mask scheme low word. */ 0156 #define FLEXCAN_ENHANCED_RX_FIFO_EXT_MASK_AND_FILTER_LOW(id, rtr) \ 0157 (ENHANCED_RX_FIFO_FSCH(0x0) | RTR_EXT(rtr) | ID_EXT(id)) 0158 /*! Extended ID filter element with filter + mask scheme high word. */ 0159 #define FLEXCAN_ENHANCED_RX_FIFO_EXT_MASK_AND_FILTER_HIGH(id_mask, rtr_mask) \ 0160 (ENHANCED_RX_FIFO_FSCH(0x0) | RTR_EXT(rtr_mask) | ID_EXT(id_mask)) 0161 /*! Extended ID filter element with range scheme low word. */ 0162 #define FLEXCAN_ENHANCED_RX_FIFO_EXT_FILTER_WITH_RANGE_LOW(id_upper, rtr) \ 0163 (ENHANCED_RX_FIFO_FSCH(0x1) | RTR_EXT(rtr) | ID_EXT(id_upper)) 0164 /*! Extended ID filter element with range scheme high word. */ 0165 #define FLEXCAN_ENHANCED_RX_FIFO_EXT_FILTER_WITH_RANGE_HIGH(id_lower, rtr_mask) \ 0166 (ENHANCED_RX_FIFO_FSCH(0x1) | RTR_EXT(rtr_mask) | ID_EXT(id_lower)) 0167 /*! Extended ID filter element with two filters without masks low word. */ 0168 #define FLEXCAN_ENHANCED_RX_FIFO_EXT_TWO_FILTERS_LOW(id2, rtr2) \ 0169 (ENHANCED_RX_FIFO_FSCH(0x2) | RTR_EXT(rtr2) | ID_EXT(id2)) 0170 /*! Extended ID filter element with two filters without masks high word. */ 0171 #define FLEXCAN_ENHANCED_RX_FIFO_EXT_TWO_FILTERS_HIGH(id1, rtr1) \ 0172 (ENHANCED_RX_FIFO_FSCH(0x2) | RTR_EXT(rtr1) | ID_EXT(id1)) 0173 #endif 0174 0175 #if (defined(FSL_FEATURE_FLEXCAN_HAS_PN_MODE) && FSL_FEATURE_FLEXCAN_HAS_PN_MODE) 0176 /*! @brief FlexCAN Pretended Networking ID Mask helper macro. */ 0177 #define FLEXCAN_PN_STD_MASK(id, rtr) \ 0178 ((uint32_t)((uint32_t)(rtr) << CAN_FLT_ID1_FLT_RTR_SHIFT) | \ 0179 FLEXCAN_ID_STD(id)) /*!< Standard Rx Message Buffer Mask helper macro. */ 0180 #define FLEXCAN_PN_EXT_MASK(id, rtr) \ 0181 ((uint32_t)CAN_FLT_ID1_FLT_IDE_MASK | (uint32_t)((uint32_t)(rtr) << CAN_FLT_ID1_FLT_RTR_SHIFT) | \ 0182 FLEXCAN_ID_EXT(id)) /*!< Extend Rx Message Buffer Mask helper macro. */ 0183 #endif 0184 0185 /*! @brief FlexCAN interrupt/status flag helper macro. */ 0186 #if (defined(FSL_FEATURE_FLEXCAN_HAS_PN_MODE) && FSL_FEATURE_FLEXCAN_HAS_PN_MODE) 0187 #define FLEXCAN_PN_INT_MASK(x) (((uint64_t)(((uint64_t)(x)) << 32)) & 0x3000000000000U) 0188 #define FLEXCAN_PN_INT_UNMASK(x) (((uint32_t)(((uint64_t)(x)) >> 32)) & 0x00030000U) 0189 #define FLEXCAN_PN_STATUS_MASK(x) (((uint64_t)(((uint64_t)(x)) << 16)) & 0x300000000U) 0190 #define FLEXCAN_PN_STATUS_UNMASK(x) (((uint32_t)(((uint64_t)(x)) >> 16)) & 0x00030000U) 0191 #endif 0192 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 0193 #define FLEXCAN_EFIFO_INT_MASK(x) (((uint64_t)(((uint64_t)(x)) << 32)) & 0xF000000000000000U) 0194 #define FLEXCAN_EFIFO_INT_UNMASK(x) (((uint32_t)(((uint64_t)(x)) >> 32)) & 0xF0000000U) 0195 #define FLEXCAN_EFIFO_STATUS_MASK(x) (((uint64_t)(((uint64_t)(x)) << 32)) & 0xF003000000000000U) 0196 #define FLEXCAN_EFIFO_STATUS_UNMASK(x) (((uint32_t)(((uint64_t)(x)) >> 32)) & 0xF0030000U) 0197 #endif 0198 #if (defined(FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) && FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) 0199 #define FLEXCAN_MECR_INT_MASK(x) (((uint64_t)(((uint64_t)(x)) << 16)) & 0xD00000000U) 0200 #define FLEXCAN_MECR_INT_UNMASK(x) (((uint32_t)(((uint64_t)(x)) >> 16)) & 0x000D0000U) 0201 #define FLEXCAN_MECR_STATUS_MASK(x) (((uint64_t)(((uint64_t)(x)) << 34)) & 0x34003400000000U) 0202 #define FLEXCAN_MECR_STATUS_UNMASK(x) (((uint32_t)(((uint64_t)(x)) >> 34)) & 0x000D000DU) 0203 #endif 0204 0205 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 0206 #define FLEXCAN_ERROR_AND_STATUS_INIT_FLAG \ 0207 ((uint32_t)kFLEXCAN_ErrorOverrunFlag | (uint32_t)kFLEXCAN_FDErrorIntFlag | (uint32_t)kFLEXCAN_BusoffDoneIntFlag | \ 0208 (uint32_t)kFLEXCAN_TxWarningIntFlag | (uint32_t)kFLEXCAN_RxWarningIntFlag | (uint32_t)kFLEXCAN_BusOffIntFlag | \ 0209 (uint32_t)kFLEXCAN_ErrorIntFlag | FLEXCAN_MEMORY_ERROR_INIT_FLAG) 0210 #else 0211 #define FLEXCAN_ERROR_AND_STATUS_INIT_FLAG \ 0212 ((uint32_t)kFLEXCAN_TxWarningIntFlag | (uint32_t)kFLEXCAN_RxWarningIntFlag | (uint32_t)kFLEXCAN_BusOffIntFlag | \ 0213 (uint32_t)kFLEXCAN_ErrorIntFlag | FLEXCAN_MEMORY_ERROR_INIT_FLAG) 0214 #endif 0215 #if (defined(FSL_FEATURE_FLEXCAN_HAS_PN_MODE) && FSL_FEATURE_FLEXCAN_HAS_PN_MODE) 0216 #define FLEXCAN_WAKE_UP_FLAG \ 0217 ((uint32_t)kFLEXCAN_WakeUpIntFlag | (uint64_t)kFLEXCAN_PNMatchIntFlag | (uint64_t)kFLEXCAN_PNTimeoutIntFlag) 0218 #else 0219 #define FLEXCAN_WAKE_UP_FLAG ((uint32_t)kFLEXCAN_WakeUpIntFlag) 0220 #endif 0221 #if (defined(FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) && FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) 0222 #define FLEXCAN_MEMORY_ERROR_INIT_FLAG ((uint64_t)kFLEXCAN_AllMemoryErrorFlag) 0223 #else 0224 #define FLEXCAN_MEMORY_ERROR_INIT_FLAG (0U) 0225 #endif 0226 0227 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 0228 #define FLEXCAN_MEMORY_ENHANCED_RX_FIFO_INIT_FLAG \ 0229 ((uint64_t)kFLEXCAN_ERxFifoUnderflowIntFlag | (uint64_t)kFLEXCAN_ERxFifoOverflowIntFlag | \ 0230 (uint64_t)kFLEXCAN_ERxFifoWatermarkIntFlag | (uint64_t)kFLEXCAN_ERxFifoDataAvlIntFlag) 0231 #endif 0232 /*! @brief FlexCAN Enhanced Rx FIFO base address helper macro. */ 0233 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 0234 #define E_RX_FIFO(base) ((uint32_t)(base) + 0x2000U) 0235 #else 0236 #define FLEXCAN_MEMORY_ENHANCED_RX_FIFO_INIT_FLAG (0U) 0237 #endif 0238 /*! @brief FlexCAN transfer status. */ 0239 enum 0240 { 0241 kStatus_FLEXCAN_TxBusy = MAKE_STATUS(kStatusGroup_FLEXCAN, 0), /*!< Tx Message Buffer is Busy. */ 0242 kStatus_FLEXCAN_TxIdle = MAKE_STATUS(kStatusGroup_FLEXCAN, 1), /*!< Tx Message Buffer is Idle. */ 0243 kStatus_FLEXCAN_TxSwitchToRx = MAKE_STATUS( 0244 kStatusGroup_FLEXCAN, 2), /*!< Remote Message is send out and Message buffer changed to Receive one. */ 0245 kStatus_FLEXCAN_RxBusy = MAKE_STATUS(kStatusGroup_FLEXCAN, 3), /*!< Rx Message Buffer is Busy. */ 0246 kStatus_FLEXCAN_RxIdle = MAKE_STATUS(kStatusGroup_FLEXCAN, 4), /*!< Rx Message Buffer is Idle. */ 0247 kStatus_FLEXCAN_RxOverflow = MAKE_STATUS(kStatusGroup_FLEXCAN, 5), /*!< Rx Message Buffer is Overflowed. */ 0248 kStatus_FLEXCAN_RxFifoBusy = MAKE_STATUS(kStatusGroup_FLEXCAN, 6), /*!< Rx Message FIFO is Busy. */ 0249 kStatus_FLEXCAN_RxFifoIdle = MAKE_STATUS(kStatusGroup_FLEXCAN, 7), /*!< Rx Message FIFO is Idle. */ 0250 kStatus_FLEXCAN_RxFifoOverflow = MAKE_STATUS(kStatusGroup_FLEXCAN, 8), /*!< Rx Message FIFO is overflowed. */ 0251 kStatus_FLEXCAN_RxFifoWarning = MAKE_STATUS(kStatusGroup_FLEXCAN, 9), /*!< Rx Message FIFO is almost overflowed. */ 0252 kStatus_FLEXCAN_RxFifoDisabled = 0253 MAKE_STATUS(kStatusGroup_FLEXCAN, 10), /*!< Rx Message FIFO is disabled during reading. */ 0254 kStatus_FLEXCAN_ErrorStatus = MAKE_STATUS(kStatusGroup_FLEXCAN, 11), /*!< FlexCAN Module Error and Status. */ 0255 kStatus_FLEXCAN_WakeUp = MAKE_STATUS(kStatusGroup_FLEXCAN, 12), /*!< FlexCAN is waken up from STOP mode. */ 0256 kStatus_FLEXCAN_UnHandled = MAKE_STATUS(kStatusGroup_FLEXCAN, 13), /*!< UnHadled Interrupt asserted. */ 0257 kStatus_FLEXCAN_RxRemote = MAKE_STATUS(kStatusGroup_FLEXCAN, 14), /*!< Rx Remote Message Received in Mail box. */ 0258 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 0259 kStatus_FLEXCAN_RxFifoUnderflow = 0260 MAKE_STATUS(kStatusGroup_FLEXCAN, 15), /*!< Enhanced Rx Message FIFO is underflow. */ 0261 #endif 0262 }; 0263 0264 /*! @brief FlexCAN frame format. */ 0265 typedef enum _flexcan_frame_format 0266 { 0267 kFLEXCAN_FrameFormatStandard = 0x0U, /*!< Standard frame format attribute. */ 0268 kFLEXCAN_FrameFormatExtend = 0x1U, /*!< Extend frame format attribute. */ 0269 } flexcan_frame_format_t; 0270 0271 /*! @brief FlexCAN frame type. */ 0272 typedef enum _flexcan_frame_type 0273 { 0274 kFLEXCAN_FrameTypeData = 0x0U, /*!< Data frame type attribute. */ 0275 kFLEXCAN_FrameTypeRemote = 0x1U, /*!< Remote frame type attribute. */ 0276 } flexcan_frame_type_t; 0277 0278 /*! @brief FlexCAN clock source. 0279 * @deprecated Do not use the kFLEXCAN_ClkSrcOs. It has been superceded kFLEXCAN_ClkSrc0 0280 * @deprecated Do not use the kFLEXCAN_ClkSrcPeri. It has been superceded kFLEXCAN_ClkSrc1 0281 */ 0282 typedef enum _flexcan_clock_source 0283 { 0284 kFLEXCAN_ClkSrcOsc = 0x0U, /*!< FlexCAN Protocol Engine clock from Oscillator. */ 0285 kFLEXCAN_ClkSrcPeri = 0x1U, /*!< FlexCAN Protocol Engine clock from Peripheral Clock. */ 0286 kFLEXCAN_ClkSrc0 = 0x0U, /*!< FlexCAN Protocol Engine clock selected by user as SRC == 0. */ 0287 kFLEXCAN_ClkSrc1 = 0x1U, /*!< FlexCAN Protocol Engine clock selected by user as SRC == 1. */ 0288 } flexcan_clock_source_t; 0289 0290 /*! @brief FlexCAN wake up source. */ 0291 typedef enum _flexcan_wake_up_source 0292 { 0293 kFLEXCAN_WakeupSrcUnfiltered = 0x0U, /*!< FlexCAN uses unfiltered Rx input to detect edge. */ 0294 kFLEXCAN_WakeupSrcFiltered = 0x1U, /*!< FlexCAN uses filtered Rx input to detect edge. */ 0295 } flexcan_wake_up_source_t; 0296 0297 /*! @brief FlexCAN Rx Fifo Filter type. */ 0298 typedef enum _flexcan_rx_fifo_filter_type 0299 { 0300 kFLEXCAN_RxFifoFilterTypeA = 0x0U, /*!< One full ID (standard and extended) per ID Filter element. */ 0301 kFLEXCAN_RxFifoFilterTypeB = 0302 0x1U, /*!< Two full standard IDs or two partial 14-bit ID slices per ID Filter Table element. */ 0303 kFLEXCAN_RxFifoFilterTypeC = 0304 0x2U, /*!< Four partial 8-bit Standard or extended ID slices per ID Filter Table element. */ 0305 kFLEXCAN_RxFifoFilterTypeD = 0x3U, /*!< All frames rejected. */ 0306 } flexcan_rx_fifo_filter_type_t; 0307 0308 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 0309 /*! 0310 * @brief FlexCAN Message Buffer Payload size. 0311 */ 0312 typedef enum _flexcan_mb_size 0313 { 0314 kFLEXCAN_8BperMB = 0x0U, /*!< Selects 8 bytes per Message Buffer. */ 0315 kFLEXCAN_16BperMB = 0x1U, /*!< Selects 16 bytes per Message Buffer. */ 0316 kFLEXCAN_32BperMB = 0x2U, /*!< Selects 32 bytes per Message Buffer. */ 0317 kFLEXCAN_64BperMB = 0x3U, /*!< Selects 64 bytes per Message Buffer. */ 0318 } flexcan_mb_size_t; 0319 0320 /*! 0321 * @brief FlexCAN CAN FD frame supporting data length (available DLC values). 0322 * 0323 * For Tx, when the Data size corresponding to DLC value stored in the MB selected for transmission is larger than the 0324 * MB Payload size, FlexCAN adds the necessary number of bytes with constant 0xCC pattern to complete the expected DLC. 0325 * For Rx, when the Data size corresponding to DLC value received from the CAN bus is larger than the MB Payload size, 0326 * the high order bytes that do not fit the Payload size will lose. 0327 */ 0328 enum _flexcan_fd_frame_length 0329 { 0330 kFLEXCAN_0BperFrame = 0x0U, /*!< Frame contains 0 valid data bytes. */ 0331 kFLEXCAN_1BperFrame, /*!< Frame contains 1 valid data bytes. */ 0332 kFLEXCAN_2BperFrame, /*!< Frame contains 2 valid data bytes. */ 0333 kFLEXCAN_3BperFrame, /*!< Frame contains 3 valid data bytes. */ 0334 kFLEXCAN_4BperFrame, /*!< Frame contains 4 valid data bytes. */ 0335 kFLEXCAN_5BperFrame, /*!< Frame contains 5 valid data bytes. */ 0336 kFLEXCAN_6BperFrame, /*!< Frame contains 6 valid data bytes. */ 0337 kFLEXCAN_7BperFrame, /*!< Frame contains 7 valid data bytes. */ 0338 kFLEXCAN_8BperFrame, /*!< Frame contains 8 valid data bytes. */ 0339 kFLEXCAN_12BperFrame, /*!< Frame contains 12 valid data bytes. */ 0340 kFLEXCAN_16BperFrame, /*!< Frame contains 16 valid data bytes. */ 0341 kFLEXCAN_20BperFrame, /*!< Frame contains 20 valid data bytes. */ 0342 kFLEXCAN_24Bperrame, /*!< Frame contains 24 valid data bytes. */ 0343 kFLEXCAN_32BperFrame, /*!< Frame contains 32 valid data bytes. */ 0344 kFLEXCAN_48BperFrame, /*!< Frame contains 48 valid data bytes. */ 0345 kFLEXCAN_64BperFrame, /*!< Frame contains 64 valid data bytes. */ 0346 }; 0347 #endif 0348 0349 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 0350 /*! @brief FlexCAN Enhanced Rx Fifo DMA transfer per read length enumerations. */ 0351 typedef enum _flexcan_efifo_dma_per_read_length 0352 { 0353 kFLEXCAN_1WordPerRead = 0x0U, /*!< Transfer 1 32-bit words (CS).*/ 0354 kFLEXCAN_2WordPerRead, /*!< Transfer 2 32-bit words (CS + ID).*/ 0355 kFLEXCAN_3WordPerRead, /*!< Transfer 3 32-bit words (CS + ID + 1~4 bytes data).*/ 0356 kFLEXCAN_4WordPerRead, /*!< Transfer 4 32-bit words (CS + ID + 5~8 bytes data).*/ 0357 kFLEXCAN_5WordPerRead, /*!< Transfer 5 32-bit words (CS + ID + 9~12 bytes data).*/ 0358 kFLEXCAN_6WordPerRead, /*!< Transfer 6 32-bit words (CS + ID + 13~16 bytes data).*/ 0359 kFLEXCAN_7WordPerRead, /*!< Transfer 7 32-bit words (CS + ID + 17~20 bytes data).*/ 0360 kFLEXCAN_8WordPerRead, /*!< Transfer 8 32-bit words (CS + ID + 21~24 bytes data).*/ 0361 kFLEXCAN_9WordPerRead, /*!< Transfer 9 32-bit words (CS + ID + 25~28 bytes data).*/ 0362 kFLEXCAN_10WordPerRead, /*!< Transfer 10 32-bit words (CS + ID + 29~32 bytes data).*/ 0363 kFLEXCAN_11WordPerRead, /*!< Transfer 11 32-bit words (CS + ID + 33~36 bytes data).*/ 0364 kFLEXCAN_12WordPerRead, /*!< Transfer 12 32-bit words (CS + ID + 37~40 bytes data).*/ 0365 kFLEXCAN_13WordPerRead, /*!< Transfer 13 32-bit words (CS + ID + 41~44 bytes data).*/ 0366 kFLEXCAN_14WordPerRead, /*!< Transfer 14 32-bit words (CS + ID + 45~48 bytes data).*/ 0367 kFLEXCAN_15WordPerRead, /*!< Transfer 15 32-bit words (CS + ID + 49~52 bytes data).*/ 0368 kFLEXCAN_16WordPerRead, /*!< Transfer 16 32-bit words (CS + ID + 53~56 bytes data).*/ 0369 kFLEXCAN_17WordPerRead, /*!< Transfer 17 32-bit words (CS + ID + 57~60 bytes data).*/ 0370 kFLEXCAN_18WordPerRead, /*!< Transfer 18 32-bit words (CS + ID + 61~64 bytes data).*/ 0371 kFLEXCAN_19WordPerRead /*!< Transfer 19 32-bit words (CS + ID + 64 bytes data + ID HIT).*/ 0372 } flexcan_efifo_dma_per_read_length_t; 0373 #endif 0374 0375 /*! 0376 * @brief FlexCAN Enhanced/Legacy Rx FIFO priority. 0377 * 0378 * The matching process starts from the Rx MB(or Enhanced/Legacy Rx FIFO) with higher priority. 0379 * If no MB(or Enhanced/Legacy Rx FIFO filter) is satisfied, the matching process goes on with 0380 * the Enhanced/Legacy Rx FIFO(or Rx MB) with lower priority. 0381 */ 0382 typedef enum _flexcan_rx_fifo_priority 0383 { 0384 kFLEXCAN_RxFifoPrioLow = 0x0U, /*!< Matching process start from Rx Message Buffer first. */ 0385 kFLEXCAN_RxFifoPrioHigh = 0x1U, /*!< Matching process start from Enhanced/Legacy Rx FIFO first. */ 0386 } flexcan_rx_fifo_priority_t; 0387 0388 /*! 0389 * @brief FlexCAN interrupt enable enumerations. 0390 * 0391 * This provides constants for the FlexCAN interrupt enable enumerations for use in the FlexCAN functions. 0392 * @note FlexCAN Message Buffers and Legacy Rx FIFO interrupts not included in. 0393 */ 0394 enum _flexcan_interrupt_enable 0395 { 0396 kFLEXCAN_BusOffInterruptEnable = CAN_CTRL1_BOFFMSK_MASK, /*!< Bus Off interrupt, use bit 15. */ 0397 kFLEXCAN_ErrorInterruptEnable = CAN_CTRL1_ERRMSK_MASK, /*!< CAN Error interrupt, use bit 14. */ 0398 kFLEXCAN_TxWarningInterruptEnable = CAN_CTRL1_TWRNMSK_MASK, /*!< Tx Warning interrupt, use bit 11. */ 0399 kFLEXCAN_RxWarningInterruptEnable = CAN_CTRL1_RWRNMSK_MASK, /*!< Rx Warning interrupt, use bit 10. */ 0400 kFLEXCAN_WakeUpInterruptEnable = CAN_MCR_WAKMSK_MASK, /*!< Self Wake Up interrupt, use bit 26. */ 0401 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 0402 kFLEXCAN_FDErrorInterruptEnable = CAN_CTRL2_ERRMSK_FAST_MASK, /*!< CAN FD Error interrupt, use bit 31. */ 0403 #endif 0404 #if (defined(FSL_FEATURE_FLEXCAN_HAS_PN_MODE) && FSL_FEATURE_FLEXCAN_HAS_PN_MODE) 0405 /*! PN Match Wake Up interrupt, use high word bit 17. */ 0406 kFLEXCAN_PNMatchWakeUpInterruptEnable = FLEXCAN_PN_INT_MASK(CAN_CTRL1_PN_WTOF_MSK_MASK), 0407 /*! PN Timeout Wake Up interrupt, use high word bit 16. */ 0408 kFLEXCAN_PNTimeoutWakeUpInterruptEnable = FLEXCAN_PN_INT_MASK(CAN_CTRL1_PN_WUMF_MSK_MASK), 0409 #endif 0410 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 0411 /*!< Enhanced Rx FIFO Underflow interrupt, use high word bit 31. */ 0412 kFLEXCAN_ERxFifoUnderflowInterruptEnable = FLEXCAN_EFIFO_INT_MASK(CAN_ERFIER_ERFUFWIE_MASK), 0413 /*!< Enhanced Rx FIFO Overflow interrupt, use high word bit 30. */ 0414 kFLEXCAN_ERxFifoOverflowInterruptEnable = FLEXCAN_EFIFO_INT_MASK(CAN_ERFIER_ERFOVFIE_MASK), 0415 /*!< Enhanced Rx FIFO Watermark interrupt, use high word bit 29. */ 0416 kFLEXCAN_ERxFifoWatermarkInterruptEnable = FLEXCAN_EFIFO_INT_MASK(CAN_ERFIER_ERFWMIIE_MASK), 0417 /*!< Enhanced Rx FIFO Data Avilable interrupt, use high word bit 28. */ 0418 kFLEXCAN_ERxFifoDataAvlInterruptEnable = FLEXCAN_EFIFO_INT_MASK(CAN_ERFIER_ERFDAIE_MASK), 0419 #endif 0420 #if (defined(FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) && FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) 0421 /*! Host Access With Non-Correctable Errors interrupt, use high word bit 0. */ 0422 kFLEXCAN_HostAccessNCErrorInterruptEnable = FLEXCAN_MECR_INT_MASK(CAN_MECR_HANCEI_MSK_MASK), 0423 /*! FlexCAN Access With Non-Correctable Errors interrupt, use high word bit 2. */ 0424 kFLEXCAN_FlexCanAccessNCErrorInterruptEnable = FLEXCAN_MECR_INT_MASK(CAN_MECR_FANCEI_MSK_MASK), 0425 /*! Host or FlexCAN Access With Correctable Errors interrupt, use high word bit 3. */ 0426 kFLEXCAN_HostOrFlexCanCErrorInterruptEnable = FLEXCAN_MECR_INT_MASK(CAN_MECR_CEI_MSK_MASK), 0427 #endif 0428 }; 0429 0430 /*! 0431 * @brief FlexCAN status flags. 0432 * 0433 * This provides constants for the FlexCAN status flags for use in the FlexCAN functions. 0434 * @note The CPU read action clears the bits corresponding to the FlEXCAN_ErrorFlag macro, therefore user need to 0435 * read status flags and distinguish which error is occur using @ref _flexcan_error_flags enumerations. 0436 */ 0437 enum _flexcan_flags 0438 { 0439 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 0440 kFLEXCAN_ErrorOverrunFlag = CAN_ESR1_ERROVR_MASK, /*!< Error Overrun Status. */ 0441 kFLEXCAN_FDErrorIntFlag = CAN_ESR1_ERRINT_FAST_MASK, /*!< CAN FD Error Interrupt Flag. */ 0442 kFLEXCAN_BusoffDoneIntFlag = CAN_ESR1_BOFFDONEINT_MASK, /*!< Bus Off process completed Interrupt Flag. */ 0443 #endif 0444 kFLEXCAN_SynchFlag = CAN_ESR1_SYNCH_MASK, /*!< CAN Synchronization Status. */ 0445 kFLEXCAN_TxWarningIntFlag = CAN_ESR1_TWRNINT_MASK, /*!< Tx Warning Interrupt Flag. */ 0446 kFLEXCAN_RxWarningIntFlag = CAN_ESR1_RWRNINT_MASK, /*!< Rx Warning Interrupt Flag. */ 0447 kFLEXCAN_IdleFlag = CAN_ESR1_IDLE_MASK, /*!< FlexCAN In IDLE Status. */ 0448 kFLEXCAN_FaultConfinementFlag = CAN_ESR1_FLTCONF_MASK, /*!< FlexCAN Fault Confinement State. */ 0449 kFLEXCAN_TransmittingFlag = CAN_ESR1_TX_MASK, /*!< FlexCAN In Transmission Status. */ 0450 kFLEXCAN_ReceivingFlag = CAN_ESR1_RX_MASK, /*!< FlexCAN In Reception Status. */ 0451 kFLEXCAN_BusOffIntFlag = CAN_ESR1_BOFFINT_MASK, /*!< Bus Off Interrupt Flag. */ 0452 kFLEXCAN_ErrorIntFlag = CAN_ESR1_ERRINT_MASK, /*!< CAN Error Interrupt Flag. */ 0453 kFLEXCAN_WakeUpIntFlag = CAN_ESR1_WAKINT_MASK, /*!< Self Wake-Up Interrupt Flag. */ 0454 kFLEXCAN_ErrorFlag = 0455 (uint32_t)(/*!< All FlexCAN Read Clear Error Status. */ 0456 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 0457 CAN_ESR1_STFERR_FAST_MASK | CAN_ESR1_FRMERR_FAST_MASK | CAN_ESR1_CRCERR_FAST_MASK | 0458 CAN_ESR1_BIT0ERR_FAST_MASK | CAN_ESR1_BIT1ERR_FAST_MASK | CAN_ESR1_ERROVR_MASK | 0459 #endif 0460 CAN_ESR1_TXWRN_MASK | CAN_ESR1_RXWRN_MASK | CAN_ESR1_BIT1ERR_MASK | CAN_ESR1_BIT0ERR_MASK | 0461 CAN_ESR1_ACKERR_MASK | CAN_ESR1_CRCERR_MASK | CAN_ESR1_FRMERR_MASK | CAN_ESR1_STFERR_MASK), 0462 #if (defined(FSL_FEATURE_FLEXCAN_HAS_PN_MODE) && FSL_FEATURE_FLEXCAN_HAS_PN_MODE) 0463 kFLEXCAN_PNMatchIntFlag = FLEXCAN_PN_STATUS_MASK(CAN_WU_MTC_WUMF_MASK), /*!< PN Matching Event Interrupt Flag. */ 0464 kFLEXCAN_PNTimeoutIntFlag = FLEXCAN_PN_STATUS_MASK(CAN_WU_MTC_WTOF_MASK), /*!< PN Timeout Event Interrupt Flag. */ 0465 #endif 0466 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 0467 kFLEXCAN_ERxFifoUnderflowIntFlag = 0468 FLEXCAN_EFIFO_STATUS_MASK(CAN_ERFSR_ERFUFW_MASK), /*!< Enhanced Rx FIFO underflow Interrupt Flag. */ 0469 kFLEXCAN_ERxFifoOverflowIntFlag = 0470 FLEXCAN_EFIFO_STATUS_MASK(CAN_ERFSR_ERFOVF_MASK), /*!< Enhanced Rx FIFO overflow Interrupt Flag. */ 0471 kFLEXCAN_ERxFifoWatermarkIntFlag = 0472 FLEXCAN_EFIFO_STATUS_MASK(CAN_ERFSR_ERFWMI_MASK), /*!< Enhanced Rx FIFO watermark Interrupt Flag. */ 0473 kFLEXCAN_ERxFifoDataAvlIntFlag = 0474 FLEXCAN_EFIFO_STATUS_MASK(CAN_ERFSR_ERFDA_MASK), /*!< Enhanced Rx FIFO data available Interrupt Flag. */ 0475 kFLEXCAN_ERxFifoEmptyFlag = FLEXCAN_EFIFO_STATUS_MASK(CAN_ERFSR_ERFE_MASK), /*!< Enhanced Rx FIFO empty status. */ 0476 kFLEXCAN_ERxFifoFullFlag = FLEXCAN_EFIFO_STATUS_MASK(CAN_ERFSR_ERFF_MASK), /*!< Enhanced Rx FIFO full status. */ 0477 #endif 0478 #if (defined(FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) && FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) 0479 /*! Host Access With Non-Correctable Error Interrupt Flag. */ 0480 kFLEXCAN_HostAccessNonCorrectableErrorIntFlag = FLEXCAN_MECR_INT_MASK(CAN_ERRSR_HANCEIF_MASK), 0481 /*! FlexCAN Access With Non-Correctable Error Interrupt Flag. */ 0482 kFLEXCAN_FlexCanAccessNonCorrectableErrorIntFlag = FLEXCAN_MECR_INT_MASK(CAN_ERRSR_FANCEIF_MASK), 0483 /*! Correctable Error Interrupt Flag. */ 0484 kFLEXCAN_CorrectableErrorIntFlag = FLEXCAN_MECR_INT_MASK(CAN_ERRSR_CEIF_MASK), 0485 /*! Host Access With Non-Correctable Error Interrupt Overrun Flag. */ 0486 kFLEXCAN_HostAccessNonCorrectableErrorOverrunFlag = FLEXCAN_MECR_INT_MASK(CAN_ERRSR_HANCEIOF_MASK), 0487 /*! FlexCAN Access With Non-Correctable Error Interrupt Overrun Flag. */ 0488 kFLEXCAN_FlexCanAccessNonCorrectableErrorOverrunFlag = FLEXCAN_MECR_INT_MASK(CAN_ERRSR_FANCEIOF_MASK), 0489 /*! Correctable Error Interrupt Overrun Flag. */ 0490 kFLEXCAN_CorrectableErrorOverrunFlag = FLEXCAN_MECR_INT_MASK(CAN_ERRSR_CEIOF_MASK), 0491 /*! All Memory Error Flags. */ 0492 kFLEXCAN_AllMemoryErrorFlag = 0493 (kFLEXCAN_HostAccessNonCorrectableErrorIntFlag | kFLEXCAN_FlexCanAccessNonCorrectableErrorIntFlag | 0494 kFLEXCAN_CorrectableErrorIntFlag | kFLEXCAN_HostAccessNonCorrectableErrorOverrunFlag | 0495 kFLEXCAN_FlexCanAccessNonCorrectableErrorOverrunFlag | kFLEXCAN_CorrectableErrorOverrunFlag) 0496 #endif 0497 }; 0498 0499 /*! 0500 * @brief FlexCAN error status flags. 0501 * 0502 * The FlexCAN Error Status enumerations is used to report current error of the FlexCAN bus. 0503 * This enumerations should be used with KFLEXCAN_ErrorFlag in @ref _flexcan_flags enumerations 0504 * to ditermine which error is generated. 0505 */ 0506 enum _flexcan_error_flags 0507 { 0508 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 0509 kFLEXCAN_FDStuffingError = CAN_ESR1_STFERR_FAST_MASK, /*!< Stuffing Error. */ 0510 kFLEXCAN_FDFormError = CAN_ESR1_FRMERR_FAST_MASK, /*!< Form Error. */ 0511 kFLEXCAN_FDCrcError = CAN_ESR1_CRCERR_FAST_MASK, /*!< Cyclic Redundancy Check Error. */ 0512 kFLEXCAN_FDBit0Error = CAN_ESR1_BIT0ERR_FAST_MASK, /*!< Unable to send dominant bit. */ 0513 kFLEXCAN_FDBit1Error = (int)CAN_ESR1_BIT1ERR_FAST_MASK, /*!< Unable to send recessive bit. */ 0514 #endif 0515 kFLEXCAN_TxErrorWarningFlag = CAN_ESR1_TXWRN_MASK, /*!< Tx Error Warning Status. */ 0516 kFLEXCAN_RxErrorWarningFlag = CAN_ESR1_RXWRN_MASK, /*!< Rx Error Warning Status. */ 0517 kFLEXCAN_StuffingError = CAN_ESR1_STFERR_MASK, /*!< Stuffing Error. */ 0518 kFLEXCAN_FormError = CAN_ESR1_FRMERR_MASK, /*!< Form Error. */ 0519 kFLEXCAN_CrcError = CAN_ESR1_CRCERR_MASK, /*!< Cyclic Redundancy Check Error. */ 0520 kFLEXCAN_AckError = CAN_ESR1_ACKERR_MASK, /*!< Received no ACK on transmission. */ 0521 kFLEXCAN_Bit0Error = CAN_ESR1_BIT0ERR_MASK, /*!< Unable to send dominant bit. */ 0522 kFLEXCAN_Bit1Error = CAN_ESR1_BIT1ERR_MASK, /*!< Unable to send recessive bit. */ 0523 }; 0524 0525 /*! 0526 * @brief FlexCAN Legacy Rx FIFO status flags. 0527 * 0528 * The FlexCAN Legacy Rx FIFO Status enumerations are used to determine the status of the 0529 * Rx FIFO. Because Rx FIFO occupy the MB0 ~ MB7 (Rx Fifo filter also occupies 0530 * more Message Buffer space), Rx FIFO status flags are mapped to the corresponding 0531 * Message Buffer status flags. 0532 */ 0533 enum 0534 { 0535 kFLEXCAN_RxFifoOverflowFlag = CAN_IFLAG1_BUF7I_MASK, /*!< Rx FIFO overflow flag. */ 0536 kFLEXCAN_RxFifoWarningFlag = CAN_IFLAG1_BUF6I_MASK, /*!< Rx FIFO almost full flag. */ 0537 kFLEXCAN_RxFifoFrameAvlFlag = CAN_IFLAG1_BUF5I_MASK, /*!< Frames available in Rx FIFO flag. */ 0538 }; 0539 0540 #if (defined(FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) && FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) 0541 /*! 0542 * @brief FlexCAN Memory Error Type. 0543 */ 0544 typedef enum _flexcan_memory_error_type 0545 { 0546 kFLEXCAN_CorrectableError = 0U, /*!< The memory error is correctable which means on bit error. */ 0547 kFLEXCAN_NonCorrectableError /*!< The memory error is non-correctable which means two bit errors. */ 0548 } flexcan_memory_error_type_t; 0549 0550 /*! 0551 * @brief FlexCAN Memory Access Type. 0552 */ 0553 typedef enum _flexcan_memory_access_type 0554 { 0555 kFLEXCAN_MoveOutFlexCanAccess = 0U, /*!< The memory error was detected during move-out FlexCAN access. */ 0556 kFLEXCAN_MoveInAccess, /*!< The memory error was detected during move-in FlexCAN access. */ 0557 kFLEXCAN_TxArbitrationAccess, /*!< The memory error was detected during Tx Arbitration FlexCAN access. */ 0558 kFLEXCAN_RxMatchingAccess, /*!< The memory error was detected during Rx Matching FlexCAN access. */ 0559 kFLEXCAN_MoveOutHostAccess /*!< The memory error was detected during Rx Matching Host (CPU) access. */ 0560 } flexcan_memory_access_type_t; 0561 0562 /*! 0563 * @brief FlexCAN Memory Error Byte Syndrome. 0564 */ 0565 typedef enum _flexcan_byte_error_syndrome 0566 { 0567 kFLEXCAN_NoError = 0U, /*!< No bit error in this byte. */ 0568 kFLEXCAN_ParityBits0Error = 1U, /*!< Parity bit 0 error in this byte. */ 0569 kFLEXCAN_ParityBits1Error = 2U, /*!< Parity bit 1 error in this byte. */ 0570 kFLEXCAN_ParityBits2Error = 4U, /*!< Parity bit 2 error in this byte. */ 0571 kFLEXCAN_ParityBits3Error = 8U, /*!< Parity bit 3 error in this byte. */ 0572 kFLEXCAN_ParityBits4Error = 16U, /*!< Parity bit 4 error in this byte. */ 0573 kFLEXCAN_DataBits0Error = 28U, /*!< Data bit 0 error in this byte. */ 0574 kFLEXCAN_DataBits1Error = 22U, /*!< Data bit 1 error in this byte. */ 0575 kFLEXCAN_DataBits2Error = 19U, /*!< Data bit 2 error in this byte. */ 0576 kFLEXCAN_DataBits3Error = 25U, /*!< Data bit 3 error in this byte. */ 0577 kFLEXCAN_DataBits4Error = 26U, /*!< Data bit 4 error in this byte. */ 0578 kFLEXCAN_DataBits5Error = 7U, /*!< Data bit 5 error in this byte. */ 0579 kFLEXCAN_DataBits6Error = 21U, /*!< Data bit 6 error in this byte. */ 0580 kFLEXCAN_DataBits7Error = 14U, /*!< Data bit 7 error in this byte. */ 0581 kFLEXCAN_AllZeroError = 6U, /*!< All-zeros non-correctable error in this byte. */ 0582 kFLEXCAN_AllOneError = 31U, /*!< All-ones non-correctable error in this byte. */ 0583 kFLEXCAN_NonCorrectableErrors /*!< Non-correctable error in this byte. */ 0584 } flexcan_byte_error_syndrome_t; 0585 0586 /*! 0587 * @brief FlexCAN memory error register status structure 0588 * 0589 * This structure contains the memory access properties that caused a memory error access. 0590 * It is used as the parameter of FLEXCAN_GetMemoryErrorReportStatus() function. And user can 0591 * use FLEXCAN_GetMemoryErrorReportStatus to get the status of the last memory error access. 0592 */ 0593 typedef struct _flexcan_memory_error_report_status 0594 { 0595 flexcan_memory_error_type_t errorType; /*!< The type of memory error that giving rise to the report. */ 0596 flexcan_memory_access_type_t accessType; /*!< The type of memory access that giving rise to the memory error. */ 0597 uint16_t accessAddress; /*!< The address where memory error detected. */ 0598 uint32_t errorData; /*!< The raw data word read from memory with error. */ 0599 struct 0600 { 0601 bool byteIsRead; /*!< The byte n (0~3) was read or not. */ 0602 /*!< The type of error and which bit in byte (n) is affected by the error. */ 0603 flexcan_byte_error_syndrome_t bitAffected; 0604 } byteStatus[4]; 0605 } flexcan_memory_error_report_status_t; 0606 #endif 0607 0608 #if defined(__CC_ARM) 0609 #pragma anon_unions 0610 #endif 0611 /*! @brief FlexCAN message frame structure. */ 0612 typedef struct _flexcan_frame 0613 { 0614 struct 0615 { 0616 uint32_t timestamp : 16; /*!< FlexCAN internal Free-Running Counter Time Stamp. */ 0617 uint32_t length : 4; /*!< CAN frame data length in bytes (Range: 0~8). */ 0618 uint32_t type : 1; /*!< CAN Frame Type(DATA or REMOTE). */ 0619 uint32_t format : 1; /*!< CAN Frame Identifier(STD or EXT format). */ 0620 uint32_t : 1; /*!< Reserved. */ 0621 uint32_t idhit : 9; /*!< CAN Rx FIFO filter hit id(This value is only used in Rx FIFO receive mode). */ 0622 }; 0623 struct 0624 { 0625 uint32_t id : 29; /*!< CAN Frame Identifier, should be set using FLEXCAN_ID_EXT() or FLEXCAN_ID_STD() macro. */ 0626 uint32_t : 3; /*!< Reserved. */ 0627 }; 0628 union 0629 { 0630 struct 0631 { 0632 uint32_t dataWord0; /*!< CAN Frame payload word0. */ 0633 uint32_t dataWord1; /*!< CAN Frame payload word1. */ 0634 }; 0635 struct 0636 { 0637 uint8_t dataByte3; /*!< CAN Frame payload byte3. */ 0638 uint8_t dataByte2; /*!< CAN Frame payload byte2. */ 0639 uint8_t dataByte1; /*!< CAN Frame payload byte1. */ 0640 uint8_t dataByte0; /*!< CAN Frame payload byte0. */ 0641 uint8_t dataByte7; /*!< CAN Frame payload byte7. */ 0642 uint8_t dataByte6; /*!< CAN Frame payload byte6. */ 0643 uint8_t dataByte5; /*!< CAN Frame payload byte5. */ 0644 uint8_t dataByte4; /*!< CAN Frame payload byte4. */ 0645 }; 0646 }; 0647 } flexcan_frame_t; 0648 0649 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 0650 /*! @brief CAN FD message frame structure. 0651 * 0652 * The CAN FD message supporting up to sixty four bytes can be used for a data frame, depending on the length 0653 * selected for the message buffers. The length should be a enumeration member, see @ref _flexcan_fd_frame_length. 0654 */ 0655 typedef struct _flexcan_fd_frame 0656 { 0657 struct 0658 { 0659 uint32_t timestamp : 16; /*!< FlexCAN internal Free-Running Counter Time Stamp. */ 0660 uint32_t length : 4; /*!< CAN FD frame data length code (DLC), range see @ref _flexcan_fd_frame_length, When the 0661 length <= 8, it equal to the data length, otherwise the number of valid frame data is 0662 not equal to the length value. user can 0663 use DLC_LENGTH_DECODE(length) macro to get the number of valid data bytes. */ 0664 uint32_t type : 1; /*!< CAN Frame Type(DATA or REMOTE). */ 0665 uint32_t format : 1; /*!< CAN Frame Identifier(STD or EXT format). */ 0666 uint32_t srr : 1; /*!< Substitute Remote request. */ 0667 uint32_t : 6; 0668 uint32_t esi : 1; /*!< Error State Indicator. */ 0669 uint32_t brs : 1; /*!< Bit Rate Switch. */ 0670 uint32_t edl : 1; /*!< Extended Data Length. */ 0671 }; 0672 struct 0673 { 0674 uint32_t id : 29; /*!< CAN Frame Identifier, should be set using FLEXCAN_ID_EXT() or FLEXCAN_ID_STD() macro. */ 0675 uint32_t : 3; /*!< Reserved. */ 0676 }; 0677 union 0678 { 0679 struct 0680 { 0681 uint32_t dataWord[16]; /*!< CAN FD Frame payload, 16 double word maximum. */ 0682 }; 0683 /* Note: the maximum databyte* below is actually 64, user can add them if needed, 0684 or just use dataWord[*] instead. */ 0685 struct 0686 { 0687 uint8_t dataByte3; /*!< CAN Frame payload byte3. */ 0688 uint8_t dataByte2; /*!< CAN Frame payload byte2. */ 0689 uint8_t dataByte1; /*!< CAN Frame payload byte1. */ 0690 uint8_t dataByte0; /*!< CAN Frame payload byte0. */ 0691 uint8_t dataByte7; /*!< CAN Frame payload byte7. */ 0692 uint8_t dataByte6; /*!< CAN Frame payload byte6. */ 0693 uint8_t dataByte5; /*!< CAN Frame payload byte5. */ 0694 uint8_t dataByte4; /*!< CAN Frame payload byte4. */ 0695 }; 0696 }; 0697 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 0698 /*! @note ID HIT offset is changed dynamically according to data length code (DLC), when DLC is 15, they will be 0699 * located below. Using FLEXCAN_FixEnhancedRxFifoFrameIdHit API is recommended to ensure this idhit value is 0700 * correct.*/ 0701 uint32_t idhit; /*!< CAN Enhanced Rx FIFO filter hit id (This value is only used in Enhanced Rx FIFO receive 0702 mode). */ 0703 #endif 0704 } flexcan_fd_frame_t; 0705 #endif 0706 0707 /*! @brief FlexCAN protocol timing characteristic configuration structure. */ 0708 typedef struct _flexcan_timing_config 0709 { 0710 uint16_t preDivider; /*!< Classic CAN or CAN FD nominal phase bit rate prescaler. */ 0711 uint8_t rJumpwidth; /*!< Classic CAN or CAN FD nominal phase Re-sync Jump Width. */ 0712 uint8_t phaseSeg1; /*!< Classic CAN or CAN FD nominal phase Segment 1. */ 0713 uint8_t phaseSeg2; /*!< Classic CAN or CAN FD nominal phase Segment 2. */ 0714 uint8_t propSeg; /*!< Classic CAN or CAN FD nominal phase Propagation Segment. */ 0715 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 0716 uint16_t fpreDivider; /*!< CAN FD data phase bit rate prescaler. */ 0717 uint8_t frJumpwidth; /*!< CAN FD data phase Re-sync Jump Width. */ 0718 uint8_t fphaseSeg1; /*!< CAN FD data phase Phase Segment 1. */ 0719 uint8_t fphaseSeg2; /*!< CAN FD data phase Phase Segment 2. */ 0720 uint8_t fpropSeg; /*!< CAN FD data phase Propagation Segment. */ 0721 #endif 0722 } flexcan_timing_config_t; 0723 0724 /*! @brief FlexCAN module configuration structure. 0725 * @deprecated Do not use the baudRate. It has been superceded bitRate 0726 * @deprecated Do not use the baudRateFD. It has been superceded bitRateFD 0727 */ 0728 typedef struct _flexcan_config 0729 { 0730 union 0731 { 0732 struct 0733 { 0734 uint32_t baudRate; /*!< FlexCAN bit rate in bps, for classical CAN or CANFD nominal phase. */ 0735 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 0736 uint32_t baudRateFD; /*!< FlexCAN FD bit rate in bps, for CANFD data phase. */ 0737 #endif 0738 }; 0739 struct 0740 { 0741 uint32_t bitRate; /*!< FlexCAN bit rate in bps, for classical CAN or CANFD nominal phase. */ 0742 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 0743 uint32_t bitRateFD; /*!< FlexCAN FD bit rate in bps, for CANFD data phase. */ 0744 #endif 0745 }; 0746 }; 0747 flexcan_clock_source_t clkSrc; /*!< Clock source for FlexCAN Protocol Engine. */ 0748 flexcan_wake_up_source_t wakeupSrc; /*!< Wake up source selection. */ 0749 uint8_t maxMbNum; /*!< The maximum number of Message Buffers used by user. */ 0750 bool enableLoopBack; /*!< Enable or Disable Loop Back Self Test Mode. */ 0751 bool enableTimerSync; /*!< Enable or Disable Timer Synchronization. */ 0752 bool enableSelfWakeup; /*!< Enable or Disable Self Wakeup Mode. */ 0753 bool enableIndividMask; /*!< Enable or Disable Rx Individual Mask and Queue feature. */ 0754 bool disableSelfReception; /*!< Enable or Disable Self Reflection. */ 0755 bool enableListenOnlyMode; /*!< Enable or Disable Listen Only Mode. */ 0756 #if !(defined(FSL_FEATURE_FLEXCAN_HAS_NO_SUPV_SUPPORT) && FSL_FEATURE_FLEXCAN_HAS_NO_SUPV_SUPPORT) 0757 bool enableSupervisorMode; /*!< Enable or Disable Supervisor Mode, enable this mode will make registers allow only 0758 Supervisor access. */ 0759 #endif 0760 #if (defined(FSL_FEATURE_FLEXCAN_HAS_DOZE_MODE_SUPPORT) && FSL_FEATURE_FLEXCAN_HAS_DOZE_MODE_SUPPORT) 0761 bool enableDoze; /*!< Enable or Disable Doze Mode. */ 0762 #endif 0763 #if (defined(FSL_FEATURE_FLEXCAN_HAS_PN_MODE) && FSL_FEATURE_FLEXCAN_HAS_PN_MODE) 0764 bool enablePretendedeNetworking; /*!< Enable or Disable the Pretended Networking mode. */ 0765 #endif 0766 #if (defined(FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) && FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) 0767 bool enableMemoryErrorControl; /*!< Enable or Disable the memory errors detection and correction mechanism. */ 0768 bool enableNonCorrectableErrorEnterFreeze; /*!< Enable or Disable Non-Correctable Errors In FlexCAN Access Put 0769 Device In Freeze Mode. */ 0770 #endif 0771 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_BIT_TIMING_REG) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_BIT_TIMING_REG) 0772 bool enableTransceiverDelayMeasure; /*!< Enable or Disable the transceiver delay measurement, when it is enabled, 0773 then the secondary sample point position is determined by the sum of the 0774 transceiver delay measurement plus the enhanced TDC offset. */ 0775 #endif 0776 flexcan_timing_config_t timingConfig; /* Protocol timing . */ 0777 } flexcan_config_t; 0778 0779 /*! 0780 * @brief FlexCAN Receive Message Buffer configuration structure 0781 * 0782 * This structure is used as the parameter of FLEXCAN_SetRxMbConfig() function. 0783 * The FLEXCAN_SetRxMbConfig() function is used to configure FlexCAN Receive 0784 * Message Buffer. The function abort previous receiving process, clean the 0785 * Message Buffer and activate the Rx Message Buffer using given Message Buffer 0786 * setting. 0787 */ 0788 typedef struct _flexcan_rx_mb_config 0789 { 0790 uint32_t id; /*!< CAN Message Buffer Frame Identifier, should be set using 0791 FLEXCAN_ID_EXT() or FLEXCAN_ID_STD() macro. */ 0792 flexcan_frame_format_t format; /*!< CAN Frame Identifier format(Standard of Extend). */ 0793 flexcan_frame_type_t type; /*!< CAN Frame Type(Data or Remote). */ 0794 } flexcan_rx_mb_config_t; 0795 0796 #if (defined(FSL_FEATURE_FLEXCAN_HAS_PN_MODE) && FSL_FEATURE_FLEXCAN_HAS_PN_MODE) 0797 /*! @brief FlexCAN Pretended Networking match source selection. */ 0798 typedef enum _flexcan_pn_match_source 0799 { 0800 kFLEXCAN_PNMatSrcID = 0U, /*!< Message match with ID filtering. */ 0801 kFLEXCAN_PNMatSrcIDAndData, /*!< Message match with ID filtering and payload filtering. */ 0802 } flexcan_pn_match_source_t; 0803 0804 /*! @brief FlexCAN Pretended Networking mode match type. */ 0805 typedef enum _flexcan_pn_match_mode 0806 { 0807 kFLEXCAN_PNMatModeEqual = 0x0U, /*!< Match upon ID/Payload contents against an exact target value. */ 0808 kFLEXCAN_PNMatModeGreater, /*!< Match upon an ID/Payload value greater than or equal to a specified target value. 0809 */ 0810 kFLEXCAN_PNMatModeSmaller, /*!< Match upon an ID/Payload value smaller than or equal to a specified target value. 0811 */ 0812 kFLEXCAN_PNMatModeRange, /*!< Match upon an ID/Payload value inside a range, greater than or equal to a specified 0813 lower limit, and smaller than or equal to a specified upper limit */ 0814 } flexcan_pn_match_mode_t; 0815 0816 /*! 0817 * @brief FlexCAN Pretended Networking configuration structure 0818 * 0819 * This structure is used as the parameter of FLEXCAN_SetPNConfig() function. 0820 * The FLEXCAN_SetPNConfig() function is used to configure FlexCAN Networking work mode. 0821 */ 0822 typedef struct _flexcan_pn_config 0823 { 0824 bool enableTimeout; /*!< Enable or Disable timeout event trigger wakeup.*/ 0825 uint16_t timeoutValue; /*!< The timeout value that generates a wakeup event, the counter timer is incremented based 0826 on 64 times the CAN Bit Time unit. */ 0827 bool enableMatch; /*!< Enable or Disable match event trigger wakeup.*/ 0828 flexcan_pn_match_source_t matchSrc; /*!< Selects the match source (ID and/or data match) to trigger wakeup. */ 0829 uint8_t matchNum; /*!< The number of times a given message must match the predefined ID and/or data before 0830 generating a wakeup event, range in 0x1 ~ 0xFF. */ 0831 flexcan_pn_match_mode_t idMatchMode; /*!< The ID match type. */ 0832 flexcan_pn_match_mode_t dataMatchMode; /*!< The data match type. */ 0833 uint32_t idLower; /*!< The ID target values 1 which used either for ID match "equal to", "smaller than", 0834 "greater than" comparisons, or as the lower limit value in ID match "range detection". */ 0835 uint32_t idUpper; /*!< The ID target values 2 which used only as the upper limit value in ID match "range 0836 detection" or used to store the ID mask in "equal to". */ 0837 uint8_t lengthLower; /*!< The lower limit for length of data bytes which used only in data match "range 0838 detection". Range in 0x0 ~ 0x8.*/ 0839 uint8_t lengthUpper; /*!< The upper limit for length of data bytes which used only in data match "range 0840 detection". Range in 0x0 ~ 0x8.*/ 0841 union 0842 { 0843 /*!< The data target values 1 which used either for data match "equal to", "smaller than", 0844 "greater than" comparisons, or as the lower limit value in data match "range 0845 detection". */ 0846 struct 0847 { 0848 uint32_t lowerWord0; /*!< CAN Frame payload word0. */ 0849 uint32_t lowerWord1; /*!< CAN Frame payload word1. */ 0850 }; 0851 struct 0852 { 0853 uint8_t lowerByte3; /*!< CAN Frame payload byte3. */ 0854 uint8_t lowerByte2; /*!< CAN Frame payload byte2. */ 0855 uint8_t lowerByte1; /*!< CAN Frame payload byte1. */ 0856 uint8_t lowerByte0; /*!< CAN Frame payload byte0. */ 0857 uint8_t lowerByte7; /*!< CAN Frame payload byte7. */ 0858 uint8_t lowerByte6; /*!< CAN Frame payload byte6. */ 0859 uint8_t lowerByte5; /*!< CAN Frame payload byte5. */ 0860 uint8_t lowerByte4; /*!< CAN Frame payload byte4. */ 0861 }; 0862 }; 0863 union 0864 { 0865 /*!< The data target values 2 which used only as the upper limit value in data match "range 0866 detection" or used to store the data mask in "equal to". */ 0867 struct 0868 { 0869 uint32_t upperWord0; /*!< CAN Frame payload word0. */ 0870 uint32_t upperWord1; /*!< CAN Frame payload word1. */ 0871 }; 0872 struct 0873 { 0874 uint8_t upperByte3; /*!< CAN Frame payload byte3. */ 0875 uint8_t upperByte2; /*!< CAN Frame payload byte2. */ 0876 uint8_t upperByte1; /*!< CAN Frame payload byte1. */ 0877 uint8_t upperByte0; /*!< CAN Frame payload byte0. */ 0878 uint8_t upperByte7; /*!< CAN Frame payload byte7. */ 0879 uint8_t upperByte6; /*!< CAN Frame payload byte6. */ 0880 uint8_t upperByte5; /*!< CAN Frame payload byte5. */ 0881 uint8_t upperByte4; /*!< CAN Frame payload byte4. */ 0882 }; 0883 }; 0884 } flexcan_pn_config_t; 0885 #endif 0886 0887 /*! @brief FlexCAN Legacy Rx FIFO configuration structure. */ 0888 typedef struct _flexcan_rx_fifo_config 0889 { 0890 uint32_t *idFilterTable; /*!< Pointer to the FlexCAN Legacy Rx FIFO identifier filter table. */ 0891 uint8_t idFilterNum; /*!< The FlexCAN Legacy Rx FIFO Filter elements quantity. */ 0892 flexcan_rx_fifo_filter_type_t idFilterType; /*!< The FlexCAN Legacy Rx FIFO Filter type. */ 0893 flexcan_rx_fifo_priority_t priority; /*!< The FlexCAN Legacy Rx FIFO receive priority. */ 0894 } flexcan_rx_fifo_config_t; 0895 0896 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 0897 /*! @brief FlexCAN Enhanced Rx FIFO Standard ID filter element structure. */ 0898 typedef struct _flexcan_enhanced_rx_fifo_std_id_filter 0899 { 0900 uint32_t filterType : 2; /*!< FlexCAN internal Free-Running Counter Time Stamp. */ 0901 uint32_t : 2; 0902 uint32_t rtr1 : 1; /*!< CAN FD frame data length code (DLC), range see @ref _flexcan_fd_frame_length, When the 0903 length <= 8, it equal to the data length, otherwise the number of valid frame data is 0904 not equal to the length value. user can 0905 use DLC_LENGTH_DECODE(length) macro to get the number of valid data bytes. */ 0906 uint32_t std1 : 11; /*!< CAN Frame Type(DATA or REMOTE). */ 0907 uint32_t : 4; 0908 uint32_t rtr2 : 1; /*!< CAN Frame Identifier(STD or EXT format). */ 0909 uint32_t std2 : 11; /*!< Substitute Remote request. */ 0910 } flexcan_enhanced_rx_fifo_std_id_filter_t; 0911 0912 /*! @brief FlexCAN Enhanced Rx FIFO Extended ID filter element structure. */ 0913 typedef struct _flexcan_enhanced_rx_fifo_ext_id_filter 0914 { 0915 uint32_t filterType : 2; /*!< FlexCAN internal Free-Running Counter Time Stamp. */ 0916 uint32_t rtr1 : 1; /*!< CAN FD frame data length code (DLC), range see @ref _flexcan_fd_frame_length, When the 0917 length <= 8, it equal to the data length, otherwise the number of valid frame data is 0918 not equal to the length value. user can 0919 use DLC_LENGTH_DECODE(length) macro to get the number of valid data bytes. */ 0920 uint32_t std1 : 29; /*!< CAN Frame Type(DATA or REMOTE). */ 0921 uint32_t : 2; 0922 uint32_t rtr2 : 1; /*!< CAN Frame Identifier(STD or EXT format). */ 0923 uint32_t std2 : 29; /*!< Substitute Remote request. */ 0924 } flexcan_enhanced_rx_fifo_ext_id_filter_t; 0925 /*! @brief FlexCAN Enhanced Rx FIFO configuration structure. */ 0926 typedef struct _flexcan_enhanced_rx_fifo_config 0927 { 0928 uint32_t *idFilterTable; /*!< Pointer to the FlexCAN Enhanced Rx FIFO identifier filter table, each table member 0929 occupies 32 bit word, table size should be equal to idFilterNum. There are two types of 0930 Enhanced Rx FIFO filter elements that can be stored in table : extended-ID filter element 0931 (1 word, occupie 1 table members) and standard-ID filter element (2 words, occupies 2 table 0932 members), the extended-ID filter element needs to be placed in front of the table. */ 0933 uint8_t idFilterPairNum; /*!< idFilterPairNum is the Enhanced Rx FIFO identifier filter element pair numbers, 0934 each pair of filter elements occupies 2 words and can consist of one extended ID filter 0935 element or two standard ID filter elements. */ 0936 uint8_t extendIdFilterNum; /*!< The number of extended ID filter element items in the FlexCAN enhanced Rx FIFO 0937 identifier filter table, each extended-ID filter element occupies 2 words, 0938 extendIdFilterNum need less than or equal to idFilterPairNum. */ 0939 uint8_t fifoWatermark; /*!< (fifoWatermark + 1) is the minimum number of CAN messages stored in the Enhanced RX FIFO 0940 which can trigger FIFO watermark interrupt or a DMA request. */ 0941 flexcan_efifo_dma_per_read_length_t dmaPerReadLength; /*!< Define the length of each read of the Enhanced RX FIFO 0942 element by the DAM, see @ref _flexcan_fd_frame_length. */ 0943 flexcan_rx_fifo_priority_t priority; /*!< The FlexCAN Enhanced Rx FIFO receive priority. */ 0944 } flexcan_enhanced_rx_fifo_config_t; 0945 #endif 0946 0947 /*! @brief FlexCAN Message Buffer transfer. */ 0948 typedef struct _flexcan_mb_transfer 0949 { 0950 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 0951 flexcan_fd_frame_t *framefd; 0952 #endif 0953 flexcan_frame_t *frame; /*!< The buffer of CAN Message to be transfer. */ 0954 uint8_t mbIdx; /*!< The index of Message buffer used to transfer Message. */ 0955 } flexcan_mb_transfer_t; 0956 0957 /*! @brief FlexCAN Rx FIFO transfer. */ 0958 typedef struct _flexcan_fifo_transfer 0959 { 0960 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 0961 flexcan_fd_frame_t *framefd; /*!< The buffer of CAN Message to be received from Enhanced Rx FIFO. */ 0962 #endif 0963 flexcan_frame_t *frame; /*!< The buffer of CAN Message to be received from Legacy Rx FIFO. */ 0964 size_t frameNum; /*!< Number of CAN Message need to be received from Legacy or Ehanced Rx FIFO. */ 0965 } flexcan_fifo_transfer_t; 0966 0967 /*! @brief FlexCAN handle structure definition. */ 0968 typedef struct _flexcan_handle flexcan_handle_t; 0969 0970 /*! @brief FlexCAN transfer callback function. 0971 * 0972 * The FlexCAN transfer callback returns a value from the underlying layer. 0973 * If the status equals to kStatus_FLEXCAN_ErrorStatus, the result parameter is the Content of 0974 * FlexCAN status register which can be used to get the working status(or error status) of FlexCAN module. 0975 * If the status equals to other FlexCAN Message Buffer transfer status, the result is the index of 0976 * Message Buffer that generate transfer event. 0977 * If the status equals to other FlexCAN Message Buffer transfer status, the result is meaningless and should be 0978 * Ignored. 0979 */ 0980 #if (defined(FSL_FEATURE_FLEXCAN_HAS_PN_MODE) && FSL_FEATURE_FLEXCAN_HAS_PN_MODE) || \ 0981 (defined(FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) && FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) 0982 #define FLEXCAN_CALLBACK(x) \ 0983 void(x)(CAN_Type * base, flexcan_handle_t * handle, status_t status, uint64_t result, void *userData) 0984 typedef void (*flexcan_transfer_callback_t)( 0985 CAN_Type *base, flexcan_handle_t *handle, status_t status, uint64_t result, void *userData); 0986 #else 0987 #define FLEXCAN_CALLBACK(x) \ 0988 void(x)(CAN_Type * base, flexcan_handle_t * handle, status_t status, uint32_t result, void *userData) 0989 typedef void (*flexcan_transfer_callback_t)( 0990 CAN_Type *base, flexcan_handle_t *handle, status_t status, uint32_t result, void *userData); 0991 #endif 0992 0993 /*! @brief FlexCAN handle structure. */ 0994 struct _flexcan_handle 0995 { 0996 flexcan_transfer_callback_t callback; /*!< Callback function. */ 0997 void *userData; /*!< FlexCAN callback function parameter.*/ 0998 flexcan_frame_t 0999 *volatile mbFrameBuf[CAN_WORD1_COUNT]; /*!< The buffer for received CAN data from Message Buffers. */ 1000 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 1001 flexcan_fd_frame_t 1002 *volatile mbFDFrameBuf[CAN_WORD1_COUNT]; /*!< The buffer for received CAN FD data from Message Buffers. */ 1003 #endif 1004 flexcan_frame_t *volatile rxFifoFrameBuf; /*!< The buffer for received CAN data from Legacy Rx FIFO. */ 1005 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 1006 flexcan_fd_frame_t *volatile rxFifoFDFrameBuf; /*!< The buffer for received CAN FD data from Ehanced Rx FIFO. */ 1007 #endif 1008 size_t rxFifoFrameNum; /*!< The number of CAN messages remaining to be received from Legacy or Ehanced Rx FIFO. */ 1009 size_t rxFifoTransferTotalNum; /*!< Total CAN Message number need to be received from Legacy or Ehanced Rx FIFO. */ 1010 volatile uint8_t mbState[CAN_WORD1_COUNT]; /*!< Message Buffer transfer state. */ 1011 volatile uint8_t rxFifoState; /*!< Rx FIFO transfer state. */ 1012 volatile uint32_t timestamp[CAN_WORD1_COUNT]; /*!< Mailbox transfer timestamp. */ 1013 }; 1014 1015 /****************************************************************************** 1016 * API 1017 *****************************************************************************/ 1018 1019 #if defined(__cplusplus) 1020 extern "C" { 1021 #endif 1022 1023 /*! 1024 * @name Initialization and deinitialization 1025 * @{ 1026 */ 1027 1028 /*! 1029 * @brief Enter FlexCAN Freeze Mode. 1030 * 1031 * This function makes the FlexCAN work under Freeze Mode. 1032 * 1033 * @param base FlexCAN peripheral base address. 1034 */ 1035 void FLEXCAN_EnterFreezeMode(CAN_Type *base); 1036 1037 /*! 1038 * @brief Exit FlexCAN Freeze Mode. 1039 * 1040 * This function makes the FlexCAN leave Freeze Mode. 1041 * 1042 * @param base FlexCAN peripheral base address. 1043 */ 1044 void FLEXCAN_ExitFreezeMode(CAN_Type *base); 1045 1046 /*! 1047 * @brief Get the FlexCAN instance from peripheral base address. 1048 * 1049 * @param base FlexCAN peripheral base address. 1050 * @return FlexCAN instance. 1051 */ 1052 uint32_t FLEXCAN_GetInstance(CAN_Type *base); 1053 1054 /*! 1055 * @brief Calculates the improved timing values by specific bit Rates for classical CAN. 1056 * 1057 * This function use to calculates the Classical CAN timing values according to the given bit rate. The Calculated 1058 * timing values will be set in CTRL1/CBT/ENCBT register. The calculation is based on the recommendation of the CiA 301 1059 * v4.2.0 and previous version document. 1060 * 1061 * @param base FlexCAN peripheral base address. 1062 * @param bitRate The classical CAN speed in bps defined by user, should be less than or equal to 1Mbps. 1063 * @param sourceClock_Hz The Source clock frequency in Hz. 1064 * @param pTimingConfig Pointer to the FlexCAN timing configuration structure. 1065 * 1066 * @return TRUE if timing configuration found, FALSE if failed to find configuration. 1067 */ 1068 bool FLEXCAN_CalculateImprovedTimingValues(CAN_Type *base, 1069 uint32_t bitRate, 1070 uint32_t sourceClock_Hz, 1071 flexcan_timing_config_t *pTimingConfig); 1072 1073 /*! 1074 * @brief Initializes a FlexCAN instance. 1075 * 1076 * This function initializes the FlexCAN module with user-defined settings. 1077 * This example shows how to set up the flexcan_config_t parameters and how 1078 * to call the FLEXCAN_Init function by passing in these parameters. 1079 * @code 1080 * flexcan_config_t flexcanConfig; 1081 * flexcanConfig.clkSrc = kFLEXCAN_ClkSrc0; 1082 * flexcanConfig.bitRate = 1000000U; 1083 * flexcanConfig.maxMbNum = 16; 1084 * flexcanConfig.enableLoopBack = false; 1085 * flexcanConfig.enableSelfWakeup = false; 1086 * flexcanConfig.enableIndividMask = false; 1087 * flexcanConfig.enableDoze = false; 1088 * flexcanConfig.disableSelfReception = false; 1089 * flexcanConfig.enableListenOnlyMode = false; 1090 * flexcanConfig.timingConfig = timingConfig; 1091 * FLEXCAN_Init(CAN0, &flexcanConfig, 40000000UL); 1092 * @endcode 1093 * 1094 * @param base FlexCAN peripheral base address. 1095 * @param pConfig Pointer to the user-defined configuration structure. 1096 * @param sourceClock_Hz FlexCAN Protocol Engine clock source frequency in Hz. 1097 */ 1098 void FLEXCAN_Init(CAN_Type *base, const flexcan_config_t *pConfig, uint32_t sourceClock_Hz); 1099 1100 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 1101 /*! 1102 * @brief Calculates the improved timing values by specific bit rates for CANFD. 1103 * 1104 * This function use to calculates the CANFD timing values according to the given nominal phase bit rate and data phase 1105 * bit rate. The Calculated timing values will be set in CBT/ENCBT and FDCBT/EDCBT registers. The calculation is based 1106 * on the recommendation of the CiA 1301 v1.0.0 document. 1107 * 1108 * @param base FlexCAN peripheral base address. 1109 * @param bitRate The CANFD bus control speed in bps defined by user. 1110 * @param bitRateFD The CAN FD data phase speed in bps defined by user. Equal to bitRate means disable bit rate 1111 * switching. 1112 * @param sourceClock_Hz The Source clock frequency in Hz. 1113 * @param pTimingConfig Pointer to the FlexCAN timing configuration structure. 1114 * 1115 * @return TRUE if timing configuration found, FALSE if failed to find configuration 1116 */ 1117 bool FLEXCAN_FDCalculateImprovedTimingValues(CAN_Type *base, 1118 uint32_t bitRate, 1119 uint32_t bitRateFD, 1120 uint32_t sourceClock_Hz, 1121 flexcan_timing_config_t *pTimingConfig); 1122 /*! 1123 * @brief Initializes a FlexCAN instance. 1124 * 1125 * This function initializes the FlexCAN module with user-defined settings. 1126 * This example shows how to set up the flexcan_config_t parameters and how 1127 * to call the FLEXCAN_FDInit function by passing in these parameters. 1128 * @code 1129 * flexcan_config_t flexcanConfig; 1130 * flexcanConfig.clkSrc = kFLEXCAN_ClkSrc0; 1131 * flexcanConfig.bitRate = 1000000U; 1132 * flexcanConfig.bitRateFD = 2000000U; 1133 * flexcanConfig.maxMbNum = 16; 1134 * flexcanConfig.enableLoopBack = false; 1135 * flexcanConfig.enableSelfWakeup = false; 1136 * flexcanConfig.enableIndividMask = false; 1137 * flexcanConfig.disableSelfReception = false; 1138 * flexcanConfig.enableListenOnlyMode = false; 1139 * flexcanConfig.enableDoze = false; 1140 * flexcanConfig.timingConfig = timingConfig; 1141 * FLEXCAN_FDInit(CAN0, &flexcanConfig, 80000000UL, kFLEXCAN_16BperMB, true); 1142 * @endcode 1143 * 1144 * @param base FlexCAN peripheral base address. 1145 * @param pConfig Pointer to the user-defined configuration structure. 1146 * @param sourceClock_Hz FlexCAN Protocol Engine clock source frequency in Hz. 1147 * @param dataSize FlexCAN Message Buffer payload size. The actual transmitted or received CAN FD frame data size needs 1148 * to be less than or equal to this value. 1149 * @param brs True if bit rate switch is enabled in FD mode. 1150 */ 1151 void FLEXCAN_FDInit( 1152 CAN_Type *base, const flexcan_config_t *pConfig, uint32_t sourceClock_Hz, flexcan_mb_size_t dataSize, bool brs); 1153 #endif 1154 1155 /*! 1156 * @brief De-initializes a FlexCAN instance. 1157 * 1158 * This function disables the FlexCAN module clock and sets all register values 1159 * to the reset value. 1160 * 1161 * @param base FlexCAN peripheral base address. 1162 */ 1163 void FLEXCAN_Deinit(CAN_Type *base); 1164 1165 /*! 1166 * @brief Gets the default configuration structure. 1167 * 1168 * This function initializes the FlexCAN configuration structure to default values. The default 1169 * values are as follows. 1170 * flexcanConfig->clkSrc = kFLEXCAN_ClkSrc0; 1171 * flexcanConfig->bitRate = 1000000U; 1172 * flexcanConfig->bitRateFD = 2000000U; 1173 * flexcanConfig->maxMbNum = 16; 1174 * flexcanConfig->enableLoopBack = false; 1175 * flexcanConfig->enableSelfWakeup = false; 1176 * flexcanConfig->enableIndividMask = false; 1177 * flexcanConfig->disableSelfReception = false; 1178 * flexcanConfig->enableListenOnlyMode = false; 1179 * flexcanConfig->enableDoze = false; 1180 * flexcanConfig->enableMemoryErrorControl = true; 1181 * flexcanConfig->enableNonCorrectableErrorEnterFreeze = true; 1182 * flexcanConfig.timingConfig = timingConfig; 1183 * 1184 * @param pConfig Pointer to the FlexCAN configuration structure. 1185 */ 1186 void FLEXCAN_GetDefaultConfig(flexcan_config_t *pConfig); 1187 1188 /* @} */ 1189 1190 /*! 1191 * @name Configuration. 1192 * @{ 1193 */ 1194 1195 /*! 1196 * @brief Sets the FlexCAN classical CAN protocol timing characteristic. 1197 * 1198 * This function gives user settings to classical CAN or CAN FD nominal phase timing characteristic. 1199 * The function is for an experienced user. For less experienced users, call the FLEXCAN_SetBitRate() instead. 1200 * 1201 * @note Calling FLEXCAN_SetTimingConfig() overrides the bit rate set in FLEXCAN_Init() or FLEXCAN_SetBitRate(). 1202 * 1203 * @param base FlexCAN peripheral base address. 1204 * @param pConfig Pointer to the timing configuration structure. 1205 */ 1206 void FLEXCAN_SetTimingConfig(CAN_Type *base, const flexcan_timing_config_t *pConfig); 1207 1208 /*! 1209 * @brief Set bit rate of FlexCAN classical CAN frame or CAN FD frame nominal phase. 1210 * 1211 * This function set the bit rate of classical CAN frame or CAN FD frame nominal phase base on 1212 * FLEXCAN_CalculateImprovedTimingValues() API calculated timing values. 1213 * 1214 * @note Calling FLEXCAN_SetBitRate() overrides the bit rate set in FLEXCAN_Init(). 1215 * 1216 * @param base FlexCAN peripheral base address. 1217 * @param sourceClock_Hz Source Clock in Hz. 1218 * @param bitRate_Bps Bit rate in Bps. 1219 * @return kStatus_Success - Set CAN baud rate (only Nominal phase) successfully. 1220 */ 1221 status_t FLEXCAN_SetBitRate(CAN_Type *base, uint32_t sourceClock_Hz, uint32_t bitRate_Bps); 1222 1223 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 1224 /*! 1225 * @brief Sets the FlexCAN CANFD data phase timing characteristic. 1226 * 1227 * This function gives user settings to CANFD data phase timing characteristic. 1228 * The function is for an experienced user. For less experienced users, call the FLEXCAN_SetFDBitRate() 1229 * to set both Nominal/Data bit Rate instead. 1230 * 1231 * @note Calling FLEXCAN_SetFDTimingConfig() overrides the data phase bit rate set in 1232 * FLEXCAN_FDInit()/FLEXCAN_SetFDBitRate(). 1233 * 1234 * @param base FlexCAN peripheral base address. 1235 * @param pConfig Pointer to the timing configuration structure. 1236 */ 1237 void FLEXCAN_SetFDTimingConfig(CAN_Type *base, const flexcan_timing_config_t *pConfig); 1238 1239 /*! 1240 * @brief Set bit rate of FlexCAN FD frame. 1241 * 1242 * This function set the baud rate of FLEXCAN FD base on FLEXCAN_FDCalculateImprovedTimingValues() API calculated timing 1243 * values. 1244 * 1245 * @param base FlexCAN peripheral base address. 1246 * @param sourceClock_Hz Source Clock in Hz. 1247 * @param bitRateN_Bps Nominal bit Rate in Bps. 1248 * @param bitRateD_Bps Data bit Rate in Bps. 1249 * @return kStatus_Success - Set CAN FD bit rate (include Nominal and Data phase) successfully. 1250 */ 1251 status_t FLEXCAN_SetFDBitRate(CAN_Type *base, uint32_t sourceClock_Hz, uint32_t bitRateN_Bps, uint32_t bitRateD_Bps); 1252 #endif 1253 1254 /*! 1255 * @brief Sets the FlexCAN receive message buffer global mask. 1256 * 1257 * This function sets the global mask for the FlexCAN message buffer in a matching process. 1258 * The configuration is only effective when the Rx individual mask is disabled in the FLEXCAN_Init(). 1259 * 1260 * @param base FlexCAN peripheral base address. 1261 * @param mask Rx Message Buffer Global Mask value. 1262 */ 1263 void FLEXCAN_SetRxMbGlobalMask(CAN_Type *base, uint32_t mask); 1264 1265 /*! 1266 * @brief Sets the FlexCAN receive FIFO global mask. 1267 * 1268 * This function sets the global mask for FlexCAN FIFO in a matching process. 1269 * 1270 * @param base FlexCAN peripheral base address. 1271 * @param mask Rx Fifo Global Mask value. 1272 */ 1273 void FLEXCAN_SetRxFifoGlobalMask(CAN_Type *base, uint32_t mask); 1274 1275 /*! 1276 * @brief Sets the FlexCAN receive individual mask. 1277 * 1278 * This function sets the individual mask for the FlexCAN matching process. 1279 * The configuration is only effective when the Rx individual mask is enabled in the FLEXCAN_Init(). 1280 * If the Rx FIFO is disabled, the individual mask is applied to the corresponding Message Buffer. 1281 * If the Rx FIFO is enabled, the individual mask for Rx FIFO occupied Message Buffer is applied to 1282 * the Rx Filter with the same index. Note that only the first 32 1283 * individual masks can be used as the Rx FIFO filter mask. 1284 * 1285 * @param base FlexCAN peripheral base address. 1286 * @param maskIdx The Index of individual Mask. 1287 * @param mask Rx Individual Mask value. 1288 */ 1289 void FLEXCAN_SetRxIndividualMask(CAN_Type *base, uint8_t maskIdx, uint32_t mask); 1290 1291 /*! 1292 * @brief Configures a FlexCAN transmit message buffer. 1293 * 1294 * This function aborts the previous transmission, cleans the Message Buffer, and 1295 * configures it as a Transmit Message Buffer. 1296 * 1297 * @param base FlexCAN peripheral base address. 1298 * @param mbIdx The Message Buffer index. 1299 * @param enable Enable/disable Tx Message Buffer. 1300 * - true: Enable Tx Message Buffer. 1301 * - false: Disable Tx Message Buffer. 1302 */ 1303 void FLEXCAN_SetTxMbConfig(CAN_Type *base, uint8_t mbIdx, bool enable); 1304 1305 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 1306 /*! 1307 * @brief Configures a FlexCAN transmit message buffer. 1308 * 1309 * This function aborts the previous transmission, cleans the Message Buffer, and 1310 * configures it as a Transmit Message Buffer. 1311 * 1312 * @param base FlexCAN peripheral base address. 1313 * @param mbIdx The Message Buffer index. 1314 * @param enable Enable/disable Tx Message Buffer. 1315 * - true: Enable Tx Message Buffer. 1316 * - false: Disable Tx Message Buffer. 1317 */ 1318 void FLEXCAN_SetFDTxMbConfig(CAN_Type *base, uint8_t mbIdx, bool enable); 1319 #endif 1320 1321 /*! 1322 * @brief Configures a FlexCAN Receive Message Buffer. 1323 * 1324 * This function cleans a FlexCAN build-in Message Buffer and configures it 1325 * as a Receive Message Buffer. 1326 * 1327 * @param base FlexCAN peripheral base address. 1328 * @param mbIdx The Message Buffer index. 1329 * @param pRxMbConfig Pointer to the FlexCAN Message Buffer configuration structure. 1330 * @param enable Enable/disable Rx Message Buffer. 1331 * - true: Enable Rx Message Buffer. 1332 * - false: Disable Rx Message Buffer. 1333 */ 1334 void FLEXCAN_SetRxMbConfig(CAN_Type *base, uint8_t mbIdx, const flexcan_rx_mb_config_t *pRxMbConfig, bool enable); 1335 1336 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 1337 /*! 1338 * @brief Configures a FlexCAN Receive Message Buffer. 1339 * 1340 * This function cleans a FlexCAN build-in Message Buffer and configures it 1341 * as a Receive Message Buffer. 1342 * 1343 * @param base FlexCAN peripheral base address. 1344 * @param mbIdx The Message Buffer index. 1345 * @param pRxMbConfig Pointer to the FlexCAN Message Buffer configuration structure. 1346 * @param enable Enable/disable Rx Message Buffer. 1347 * - true: Enable Rx Message Buffer. 1348 * - false: Disable Rx Message Buffer. 1349 */ 1350 void FLEXCAN_SetFDRxMbConfig(CAN_Type *base, uint8_t mbIdx, const flexcan_rx_mb_config_t *pRxMbConfig, bool enable); 1351 #endif 1352 1353 /*! 1354 * @brief Configures the FlexCAN Legacy Rx FIFO. 1355 * 1356 * This function configures the FlexCAN Rx FIFO with given configuration. 1357 * @note Legacy Rx FIFO only can receive classic CAN message. 1358 * 1359 * @param base FlexCAN peripheral base address. 1360 * @param pRxFifoConfig Pointer to the FlexCAN Legacy Rx FIFO configuration structure. Can be NULL when enable parameter 1361 * is false. 1362 * @param enable Enable/disable Legacy Rx FIFO. 1363 * - true: Enable Legacy Rx FIFO. 1364 * - false: Disable Legacy Rx FIFO. 1365 */ 1366 void FLEXCAN_SetRxFifoConfig(CAN_Type *base, const flexcan_rx_fifo_config_t *pRxFifoConfig, bool enable); 1367 1368 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 1369 /*! 1370 * @brief Configures the FlexCAN Enhanced Rx FIFO. 1371 * 1372 * This function configures the Enhanced Rx FIFO with given configuration. 1373 * @note Enhanced Rx FIFO support receive classic CAN or CAN FD messages, Legacy Rx FIFO and Enhanced Rx FIFO 1374 * cannot be enabled at the same time. 1375 * 1376 * @param base FlexCAN peripheral base address. 1377 * @param pConfig Pointer to the FlexCAN Enhanced Rx FIFO configuration structure. Can be NULL when enable parameter 1378 * is false. 1379 * @param enable Enable/disable Enhanced Rx FIFO. 1380 * - true: Enable Enhanced Rx FIFO. 1381 * - false: Disable Enhanced Rx FIFO. 1382 */ 1383 void FLEXCAN_SetEnhancedRxFifoConfig(CAN_Type *base, const flexcan_enhanced_rx_fifo_config_t *pConfig, bool enable); 1384 #endif 1385 1386 #if (defined(FSL_FEATURE_FLEXCAN_HAS_PN_MODE) && FSL_FEATURE_FLEXCAN_HAS_PN_MODE) 1387 /*! 1388 * @brief Configures the FlexCAN Pretended Networking mode. 1389 * 1390 * This function configures the FlexCAN Pretended Networking mode with given configuration. 1391 * 1392 * @param base FlexCAN peripheral base address. 1393 * @param pConfig Pointer to the FlexCAN Rx FIFO configuration structure. 1394 */ 1395 void FLEXCAN_SetPNConfig(CAN_Type *base, const flexcan_pn_config_t *pConfig); 1396 #endif 1397 /* @} */ 1398 1399 /*! 1400 * @name Status 1401 * @{ 1402 */ 1403 1404 /*! 1405 * @brief Gets the FlexCAN module interrupt flags. 1406 * 1407 * This function gets all FlexCAN status flags. The flags are returned as the logical 1408 * OR value of the enumerators @ref _flexcan_flags. To check the specific status, 1409 * compare the return value with enumerators in @ref _flexcan_flags. 1410 * 1411 * @param base FlexCAN peripheral base address. 1412 * @return FlexCAN status flags which are ORed by the enumerators in the _flexcan_flags. 1413 */ 1414 #if (defined(FSL_FEATURE_FLEXCAN_HAS_PN_MODE) && FSL_FEATURE_FLEXCAN_HAS_PN_MODE) || \ 1415 (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) || \ 1416 (defined(FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) && FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) 1417 static inline uint64_t FLEXCAN_GetStatusFlags(CAN_Type *base) 1418 { 1419 uint64_t tempflag = (uint64_t)base->ESR1; 1420 #if (defined(FSL_FEATURE_FLEXCAN_HAS_PN_MODE) && FSL_FEATURE_FLEXCAN_HAS_PN_MODE) 1421 /* Get PN Wake Up status. */ 1422 tempflag |= FLEXCAN_PN_STATUS_MASK(base->WU_MTC); 1423 #endif 1424 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 1425 /* Get Enhanced Rx FIFO status. */ 1426 tempflag |= FLEXCAN_EFIFO_STATUS_MASK(base->ERFSR); 1427 #endif 1428 #if (defined(FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) && FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) 1429 /* Get Memory Error status. */ 1430 tempflag |= FLEXCAN_MECR_STATUS_MASK(base->ERRSR); 1431 #endif 1432 return tempflag; 1433 } 1434 #else 1435 static inline uint32_t FLEXCAN_GetStatusFlags(CAN_Type *base) 1436 { 1437 return base->ESR1; 1438 } 1439 #endif 1440 /*! 1441 * @brief Clears status flags with the provided mask. 1442 * 1443 * This function clears the FlexCAN status flags with a provided mask. An automatically cleared flag 1444 * can't be cleared by this function. 1445 * 1446 * @param base FlexCAN peripheral base address. 1447 * @param mask The status flags to be cleared, it is logical OR value of @ref _flexcan_flags. 1448 */ 1449 #if (defined(FSL_FEATURE_FLEXCAN_HAS_PN_MODE) && FSL_FEATURE_FLEXCAN_HAS_PN_MODE) || \ 1450 (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) || \ 1451 (defined(FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) && FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) 1452 static inline void FLEXCAN_ClearStatusFlags(CAN_Type *base, uint64_t mask) 1453 { 1454 #if (defined(FSL_FEATURE_FLEXCAN_HAS_PN_MODE) && FSL_FEATURE_FLEXCAN_HAS_PN_MODE) 1455 /* Clear PN Wake Up status. */ 1456 base->WU_MTC = FLEXCAN_PN_STATUS_UNMASK(mask); 1457 #endif 1458 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 1459 /* Clear Enhanced Rx FIFO status. */ 1460 base->ERFSR = FLEXCAN_EFIFO_STATUS_UNMASK(mask); 1461 #endif 1462 #if (defined(FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) && FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) 1463 /* Clear Memory Error status. */ 1464 base->ERRSR = FLEXCAN_MECR_STATUS_UNMASK(mask); 1465 #endif 1466 base->ESR1 = (uint32_t)(mask & 0xFFFFFFFFU); 1467 } 1468 #else 1469 static inline void FLEXCAN_ClearStatusFlags(CAN_Type *base, uint32_t mask) 1470 { 1471 /* Write 1 to clear status flag. */ 1472 base->ESR1 = mask; 1473 } 1474 #endif 1475 /*! 1476 * @brief Gets the FlexCAN Bus Error Counter value. 1477 * 1478 * This function gets the FlexCAN Bus Error Counter value for both Tx and 1479 * Rx direction. These values may be needed in the upper layer error handling. 1480 * 1481 * @param base FlexCAN peripheral base address. 1482 * @param txErrBuf Buffer to store Tx Error Counter value. 1483 * @param rxErrBuf Buffer to store Rx Error Counter value. 1484 */ 1485 static inline void FLEXCAN_GetBusErrCount(CAN_Type *base, uint8_t *txErrBuf, uint8_t *rxErrBuf) 1486 { 1487 if (NULL != txErrBuf) 1488 { 1489 *txErrBuf = (uint8_t)((base->ECR & CAN_ECR_TXERRCNT_MASK) >> CAN_ECR_TXERRCNT_SHIFT); 1490 } 1491 1492 if (NULL != rxErrBuf) 1493 { 1494 *rxErrBuf = (uint8_t)((base->ECR & CAN_ECR_RXERRCNT_MASK) >> CAN_ECR_RXERRCNT_SHIFT); 1495 } 1496 } 1497 1498 /*! 1499 * @brief Gets the FlexCAN Message Buffer interrupt flags. 1500 * 1501 * This function gets the interrupt flags of a given Message Buffers. 1502 * 1503 * @param base FlexCAN peripheral base address. 1504 * @param mask The ORed FlexCAN Message Buffer mask. 1505 * @return The status of given Message Buffers. 1506 */ 1507 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0) 1508 static inline uint64_t FLEXCAN_GetMbStatusFlags(CAN_Type *base, uint64_t mask) 1509 #else 1510 static inline uint32_t FLEXCAN_GetMbStatusFlags(CAN_Type *base, uint32_t mask) 1511 #endif 1512 { 1513 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0) 1514 uint64_t tempflag = (uint64_t)base->IFLAG1; 1515 return (tempflag | (((uint64_t)base->IFLAG2) << 32)) & mask; 1516 #else 1517 return (base->IFLAG1 & mask); 1518 #endif 1519 } 1520 1521 /*! 1522 * @brief Clears the FlexCAN Message Buffer interrupt flags. 1523 * 1524 * This function clears the interrupt flags of a given Message Buffers. 1525 * 1526 * @param base FlexCAN peripheral base address. 1527 * @param mask The ORed FlexCAN Message Buffer mask. 1528 */ 1529 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0) 1530 static inline void FLEXCAN_ClearMbStatusFlags(CAN_Type *base, uint64_t mask) 1531 #else 1532 static inline void FLEXCAN_ClearMbStatusFlags(CAN_Type *base, uint32_t mask) 1533 #endif 1534 { 1535 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0) 1536 base->IFLAG1 = (uint32_t)(mask & 0xFFFFFFFFU); 1537 base->IFLAG2 = (uint32_t)(mask >> 32); 1538 #else 1539 base->IFLAG1 = mask; 1540 #endif 1541 } 1542 1543 #if (defined(FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) && FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) 1544 /*! 1545 * @brief Gets the FlexCAN Memory Error Report registers status. 1546 * 1547 * This function gets the FlexCAN Memory Error Report registers status. 1548 * 1549 * @param base FlexCAN peripheral base address. 1550 * @param errorStatus Pointer to FlexCAN Memory Error Report registers status structure. 1551 */ 1552 void FLEXCAN_GetMemoryErrorReportStatus(CAN_Type *base, flexcan_memory_error_report_status_t *errorStatus); 1553 #endif 1554 1555 #if (defined(FSL_FEATURE_FLEXCAN_HAS_PN_MODE) && FSL_FEATURE_FLEXCAN_HAS_PN_MODE) 1556 /*! 1557 * @brief Gets the FlexCAN Number of Matches when in Pretended Networking. 1558 * 1559 * This function gets the number of times a given message has matched the predefined filtering criteria for ID and/or PL 1560 * before a wakeup event. 1561 * 1562 * @param base FlexCAN peripheral base address. 1563 * @return The number of received wake up msessages. 1564 */ 1565 static inline uint8_t FLEXCAN_GetPNMatchCount(CAN_Type *base) 1566 { 1567 return (uint8_t)((base->WU_MTC & CAN_WU_MTC_MCOUNTER_MASK) >> CAN_WU_MTC_MCOUNTER_SHIFT); 1568 } 1569 #endif 1570 1571 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 1572 /*! 1573 * @brief Gets the number of FlexCAN Enhanced Rx FIFO available frames. 1574 * 1575 * This function gets the number of CAN messages stored in the Enhanced Rx FIFO. 1576 * 1577 * @param base FlexCAN peripheral base address. 1578 * @return The number of available CAN messages stored in the Enhanced Rx FIFO. 1579 */ 1580 static inline uint32_t FLEXCAN_GetEnhancedFifoDataCount(CAN_Type *base) 1581 { 1582 return (base->ERFSR & CAN_ERFSR_ERFEL_MASK); 1583 } 1584 #endif 1585 /* @} */ 1586 1587 /*! 1588 * @name Interrupts 1589 * @{ 1590 */ 1591 1592 /*! 1593 * @brief Enables FlexCAN interrupts according to the provided mask. 1594 * 1595 * This function enables the FlexCAN interrupts according to the provided mask. The mask 1596 * is a logical OR of enumeration members, see @ref _flexcan_interrupt_enable. 1597 * 1598 * @param base FlexCAN peripheral base address. 1599 * @param mask The interrupts to enable. Logical OR of @ref _flexcan_interrupt_enable. 1600 */ 1601 #if (defined(FSL_FEATURE_FLEXCAN_HAS_PN_MODE) && FSL_FEATURE_FLEXCAN_HAS_PN_MODE) || \ 1602 (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) || \ 1603 (defined(FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) && FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) 1604 static inline void FLEXCAN_EnableInterrupts(CAN_Type *base, uint64_t mask) 1605 #else 1606 static inline void FLEXCAN_EnableInterrupts(CAN_Type *base, uint32_t mask) 1607 #endif 1608 { 1609 /* Solve Self Wake Up interrupt. */ 1610 base->MCR |= (uint32_t)(mask & (uint32_t)kFLEXCAN_WakeUpInterruptEnable); 1611 1612 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 1613 if (0 != FSL_FEATURE_FLEXCAN_INSTANCE_HAS_FLEXIBLE_DATA_RATEn(base)) 1614 { 1615 /* Solve CAN FD frames data phase error interrupt. */ 1616 base->CTRL2 |= (uint32_t)(mask & (uint32_t)kFLEXCAN_FDErrorInterruptEnable); 1617 } 1618 #endif 1619 1620 #if (defined(FSL_FEATURE_FLEXCAN_HAS_PN_MODE) && FSL_FEATURE_FLEXCAN_HAS_PN_MODE) 1621 /* Solve PN Wake Up interrupt. */ 1622 base->CTRL1_PN |= FLEXCAN_PN_INT_UNMASK(mask); 1623 #endif 1624 1625 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 1626 /* Solve Enhanced Rx FIFO interrupt. */ 1627 base->ERFIER |= FLEXCAN_EFIFO_INT_UNMASK(mask); 1628 #endif 1629 1630 #if (defined(FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) && FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) 1631 /* Solve Memory Error interrupt. */ 1632 base->MECR |= FLEXCAN_MECR_INT_UNMASK(mask); 1633 #endif 1634 1635 /* Solve interrupt enable bits in CTRL1 register. */ 1636 base->CTRL1 |= 1637 (uint32_t)(mask & ((uint32_t)kFLEXCAN_BusOffInterruptEnable | (uint32_t)kFLEXCAN_ErrorInterruptEnable | 1638 (uint32_t)kFLEXCAN_RxWarningInterruptEnable | (uint32_t)kFLEXCAN_TxWarningInterruptEnable)); 1639 } 1640 1641 /*! 1642 * @brief Disables FlexCAN interrupts according to the provided mask. 1643 * 1644 * This function disables the FlexCAN interrupts according to the provided mask. The mask 1645 * is a logical OR of enumeration members, see @ref _flexcan_interrupt_enable. 1646 * 1647 * @param base FlexCAN peripheral base address. 1648 * @param mask The interrupts to disable. Logical OR of @ref _flexcan_interrupt_enable. 1649 */ 1650 #if (defined(FSL_FEATURE_FLEXCAN_HAS_PN_MODE) && FSL_FEATURE_FLEXCAN_HAS_PN_MODE) || \ 1651 (defined(FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) && FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) 1652 static inline void FLEXCAN_DisableInterrupts(CAN_Type *base, uint64_t mask) 1653 #else 1654 static inline void FLEXCAN_DisableInterrupts(CAN_Type *base, uint32_t mask) 1655 #endif 1656 { 1657 /* Solve Wake Up Interrupt. */ 1658 base->MCR &= ~(uint32_t)(mask & (uint32_t)kFLEXCAN_WakeUpInterruptEnable); 1659 1660 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 1661 if (0 != FSL_FEATURE_FLEXCAN_INSTANCE_HAS_FLEXIBLE_DATA_RATEn(base)) 1662 { 1663 /* Solve CAN FD frames data phase error interrupt. */ 1664 base->CTRL2 &= ~(uint32_t)(mask & (uint32_t)kFLEXCAN_FDErrorInterruptEnable); 1665 } 1666 #endif 1667 1668 #if (defined(FSL_FEATURE_FLEXCAN_HAS_PN_MODE) && FSL_FEATURE_FLEXCAN_HAS_PN_MODE) 1669 /* Solve PN Wake Up Interrupt. */ 1670 base->CTRL1_PN &= ~FLEXCAN_PN_STATUS_UNMASK(mask); 1671 #endif 1672 1673 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 1674 /* Solve Enhanced Rx FIFO interrupt. */ 1675 base->ERFIER &= ~FLEXCAN_EFIFO_INT_UNMASK(mask); 1676 #endif 1677 1678 #if (defined(FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) && FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL) 1679 /* Solve Memory Error Interrupt. */ 1680 base->MECR &= ~FLEXCAN_MECR_STATUS_UNMASK(mask); 1681 #endif 1682 1683 /* Solve interrupt enable bits in CTRL1 register. */ 1684 base->CTRL1 &= 1685 ~(uint32_t)(mask & ((uint32_t)kFLEXCAN_BusOffInterruptEnable | (uint32_t)kFLEXCAN_ErrorInterruptEnable | 1686 (uint32_t)kFLEXCAN_RxWarningInterruptEnable | (uint32_t)kFLEXCAN_TxWarningInterruptEnable)); 1687 } 1688 1689 /*! 1690 * @brief Enables FlexCAN Message Buffer interrupts. 1691 * 1692 * This function enables the interrupts of given Message Buffers. 1693 * 1694 * @param base FlexCAN peripheral base address. 1695 * @param mask The ORed FlexCAN Message Buffer mask. 1696 */ 1697 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0) 1698 static inline void FLEXCAN_EnableMbInterrupts(CAN_Type *base, uint64_t mask) 1699 #else 1700 static inline void FLEXCAN_EnableMbInterrupts(CAN_Type *base, uint32_t mask) 1701 #endif 1702 { 1703 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0) 1704 base->IMASK1 |= (uint32_t)(mask & 0xFFFFFFFFU); 1705 base->IMASK2 |= (uint32_t)(mask >> 32); 1706 #else 1707 base->IMASK1 |= mask; 1708 #endif 1709 } 1710 1711 /*! 1712 * @brief Disables FlexCAN Message Buffer interrupts. 1713 * 1714 * This function disables the interrupts of given Message Buffers. 1715 * 1716 * @param base FlexCAN peripheral base address. 1717 * @param mask The ORed FlexCAN Message Buffer mask. 1718 */ 1719 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0) 1720 static inline void FLEXCAN_DisableMbInterrupts(CAN_Type *base, uint64_t mask) 1721 #else 1722 static inline void FLEXCAN_DisableMbInterrupts(CAN_Type *base, uint32_t mask) 1723 #endif 1724 { 1725 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0) 1726 base->IMASK1 &= ~((uint32_t)(mask & 0xFFFFFFFFU)); 1727 base->IMASK2 &= ~((uint32_t)(mask >> 32)); 1728 #else 1729 base->IMASK1 &= ~mask; 1730 #endif 1731 } 1732 1733 /* @} */ 1734 1735 #if (defined(FSL_FEATURE_FLEXCAN_HAS_RX_FIFO_DMA) && FSL_FEATURE_FLEXCAN_HAS_RX_FIFO_DMA) 1736 /*! 1737 * @name DMA Control 1738 * @{ 1739 */ 1740 1741 /*! 1742 * @brief Enables or disables the FlexCAN Rx FIFO DMA request. 1743 * 1744 * This function enables or disables the DMA feature of FlexCAN build-in Rx FIFO. 1745 * 1746 * @param base FlexCAN peripheral base address. 1747 * @param enable true to enable, false to disable. 1748 */ 1749 void FLEXCAN_EnableRxFifoDMA(CAN_Type *base, bool enable); 1750 1751 /*! 1752 * @brief Gets the Rx FIFO Head address. 1753 * 1754 * This function returns the FlexCAN Rx FIFO Head address, which is mainly used for the DMA/eDMA use case. 1755 * 1756 * @param base FlexCAN peripheral base address. 1757 * @return FlexCAN Rx FIFO Head address. 1758 */ 1759 static inline uintptr_t FLEXCAN_GetRxFifoHeadAddr(CAN_Type *base) 1760 { 1761 return (uintptr_t) & (base->MB[0].CS); 1762 } 1763 1764 /* @} */ 1765 #endif /* FSL_FEATURE_FLEXCAN_HAS_RX_FIFO_DMA */ 1766 1767 /*! 1768 * @name Bus Operations 1769 * @{ 1770 */ 1771 1772 /*! 1773 * @brief Enables or disables the FlexCAN module operation. 1774 * 1775 * This function enables or disables the FlexCAN module. 1776 * 1777 * @param base FlexCAN base pointer. 1778 * @param enable true to enable, false to disable. 1779 */ 1780 static inline void FLEXCAN_Enable(CAN_Type *base, bool enable) 1781 { 1782 if (enable) 1783 { 1784 base->MCR &= ~CAN_MCR_MDIS_MASK; 1785 1786 /* Wait FlexCAN exit from low-power mode. */ 1787 while (0U != (base->MCR & CAN_MCR_LPMACK_MASK)) 1788 { 1789 } 1790 } 1791 else 1792 { 1793 base->MCR |= CAN_MCR_MDIS_MASK; 1794 1795 /* Wait FlexCAN enter low-power mode. */ 1796 while (0U == (base->MCR & CAN_MCR_LPMACK_MASK)) 1797 { 1798 } 1799 } 1800 } 1801 1802 /*! 1803 * @brief Writes a FlexCAN Message to the Transmit Message Buffer. 1804 * 1805 * This function writes a CAN Message to the specified Transmit Message Buffer 1806 * and changes the Message Buffer state to start CAN Message transmit. After 1807 * that the function returns immediately. 1808 * 1809 * @param base FlexCAN peripheral base address. 1810 * @param mbIdx The FlexCAN Message Buffer index. 1811 * @param pTxFrame Pointer to CAN message frame to be sent. 1812 * @retval kStatus_Success - Write Tx Message Buffer Successfully. 1813 * @retval kStatus_Fail - Tx Message Buffer is currently in use. 1814 */ 1815 status_t FLEXCAN_WriteTxMb(CAN_Type *base, uint8_t mbIdx, const flexcan_frame_t *pTxFrame); 1816 1817 /*! 1818 * @brief Reads a FlexCAN Message from Receive Message Buffer. 1819 * 1820 * This function reads a CAN message from a specified Receive Message Buffer. 1821 * The function fills a receive CAN message frame structure with 1822 * just received data and activates the Message Buffer again. 1823 * The function returns immediately. 1824 * 1825 * @param base FlexCAN peripheral base address. 1826 * @param mbIdx The FlexCAN Message Buffer index. 1827 * @param pRxFrame Pointer to CAN message frame structure for reception. 1828 * @retval kStatus_Success - Rx Message Buffer is full and has been read successfully. 1829 * @retval kStatus_FLEXCAN_RxOverflow - Rx Message Buffer is already overflowed and has been read successfully. 1830 * @retval kStatus_Fail - Rx Message Buffer is empty. 1831 */ 1832 status_t FLEXCAN_ReadRxMb(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *pRxFrame); 1833 1834 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 1835 /*! 1836 * @brief Writes a FlexCAN FD Message to the Transmit Message Buffer. 1837 * 1838 * This function writes a CAN FD Message to the specified Transmit Message Buffer 1839 * and changes the Message Buffer state to start CAN FD Message transmit. After 1840 * that the function returns immediately. 1841 * 1842 * @param base FlexCAN peripheral base address. 1843 * @param mbIdx The FlexCAN FD Message Buffer index. 1844 * @param pTxFrame Pointer to CAN FD message frame to be sent. 1845 * @retval kStatus_Success - Write Tx Message Buffer Successfully. 1846 * @retval kStatus_Fail - Tx Message Buffer is currently in use. 1847 */ 1848 status_t FLEXCAN_WriteFDTxMb(CAN_Type *base, uint8_t mbIdx, const flexcan_fd_frame_t *pTxFrame); 1849 1850 /*! 1851 * @brief Reads a FlexCAN FD Message from Receive Message Buffer. 1852 * 1853 * This function reads a CAN FD message from a specified Receive Message Buffer. 1854 * The function fills a receive CAN FD message frame structure with 1855 * just received data and activates the Message Buffer again. 1856 * The function returns immediately. 1857 * 1858 * @param base FlexCAN peripheral base address. 1859 * @param mbIdx The FlexCAN FD Message Buffer index. 1860 * @param pRxFrame Pointer to CAN FD message frame structure for reception. 1861 * @retval kStatus_Success - Rx Message Buffer is full and has been read successfully. 1862 * @retval kStatus_FLEXCAN_RxOverflow - Rx Message Buffer is already overflowed and has been read successfully. 1863 * @retval kStatus_Fail - Rx Message Buffer is empty. 1864 */ 1865 status_t FLEXCAN_ReadFDRxMb(CAN_Type *base, uint8_t mbIdx, flexcan_fd_frame_t *pRxFrame); 1866 #endif 1867 1868 /*! 1869 * @brief Reads a FlexCAN Message from Legacy Rx FIFO. 1870 * 1871 * This function reads a CAN message from the FlexCAN Legacy Rx FIFO. 1872 * 1873 * @param base FlexCAN peripheral base address. 1874 * @param pRxFrame Pointer to CAN message frame structure for reception. 1875 * @retval kStatus_Success - Read Message from Rx FIFO successfully. 1876 * @retval kStatus_Fail - Rx FIFO is not enabled. 1877 */ 1878 status_t FLEXCAN_ReadRxFifo(CAN_Type *base, flexcan_frame_t *pRxFrame); 1879 1880 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 1881 /*! 1882 * @brief Reads a FlexCAN Message from Enhanced Rx FIFO. 1883 * 1884 * This function reads a CAN or CAN FD message from the FlexCAN Enhanced Rx FIFO. 1885 * 1886 * @param base FlexCAN peripheral base address. 1887 * @param pRxFrame Pointer to CAN FD message frame structure for reception. 1888 * @retval kStatus_Success - Read Message from Rx FIFO successfully. 1889 * @retval kStatus_Fail - Rx FIFO is not enabled. 1890 */ 1891 status_t FLEXCAN_ReadEnhancedRxFifo(CAN_Type *base, flexcan_fd_frame_t *pRxFrame); 1892 #endif 1893 1894 #if (defined(FSL_FEATURE_FLEXCAN_HAS_PN_MODE) && FSL_FEATURE_FLEXCAN_HAS_PN_MODE) 1895 /*! 1896 * @brief Reads a FlexCAN Message from Wake Up MB. 1897 * 1898 * This function reads a CAN message from the FlexCAN Wake up Message Buffers. There are four Wake up Message Buffers 1899 * (WMBs) used to store incoming messages in Pretended Networking mode. The WMB index indicates the arrival order. The 1900 * last message is stored in WMB3. 1901 * 1902 * @param base FlexCAN peripheral base address. 1903 * @param pRxFrame Pointer to CAN message frame structure for reception. 1904 * @param mbIdx The FlexCAN Wake up Message Buffer index. Range in 0x0 ~ 0x3. 1905 * @retval kStatus_Success - Read Message from Wake up Message Buffer successfully. 1906 * @retval kStatus_Fail - Wake up Message Buffer has no valid content. 1907 */ 1908 status_t FLEXCAN_ReadPNWakeUpMB(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *pRxFrame); 1909 #endif 1910 /* @} */ 1911 1912 /*! 1913 * @name Transactional 1914 * @{ 1915 */ 1916 1917 #if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) 1918 /*! 1919 * @brief Performs a polling send transaction on the CAN bus. 1920 * 1921 * @note A transfer handle does not need to be created before calling this API. 1922 * 1923 * @param base FlexCAN peripheral base pointer. 1924 * @param mbIdx The FlexCAN FD Message Buffer index. 1925 * @param pTxFrame Pointer to CAN FD message frame to be sent. 1926 * @retval kStatus_Success - Write Tx Message Buffer Successfully. 1927 * @retval kStatus_Fail - Tx Message Buffer is currently in use. 1928 */ 1929 status_t FLEXCAN_TransferFDSendBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_fd_frame_t *pTxFrame); 1930 1931 /*! 1932 * @brief Performs a polling receive transaction on the CAN bus. 1933 * 1934 * @note A transfer handle does not need to be created before calling this API. 1935 * 1936 * @param base FlexCAN peripheral base pointer. 1937 * @param mbIdx The FlexCAN FD Message Buffer index. 1938 * @param pRxFrame Pointer to CAN FD message frame structure for reception. 1939 * @retval kStatus_Success - Rx Message Buffer is full and has been read successfully. 1940 * @retval kStatus_FLEXCAN_RxOverflow - Rx Message Buffer is already overflowed and has been read successfully. 1941 * @retval kStatus_Fail - Rx Message Buffer is empty. 1942 */ 1943 status_t FLEXCAN_TransferFDReceiveBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_fd_frame_t *pRxFrame); 1944 1945 /*! 1946 * @brief Sends a message using IRQ. 1947 * 1948 * This function sends a message using IRQ. This is a non-blocking function, which returns 1949 * right away. When messages have been sent out, the send callback function is called. 1950 * 1951 * @param base FlexCAN peripheral base address. 1952 * @param handle FlexCAN handle pointer. 1953 * @param pMbXfer FlexCAN FD Message Buffer transfer structure. See the #flexcan_mb_transfer_t. 1954 * @retval kStatus_Success Start Tx Message Buffer sending process successfully. 1955 * @retval kStatus_Fail Write Tx Message Buffer failed. 1956 * @retval kStatus_FLEXCAN_TxBusy Tx Message Buffer is in use. 1957 */ 1958 status_t FLEXCAN_TransferFDSendNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *pMbXfer); 1959 1960 /*! 1961 * @brief Receives a message using IRQ. 1962 * 1963 * This function receives a message using IRQ. This is non-blocking function, which returns 1964 * right away. When the message has been received, the receive callback function is called. 1965 * 1966 * @param base FlexCAN peripheral base address. 1967 * @param handle FlexCAN handle pointer. 1968 * @param pMbXfer FlexCAN FD Message Buffer transfer structure. See the #flexcan_mb_transfer_t. 1969 * @retval kStatus_Success - Start Rx Message Buffer receiving process successfully. 1970 * @retval kStatus_FLEXCAN_RxBusy - Rx Message Buffer is in use. 1971 */ 1972 status_t FLEXCAN_TransferFDReceiveNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *pMbXfer); 1973 1974 /*! 1975 * @brief Aborts the interrupt driven message send process. 1976 * 1977 * This function aborts the interrupt driven message send process. 1978 * 1979 * @param base FlexCAN peripheral base address. 1980 * @param handle FlexCAN handle pointer. 1981 * @param mbIdx The FlexCAN FD Message Buffer index. 1982 */ 1983 void FLEXCAN_TransferFDAbortSend(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx); 1984 1985 /*! 1986 * @brief Aborts the interrupt driven message receive process. 1987 * 1988 * This function aborts the interrupt driven message receive process. 1989 * 1990 * @param base FlexCAN peripheral base address. 1991 * @param handle FlexCAN handle pointer. 1992 * @param mbIdx The FlexCAN FD Message Buffer index. 1993 */ 1994 void FLEXCAN_TransferFDAbortReceive(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx); 1995 #endif 1996 1997 /*! 1998 * @brief Performs a polling send transaction on the CAN bus. 1999 * 2000 * @note A transfer handle does not need to be created before calling this API. 2001 * 2002 * @param base FlexCAN peripheral base pointer. 2003 * @param mbIdx The FlexCAN Message Buffer index. 2004 * @param pTxFrame Pointer to CAN message frame to be sent. 2005 * @retval kStatus_Success - Write Tx Message Buffer Successfully. 2006 * @retval kStatus_Fail - Tx Message Buffer is currently in use. 2007 */ 2008 status_t FLEXCAN_TransferSendBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *pTxFrame); 2009 2010 /*! 2011 * @brief Performs a polling receive transaction on the CAN bus. 2012 * 2013 * @note A transfer handle does not need to be created before calling this API. 2014 * 2015 * @param base FlexCAN peripheral base pointer. 2016 * @param mbIdx The FlexCAN Message Buffer index. 2017 * @param pRxFrame Pointer to CAN message frame structure for reception. 2018 * @retval kStatus_Success - Rx Message Buffer is full and has been read successfully. 2019 * @retval kStatus_FLEXCAN_RxOverflow - Rx Message Buffer is already overflowed and has been read successfully. 2020 * @retval kStatus_Fail - Rx Message Buffer is empty. 2021 */ 2022 status_t FLEXCAN_TransferReceiveBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *pRxFrame); 2023 2024 /*! 2025 * @brief Performs a polling receive transaction from Legacy Rx FIFO on the CAN bus. 2026 * 2027 * @note A transfer handle does not need to be created before calling this API. 2028 * 2029 * @param base FlexCAN peripheral base pointer. 2030 * @param pRxFrame Pointer to CAN message frame structure for reception. 2031 * @retval kStatus_Success - Read Message from Rx FIFO successfully. 2032 * @retval kStatus_Fail - Rx FIFO is not enabled. 2033 */ 2034 status_t FLEXCAN_TransferReceiveFifoBlocking(CAN_Type *base, flexcan_frame_t *pRxFrame); 2035 2036 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 2037 /*! 2038 * @brief Performs a polling receive transaction from Enhanced Rx FIFO on the CAN bus. 2039 * 2040 * @note A transfer handle does not need to be created before calling this API. 2041 * 2042 * @param base FlexCAN peripheral base pointer. 2043 * @param pRxFrame Pointer to CAN FD message frame structure for reception. 2044 * @retval kStatus_Success - Read Message from Rx FIFO successfully. 2045 * @retval kStatus_Fail - Rx FIFO is not enabled. 2046 */ 2047 status_t FLEXCAN_TransferReceiveEnhancedFifoBlocking(CAN_Type *base, flexcan_fd_frame_t *pRxFrame); 2048 #endif 2049 2050 /*! 2051 * @brief Initializes the FlexCAN handle. 2052 * 2053 * This function initializes the FlexCAN handle, which can be used for other FlexCAN 2054 * transactional APIs. Usually, for a specified FlexCAN instance, 2055 * call this API once to get the initialized handle. 2056 * 2057 * @param base FlexCAN peripheral base address. 2058 * @param handle FlexCAN handle pointer. 2059 * @param callback The callback function. 2060 * @param userData The parameter of the callback function. 2061 */ 2062 void FLEXCAN_TransferCreateHandle(CAN_Type *base, 2063 flexcan_handle_t *handle, 2064 flexcan_transfer_callback_t callback, 2065 void *userData); 2066 2067 /*! 2068 * @brief Sends a message using IRQ. 2069 * 2070 * This function sends a message using IRQ. This is a non-blocking function, which returns 2071 * right away. When messages have been sent out, the send callback function is called. 2072 * 2073 * @param base FlexCAN peripheral base address. 2074 * @param handle FlexCAN handle pointer. 2075 * @param pMbXfer FlexCAN Message Buffer transfer structure. See the #flexcan_mb_transfer_t. 2076 * @retval kStatus_Success Start Tx Message Buffer sending process successfully. 2077 * @retval kStatus_Fail Write Tx Message Buffer failed. 2078 * @retval kStatus_FLEXCAN_TxBusy Tx Message Buffer is in use. 2079 */ 2080 status_t FLEXCAN_TransferSendNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *pMbXfer); 2081 2082 /*! 2083 * @brief Receives a message using IRQ. 2084 * 2085 * This function receives a message using IRQ. This is non-blocking function, which returns 2086 * right away. When the message has been received, the receive callback function is called. 2087 * 2088 * @param base FlexCAN peripheral base address. 2089 * @param handle FlexCAN handle pointer. 2090 * @param pMbXfer FlexCAN Message Buffer transfer structure. See the #flexcan_mb_transfer_t. 2091 * @retval kStatus_Success - Start Rx Message Buffer receiving process successfully. 2092 * @retval kStatus_FLEXCAN_RxBusy - Rx Message Buffer is in use. 2093 */ 2094 status_t FLEXCAN_TransferReceiveNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *pMbXfer); 2095 2096 /*! 2097 * @brief Receives a message from Rx FIFO using IRQ. 2098 * 2099 * This function receives a message using IRQ. This is a non-blocking function, which returns 2100 * right away. When all messages have been received, the receive callback function is called. 2101 * 2102 * @param base FlexCAN peripheral base address. 2103 * @param handle FlexCAN handle pointer. 2104 * @param pFifoXfer FlexCAN Rx FIFO transfer structure. See the @ref flexcan_fifo_transfer_t. 2105 * @retval kStatus_Success - Start Rx FIFO receiving process successfully. 2106 * @retval kStatus_FLEXCAN_RxFifoBusy - Rx FIFO is currently in use. 2107 */ 2108 status_t FLEXCAN_TransferReceiveFifoNonBlocking(CAN_Type *base, 2109 flexcan_handle_t *handle, 2110 flexcan_fifo_transfer_t *pFifoXfer); 2111 2112 /*! 2113 * @brief Gets the Legacy Rx Fifo transfer status during a interrupt non-blocking receive. 2114 * 2115 * @param base FlexCAN peripheral base address. 2116 * @param handle FlexCAN handle pointer. 2117 * @param count Number of CAN messages receive so far by the non-blocking transaction. 2118 * @retval kStatus_InvalidArgument count is Invalid. 2119 * @retval kStatus_Success Successfully return the count. 2120 */ 2121 2122 status_t FLEXCAN_TransferGetReceiveFifoCount(CAN_Type *base, flexcan_handle_t *handle, size_t *count); 2123 2124 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 2125 /*! 2126 * @brief Receives a message from Enhanced Rx FIFO using IRQ. 2127 * 2128 * This function receives a message using IRQ. This is a non-blocking function, which returns 2129 * right away. When all messages have been received, the receive callback function is called. 2130 * 2131 * @param base FlexCAN peripheral base address. 2132 * @param handle FlexCAN handle pointer. 2133 * @param pFifoXfer FlexCAN Rx FIFO transfer structure. See the ref flexcan_fifo_transfer_t.@ 2134 * @retval kStatus_Success - Start Rx FIFO receiving process successfully. 2135 * @retval kStatus_FLEXCAN_RxFifoBusy - Rx FIFO is currently in use. 2136 */ 2137 status_t FLEXCAN_TransferReceiveEnhancedFifoNonBlocking(CAN_Type *base, 2138 flexcan_handle_t *handle, 2139 flexcan_fifo_transfer_t *pFifoXfer); 2140 2141 /*! 2142 * @brief Gets the Enhanced Rx Fifo transfer status during a interrupt non-blocking receive. 2143 * 2144 * @param base FlexCAN peripheral base address. 2145 * @param handle FlexCAN handle pointer. 2146 * @param count Number of CAN messages receive so far by the non-blocking transaction. 2147 * @retval kStatus_InvalidArgument count is Invalid. 2148 * @retval kStatus_Success Successfully return the count. 2149 */ 2150 2151 static inline status_t FLEXCAN_TransferGetReceiveEnhancedFifoCount(CAN_Type *base, 2152 flexcan_handle_t *handle, 2153 size_t *count) 2154 { 2155 return FLEXCAN_TransferGetReceiveFifoCount(base, handle, count); 2156 } 2157 #endif 2158 2159 /*! 2160 * @brief Gets the detail index of Mailbox's Timestamp by handle. 2161 * 2162 * Then function can only be used when calling non-blocking Data transfer (TX/RX) API, 2163 * After TX/RX data transfer done (User can get the status by handler's callback function), 2164 * we can get the detail index of Mailbox's timestamp by handle, 2165 * Detail non-blocking data transfer API (TX/RX) contain. 2166 * -FLEXCAN_TransferSendNonBlocking 2167 * -FLEXCAN_TransferFDSendNonBlocking 2168 * -FLEXCAN_TransferReceiveNonBlocking 2169 * -FLEXCAN_TransferFDReceiveNonBlocking 2170 * -FLEXCAN_TransferReceiveFifoNonBlocking 2171 * 2172 * @param handle FlexCAN handle pointer. 2173 * @param mbIdx The FlexCAN Message Buffer index. 2174 * @retval the index of mailbox 's timestamp stored in the handle. 2175 * 2176 */ 2177 uint32_t FLEXCAN_GetTimeStamp(flexcan_handle_t *handle, uint8_t mbIdx); 2178 2179 /*! 2180 * @brief Aborts the interrupt driven message send process. 2181 * 2182 * This function aborts the interrupt driven message send process. 2183 * 2184 * @param base FlexCAN peripheral base address. 2185 * @param handle FlexCAN handle pointer. 2186 * @param mbIdx The FlexCAN Message Buffer index. 2187 */ 2188 void FLEXCAN_TransferAbortSend(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx); 2189 2190 /*! 2191 * @brief Aborts the interrupt driven message receive process. 2192 * 2193 * This function aborts the interrupt driven message receive process. 2194 * 2195 * @param base FlexCAN peripheral base address. 2196 * @param handle FlexCAN handle pointer. 2197 * @param mbIdx The FlexCAN Message Buffer index. 2198 */ 2199 void FLEXCAN_TransferAbortReceive(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx); 2200 2201 /*! 2202 * @brief Aborts the interrupt driven message receive from Rx FIFO process. 2203 * 2204 * This function aborts the interrupt driven message receive from Rx FIFO process. 2205 * 2206 * @param base FlexCAN peripheral base address. 2207 * @param handle FlexCAN handle pointer. 2208 */ 2209 void FLEXCAN_TransferAbortReceiveFifo(CAN_Type *base, flexcan_handle_t *handle); 2210 2211 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) 2212 /*! 2213 * @brief Aborts the interrupt driven message receive from Enhanced Rx FIFO process. 2214 * 2215 * This function aborts the interrupt driven message receive from Enhanced Rx FIFO process. 2216 * 2217 * @param base FlexCAN peripheral base address. 2218 * @param handle FlexCAN handle pointer. 2219 */ 2220 void FLEXCAN_TransferAbortReceiveEnhancedFifo(CAN_Type *base, flexcan_handle_t *handle); 2221 #endif 2222 2223 /*! 2224 * @brief FlexCAN IRQ handle function. 2225 * 2226 * This function handles the FlexCAN Error, the Message Buffer, and the Rx FIFO IRQ request. 2227 * 2228 * @param base FlexCAN peripheral base address. 2229 * @param handle FlexCAN handle pointer. 2230 */ 2231 void FLEXCAN_TransferHandleIRQ(CAN_Type *base, flexcan_handle_t *handle); 2232 2233 /* @} */ 2234 2235 #if defined(__cplusplus) 2236 } 2237 #endif 2238 2239 /*! @}*/ 2240 2241 #endif /* _FSL_FLEXCAN_H_ */
| [ Source navigation ] | [ Diff markup ] | [ Identifier search ] | [ general search ] |
|
This page was automatically generated by the 2.3.7 LXR engine. The LXR team |
|