File indexing completed on 2025-05-11 08:22:58
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0009 #ifndef _FSL_ELCDIF_H_
0010 #define _FSL_ELCDIF_H_
0011
0012 #include "fsl_common.h"
0013
0014 #if (defined(FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET) && (0 != FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET))
0015 #include "fsl_memory.h"
0016 #endif
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0030 #define FSL_ELCDIF_DRIVER_VERSION (MAKE_VERSION(2, 0, 5))
0031
0032
0033
0034 #define ELCDIF_CTRL1_IRQ_MASK \
0035 (LCDIF_CTRL1_BM_ERROR_IRQ_MASK | LCDIF_CTRL1_OVERFLOW_IRQ_MASK | LCDIF_CTRL1_UNDERFLOW_IRQ_MASK | \
0036 LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_MASK | LCDIF_CTRL1_VSYNC_EDGE_IRQ_MASK)
0037
0038
0039 #define ELCDIF_CTRL1_IRQ_EN_MASK \
0040 (LCDIF_CTRL1_BM_ERROR_IRQ_EN_MASK | LCDIF_CTRL1_OVERFLOW_IRQ_EN_MASK | LCDIF_CTRL1_UNDERFLOW_IRQ_EN_MASK | \
0041 LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_EN_MASK | LCDIF_CTRL1_VSYNC_EDGE_IRQ_EN_MASK)
0042
0043
0044 #if defined(LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_MASK)
0045 #define ELCDIF_AS_CTRL_IRQ_MASK (LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_MASK)
0046 #else
0047 #define ELCDIF_AS_CTRL_IRQ_MASK 0U
0048 #endif
0049
0050
0051 #if defined(LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_EN_MASK)
0052 #define ELCDIF_AS_CTRL_IRQ_EN_MASK (LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_EN_MASK)
0053 #else
0054 #define ELCDIF_AS_CTRL_IRQ_EN_MASK 0U
0055 #endif
0056
0057 #if ((0 != (ELCDIF_CTRL1_IRQ_MASK & ELCDIF_AS_CTRL_IRQ_MASK)) || \
0058 (0 != (ELCDIF_AS_CTRL_IRQ_MASK & ELCDIF_AS_CTRL_IRQ_EN_MASK)))
0059 #error Interrupt bits overlap, need to update the interrupt functions.
0060 #endif
0061
0062 #if defined(LCDIF_CTRL_ENABLE_PXP_HANDSHAKE_MASK)
0063 #define FSL_FEATURE_LCDIF_HAS_PXP_HANDSHAKE 1
0064 #else
0065 #define FSL_FEATURE_LCDIF_HAS_PXP_HANDSHAKE 0
0066 #endif
0067
0068 #if (defined(FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET) && (0 != FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET))
0069 #define ELCDIF_ADDR_CPU_2_IP(addr) (MEMORY_ConvertMemoryMapAddress((uint32_t)(addr), kMEMORY_Local2DMA))
0070 #else
0071 #define ELCDIF_ADDR_CPU_2_IP(addr) (addr)
0072 #endif
0073
0074
0075 #define ELCDIF_LUT_ENTRY_NUM 256U
0076
0077
0078
0079
0080 enum _elcdif_polarity_flags
0081 {
0082 kELCDIF_VsyncActiveLow = 0U,
0083 kELCDIF_HsyncActiveLow = 0U,
0084 kELCDIF_DataEnableActiveLow = 0U,
0085 kELCDIF_DriveDataOnFallingClkEdge = 0U,
0086
0087
0088 kELCDIF_VsyncActiveHigh = LCDIF_VDCTRL0_VSYNC_POL_MASK,
0089 kELCDIF_HsyncActiveHigh = LCDIF_VDCTRL0_HSYNC_POL_MASK,
0090 kELCDIF_DataEnableActiveHigh = LCDIF_VDCTRL0_ENABLE_POL_MASK,
0091 kELCDIF_DriveDataOnRisingClkEdge = LCDIF_VDCTRL0_DOTCLK_POL_MASK,
0092
0093
0094 };
0095
0096
0097
0098
0099 enum _elcdif_interrupt_enable
0100 {
0101 kELCDIF_BusMasterErrorInterruptEnable = LCDIF_CTRL1_BM_ERROR_IRQ_EN_MASK,
0102 kELCDIF_TxFifoOverflowInterruptEnable = LCDIF_CTRL1_OVERFLOW_IRQ_EN_MASK,
0103 kELCDIF_TxFifoUnderflowInterruptEnable = LCDIF_CTRL1_UNDERFLOW_IRQ_EN_MASK,
0104 kELCDIF_CurFrameDoneInterruptEnable =
0105 LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_EN_MASK,
0106 kELCDIF_VsyncEdgeInterruptEnable =
0107 LCDIF_CTRL1_VSYNC_EDGE_IRQ_EN_MASK,
0108 #if defined(LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_EN_MASK)
0109 kELCDIF_SciSyncOnInterruptEnable =
0110 LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_EN_MASK,
0111 #endif
0112 };
0113
0114
0115
0116
0117 enum _elcdif_interrupt_flags
0118 {
0119 kELCDIF_BusMasterError = LCDIF_CTRL1_BM_ERROR_IRQ_MASK,
0120 kELCDIF_TxFifoOverflow = LCDIF_CTRL1_OVERFLOW_IRQ_MASK,
0121 kELCDIF_TxFifoUnderflow = LCDIF_CTRL1_UNDERFLOW_IRQ_MASK,
0122 kELCDIF_CurFrameDone =
0123 LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_MASK,
0124 kELCDIF_VsyncEdge = LCDIF_CTRL1_VSYNC_EDGE_IRQ_MASK,
0125 #if defined(LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_MASK)
0126 kELCDIF_SciSyncOn = LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_MASK,
0127 #endif
0128 };
0129
0130
0131
0132
0133 enum _elcdif_status_flags
0134 {
0135 kELCDIF_LFifoFull = LCDIF_STAT_LFIFO_FULL_MASK,
0136 kELCDIF_LFifoEmpty = LCDIF_STAT_LFIFO_EMPTY_MASK,
0137 kELCDIF_TxFifoFull = LCDIF_STAT_TXFIFO_FULL_MASK,
0138 kELCDIF_TxFifoEmpty = LCDIF_STAT_TXFIFO_EMPTY_MASK,
0139 #if defined(LCDIF_STAT_BUSY_MASK)
0140 kELCDIF_LcdControllerBusy = LCDIF_STAT_BUSY_MASK,
0141 #endif
0142 #if defined(LCDIF_STAT_DVI_CURRENT_FIELD_MASK)
0143 kELCDIF_CurDviField2 = LCDIF_STAT_DVI_CURRENT_FIELD_MASK,
0144
0145 #endif
0146 };
0147
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0152
0153
0154 typedef enum _elcdif_pixel_format
0155 {
0156 kELCDIF_PixelFormatRAW8 = 0,
0157 kELCDIF_PixelFormatRGB565 = 1,
0158 kELCDIF_PixelFormatRGB666 = 2,
0159
0160 kELCDIF_PixelFormatXRGB8888 = 3,
0161 kELCDIF_PixelFormatRGB888 = 4,
0162 } elcdif_pixel_format_t;
0163
0164
0165 typedef enum _elcdif_lcd_data_bus
0166 {
0167 kELCDIF_DataBus8Bit = LCDIF_CTRL_LCD_DATABUS_WIDTH(1),
0168 kELCDIF_DataBus16Bit = LCDIF_CTRL_LCD_DATABUS_WIDTH(0),
0169 kELCDIF_DataBus18Bit = LCDIF_CTRL_LCD_DATABUS_WIDTH(2),
0170 kELCDIF_DataBus24Bit = LCDIF_CTRL_LCD_DATABUS_WIDTH(3),
0171 } elcdif_lcd_data_bus_t;
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0183 typedef struct _elcdif_pixel_format_reg
0184 {
0185 uint32_t regCtrl;
0186 uint32_t regCtrl1;
0187 } elcdif_pixel_format_reg_t;
0188
0189
0190
0191
0192 typedef struct _elcdif_rgb_mode_config
0193 {
0194 uint16_t panelWidth;
0195 uint16_t panelHeight;
0196 uint8_t hsw;
0197 uint8_t hfp;
0198 uint8_t hbp;
0199 uint8_t vsw;
0200 uint8_t vfp;
0201 uint8_t vbp;
0202 uint32_t polarityFlags;
0203 uint32_t bufferAddr;
0204 elcdif_pixel_format_t pixelFormat;
0205 elcdif_lcd_data_bus_t dataBus;
0206 } elcdif_rgb_mode_config_t;
0207
0208
0209
0210
0211 typedef enum _elcdif_as_pixel_format
0212 {
0213 kELCDIF_AsPixelFormatARGB8888 = 0x0,
0214 kELCDIF_AsPixelFormatRGB888 = 0x4,
0215 kELCDIF_AsPixelFormatARGB1555 = 0x8,
0216 kELCDIF_AsPixelFormatARGB4444 = 0x9,
0217 kELCDIF_AsPixelFormatRGB555 = 0xC,
0218 kELCDIF_AsPixelFormatRGB444 = 0xD,
0219 kELCDIF_AsPixelFormatRGB565 = 0xE,
0220 } elcdif_as_pixel_format_t;
0221
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0223
0224
0225 typedef struct _elcdif_as_buffer_config
0226 {
0227 uint32_t bufferAddr;
0228 elcdif_as_pixel_format_t pixelFormat;
0229 } elcdif_as_buffer_config_t;
0230
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0234 typedef enum _elcdif_alpha_mode
0235 {
0236 kELCDIF_AlphaEmbedded,
0237 kELCDIF_AlphaOverride,
0238 kELCDIF_AlphaMultiply,
0239
0240
0241
0242 kELCDIF_AlphaRop
0243 } elcdif_alpha_mode_t;
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0254 typedef enum _elcdif_rop_mode
0255 {
0256 kELCDIF_RopMaskAs = 0x0,
0257 kELCDIF_RopMaskNotAs = 0x1,
0258 kELCDIF_RopMaskAsNot = 0x2,
0259 kELCDIF_RopMergeAs = 0x3,
0260 kELCDIF_RopMergeNotAs = 0x4,
0261 kELCDIF_RopMergeAsNot = 0x5,
0262 kELCDIF_RopNotCopyAs = 0x6,
0263 kELCDIF_RopNot = 0x7,
0264 kELCDIF_RopNotMaskAs = 0x8,
0265 kELCDIF_RopNotMergeAs = 0x9,
0266 kELCDIF_RopXorAs = 0xA,
0267 kELCDIF_RopNotXorAs = 0xB
0268 } elcdif_rop_mode_t;
0269
0270
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0273 typedef struct _elcdif_as_blend_config
0274 {
0275 uint8_t alpha;
0276
0277 bool invertAlpha;
0278 elcdif_alpha_mode_t alphaMode;
0279 elcdif_rop_mode_t ropMode;
0280 } elcdif_as_blend_config_t;
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0291 typedef enum _elcdif_lut
0292 {
0293 kELCDIF_Lut0 = 0,
0294 kELCDIF_Lut1,
0295 } elcdif_lut_t;
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0301 #if defined(__cplusplus)
0302 extern "C" {
0303 #endif
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0319 void ELCDIF_RgbModeInit(LCDIF_Type *base, const elcdif_rgb_mode_config_t *config);
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0346 void ELCDIF_RgbModeGetDefaultConfig(elcdif_rgb_mode_config_t *config);
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0353 void ELCDIF_Deinit(LCDIF_Type *base);
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0368 void ELCDIF_RgbModeSetPixelFormat(LCDIF_Type *base, elcdif_pixel_format_t pixelFormat);
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0375 static inline void ELCDIF_RgbModeStart(LCDIF_Type *base)
0376 {
0377 base->CTRL_SET = LCDIF_CTRL_RUN_MASK | LCDIF_CTRL_DOTCLK_MODE_MASK;
0378 }
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0385 void ELCDIF_RgbModeStop(LCDIF_Type *base);
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0393 static inline void ELCDIF_SetNextBufferAddr(LCDIF_Type *base, uint32_t bufferAddr)
0394 {
0395 base->NEXT_BUF = ELCDIF_ADDR_CPU_2_IP(bufferAddr);
0396 }
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0403 void ELCDIF_Reset(LCDIF_Type *base);
0404
0405 #if !(defined(FSL_FEATURE_LCDIF_HAS_NO_RESET_PIN) && (0 != FSL_FEATURE_LCDIF_HAS_NO_RESET_PIN))
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0412 static inline void ELCDIF_PullUpResetPin(LCDIF_Type *base, bool pullUp)
0413 {
0414 if (pullUp)
0415 {
0416 base->CTRL1_SET = LCDIF_CTRL1_RESET_MASK;
0417 }
0418 else
0419 {
0420 base->CTRL1_CLR = LCDIF_CTRL1_RESET_MASK;
0421 }
0422 }
0423 #endif
0424
0425 #if (defined(FSL_FEATURE_LCDIF_HAS_PXP_HANDSHAKE) && (0 != FSL_FEATURE_LCDIF_HAS_PXP_HANDSHAKE))
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0432 static inline void ELCDIF_EnablePxpHandShake(LCDIF_Type *base, bool enable)
0433 {
0434 if (enable)
0435 {
0436 base->CTRL_SET = LCDIF_CTRL_ENABLE_PXP_HANDSHAKE_MASK;
0437 }
0438 else
0439 {
0440 base->CTRL_CLR = LCDIF_CTRL_ENABLE_PXP_HANDSHAKE_MASK;
0441 }
0442 }
0443 #endif
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0463 static inline uint32_t ELCDIF_GetCrcValue(const LCDIF_Type *base)
0464 {
0465 return base->CRC_STAT;
0466 }
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0478 static inline uint32_t ELCDIF_GetBusMasterErrorAddr(const LCDIF_Type *base)
0479 {
0480 return base->BM_ERROR_STAT;
0481 }
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0505 static inline uint32_t ELCDIF_GetStatus(const LCDIF_Type *base)
0506 {
0507 return base->STAT & (LCDIF_STAT_LFIFO_FULL_MASK | LCDIF_STAT_LFIFO_EMPTY_MASK | LCDIF_STAT_TXFIFO_FULL_MASK |
0508 LCDIF_STAT_TXFIFO_EMPTY_MASK
0509 #if defined(LCDIF_STAT_BUSY_MASK)
0510 | LCDIF_STAT_BUSY_MASK
0511 #endif
0512 #if defined(LCDIF_STAT_DVI_CURRENT_FIELD_MASK)
0513 | LCDIF_STAT_DVI_CURRENT_FIELD_MASK
0514 #endif
0515 );
0516 }
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0524 static inline uint32_t ELCDIF_GetLFifoCount(const LCDIF_Type *base)
0525 {
0526 return (base->STAT & LCDIF_STAT_LFIFO_COUNT_MASK) >> LCDIF_STAT_LFIFO_COUNT_SHIFT;
0527 }
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0542 static inline void ELCDIF_EnableInterrupts(LCDIF_Type *base, uint32_t mask)
0543 {
0544 base->CTRL1_SET = (mask & ELCDIF_CTRL1_IRQ_EN_MASK);
0545 #if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && (0 != FSL_FEATURE_LCDIF_HAS_NO_AS))
0546 base->AS_CTRL |= (mask & ELCDIF_AS_CTRL_IRQ_EN_MASK);
0547 #endif
0548 }
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0556 static inline void ELCDIF_DisableInterrupts(LCDIF_Type *base, uint32_t mask)
0557 {
0558 base->CTRL1_CLR = (mask & ELCDIF_CTRL1_IRQ_EN_MASK);
0559 #if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && (0 != FSL_FEATURE_LCDIF_HAS_NO_AS))
0560 base->AS_CTRL &= ~(mask & ELCDIF_AS_CTRL_IRQ_EN_MASK);
0561 #endif
0562 }
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0570 static inline uint32_t ELCDIF_GetInterruptStatus(const LCDIF_Type *base)
0571 {
0572 uint32_t flags;
0573
0574 flags = (base->CTRL1 & ELCDIF_CTRL1_IRQ_MASK);
0575 #if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && (0 != FSL_FEATURE_LCDIF_HAS_NO_AS))
0576 flags |= (base->AS_CTRL & ELCDIF_AS_CTRL_IRQ_MASK);
0577 #endif
0578
0579 return flags;
0580 }
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0588 static inline void ELCDIF_ClearInterruptStatus(LCDIF_Type *base, uint32_t mask)
0589 {
0590 base->CTRL1_CLR = (mask & ELCDIF_CTRL1_IRQ_MASK);
0591 #if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && (0 != FSL_FEATURE_LCDIF_HAS_NO_AS))
0592 base->AS_CTRL &= ~(mask & ELCDIF_AS_CTRL_IRQ_MASK);
0593 #endif
0594 }
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0598 #if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && (0 != FSL_FEATURE_LCDIF_HAS_NO_AS))
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0610 void ELCDIF_SetAlphaSurfaceBufferConfig(LCDIF_Type *base, const elcdif_as_buffer_config_t *config);
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0618 void ELCDIF_SetAlphaSurfaceBlendConfig(LCDIF_Type *base, const elcdif_as_blend_config_t *config);
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0626 static inline void ELCDIF_SetNextAlphaSurfaceBufferAddr(LCDIF_Type *base, uint32_t bufferAddr)
0627 {
0628 base->AS_NEXT_BUF = ELCDIF_ADDR_CPU_2_IP(bufferAddr);
0629 }
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0644 static inline void ELCDIF_SetOverlayColorKey(LCDIF_Type *base, uint32_t colorKeyLow, uint32_t colorKeyHigh)
0645 {
0646 base->AS_CLRKEYLOW = colorKeyLow;
0647 base->AS_CLRKEYHIGH = colorKeyHigh;
0648 }
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0656 static inline void ELCDIF_EnableOverlayColorKey(LCDIF_Type *base, bool enable)
0657 {
0658 if (enable)
0659 {
0660 base->AS_CTRL |= LCDIF_AS_CTRL_ENABLE_COLORKEY_MASK;
0661 }
0662 else
0663 {
0664 base->AS_CTRL &= ~LCDIF_AS_CTRL_ENABLE_COLORKEY_MASK;
0665 }
0666 }
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0674 static inline void ELCDIF_EnableAlphaSurface(LCDIF_Type *base, bool enable)
0675 {
0676 if (enable)
0677 {
0678 base->AS_CTRL |= LCDIF_AS_CTRL_AS_ENABLE_MASK;
0679 }
0680 else
0681 {
0682 base->AS_CTRL &= ~LCDIF_AS_CTRL_AS_ENABLE_MASK;
0683 }
0684 }
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0695 static inline void ELCDIF_EnableProcessSurface(LCDIF_Type *base, bool enable)
0696 {
0697 if (enable)
0698 {
0699 base->AS_CTRL &= ~LCDIF_AS_CTRL_PS_DISABLE_MASK;
0700 }
0701 else
0702 {
0703 base->AS_CTRL |= LCDIF_AS_CTRL_PS_DISABLE_MASK;
0704 }
0705 }
0706
0707
0708 #endif
0709
0710 #if (defined(FSL_FEATURE_LCDIF_HAS_LUT) && (0 != FSL_FEATURE_LCDIF_HAS_LUT))
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0729 static inline void ELCDIF_EnableLut(LCDIF_Type *base, bool enable)
0730 {
0731 if (enable)
0732 {
0733 base->LUT_CTRL &= ~LCDIF_LUT_CTRL_LUT_BYPASS_MASK;
0734 }
0735 else
0736 {
0737 base->LUT_CTRL |= LCDIF_LUT_CTRL_LUT_BYPASS_MASK;
0738 }
0739 }
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0755 status_t ELCDIF_UpdateLut(
0756 LCDIF_Type *base, elcdif_lut_t lut, uint16_t startIndex, const uint32_t *lutData, uint16_t count);
0757
0758
0759 #endif
0760
0761 #if defined(__cplusplus)
0762 }
0763 #endif
0764
0765
0766
0767 #endif