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File indexing completed on 2025-05-11 08:22:58

0001 /*
0002  * Copyright 2017-2022 NXP
0003  * All rights reserved.
0004  *
0005  *
0006  * SPDX-License-Identifier: BSD-3-Clause
0007  */
0008 
0009 #ifndef _FSL_ELCDIF_H_
0010 #define _FSL_ELCDIF_H_
0011 
0012 #include "fsl_common.h"
0013 
0014 #if (defined(FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET) && (0 != FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET))
0015 #include "fsl_memory.h"
0016 #endif
0017 
0018 /*!
0019  * @addtogroup elcdif
0020  * @{
0021  */
0022 
0023 /*******************************************************************************
0024  * Definitions
0025  ******************************************************************************/
0026 
0027 /*! @name Driver version */
0028 /*@{*/
0029 /*! @brief eLCDIF driver version */
0030 #define FSL_ELCDIF_DRIVER_VERSION (MAKE_VERSION(2, 0, 5))
0031 /*@}*/
0032 
0033 /* All IRQ flags in CTRL1 register. */
0034 #define ELCDIF_CTRL1_IRQ_MASK                                                                         \
0035     (LCDIF_CTRL1_BM_ERROR_IRQ_MASK | LCDIF_CTRL1_OVERFLOW_IRQ_MASK | LCDIF_CTRL1_UNDERFLOW_IRQ_MASK | \
0036      LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_MASK | LCDIF_CTRL1_VSYNC_EDGE_IRQ_MASK)
0037 
0038 /* All IRQ enable control bits in CTRL1 register. */
0039 #define ELCDIF_CTRL1_IRQ_EN_MASK                                                                               \
0040     (LCDIF_CTRL1_BM_ERROR_IRQ_EN_MASK | LCDIF_CTRL1_OVERFLOW_IRQ_EN_MASK | LCDIF_CTRL1_UNDERFLOW_IRQ_EN_MASK | \
0041      LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_EN_MASK | LCDIF_CTRL1_VSYNC_EDGE_IRQ_EN_MASK)
0042 
0043 /* All IRQ flags in AS_CTRL register. */
0044 #if defined(LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_MASK)
0045 #define ELCDIF_AS_CTRL_IRQ_MASK (LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_MASK)
0046 #else
0047 #define ELCDIF_AS_CTRL_IRQ_MASK 0U
0048 #endif
0049 
0050 /* All IRQ enable control bits in AS_CTRL register. */
0051 #if defined(LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_EN_MASK)
0052 #define ELCDIF_AS_CTRL_IRQ_EN_MASK (LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_EN_MASK)
0053 #else
0054 #define ELCDIF_AS_CTRL_IRQ_EN_MASK 0U
0055 #endif
0056 
0057 #if ((0 != (ELCDIF_CTRL1_IRQ_MASK & ELCDIF_AS_CTRL_IRQ_MASK)) || \
0058      (0 != (ELCDIF_AS_CTRL_IRQ_MASK & ELCDIF_AS_CTRL_IRQ_EN_MASK)))
0059 #error Interrupt bits overlap, need to update the interrupt functions.
0060 #endif
0061 
0062 #if defined(LCDIF_CTRL_ENABLE_PXP_HANDSHAKE_MASK)
0063 #define FSL_FEATURE_LCDIF_HAS_PXP_HANDSHAKE 1
0064 #else
0065 #define FSL_FEATURE_LCDIF_HAS_PXP_HANDSHAKE 0
0066 #endif
0067 
0068 #if (defined(FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET) && (0 != FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET))
0069 #define ELCDIF_ADDR_CPU_2_IP(addr) (MEMORY_ConvertMemoryMapAddress((uint32_t)(addr), kMEMORY_Local2DMA))
0070 #else
0071 #define ELCDIF_ADDR_CPU_2_IP(addr) (addr)
0072 #endif /* FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET */
0073 
0074 /* LUT memory entery number. */
0075 #define ELCDIF_LUT_ENTRY_NUM 256U
0076 
0077 /*!
0078  * @brief eLCDIF signal polarity flags
0079  */
0080 enum _elcdif_polarity_flags
0081 {
0082     kELCDIF_VsyncActiveLow            = 0U, /*!< VSYNC active low. */
0083     kELCDIF_HsyncActiveLow            = 0U, /*!< HSYNC active low. */
0084     kELCDIF_DataEnableActiveLow       = 0U, /*!< Data enable line active low. */
0085     kELCDIF_DriveDataOnFallingClkEdge = 0U, /*!< Drive data on falling clock edge, capture data
0086                                                  on rising clock edge. */
0087 
0088     kELCDIF_VsyncActiveHigh          = LCDIF_VDCTRL0_VSYNC_POL_MASK,  /*!< VSYNC active high. */
0089     kELCDIF_HsyncActiveHigh          = LCDIF_VDCTRL0_HSYNC_POL_MASK,  /*!< HSYNC active high. */
0090     kELCDIF_DataEnableActiveHigh     = LCDIF_VDCTRL0_ENABLE_POL_MASK, /*!< Data enable line active high. */
0091     kELCDIF_DriveDataOnRisingClkEdge = LCDIF_VDCTRL0_DOTCLK_POL_MASK, /*!< Drive data on falling
0092                                                                         clock edge, capture data
0093                                                                         on rising clock edge. */
0094 };
0095 
0096 /*!
0097  * @brief The eLCDIF interrupts to enable.
0098  */
0099 enum _elcdif_interrupt_enable
0100 {
0101     kELCDIF_BusMasterErrorInterruptEnable  = LCDIF_CTRL1_BM_ERROR_IRQ_EN_MASK,  /*!< Bus master error interrupt. */
0102     kELCDIF_TxFifoOverflowInterruptEnable  = LCDIF_CTRL1_OVERFLOW_IRQ_EN_MASK,  /*!< TXFIFO overflow interrupt. */
0103     kELCDIF_TxFifoUnderflowInterruptEnable = LCDIF_CTRL1_UNDERFLOW_IRQ_EN_MASK, /*!< TXFIFO underflow interrupt. */
0104     kELCDIF_CurFrameDoneInterruptEnable =
0105         LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_EN_MASK, /*!< Interrupt when hardware enters vertical blanking state. */
0106     kELCDIF_VsyncEdgeInterruptEnable =
0107         LCDIF_CTRL1_VSYNC_EDGE_IRQ_EN_MASK, /*!< Interrupt when hardware encounters VSYNC edge. */
0108 #if defined(LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_EN_MASK)
0109     kELCDIF_SciSyncOnInterruptEnable =
0110         LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_EN_MASK, /*!< Interrupt when eLCDIF lock with CSI input. */
0111 #endif
0112 };
0113 
0114 /*!
0115  * @brief The eLCDIF interrupt status flags.
0116  */
0117 enum _elcdif_interrupt_flags
0118 {
0119     kELCDIF_BusMasterError  = LCDIF_CTRL1_BM_ERROR_IRQ_MASK,  /*!< Bus master error interrupt. */
0120     kELCDIF_TxFifoOverflow  = LCDIF_CTRL1_OVERFLOW_IRQ_MASK,  /*!< TXFIFO overflow interrupt. */
0121     kELCDIF_TxFifoUnderflow = LCDIF_CTRL1_UNDERFLOW_IRQ_MASK, /*!< TXFIFO underflow interrupt. */
0122     kELCDIF_CurFrameDone =
0123         LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_MASK,             /*!< Interrupt when hardware enters vertical blanking state. */
0124     kELCDIF_VsyncEdge = LCDIF_CTRL1_VSYNC_EDGE_IRQ_MASK, /*!< Interrupt when hardware encounters VSYNC edge. */
0125 #if defined(LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_MASK)
0126     kELCDIF_SciSyncOn = LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_MASK, /*!< Interrupt when eLCDIF lock with CSI input. */
0127 #endif
0128 };
0129 
0130 /*!
0131  * @brief eLCDIF status flags
0132  */
0133 enum _elcdif_status_flags
0134 {
0135     kELCDIF_LFifoFull   = LCDIF_STAT_LFIFO_FULL_MASK,   /*!< LFIFO full. */
0136     kELCDIF_LFifoEmpty  = LCDIF_STAT_LFIFO_EMPTY_MASK,  /*!< LFIFO empty. */
0137     kELCDIF_TxFifoFull  = LCDIF_STAT_TXFIFO_FULL_MASK,  /*!< TXFIFO full. */
0138     kELCDIF_TxFifoEmpty = LCDIF_STAT_TXFIFO_EMPTY_MASK, /*!< TXFIFO empty. */
0139 #if defined(LCDIF_STAT_BUSY_MASK)
0140     kELCDIF_LcdControllerBusy = LCDIF_STAT_BUSY_MASK, /*!< The external LCD controller busy signal. */
0141 #endif
0142 #if defined(LCDIF_STAT_DVI_CURRENT_FIELD_MASK)
0143     kELCDIF_CurDviField2 = LCDIF_STAT_DVI_CURRENT_FIELD_MASK, /*!< Current DVI filed, if set, then current filed is 2,
0144                                                                otherwise current filed is 1. */
0145 #endif
0146 };
0147 
0148 /*!
0149  * @brief The pixel format.
0150  *
0151  * This enumerator should be defined together with the array s_pixelFormatReg.
0152  * To support new pixel format, enhance this enumerator and s_pixelFormatReg.
0153  */
0154 typedef enum _elcdif_pixel_format
0155 {
0156     kELCDIF_PixelFormatRAW8   = 0,   /*!< RAW 8 bit, four data use 32 bits. */
0157     kELCDIF_PixelFormatRGB565 = 1,   /*!< RGB565, two pixel use 32 bits. */
0158     kELCDIF_PixelFormatRGB666 = 2,   /*!< RGB666 unpacked, one pixel uses 32 bits, high byte unused,
0159                                           upper 2 bits of other bytes unused. */
0160     kELCDIF_PixelFormatXRGB8888 = 3, /*!< XRGB8888 unpacked, one pixel uses 32 bits, high byte unused. */
0161     kELCDIF_PixelFormatRGB888   = 4, /*!< RGB888 packed, one pixel uses 24 bits. */
0162 } elcdif_pixel_format_t;
0163 
0164 /*! @brief The LCD data bus type.  */
0165 typedef enum _elcdif_lcd_data_bus
0166 {
0167     kELCDIF_DataBus8Bit  = LCDIF_CTRL_LCD_DATABUS_WIDTH(1), /*!< 8-bit data bus. */
0168     kELCDIF_DataBus16Bit = LCDIF_CTRL_LCD_DATABUS_WIDTH(0), /*!< 16-bit data bus, support RGB565. */
0169     kELCDIF_DataBus18Bit = LCDIF_CTRL_LCD_DATABUS_WIDTH(2), /*!< 18-bit data bus, support RGB666. */
0170     kELCDIF_DataBus24Bit = LCDIF_CTRL_LCD_DATABUS_WIDTH(3), /*!< 24-bit data bus, support RGB888. */
0171 } elcdif_lcd_data_bus_t;
0172 
0173 /*!
0174  * @brief The register value when using different pixel format.
0175  *
0176  * These register bits control the pixel format:
0177  * - CTRL[DATA_FORMAT_24_BIT]
0178  * - CTRL[DATA_FORMAT_18_BIT]
0179  * - CTRL[DATA_FORMAT_16_BIT]
0180  * - CTRL[WORD_LENGTH]
0181  * - CTRL1[BYTE_PACKING_FORMAT]
0182  */
0183 typedef struct _elcdif_pixel_format_reg
0184 {
0185     uint32_t regCtrl;  /*!< Value of register CTRL. */
0186     uint32_t regCtrl1; /*!< Value of register CTRL1. */
0187 } elcdif_pixel_format_reg_t;
0188 
0189 /*!
0190  * @brief eLCDIF configure structure for RGB mode (DOTCLK mode).
0191  */
0192 typedef struct _elcdif_rgb_mode_config
0193 {
0194     uint16_t panelWidth;    /*!< Display panel width, pixels per line. */
0195     uint16_t panelHeight;   /*!< Display panel height, how many lines per panel. */
0196     uint8_t hsw;            /*!< HSYNC pulse width. */
0197     uint8_t hfp;            /*!< Horizontal front porch. */
0198     uint8_t hbp;            /*!< Horizontal back porch. */
0199     uint8_t vsw;            /*!< VSYNC pulse width. */
0200     uint8_t vfp;            /*!< Vrtical front porch. */
0201     uint8_t vbp;            /*!< Vertical back porch. */
0202     uint32_t polarityFlags; /*!< OR'ed value of @ref _elcdif_polarity_flags, used to contol the signal polarity. */
0203     uint32_t bufferAddr;    /*!< Frame buffer address. */
0204     elcdif_pixel_format_t pixelFormat; /*!< Pixel format. */
0205     elcdif_lcd_data_bus_t dataBus;     /*!< LCD data bus. */
0206 } elcdif_rgb_mode_config_t;
0207 
0208 /*!
0209  * @brief eLCDIF alpha surface pixel format.
0210  */
0211 typedef enum _elcdif_as_pixel_format
0212 {
0213     kELCDIF_AsPixelFormatARGB8888 = 0x0, /*!< 32-bit pixels with alpha. */
0214     kELCDIF_AsPixelFormatRGB888   = 0x4, /*!< 32-bit pixels without alpha (unpacked 24-bit format) */
0215     kELCDIF_AsPixelFormatARGB1555 = 0x8, /*!< 16-bit pixels with alpha. */
0216     kELCDIF_AsPixelFormatARGB4444 = 0x9, /*!< 16-bit pixels with alpha. */
0217     kELCDIF_AsPixelFormatRGB555   = 0xC, /*!< 16-bit pixels without alpha. */
0218     kELCDIF_AsPixelFormatRGB444   = 0xD, /*!< 16-bit pixels without alpha. */
0219     kELCDIF_AsPixelFormatRGB565   = 0xE, /*!< 16-bit pixels without alpha. */
0220 } elcdif_as_pixel_format_t;
0221 
0222 /*!
0223  * @brief eLCDIF alpha surface buffer configuration.
0224  */
0225 typedef struct _elcdif_as_buffer_config
0226 {
0227     uint32_t bufferAddr;                  /*!< Buffer address. */
0228     elcdif_as_pixel_format_t pixelFormat; /*!< Pixel format. */
0229 } elcdif_as_buffer_config_t;
0230 
0231 /*!
0232  * @brief eLCDIF alpha mode during blending.
0233  */
0234 typedef enum _elcdif_alpha_mode
0235 {
0236     kELCDIF_AlphaEmbedded, /*!< The alpha surface pixel alpha value will be used for blend. */
0237     kELCDIF_AlphaOverride, /*!< The user defined alpha value will be used for blend directly. */
0238     kELCDIF_AlphaMultiply, /*!< The alpha surface pixel alpha value scaled the user defined
0239                              alpha value will be used for blend, for example, pixel alpha set
0240                              set to 200, user defined alpha set to 100, then the reault alpha
0241                              is 200 * 100 / 255. */
0242     kELCDIF_AlphaRop       /*!< Raster operation. */
0243 } elcdif_alpha_mode_t;
0244 
0245 /*!
0246  * @brief eLCDIF ROP mode during blending.
0247  *
0248  * Explanation:
0249  * - AS: Alpha surface
0250  * - PS: Process surface
0251  * - nAS: Alpha surface NOT value
0252  * - nPS: Process surface NOT value
0253  */
0254 typedef enum _elcdif_rop_mode
0255 {
0256     kELCDIF_RopMaskAs     = 0x0, /*!< AS AND PS. */
0257     kELCDIF_RopMaskNotAs  = 0x1, /*!< nAS AND PS. */
0258     kELCDIF_RopMaskAsNot  = 0x2, /*!< AS AND nPS. */
0259     kELCDIF_RopMergeAs    = 0x3, /*!< AS OR PS. */
0260     kELCDIF_RopMergeNotAs = 0x4, /*!< nAS OR PS. */
0261     kELCDIF_RopMergeAsNot = 0x5, /*!< AS OR nPS. */
0262     kELCDIF_RopNotCopyAs  = 0x6, /*!< nAS. */
0263     kELCDIF_RopNot        = 0x7, /*!< nPS. */
0264     kELCDIF_RopNotMaskAs  = 0x8, /*!< AS NAND PS. */
0265     kELCDIF_RopNotMergeAs = 0x9, /*!< AS NOR PS. */
0266     kELCDIF_RopXorAs      = 0xA, /*!< AS XOR PS. */
0267     kELCDIF_RopNotXorAs   = 0xB  /*!< AS XNOR PS. */
0268 } elcdif_rop_mode_t;
0269 
0270 /*!
0271  * @brief eLCDIF alpha surface blending configuration.
0272  */
0273 typedef struct _elcdif_as_blend_config
0274 {
0275     uint8_t alpha;    /*!< User defined alpha value, only used when @ref alphaMode is @ref kELCDIF_AlphaOverride or @ref
0276                          kELCDIF_AlphaRop. */
0277     bool invertAlpha; /*!< Set true to invert the alpha. */
0278     elcdif_alpha_mode_t alphaMode; /*!< Alpha mode. */
0279     elcdif_rop_mode_t ropMode;     /*!< ROP mode, only valid when @ref alphaMode is @ref kELCDIF_AlphaRop. */
0280 } elcdif_as_blend_config_t;
0281 
0282 /*!
0283  * @brief eLCDIF LUT
0284  *
0285  * The Lookup Table (LUT) is used to expand the 8 bits pixel to 24 bits pixel
0286  * before output to external displayer.
0287  *
0288  * There are two 256x24 bits LUT memory in LCDIF, the LSB of frame buffer address
0289  * determins which memory to use.
0290  */
0291 typedef enum _elcdif_lut
0292 {
0293     kELCDIF_Lut0 = 0, /*!< LUT 0. */
0294     kELCDIF_Lut1,     /*!< LUT 1. */
0295 } elcdif_lut_t;
0296 
0297 /*******************************************************************************
0298  * APIs
0299  ******************************************************************************/
0300 
0301 #if defined(__cplusplus)
0302 extern "C" {
0303 #endif /* __cplusplus */
0304 
0305 /*!
0306  * @name eLCDIF initialization and de-initialization
0307  * @{
0308  */
0309 
0310 /*!
0311  * @brief Initializes the eLCDIF to work in RGB mode (DOTCLK mode).
0312  *
0313  * This function ungates the eLCDIF clock and configures the eLCDIF peripheral according
0314  * to the configuration structure.
0315  *
0316  * @param base eLCDIF peripheral base address.
0317  * @param config Pointer to the configuration structure.
0318  */
0319 void ELCDIF_RgbModeInit(LCDIF_Type *base, const elcdif_rgb_mode_config_t *config);
0320 
0321 /*!
0322  * @brief Gets the eLCDIF default configuration structure for RGB (DOTCLK) mode.
0323  *
0324  * This function sets the configuration structure to default values.
0325  * The default configuration is set to the following values.
0326  * @code
0327     config->panelWidth = 480U;
0328     config->panelHeight = 272U;
0329     config->hsw = 41;
0330     config->hfp = 4;
0331     config->hbp = 8;
0332     config->vsw = 10;
0333     config->vfp = 4;
0334     config->vbp = 2;
0335     config->polarityFlags = kELCDIF_VsyncActiveLow |
0336                             kELCDIF_HsyncActiveLow |
0337                             kELCDIF_DataEnableActiveLow |
0338                             kELCDIF_DriveDataOnFallingClkEdge;
0339     config->bufferAddr = 0U;
0340     config->pixelFormat = kELCDIF_PixelFormatRGB888;
0341     config->dataBus = kELCDIF_DataBus24Bit;
0342    @endcode
0343  *
0344  * @param config Pointer to the eLCDIF configuration structure.
0345  */
0346 void ELCDIF_RgbModeGetDefaultConfig(elcdif_rgb_mode_config_t *config);
0347 
0348 /*!
0349  * @brief Deinitializes the eLCDIF peripheral.
0350  *
0351  * @param base eLCDIF peripheral base address.
0352  */
0353 void ELCDIF_Deinit(LCDIF_Type *base);
0354 
0355 /* @} */
0356 
0357 /*!
0358  * @name Module operation
0359  * @{
0360  */
0361 
0362 /*!
0363  * @brief Set the pixel format in RGB (DOTCLK) mode.
0364  *
0365  * @param base eLCDIF peripheral base address.
0366  * @param pixelFormat The pixel format.
0367  */
0368 void ELCDIF_RgbModeSetPixelFormat(LCDIF_Type *base, elcdif_pixel_format_t pixelFormat);
0369 
0370 /*!
0371  * @brief Start to display in RGB (DOTCLK) mode.
0372  *
0373  * @param base eLCDIF peripheral base address.
0374  */
0375 static inline void ELCDIF_RgbModeStart(LCDIF_Type *base)
0376 {
0377     base->CTRL_SET = LCDIF_CTRL_RUN_MASK | LCDIF_CTRL_DOTCLK_MODE_MASK;
0378 }
0379 
0380 /*!
0381  * @brief Stop display in RGB (DOTCLK) mode and wait until finished.
0382  *
0383  * @param base eLCDIF peripheral base address.
0384  */
0385 void ELCDIF_RgbModeStop(LCDIF_Type *base);
0386 
0387 /*!
0388  * @brief Set the next frame buffer address to display.
0389  *
0390  * @param base eLCDIF peripheral base address.
0391  * @param bufferAddr The frame buffer address to set.
0392  */
0393 static inline void ELCDIF_SetNextBufferAddr(LCDIF_Type *base, uint32_t bufferAddr)
0394 {
0395     base->NEXT_BUF = ELCDIF_ADDR_CPU_2_IP(bufferAddr);
0396 }
0397 
0398 /*!
0399  * @brief Reset the eLCDIF peripheral.
0400  *
0401  * @param base eLCDIF peripheral base address.
0402  */
0403 void ELCDIF_Reset(LCDIF_Type *base);
0404 
0405 #if !(defined(FSL_FEATURE_LCDIF_HAS_NO_RESET_PIN) && (0 != FSL_FEATURE_LCDIF_HAS_NO_RESET_PIN))
0406 /*!
0407  * @brief Pull up or down the reset pin for the externel LCD controller.
0408  *
0409  * @param base eLCDIF peripheral base address.
0410  * @param pullUp True to pull up reset pin, false to pull down.
0411  */
0412 static inline void ELCDIF_PullUpResetPin(LCDIF_Type *base, bool pullUp)
0413 {
0414     if (pullUp)
0415     {
0416         base->CTRL1_SET = LCDIF_CTRL1_RESET_MASK;
0417     }
0418     else
0419     {
0420         base->CTRL1_CLR = LCDIF_CTRL1_RESET_MASK;
0421     }
0422 }
0423 #endif
0424 
0425 #if (defined(FSL_FEATURE_LCDIF_HAS_PXP_HANDSHAKE) && (0 != FSL_FEATURE_LCDIF_HAS_PXP_HANDSHAKE))
0426 /*!
0427  * @brief Enable or disable the hand shake with PXP.
0428  *
0429  * @param base eLCDIF peripheral base address.
0430  * @param enable True to enable, false to disable.
0431  */
0432 static inline void ELCDIF_EnablePxpHandShake(LCDIF_Type *base, bool enable)
0433 {
0434     if (enable)
0435     {
0436         base->CTRL_SET = LCDIF_CTRL_ENABLE_PXP_HANDSHAKE_MASK;
0437     }
0438     else
0439     {
0440         base->CTRL_CLR = LCDIF_CTRL_ENABLE_PXP_HANDSHAKE_MASK;
0441     }
0442 }
0443 #endif
0444 
0445 /* @} */
0446 
0447 /*!
0448  * @name Status
0449  * @{
0450  */
0451 
0452 /*!
0453  * @brief Get the CRC value of the frame sent out.
0454  *
0455  * When a frame is sent complete (the interrupt @ref kELCDIF_CurFrameDone assert), this function
0456  * can be used to get the CRC value of the frame sent.
0457  *
0458  * @param base eLCDIF peripheral base address.
0459  * @return The CRC value.
0460  *
0461  * @note The CRC value is dependent on the LCD_DATABUS_WIDTH.
0462  */
0463 static inline uint32_t ELCDIF_GetCrcValue(const LCDIF_Type *base)
0464 {
0465     return base->CRC_STAT;
0466 }
0467 
0468 /*!
0469  * @brief Get the bus master error virtual address.
0470  *
0471  * When bus master error occurs (the interrupt kELCDIF_BusMasterError assert), this function
0472  * can get the virtual address at which the AXI master received an error
0473  * response from the slave.
0474  *
0475  * @param base eLCDIF peripheral base address.
0476  * @return The error virtual address.
0477  */
0478 static inline uint32_t ELCDIF_GetBusMasterErrorAddr(const LCDIF_Type *base)
0479 {
0480     return base->BM_ERROR_STAT;
0481 }
0482 
0483 /*!
0484  * @brief Get the eLCDIF status.
0485  *
0486  * The status flags are returned as a mask value, application could check the
0487  * corresponding bit. Example:
0488  *
0489  * @code
0490    uint32_t statusFlags;
0491    statusFlags = ELCDIF_GetStatus(LCDIF);
0492 
0493    if (kELCDIF_LFifoFull & statusFlags)
0494    {
0495    }
0496 
0497    if (kELCDIF_TxFifoEmpty & statusFlags)
0498    {
0499    }
0500    @endcode
0501  *
0502  * @param base eLCDIF peripheral base address.
0503  * @return The mask value of status flags, it is OR'ed value of @ref _elcdif_status_flags.
0504  */
0505 static inline uint32_t ELCDIF_GetStatus(const LCDIF_Type *base)
0506 {
0507     return base->STAT & (LCDIF_STAT_LFIFO_FULL_MASK | LCDIF_STAT_LFIFO_EMPTY_MASK | LCDIF_STAT_TXFIFO_FULL_MASK |
0508                          LCDIF_STAT_TXFIFO_EMPTY_MASK
0509 #if defined(LCDIF_STAT_BUSY_MASK)
0510                          | LCDIF_STAT_BUSY_MASK
0511 #endif
0512 #if defined(LCDIF_STAT_DVI_CURRENT_FIELD_MASK)
0513                          | LCDIF_STAT_DVI_CURRENT_FIELD_MASK
0514 #endif
0515                         );
0516 }
0517 
0518 /*!
0519  * @brief Get current count in Latency buffer (LFIFO).
0520  *
0521  * @param base eLCDIF peripheral base address.
0522  * @return The LFIFO current count
0523  */
0524 static inline uint32_t ELCDIF_GetLFifoCount(const LCDIF_Type *base)
0525 {
0526     return (base->STAT & LCDIF_STAT_LFIFO_COUNT_MASK) >> LCDIF_STAT_LFIFO_COUNT_SHIFT;
0527 }
0528 
0529 /* @} */
0530 
0531 /*!
0532  * @name Interrupts
0533  * @{
0534  */
0535 
0536 /*!
0537  * @brief Enables eLCDIF interrupt requests.
0538  *
0539  * @param base eLCDIF peripheral base address.
0540  * @param mask interrupt source, OR'ed value of _elcdif_interrupt_enable.
0541  */
0542 static inline void ELCDIF_EnableInterrupts(LCDIF_Type *base, uint32_t mask)
0543 {
0544     base->CTRL1_SET = (mask & ELCDIF_CTRL1_IRQ_EN_MASK);
0545 #if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && (0 != FSL_FEATURE_LCDIF_HAS_NO_AS))
0546     base->AS_CTRL |= (mask & ELCDIF_AS_CTRL_IRQ_EN_MASK);
0547 #endif
0548 }
0549 
0550 /*!
0551  * @brief Disables eLCDIF interrupt requests.
0552  *
0553  * @param base eLCDIF peripheral base address.
0554  * @param mask interrupt source, OR'ed value of _elcdif_interrupt_enable.
0555  */
0556 static inline void ELCDIF_DisableInterrupts(LCDIF_Type *base, uint32_t mask)
0557 {
0558     base->CTRL1_CLR = (mask & ELCDIF_CTRL1_IRQ_EN_MASK);
0559 #if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && (0 != FSL_FEATURE_LCDIF_HAS_NO_AS))
0560     base->AS_CTRL &= ~(mask & ELCDIF_AS_CTRL_IRQ_EN_MASK);
0561 #endif
0562 }
0563 
0564 /*!
0565  * @brief Get eLCDIF interrupt peding status.
0566  *
0567  * @param base eLCDIF peripheral base address.
0568  * @return Interrupt pending status, OR'ed value of _elcdif_interrupt_flags.
0569  */
0570 static inline uint32_t ELCDIF_GetInterruptStatus(const LCDIF_Type *base)
0571 {
0572     uint32_t flags;
0573 
0574     flags = (base->CTRL1 & ELCDIF_CTRL1_IRQ_MASK);
0575 #if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && (0 != FSL_FEATURE_LCDIF_HAS_NO_AS))
0576     flags |= (base->AS_CTRL & ELCDIF_AS_CTRL_IRQ_MASK);
0577 #endif
0578 
0579     return flags;
0580 }
0581 
0582 /*!
0583  * @brief Clear eLCDIF interrupt peding status.
0584  *
0585  * @param base eLCDIF peripheral base address.
0586  * @param mask of the flags to clear, OR'ed value of _elcdif_interrupt_flags.
0587  */
0588 static inline void ELCDIF_ClearInterruptStatus(LCDIF_Type *base, uint32_t mask)
0589 {
0590     base->CTRL1_CLR = (mask & ELCDIF_CTRL1_IRQ_MASK);
0591 #if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && (0 != FSL_FEATURE_LCDIF_HAS_NO_AS))
0592     base->AS_CTRL &= ~(mask & ELCDIF_AS_CTRL_IRQ_MASK);
0593 #endif
0594 }
0595 
0596 /* @} */
0597 
0598 #if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && (0 != FSL_FEATURE_LCDIF_HAS_NO_AS))
0599 /*!
0600  * @name Alpha surface
0601  * @{
0602  */
0603 
0604 /*!
0605  * @brief Set the configuration for alpha surface buffer.
0606  *
0607  * @param base eLCDIF peripheral base address.
0608  * @param config Pointer to the configuration structure.
0609  */
0610 void ELCDIF_SetAlphaSurfaceBufferConfig(LCDIF_Type *base, const elcdif_as_buffer_config_t *config);
0611 
0612 /*!
0613  * @brief Set the alpha surface blending configuration.
0614  *
0615  * @param base eLCDIF peripheral base address.
0616  * @param config Pointer to the configuration structure.
0617  */
0618 void ELCDIF_SetAlphaSurfaceBlendConfig(LCDIF_Type *base, const elcdif_as_blend_config_t *config);
0619 
0620 /*!
0621  * @brief Set the next alpha surface buffer address.
0622  *
0623  * @param base eLCDIF peripheral base address.
0624  * @param bufferAddr Alpha surface buffer address.
0625  */
0626 static inline void ELCDIF_SetNextAlphaSurfaceBufferAddr(LCDIF_Type *base, uint32_t bufferAddr)
0627 {
0628     base->AS_NEXT_BUF = ELCDIF_ADDR_CPU_2_IP(bufferAddr);
0629 }
0630 
0631 /*!
0632  * @brief Set the overlay color key.
0633  *
0634  * If a pixel in the current overlay image with a color that falls in the range
0635  * from the @p colorKeyLow to @p colorKeyHigh range, it will use the process surface
0636  * pixel value for that location.
0637  *
0638  * @param base eLCDIF peripheral base address.
0639  * @param colorKeyLow Color key low range.
0640  * @param colorKeyHigh Color key high range.
0641  *
0642  * @note Colorkey operations are higher priority than alpha or ROP operations
0643  */
0644 static inline void ELCDIF_SetOverlayColorKey(LCDIF_Type *base, uint32_t colorKeyLow, uint32_t colorKeyHigh)
0645 {
0646     base->AS_CLRKEYLOW  = colorKeyLow;
0647     base->AS_CLRKEYHIGH = colorKeyHigh;
0648 }
0649 
0650 /*!
0651  * @brief Enable or disable the color key.
0652  *
0653  * @param base eLCDIF peripheral base address.
0654  * @param enable True to enable, false to disable.
0655  */
0656 static inline void ELCDIF_EnableOverlayColorKey(LCDIF_Type *base, bool enable)
0657 {
0658     if (enable)
0659     {
0660         base->AS_CTRL |= LCDIF_AS_CTRL_ENABLE_COLORKEY_MASK;
0661     }
0662     else
0663     {
0664         base->AS_CTRL &= ~LCDIF_AS_CTRL_ENABLE_COLORKEY_MASK;
0665     }
0666 }
0667 
0668 /*!
0669  * @brief Enable or disable the alpha surface.
0670  *
0671  * @param base eLCDIF peripheral base address.
0672  * @param enable True to enable, false to disable.
0673  */
0674 static inline void ELCDIF_EnableAlphaSurface(LCDIF_Type *base, bool enable)
0675 {
0676     if (enable)
0677     {
0678         base->AS_CTRL |= LCDIF_AS_CTRL_AS_ENABLE_MASK;
0679     }
0680     else
0681     {
0682         base->AS_CTRL &= ~LCDIF_AS_CTRL_AS_ENABLE_MASK;
0683     }
0684 }
0685 
0686 /*!
0687  * @brief Enable or disable the process surface.
0688  *
0689  * Process surface is the normal frame buffer. The process surface content
0690  * is controlled by ::ELCDIF_SetNextBufferAddr.
0691  *
0692  * @param base eLCDIF peripheral base address.
0693  * @param enable True to enable, false to disable.
0694  */
0695 static inline void ELCDIF_EnableProcessSurface(LCDIF_Type *base, bool enable)
0696 {
0697     if (enable)
0698     {
0699         base->AS_CTRL &= ~LCDIF_AS_CTRL_PS_DISABLE_MASK;
0700     }
0701     else
0702     {
0703         base->AS_CTRL |= LCDIF_AS_CTRL_PS_DISABLE_MASK;
0704     }
0705 }
0706 
0707 /* @} */
0708 #endif /* FSL_FEATURE_LCDIF_HAS_NO_AS */
0709 
0710 #if (defined(FSL_FEATURE_LCDIF_HAS_LUT) && (0 != FSL_FEATURE_LCDIF_HAS_LUT))
0711 /*!
0712  * @name LUT
0713  *
0714  * The Lookup Table (LUT) is used to expand the 8 bits pixel to 24 bits pixel
0715  * before output to external displayer.
0716  *
0717  * There are two 256x24 bits LUT memory in LCDIF, the LSB of frame buffer address
0718  * determins which memory to use.
0719  *
0720  * @{
0721  */
0722 
0723 /*!
0724  * @brief Enable or disable the LUT.
0725  *
0726  * @param base eLCDIF peripheral base address.
0727  * @param enable True to enable, false to disable.
0728  */
0729 static inline void ELCDIF_EnableLut(LCDIF_Type *base, bool enable)
0730 {
0731     if (enable)
0732     {
0733         base->LUT_CTRL &= ~LCDIF_LUT_CTRL_LUT_BYPASS_MASK;
0734     }
0735     else
0736     {
0737         base->LUT_CTRL |= LCDIF_LUT_CTRL_LUT_BYPASS_MASK;
0738     }
0739 }
0740 
0741 /*!
0742  * @brief Load the LUT value.
0743  *
0744  * This function loads the LUT value to the specific LUT memory, user can
0745  * specify the start entry index.
0746  *
0747  * @param base eLCDIF peripheral base address.
0748  * @param lut Which LUT to load.
0749  * @param startIndex The start index of the LUT entry to update.
0750  * @param lutData The LUT data to load.
0751  * @param count Count of @p lutData.
0752  * @retval kStatus_Success Initialization success.
0753  * @retval kStatus_InvalidArgument Wrong argument.
0754  */
0755 status_t ELCDIF_UpdateLut(
0756     LCDIF_Type *base, elcdif_lut_t lut, uint16_t startIndex, const uint32_t *lutData, uint16_t count);
0757 
0758 /* @} */
0759 #endif /* FSL_FEATURE_LCDIF_HAS_LUT */
0760 
0761 #if defined(__cplusplus)
0762 }
0763 #endif /* __cplusplus */
0764 
0765 /* @} */
0766 
0767 #endif /*_FSL_ELCDIF_H_*/