drivers/cdog/fsl_cdog.c

0001 /*
0002  * Copyright 2020 NXP
0003  * All rights reserved.
0004  *
0005  * SPDX-License-Identifier: BSD-3-Clause
0006  */
0007
0008 #include "fsl_cdog.h"
0009
0010 /*******************************************************************************
0011  * Definitions
0012  *******************************************************************************/
0013
0014 /* Component ID definition, used by tools. */
0015 #ifndef FSL_COMPONENT_ID
0016 #define FSL_COMPONENT_ID "platform.drivers.cdog"
0017 #endif
0018
0019 /*******************************************************************************
0020  * Prototypes
0021  ******************************************************************************/
0022
0023 /*******************************************************************************
0024  * Code
0025  ******************************************************************************/
0026
0027 /*!
0028  * brief Sets the default configuration of CDOG
0029  *
0030  * This function initialize CDOG config structure to default values.
0031  *
0032  * param conf CDOG configuration structure
0033  */
0034 void CDOG_GetDefaultConfig(cdog_config_t *conf)
0035 {
0036     /* Default configuration after reset */
0037     conf->lock       = (uint8_t)kCDOG_LockCtrl_Unlock;    /* Lock control */
0038     conf->timeout    = (uint8_t)kCDOG_FaultCtrl_NoAction; /* Timeout control */
0039     conf->miscompare = (uint8_t)kCDOG_FaultCtrl_NoAction; /* Miscompare control */
0040     conf->sequence   = (uint8_t)kCDOG_FaultCtrl_NoAction; /* Sequence control */
0041     conf->state      = (uint8_t)kCDOG_FaultCtrl_NoAction; /* State control */
0042     conf->address    = (uint8_t)kCDOG_FaultCtrl_NoAction; /* Address control */
0043     conf->irq_pause  = (uint8_t)kCDOG_IrqPauseCtrl_Run;   /* IRQ pause control */
0044     conf->debug_halt = (uint8_t)kCDOG_DebugHaltCtrl_Run;  /* Debug halt control */
0045     return;
0046 }
0047
0048 /*!
0049  * brief Sets secure counter and instruction timer values
0050  *
0051  * This function sets value in RELOAD and START registers for instruction timer.
0052  *
0053  * param base CDOG peripheral base address
0054  * param reload reload value
0055  * param start start value
0056  */
0057 void CDOG_Start(CDOG_Type *base, uint32_t reload, uint32_t start)
0058 {
0059     base->RELOAD = reload;
0060     base->START  = start;
0061 }
0062
0063 /*!
0064  * brief Stops secure counter and instruction timer
0065  *
0066  * This function stops instruction timer and secure counter.
0067  * This also change state of CDOG to IDLE.
0068  *
0069  * param base CDOG peripheral base address
0070  * param stop expected value which will be compared with value of secure counter
0071  */
0072 void CDOG_Stop(CDOG_Type *base, uint32_t stop)
0073 {
0074     base->STOP = stop;
0075 }
0076
0077 /*!
0078  * brief Sets secure counter and instruction timer values
0079  *
0080  * This function sets value in STOP, RELOAD and START registers
0081  * for instruction timer and secure counter.
0082  *
0083  * param base CDOG peripheral base address
0084  * param stop expected value which will be compared with value of secure counter
0085  * param reload reload value for instruction timer
0086  * param start start value for secure timer
0087  */
0088 void CDOG_Set(CDOG_Type *base, uint32_t stop, uint32_t reload, uint32_t start)
0089 {
0090     base->STOP   = stop;
0091     base->RELOAD = reload;
0092     base->START  = start;
0093 }
0094
0095 /*!
0096  * brief Add value to secure counter
0097  *
0098  * This function add specified value to secure counter.
0099  *
0100  * param base CDOG peripheral base address.
0101  * param add Value to be added.
0102  */
0103 void CDOG_Add(CDOG_Type *base, uint32_t add)
0104 {
0105     base->ADD = (secure_counter_t)add;
0106 }
0107
0108 /*!
0109  * brief Add 1 to secure counter
0110  *
0111  * This function add 1 to secure counter.
0112  *
0113  * param base CDOG peripheral base address.
0114  * param add Value to be added.
0115  */
0116 void CDOG_Add1(CDOG_Type *base)
0117 {
0118     base->ADD1 = (secure_counter_t)0x1U;
0119 }
0120
0121 /*!
0122  * brief Add 16 to secure counter
0123  *
0124  * This function add 16 to secure counter.
0125  *
0126  * param base CDOG peripheral base address.
0127  * param add Value to be added.
0128  */
0129 void CDOG_Add16(CDOG_Type *base)
0130 {
0131     base->ADD16 = (secure_counter_t)0x1U;
0132 }
0133
0134 /*!
0135  * brief Add 256 to secure counter
0136  *
0137  * This function add 256 to secure counter.
0138  *
0139  * param base CDOG peripheral base address.
0140  * param add Value to be added.
0141  */
0142 void CDOG_Add256(CDOG_Type *base)
0143 {
0144     base->ADD256 = (secure_counter_t)0x1U;
0145 }
0146
0147 /*!
0148  * brief Substract value to secure counter
0149  *
0150  * This function substract specified value to secure counter.
0151  *
0152  * param base CDOG peripheral base address.
0153  * param sub Value to be substracted.
0154  */
0155 void CDOG_Sub(CDOG_Type *base, uint32_t sub)
0156 {
0157     base->SUB = (secure_counter_t)sub;
0158 }
0159
0160 /*!
0161  * brief Substract 1 from secure counter
0162  *
0163  * This function substract specified 1 from secure counter.
0164  *
0165  * param base CDOG peripheral base address.
0166  */
0167 void CDOG_Sub1(CDOG_Type *base)
0168 {
0169     base->SUB1 = (secure_counter_t)0x1U;
0170 }
0171
0172 /*!
0173  * brief Substract 16 from secure counter
0174  *
0175  * This function substract specified 16 from secure counter.
0176  *
0177  * param base CDOG peripheral base address.
0178  */
0179 void CDOG_Sub16(CDOG_Type *base)
0180 {
0181     base->SUB16 = (secure_counter_t)0x1U;
0182 }
0183
0184 /*!
0185  * brief Substract 256 from secure counter
0186  *
0187  * This function substract specified 256 from secure counter.
0188  *
0189  * param base CDOG peripheral base address.
0190  */
0191 void CDOG_Sub256(CDOG_Type *base)
0192 {
0193     base->SUB256 = (secure_counter_t)0x1U;
0194 }
0195
0196 /*!
0197  * brief Checks secure counter.
0198  *
0199  * This function compares stop value with secure counter value
0200  * by writting to RELOAD refister.
0201  *
0202  * param base CDOG peripheral base address
0203  * param check expected (stop) value.
0204  */
0205 void CDOG_Check(CDOG_Type *base, uint32_t check)
0206 {
0207     base->RESTART = check;
0208 }
0209
0210 /*!
0211  * brief Set the CDOG persistent word.
0212  *
0213  * param base CDOG peripheral base address.
0214  * param value The value to be written.
0215  */
0216 void CDOG_WritePersistent(CDOG_Type *base, uint32_t value)
0217 {
0218     base->PERSISTENT = value;
0219 }
0220
0221 /*!
0222  * brief Get the CDOG persistent word.
0223  *
0224  * param base CDOG peripheral base address.
0225  * return The persistent word.
0226  */
0227 uint32_t CDOG_ReadPersistent(CDOG_Type *base)
0228 {
0229     return base->PERSISTENT;
0230 }
0231
0232 /*!
0233  * brief Initialize CDOG
0234  *
0235  * This function initializes CDOG block and setting.
0236  *
0237  * param base CDOG peripheral base address
0238  * param conf CDOG configuration structure
0239  * return Status of the init operation
0240  */
0241 status_t CDOG_Init(CDOG_Type *base, cdog_config_t *conf)
0242 {
0243     /* Ungate clock to CDOG engine and reset it */
0244 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
0245 #ifdef CDOG_CLOCKS
0246     CLOCK_EnableClock(kCLOCK_Cdog);
0247 #endif /* CDOG_CLOCKS */
0248 #endif /* !FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
0249
0250 #if !(defined(FSL_FEATURE_CDOG_HAS_NO_RESET) && FSL_FEATURE_CDOG_HAS_NO_RESET)
0251     RESET_PeripheralReset(kCDOG_RST_SHIFT_RSTn);
0252 #endif /* !FSL_FEATURE_CDOG_HAS_NO_RESET */
0253
0254     if (base->CONTROL == 0x0U)
0255     {
0256         /* CDOG is not in IDLE mode, which may be cause after SW reset. */
0257         /* Writing to CONTROL register will trigger fault. */
0258         return kStatus_Fail;
0259     }
0260
0261     /* Clear pending errors, otherwise the device will reset */
0262     /* itself immediately after enable Code Watchdog */
0263     if ((uint32_t)kCDOG_LockCtrl_Lock ==
0264         ((base->CONTROL & CDOG_CONTROL_LOCK_CTRL_MASK) >> CDOG_CONTROL_LOCK_CTRL_SHIFT))
0265
0266     {
0267         CDOG->FLAGS = CDOG_FLAGS_TO_FLAG(1U) | CDOG_FLAGS_MISCOM_FLAG(1U) | CDOG_FLAGS_SEQ_FLAG(1U) |
0268                       CDOG_FLAGS_CNT_FLAG(1U) | CDOG_FLAGS_STATE_FLAG(1U) | CDOG_FLAGS_ADDR_FLAG(1U) |
0269                       CDOG_FLAGS_POR_FLAG(1U);
0270     }
0271     else
0272     {
0273         CDOG->FLAGS = CDOG_FLAGS_TO_FLAG(0U) | CDOG_FLAGS_MISCOM_FLAG(0U) | CDOG_FLAGS_SEQ_FLAG(0U) |
0274                       CDOG_FLAGS_CNT_FLAG(0U) | CDOG_FLAGS_STATE_FLAG(0U) | CDOG_FLAGS_ADDR_FLAG(0U) |
0275                       CDOG_FLAGS_POR_FLAG(0U);
0276     }
0277
0278     base->CONTROL =
0279         CDOG_CONTROL_TIMEOUT_CTRL(conf->timeout) |       /* Action if the timeout event is triggered  */
0280         CDOG_CONTROL_MISCOMPARE_CTRL(conf->miscompare) | /* Action if the miscompare error event is triggered  */
0281         CDOG_CONTROL_SEQUENCE_CTRL(conf->sequence) |     /* Action if the sequence error event is triggered  */
0282         CDOG_CONTROL_STATE_CTRL(conf->state) |           /* Action if the state error event is triggered  */
0283         CDOG_CONTROL_ADDRESS_CTRL(conf->address) |       /* Action if the address error event is triggered */
0284         CDOG_CONTROL_IRQ_PAUSE(conf->irq_pause) |        /* Pause running during interrupts setup */
0285         CDOG_CONTROL_DEBUG_HALT_CTRL(
0286             conf->debug_halt) |             /* Halt CDOG timer during debug so we have chance to debug code */
0287         CDOG_CONTROL_LOCK_CTRL(conf->lock); /* Lock control register */
0288
0289     NVIC_EnableIRQ(CDOG_IRQn);
0290
0291     return kStatus_Success;
0292 }
0293
0294 /*!
0295  * brief Deinitialize CDOG
0296  *
0297  * This function stops CDOG secure counter.
0298  *
0299  * param base CDOG peripheral base address
0300  */
0301 void CDOG_Deinit(CDOG_Type *base)
0302 {
0303     NVIC_DisableIRQ(CDOG_IRQn);
0304
0305 #if !(defined(FSL_FEATURE_CDOG_HAS_NO_RESET) && FSL_FEATURE_CDOG_HAS_NO_RESET)
0306     RESET_SetPeripheralReset(kCDOG_RST_SHIFT_RSTn);
0307 #endif /* !FSL_FEATURE_CDOG_HAS_NO_RESET */
0308
0309 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
0310 #ifdef CDOG_CLOCKS
0311     CLOCK_DisableClock(kCLOCK_Cdog);
0312 #endif /* CDOG_CLOCKS */
0313 #endif /* !FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
0314 }