drivers/asrc/fsl_asrc.h

0001 /*
0002  * Copyright 2019-2021 NXP
0003  * All rights reserved.
0004  *
0005  * SPDX-License-Identifier: BSD-3-Clause
0006  */
0007
0008 #ifndef _FSL_ASRC_H_
0009 #define _FSL_ASRC_H_
0010
0011 #include "fsl_common.h"
0012
0013 /*!
0014  * @addtogroup asrc_driver
0015  * @{
0016  */
0017
0018 /*******************************************************************************
0019  * Definitions
0020  ******************************************************************************/
0021
0022 /*! @name Driver version */
0023 /*@{*/
0024 #define FSL_ASRC_DRIVER_VERSION (MAKE_VERSION(2, 1, 2)) /*!< Version 2.1.2 */
0025 /*@}*/
0026
0027 #ifndef ASRC_XFER_QUEUE_SIZE
0028 /*!@brief ASRC transfer queue size, user can refine it according to use case. */
0029 #define ASRC_XFER_QUEUE_SIZE (4U)
0030 #endif
0031 /*!@brief ASRC channel pair count */
0032 #define FSL_ASRC_CHANNEL_PAIR_COUNT (4U)
0033 /*! @brief ASRC FIFO depth */
0034 #define FSL_ASRC_CHANNEL_PAIR_FIFO_DEPTH (64U)
0035
0036 /*! @brief ASRC register access macro */
0037 #define ASRC_ASRCTR_AT_MASK(index)    ((uint32_t)1U << (ASRC_ASRCTR_ATSA_SHIFT + (uint32_t)(index)))
0038 #define ASRC_ASRCTR_RATIO_MASK(index) ((uint32_t)3U << (ASRC_ASRCTR_IDRA_SHIFT + (uint32_t)(index)*2U))
0039 #define ASRC_ASRCTR_RATIO(ratio, index) \
0040     (((uint32_t)((uint32_t)(ratio) << (ASRC_ASRCTR_IDRA_SHIFT + (uint32_t)(index)*2U))) & ASRC_ASRCTR_RATIO_MASK(index))
0041 #define ASRC_ASRIER_INPUT_INTERRUPT_MASK(index)     ((uint32_t)1U << (ASRC_ASRIER_ADIEA_SHIFT + (uint32_t)(index)))
0042 #define ASRC_ASRIER_OUTPUTPUT_INTERRUPT_MASK(index) ((uint32_t)1U << (ASRC_ASRIER_ADOEA_SHIFT + (uint32_t)(index)))
0043 #define ASRC_ASRCNCR_CHANNEL_COUNTER_MASK(index)    ((uint32_t)0xFU << (ASRC_ASRCNCR_ANCA_SHIFT + (uint32_t)(index)*4U))
0044 #define ASRC_ASRCNCR_CHANNEL_COUNTER(counter, index)                                       \
0045     ((uint32_t)((uint32_t)(counter) << (ASRC_ASRCNCR_ANCA_SHIFT + (uint32_t)(index)*4U)) & \
0046      ASRC_ASRCNCR_CHANNEL_COUNTER_MASK(index))
0047 #define ASRC_ASRCFG_PRE_MODE_MASK(index) ((uint32_t)3U << (ASRC_ASRCFG_PREMODA_SHIFT + (uint32_t)(index)*4U))
0048 #define ASRC_ASRCFG_PRE_MODE(mode, index)                                                 \
0049     ((uint32_t)((uint32_t)(mode) << (ASRC_ASRCFG_PREMODA_SHIFT + (uint32_t)(index)*4U)) & \
0050      ASRC_ASRCFG_PRE_MODE_MASK(index))
0051 #define ASRC_ASRCFG_POST_MODE_MASK(index) ((uint32_t)3U << (ASRC_ASRCFG_POSTMODA_SHIFT + (uint32_t)(index)*4U))
0052 #define ASRC_ASRCFG_POST_MODE(mode, index)                                                 \
0053     ((uint32_t)((uint32_t)(mode) << (ASRC_ASRCFG_POSTMODA_SHIFT + (uint32_t)(index)*4U)) & \
0054      ASRC_ASRCFG_POST_MODE_MASK(index))
0055 #define ASRC_ASRCFG_INIT_DONE_MASK(index)          ((uint32_t)1U << (ASRC_ASRCFG_INIRQA_SHIFT + (uint32_t)(index)))
0056 #define ASRC_ASRCSR_INPUT_CLOCK_SOURCE_MASK(index) ((uint32_t)0xFU << (ASRC_ASRCSR_AICSA_SHIFT + (uint32_t)(index)*4U))
0057 #define ASRC_ASRCSR_INPUT_CLOCK_SOURCE(source, index)                                     \
0058     ((uint32_t)((uint32_t)(source) << (ASRC_ASRCSR_AICSA_SHIFT + (uint32_t)(index)*4U)) & \
0059      ASRC_ASRCSR_INPUT_CLOCK_SOURCE_MASK(index))
0060 #define ASRC_ASRCSR_OUTPUT_CLOCK_SOURCE_MASK(index) ((uint32_t)0xFU << (ASRC_ASRCSR_AOCSA_SHIFT + (uint32_t)(index)*4U))
0061 #define ASRC_ASRCSR_OUTPUT_CLOCK_SOURCE(source, index)                                    \
0062     ((uint32_t)((uint32_t)(source) << (ASRC_ASRCSR_AOCSA_SHIFT + (uint32_t)(index)*4U)) & \
0063      ASRC_ASRCSR_OUTPUT_CLOCK_SOURCE_MASK(index))
0064
0065 #define ASRC_ASRCDR_INPUT_PRESCALER_MASK(index) \
0066     ((uint32_t)(index) < 2U ? ((uint32_t)7U << (ASRC_ASRCDR1_AICPA_SHIFT + (uint32_t)(index)*6U)) : 7U)
0067 #define ASRC_ASRCDR_INPUT_PRESCALER(prescaler, index)                                                              \
0068     (((index) < 2U ? ((uint32_t)(prescaler) << (ASRC_ASRCDR1_AICPA_SHIFT + (uint32_t)(index)*6U)) : (prescaler)) & \
0069      ASRC_ASRCDR1_INPUT_PRESCALER_MASK(index))
0070 #define ASRC_ASRCDR_INPUT_DIVIDER_MASK(index)                                                       \
0071     ((uint32_t)(index) < 2U ? ((uint32_t)7U << (ASRC_ASRCDR1_AICDA_SHIFT + (uint32_t)(index)*6U)) : \
0072                               (7U << ASRC_ASRCDR1_AICDA_SHIFT))
0073 #define ASRC_ASRCDR_INPUT_DIVIDER(divider, index)                                                           \
0074     (((uint32_t)(index) < 2U ? ((uint32_t)(divider) << (ASRC_ASRCDR1_AICDA_SHIFT + (uint32_t)(index)*6U)) : \
0075                                ((uint32_t)(divider) << ASRC_ASRCDR1_AICDA_SHIFT)) &                         \
0076      ASRC_ASRCDR_INPUT_DIVIDER_MASK(index))
0077 #define ASRC_ASRCDR_OUTPUT_PRESCALER_MASK(index) \
0078     ((uint32_t)(index) < 2U ? ((uint32_t)7U << (ASRC_ASRCDR1_AOCPA_SHIFT + (uint32_t)(index)*6U)) : (7U << 6U))
0079 #define ASRC_ASRCDR_OUTPUT_PRESCALER(prescaler, index)                                                        \
0080     (((uint32_t)(index) < 2U ? ((uint32_t)(prescaler) << (ASRC_ASRCDR1_AOCPA_SHIFT + (uint32_t)(index)*6U)) : \
0081                                ((uint32_t)(prescaler) << 6U)) &                                               \
0082      ASRC_ASRCDR_OUTPUT_PRESCALER_MASK(index))
0083 #define ASRC_ASRCDR_OUTPUT_DIVIDER_MASK(index) \
0084     ((uint32_t)(index) < 2U ? ((uint32_t)7U << (ASRC_ASRCDR1_AOCDA_SHIFT + (uint32_t)(index)*6U)) : (7UL << 9U))
0085 #define ASRC_ASRCDR_OUTPUT_DIVIDER(divider, index)                                                          \
0086     (((uint32_t)(index) < 2U ? ((uint32_t)(divider) << (ASRC_ASRCDR1_AOCDA_SHIFT + (uint32_t)(index)*6U)) : \
0087                                ((uint32_t)(divider) << 9U)) &                                               \
0088      ASRC_ASRCDR_OUTPUT_DIVIDER_MASK(index))
0089
0090 #define ASCR_ASRCDR_OUTPUT_CLOCK_DIVIDER_PRESCALER(value, index)                                          \
0091     (((uint32_t)(index) < 2U ? ((uint32_t)(value) << (ASRC_ASRCDR1_AOCPA_SHIFT + (uint32_t)(index)*6U)) : \
0092                                ((uint32_t)(value) << 6U)))
0093 #define ASCR_ASRCDR_INPUT_CLOCK_DIVIDER_PRESCALER(value, index) \
0094     (((uint32_t)(index) < 2U ? ((uint32_t)(value) << ((uint32_t)(index)*6U)) : ((uint32_t)(value))))
0095
0096 #define ASRC_IDEAL_RATIO_HIGH(base, index)    *(volatile uint32_t *)((uint32_t)(&(base)->ASRIDRHA) + (uint32_t)(index)*8U)
0097 #define ASRC_IDEAL_RATIO_LOW(base, index)     *(volatile uint32_t *)((uint32_t)(&(base)->ASRIDRLA) + (uint32_t)(index)*8U)
0098 #define ASRC_ASRMCR(base, index)              *(volatile uint32_t *)((uint32_t)(&(base)->ASRMCRA) + (uint32_t)(index)*8U)
0099 #define ASRC_ASRMCR1(base, index)             *(volatile uint32_t *)((uint32_t)(&((base)->ASRMCR1[(index)])))
0100 #define ASRC_ASRDI(base, index)               *(volatile uint32_t *)((uint32_t)(&(base)->ASRDIA) + (uint32_t)(index)*8U)
0101 #define ASRC_ASRDO(base, index)               *(volatile uint32_t *)((uint32_t)(&(base)->ASRDOA) + (uint32_t)(index)*8U)
0102 #define ASRC_ASRDI_ADDR(base, index)          (volatile uint32_t *)((uint32_t)(&(base)->ASRDIA) + (uint32_t)(index)*8U)
0103 #define ASRC_ASRDO_ADDR(base, index)          (volatile uint32_t *)((uint32_t)(&(base)->ASRDOA) + (uint32_t)(index)*8U)
0104 #define ASRC_ASRFST_ADDR(base, index)         (*(volatile uint32_t *)((uint32_t)(&(base)->ASRFSTA) + (uint32_t)(index)*8U))
0105 #define ASRC_GET_CHANNEL_COUNTER(base, index) (((base)->ASRCNCR >> ((uint32_t)(index)*4U)) & 0xFU)
0106
0107 /*! @brief ASRC return status
0108  * @anchor _asrc_status_t
0109  */
0110 enum
0111 {
0112     kStatus_ASRCIdle                       = MAKE_STATUS(kStatusGroup_ASRC, 0),  /*!< ASRC is idle. */
0113     kStatus_ASRCInIdle                     = MAKE_STATUS(kStatusGroup_ASRC, 1),  /*!< ASRC in is idle. */
0114     kStatus_ASRCOutIdle                    = MAKE_STATUS(kStatusGroup_ASRC, 2),  /*!< ASRC out is idle. */
0115     kStatus_ASRCBusy                       = MAKE_STATUS(kStatusGroup_ASRC, 3),  /*!< ASRC  is busy. */
0116     kStatus_ASRCInvalidArgument            = MAKE_STATUS(kStatusGroup_ASRC, 4),  /*!< ASRC invalid argument. */
0117     kStatus_ASRCClockConfigureFailed       = MAKE_STATUS(kStatusGroup_ASRC, 5),  /*!< ASRC clock configure failed */
0118     kStatus_ASRCChannelPairConfigureFailed = MAKE_STATUS(kStatusGroup_ASRC, 6),  /*!< ASRC clock configure failed */
0119     kStatus_ASRCConvertError               = MAKE_STATUS(kStatusGroup_ASRC, 7),  /*!< ASRC clock configure failed */
0120     kStatus_ASRCNotSupport                 = MAKE_STATUS(kStatusGroup_ASRC, 8),  /*!< ASRC not support */
0121     kStatus_ASRCQueueFull                  = MAKE_STATUS(kStatusGroup_ASRC, 9),  /*!< ASRC queue is full */
0122     kStatus_ASRCOutQueueIdle               = MAKE_STATUS(kStatusGroup_ASRC, 10), /*!< ASRC out queue is idle */
0123     kStatus_ASRCInQueueIdle                = MAKE_STATUS(kStatusGroup_ASRC, 11), /*!< ASRC in queue is idle */
0124 };
0125
0126 /*! @brief ASRC channel pair mask */
0127 typedef enum _asrc_channel_pair
0128 {
0129     kASRC_ChannelPairA = 0, /*!< channel pair A value */
0130     kASRC_ChannelPairB = 1, /*!< channel pair B value */
0131     kASRC_ChannelPairC = 2, /*!< channel pair C value */
0132 } asrc_channel_pair_t;
0133
0134 /*! @brief ASRC support sample rate
0135  * @anchor _asrc_sample_rate
0136  */
0137 enum
0138 {
0139     kASRC_SampleRate_8000HZ   = 8000U,   /*!< asrc sample rate 8KHZ */
0140     kASRC_SampleRate_11025HZ  = 11025U,  /*!< asrc sample rate 11.025KHZ */
0141     kASRC_SampleRate_12000HZ  = 12000U,  /*!< asrc sample rate 12KHZ */
0142     kASRC_SampleRate_16000HZ  = 16000U,  /*!< asrc sample rate 16KHZ */
0143     kASRC_SampleRate_22050HZ  = 22050U,  /*!< asrc sample rate 22.05KHZ */
0144     kASRC_SampleRate_24000HZ  = 24000U,  /*!< asrc sample rate 24KHZ */
0145     kASRC_SampleRate_30000HZ  = 30000U,  /*!< asrc sample rate 30KHZ */
0146     kASRC_SampleRate_32000HZ  = 32000U,  /*!< asrc sample rate 32KHZ */
0147     kASRC_SampleRate_44100HZ  = 44100U,  /*!< asrc sample rate 44.1KHZ */
0148     kASRC_SampleRate_48000HZ  = 48000U,  /*!< asrc sample rate 48KHZ */
0149     kASRC_SampleRate_64000HZ  = 64000U,  /*!< asrc sample rate 64KHZ */
0150     kASRC_SampleRate_88200HZ  = 88200U,  /*!< asrc sample rate 88.2KHZ */
0151     kASRC_SampleRate_96000HZ  = 96000U,  /*!< asrc sample rate 96KHZ */
0152     kASRC_SampleRate_128000HZ = 128000U, /*!< asrc sample rate 128KHZ */
0153     kASRC_SampleRate_176400HZ = 176400U, /*!< asrc sample rate 176.4KHZ */
0154     kASRC_SampleRate_192000HZ = 192000U, /*!< asrc sample rate 192KHZ */
0155 };
0156
0157 /*! @brief The ASRC interrupt enable flag
0158  * @anchor _asrc_interrupt_mask
0159  */
0160 enum
0161 {
0162     kASRC_FPInWaitStateInterruptEnable = ASRC_ASRIER_AFPWE_MASK, /*!< FP in wait state mask */
0163     kASRC_OverLoadInterruptMask        = ASRC_ASRIER_AOLIE_MASK, /*!< overload interrupt mask */
0164     kASRC_DataOutputCInterruptMask     = ASRC_ASRIER_ADOEC_MASK, /*!< data output c interrupt mask */
0165     kASRC_DataOutputBInterruptMask     = ASRC_ASRIER_ADOEB_MASK, /*!< data output b interrupt mask */
0166     kASRC_DataOutputAInterruptMask     = ASRC_ASRIER_ADOEA_MASK, /*!< data output a interrupt mask */
0167     kASRC_DataInputCInterruptMask      = ASRC_ASRIER_ADIEC_MASK, /*!< data input c interrupt mask */
0168     kASRC_DataInputBInterruptMask      = ASRC_ASRIER_ADIEB_MASK, /*!< data input b interrupt mask */
0169     kASRC_DataInputAInterruptMask      = ASRC_ASRIER_ADIEA_MASK, /*!< data input a interrupt mask */
0170 };
0171
0172 /*! @brief The ASRC interrupt status
0173  * @anchor _asrc_interrupt_status
0174  */
0175 enum
0176 {
0177     kASRC_StatusDSLCounterReady     = ASRC_ASRSTR_DSLCNT_MASK, /*!< DSL counter   */
0178     kASRC_StatusTaskQueueOverLoad   = ASRC_ASRSTR_ATQOL_MASK,  /*!< task queue overload */
0179     kASRC_StatusPairCOutputOverLoad = ASRC_ASRSTR_AOOLC_MASK,  /*!< pair c output overload  */
0180     kASRC_StatusPairBOutputOverLoad = ASRC_ASRSTR_AOOLB_MASK,  /*!< pair b output overload  */
0181     kASRC_StatusPairAOutputOverLoad = ASRC_ASRSTR_AOOLA_MASK,  /*!< pair a output overload */
0182     kASRC_StatusPairCInputOverLoad  = ASRC_ASRSTR_AIOLC_MASK,  /*!< pair c input overload */
0183     kASRC_StatusPairBInputOverLoad  = ASRC_ASRSTR_AIOLB_MASK,  /*!<pair b input overload */
0184     kASRC_StatusPairAInputOverLoad  = ASRC_ASRSTR_AIOLA_MASK,  /*!< pair a input overload */
0185     kASRC_StatusPairCOutputOverflow = ASRC_ASRSTR_AODOC_MASK,  /*!< pair c output overflow */
0186     kASRC_StatusPairBOutputOverflow = ASRC_ASRSTR_AODOB_MASK,  /*!< pair b output overflow */
0187     kASRC_StatusPairAOutputOverflow = ASRC_ASRSTR_AODOA_MASK,  /*!< pair a output overflow */
0188     kASRC_StatusPairCInputUnderflow = ASRC_ASRSTR_AIDUC_MASK,  /*!< pair c input underflow*/
0189     kASRC_StatusPairBInputUnderflow = ASRC_ASRSTR_AIDUB_MASK,  /*!< pair b input under flow */
0190     kASRC_StatusPairAInputUnderflow = ASRC_ASRSTR_AIDUA_MASK,  /*!< pair a input underflow*/
0191     kASRC_StatusFPInWaitState       = ASRC_ASRSTR_FPWT_MASK,   /*!< FP in wait state */
0192     kASRC_StatusOverloadError       = ASRC_ASRSTR_AOLE_MASK,   /*!< overload error */
0193
0194     kASRC_StatusInputError = kASRC_StatusPairCInputOverLoad | kASRC_StatusPairBInputOverLoad |
0195                              kASRC_StatusPairAInputOverLoad | kASRC_StatusPairCInputUnderflow |
0196                              kASRC_StatusPairBInputUnderflow |
0197                              kASRC_StatusPairAInputUnderflow, /*!< input error status */
0198
0199     kASRC_StatusOutputError = kASRC_StatusPairCOutputOverLoad | kASRC_StatusPairBOutputOverLoad |
0200                               kASRC_StatusPairAOutputOverLoad | kASRC_StatusPairCOutputOverflow |
0201                               kASRC_StatusPairBOutputOverflow |
0202                               kASRC_StatusPairAOutputOverflow, /*!< output error status */
0203
0204     kASRC_StatusPairCOutputReady = ASRC_ASRSTR_AODFC_MASK, /*!< pair c output ready */
0205     kASRC_StatusPairBOutputReady = ASRC_ASRSTR_AODFB_MASK, /*!< pair b output ready */
0206     kASRC_StatusPairAOutputReady = ASRC_ASRSTR_AODFA_MASK, /*!< pair a output ready */
0207     kASRC_StatusPairCInputReady  = ASRC_ASRSTR_AIDEC_MASK, /*!< pair c input ready */
0208     kASRC_StatusPairBInputReady  = ASRC_ASRSTR_AIDEB_MASK, /*!< pair b input ready */
0209     kASRC_StatusPairAInputReady  = ASRC_ASRSTR_AIDEA_MASK, /*!< pair a input ready */
0210     kASRC_StatusPairAInterrupt   = kASRC_StatusPairAInputReady | kASRC_StatusPairAOutputReady, /*!< pair A interrupt */
0211     kASRC_StatusPairBInterrupt   = kASRC_StatusPairBInputReady | kASRC_StatusPairBOutputReady, /*!< pair B interrupt */
0212     kASRC_StatusPairCInterrupt   = kASRC_StatusPairCInputReady | kASRC_StatusPairCOutputReady, /*!< pair C interrupt */
0213
0214 };
0215
0216 /*! @brief ASRC channel pair status
0217  * @anchor _asrc_channel_pair_status
0218  */
0219 enum
0220 {
0221     kASRC_OutputFifoNearFull = ASRC_ASRFSTA_OAFA_MASK, /*!< channel pair output fifo near full */
0222     kASRC_InputFifoNearEmpty = ASRC_ASRFSTA_IAEA_MASK, /*!< channel pair input fifo near empty */
0223 };
0224
0225 /*! @brief ASRC ideal ratio */
0226 typedef enum _asrc_ratio
0227 {
0228     kASRC_RatioNotUsed = 0U, /*!< ideal ratio not used */
0229     kASRC_RatioUseInternalMeasured =
0230         2U, /*!< ideal ratio use internal measure ratio, can be used for real time streaming audio */
0231     kASRC_RatioUseIdealRatio =
0232         3U, /*!< ideal ratio use manual configure ratio, can be used for the non-real time streaming audio */
0233 } asrc_ratio_t;
0234
0235 /*! @brief Number of channels in audio data */
0236 typedef enum _asrc_audio_channel
0237 {
0238     kASRC_ChannelsNumber1  = 1U,  /*!< channel number is 1 */
0239     kASRC_ChannelsNumber2  = 2U,  /*!< channel number is 2 */
0240     kASRC_ChannelsNumber3  = 3U,  /*!< channel number is 3 */
0241     kASRC_ChannelsNumber4  = 4U,  /*!< channel number is 4 */
0242     kASRC_ChannelsNumber5  = 5U,  /*!< channel number is 5 */
0243     kASRC_ChannelsNumber6  = 6U,  /*!< channel number is 6 */
0244     kASRC_ChannelsNumber7  = 7U,  /*!< channel number is 7 */
0245     kASRC_ChannelsNumber8  = 8U,  /*!< channel number is 8 */
0246     kASRC_ChannelsNumber9  = 9U,  /*!< channel number is 9 */
0247     kASRC_ChannelsNumber10 = 10U, /*!< channel number is 10 */
0248 } asrc_audio_channel_t;
0249
0250 /*! @brief data width */
0251 typedef enum _asrc_data_width
0252 {
0253     kASRC_DataWidth24Bit = 0U, /*!< data width 24bit */
0254     kASRC_DataWidth16Bit = 1U, /*!< data width 16bit */
0255     kASRC_DataWidth8Bit  = 2U, /*!< data width 8bit */
0256 } asrc_data_width_t;
0257
0258 /*! @brief data alignment */
0259 typedef enum _asrc_data_align
0260 {
0261     kASRC_DataAlignMSB = 1U, /*!< data alignment MSB */
0262     kASRC_DataAlignLSB = 0U, /*!< data alignment LSB */
0263 } asrc_data_align_t;
0264
0265 /*! @brief sign extension */
0266 typedef enum _asrc_sign_extension
0267 {
0268     kASRC_NoSignExtension = 0U, /*!< no sign extension */
0269     kASRC_SignExtension   = 1U, /*!< sign extension */
0270 } asrc_sign_extension_t;
0271
0272 /*! @brief asrc channel pair configuation */
0273 typedef struct _asrc_channel_pair_config
0274 {
0275     asrc_audio_channel_t audioDataChannels; /*!< audio data channel numbers */
0276     asrc_clock_source_t
0277         inClockSource;         /*!< input clock source, reference the clock source definition in SOC header file */
0278     uint32_t inSourceClock_Hz; /*!< input source clock frequency */
0279
0280     asrc_clock_source_t
0281         outClockSource;         /*!< output clock source, reference the clock source definition in SOC header file */
0282     uint32_t outSourceClock_Hz; /*!< output source clock frequency */
0283
0284     asrc_ratio_t sampleRateRatio; /*!< sample rate ratio type */
0285
0286     asrc_data_width_t inDataWidth; /*!< input data width */
0287     asrc_data_align_t inDataAlign; /*!< input data alignment */
0288
0289     asrc_data_width_t outDataWidth;         /*!< output data width */
0290     asrc_data_align_t outDataAlign;         /*!< output data alignment */
0291     asrc_sign_extension_t outSignExtension; /*!< output extension */
0292
0293     uint8_t outFifoThreshold; /*!< output fifo threshold */
0294     uint8_t inFifoThreshold;  /*!< input fifo threshold */
0295
0296     bool bufStallWhenFifoEmptyFull; /*!< stall Pair A conversion in case of Buffer near empty full condition */
0297
0298 } asrc_channel_pair_config_t;
0299
0300 /*! @brief SAI transfer structure */
0301 typedef struct _asrc_transfer
0302 {
0303     void *inData;       /*!< Data address to convert.*/
0304     size_t inDataSize;  /*!< input data size. */
0305     void *outData;      /*!< Data address to store converted data */
0306     size_t outDataSize; /*!< output data size. */
0307 } asrc_transfer_t;
0308
0309 /*! @brief asrc handler */
0310 typedef struct _asrc_handle asrc_handle_t;
0311
0312 /*! @brief ASRC transfer callback prototype */
0313 typedef void (*asrc_transfer_callback_t)(ASRC_Type *base, asrc_handle_t *handle, status_t status, void *userData);
0314
0315 /*! @brief asrc in handler */
0316 typedef struct _asrc_in_handle
0317 {
0318     asrc_transfer_callback_t callback;            /*!< Callback function called at convert complete */
0319     uint32_t sampleWidth;                         /*!< data width */
0320     uint32_t sampleMask;                          /*!< data mask */
0321     uint32_t fifoThreshold;                       /*!< fifo threshold */
0322     uint8_t *asrcQueue[ASRC_XFER_QUEUE_SIZE];     /*!< Transfer queue storing queued transfer */
0323     size_t transferSamples[ASRC_XFER_QUEUE_SIZE]; /*!< Data bytes need to convert */
0324     volatile uint8_t queueUser;                   /*!< Index for user to queue transfer */
0325     volatile uint8_t queueDriver;                 /*!< Index for driver to get the transfer data and size */
0326 } asrc_in_handle_t;
0327
0328 /*! @brief output handler */
0329 typedef struct _asrc_out_handle
0330 {
0331     asrc_transfer_callback_t callback;            /*!< Callback function called at convert complete */
0332     uint32_t sampleWidth;                         /*!< data width */
0333     uint32_t fifoThreshold;                       /*!< fifo threshold */
0334     uint8_t *asrcQueue[ASRC_XFER_QUEUE_SIZE];     /*!< Transfer queue storing queued transfer */
0335     size_t transferSamples[ASRC_XFER_QUEUE_SIZE]; /*!< Data bytes need to convert */
0336     volatile uint8_t queueUser;                   /*!< Index for user to queue transfer */
0337     volatile uint8_t queueDriver;                 /*!< Index for driver to get the transfer data and size */
0338 } asrc_out_handle_t;
0339
0340 /*! @brief ASRC handle structure */
0341 struct _asrc_handle
0342 {
0343     ASRC_Type *base; /*!< base address */
0344
0345     uint32_t state; /*!< Transfer status */
0346     void *userData; /*!< Callback parameter passed to callback function*/
0347
0348     asrc_audio_channel_t audioDataChannels; /*!< audio channel number */
0349     asrc_channel_pair_t channelPair;        /*!< channel pair mask */
0350
0351     asrc_in_handle_t in;   /*!< asrc input handler */
0352     asrc_out_handle_t out; /*!< asrc output handler */
0353 };
0354 /*******************************************************************************
0355  * API
0356  ******************************************************************************/
0357
0358 #if defined(__cplusplus)
0359 extern "C" {
0360 #endif /*_cplusplus*/
0361
0362 /*!
0363  * @name Initialization and deinitialization
0364  * @{
0365  */
0366
0367 /*!
0368  * @brief Get instance number of the ASRC peripheral.
0369  *
0370  * @param base ASRC base pointer.
0371  */
0372 uint32_t ASRC_GetInstance(ASRC_Type *base);
0373
0374 /*!
0375  * brief Initializes the asrc peripheral.
0376  *
0377  * This API gates the asrc clock. The asrc module can't operate unless ASRC_Init is called to enable the clock.
0378  *
0379  * param base asrc base pointer.
0380  * param asrcPeripheralClock_Hz peripheral clock of ASRC.
0381  */
0382 void ASRC_Init(ASRC_Type *base, uint32_t asrcPeripheralClock_Hz);
0383
0384 /*!
0385  * @brief De-initializes the ASRC peripheral.
0386  *
0387  * This API gates the ASRC clock and disable ASRC module. The ASRC module can't operate unless ASRC_Init
0388  *
0389  * @param base ASRC base pointer.
0390  */
0391 void ASRC_Deinit(ASRC_Type *base);
0392
0393 /*!
0394  * @brief Do software reset .
0395  *
0396  * This software reset bit is self-clear bit, it will generate a software reset signal inside ASRC.
0397  * After 9 cycles of the ASRC processing clock, this reset process will stop and this bit will cleared
0398  * automatically.
0399  *
0400  * @param base ASRC base pointer
0401  */
0402 void ASRC_SoftwareReset(ASRC_Type *base);
0403
0404 /*!
0405  * @brief ASRC configure channel pair.
0406  *
0407  * @param base ASRC base pointer.
0408  * @param channelPair index of channel pair, reference _asrc_channel_pair.
0409  * @param config ASRC channel pair configuration pointer.
0410  * @param inputSampleRate input audio data sample rate.
0411  * @param outputSampleRate output audio data sample rate.
0412  */
0413 status_t ASRC_SetChannelPairConfig(ASRC_Type *base,
0414                                    asrc_channel_pair_t channelPair,
0415                                    asrc_channel_pair_config_t *config,
0416                                    uint32_t inputSampleRate,
0417                                    uint32_t outputSampleRate);
0418
0419 /*!
0420  * @brief Get output sample buffer size.
0421  *
0422  * @note This API is depends on the ASRC output configuration, should be called after the ASRC_SetChannelPairConfig.
0423  *
0424  * @param base asrc base pointer.
0425  * @param channelPair ASRC channel pair number.
0426  * @param inSampleRate input sample rate.
0427  * @param outSampleRate output sample rate.
0428  * @param inSamplesize input sampleS size.
0429  * @retval output buffer size in byte.
0430  */
0431 uint32_t ASRC_GetOutSamplesSize(ASRC_Type *base,
0432                                 asrc_channel_pair_t channelPair,
0433                                 uint32_t inSampleRate,
0434                                 uint32_t outSampleRate,
0435                                 uint32_t inSamplesize);
0436
0437 /*!
0438  * @brief Map register sample width to real sample width.
0439  *
0440  * @note This API is depends on the ASRC configuration, should be called after the ASRC_SetChannelPairConfig.
0441  * @param base asrc base pointer.
0442  * @param channelPair asrc channel pair index.
0443  * @param inWidth ASRC channel pair number.
0444  * @param outWidth input sample rate.
0445  * @retval input sample mask value.
0446  */
0447 uint32_t ASRC_MapSamplesWidth(ASRC_Type *base, asrc_channel_pair_t channelPair, uint32_t *inWidth, uint32_t *outWidth);
0448
0449 /*!
0450  * @brief Get left samples in fifo.
0451  *
0452  * @param base asrc base pointer.
0453  * @param channelPair ASRC channel pair number.
0454  * @param buffer input sample numbers.
0455  * @param outSampleWidth output sample width.
0456  * @param remainSamples output sample rate.
0457  * @retval remain samples number.
0458  */
0459 uint32_t ASRC_GetRemainFifoSamples(ASRC_Type *base,
0460                                    asrc_channel_pair_t channelPair,
0461                                    uint32_t *buffer,
0462                                    uint32_t outSampleWidth,
0463                                    uint32_t remainSamples);
0464
0465 /*!
0466  * @brief ASRC module enable.
0467  *
0468  * @param base ASRC base pointer.
0469  * @param enable true is enable, false is disable
0470  */
0471 static inline void ASRC_ModuleEnable(ASRC_Type *base, bool enable)
0472 {
0473     if (enable)
0474     {
0475         base->ASRCTR |= ASRC_ASRCTR_ASRCEN_MASK;
0476     }
0477     else
0478     {
0479         base->ASRCTR &= ~ASRC_ASRCTR_ASRCEN_MASK;
0480     }
0481 }
0482
0483 /*!
0484  * @brief ASRC enable channel pair.
0485  *
0486  * @param base ASRC base pointer.
0487  * @param channelPair channel pair mask value, reference _asrc_channel_pair_mask.
0488  * @param enable true is enable, false is disable.
0489  */
0490 static inline void ASRC_ChannelPairEnable(ASRC_Type *base, asrc_channel_pair_t channelPair, bool enable)
0491 {
0492     if (enable)
0493     {
0494         base->ASRCTR |= 1UL << ((uint32_t)channelPair + 1U);
0495     }
0496     else
0497     {
0498         base->ASRCTR &= ~(1UL << ((uint32_t)channelPair + 1U));
0499     }
0500 }
0501 /*! @} */
0502
0503 /*!
0504  * @name Interrupts
0505  * @{
0506  */
0507
0508 /*!
0509  * @brief ASRC interrupt enable
0510  * This function enable the ASRC interrupt with the provided mask.
0511  *
0512  * @param base ASRC peripheral base address.
0513  * @param mask The interrupts to enable. Logical OR of @ref _asrc_interrupt_mask.
0514  */
0515 static inline void ASRC_EnableInterrupt(ASRC_Type *base, uint32_t mask)
0516 {
0517     base->ASRIER |= mask;
0518 }
0519
0520 /*!
0521  * @brief ASRC interrupt disable
0522  * This function disable the ASRC interrupt with the provided mask.
0523  *
0524  * @param base ASRC peripheral base address.
0525  * @param mask The interrupts to disable. Logical OR of @ref _asrc_interrupt_mask.
0526  */
0527 static inline void ASRC_DisableInterrupt(ASRC_Type *base, uint32_t mask)
0528 {
0529     base->ASRIER &= ~mask;
0530 }
0531
0532 /*! @} */
0533
0534 /*!
0535  * @name Status
0536  * @{
0537  */
0538
0539 /*!
0540  * @brief Gets the ASRC status flag state.
0541  *
0542  * @param base ASRC base pointer
0543  * @return ASRC Tx status flag value. Use the Status Mask to get the status value needed.
0544  */
0545 static inline uint32_t ASRC_GetStatus(ASRC_Type *base)
0546 {
0547     return base->ASRSTR;
0548 }
0549
0550 /*!
0551  * @brief Gets the ASRC channel pair initialization state.
0552  *
0553  * @param base ASRC base pointer
0554  * @param channel ASRC channel pair.
0555  * @return ASRC Tx status flag value. Use the Status Mask to get the status value needed.
0556  */
0557 static inline bool ASRC_GetChannelPairInitialStatus(ASRC_Type *base, asrc_channel_pair_t channel)
0558 {
0559     return ((base->ASRCFG >> ASRC_ASRCFG_INIRQA_SHIFT) & (1U << (uint32_t)channel)) == 0U ? false : true;
0560 }
0561
0562 /*!
0563  * @brief Gets the ASRC channel A fifo a status flag state.
0564  *
0565  * @param base ASRC base pointer
0566  * @param channelPair ASRC channel pair.
0567  * @return ASRC channel pair a fifo status flag value. Use the Status Mask to get the status value needed.
0568  */
0569 static inline uint32_t ASRC_GetChannelPairFifoStatus(ASRC_Type *base, asrc_channel_pair_t channelPair)
0570 {
0571     return ASRC_ASRMCR(base, channelPair) & ((uint32_t)kASRC_OutputFifoNearFull | (uint32_t)kASRC_InputFifoNearEmpty);
0572 }
0573
0574 /*! @} */
0575
0576 /*!
0577  * @name Bus Operations
0578  * @{
0579  */
0580
0581 /*!
0582  * @brief Writes data into ASRC channel pair FIFO.
0583  * Note: ASRC fifo width is 24bit.
0584  * @param base ASRC base pointer.
0585  * @param channelPair ASRC channel pair.
0586  * @param data Data needs to be written.
0587  */
0588 static inline void ASRC_ChannelPairWriteData(ASRC_Type *base, asrc_channel_pair_t channelPair, uint32_t data)
0589 {
0590     ASRC_ASRDI(base, channelPair) = data;
0591 }
0592
0593 /*!
0594  * @brief Read data from ASRC channel pair FIFO.
0595  * Note: ASRC fifo width is 24bit.
0596  *
0597  * @param base ASRC base pointer.
0598  * @param channelPair ASRC channel pair.
0599  * @retval value read from fifo.
0600  */
0601 static inline uint32_t ASRC_ChannelPairReadData(ASRC_Type *base, asrc_channel_pair_t channelPair)
0602 {
0603     return ASRC_ASRDO(base, channelPair);
0604 }
0605
0606 /*!
0607  * @brief Get input data fifo address.
0608  * Note: ASRC fifo width is 24bit.
0609  *
0610  * @param base ASRC base pointer.
0611  * @param channelPair ASRC channel pair.
0612  */
0613 static inline uint32_t ASRC_GetInputDataRegisterAddress(ASRC_Type *base, asrc_channel_pair_t channelPair)
0614 {
0615     return (uint32_t)ASRC_ASRDI_ADDR(base, channelPair);
0616 }
0617
0618 /*!
0619  * @brief Get output data fifo address.
0620  * Note: ASRC fifo width is 24bit.
0621  *
0622  * @param base ASRC base pointer.
0623  * @param channelPair ASRC channel pair.
0624  */
0625 static inline uint32_t ASRC_GetOutputDataRegisterAddress(ASRC_Type *base, asrc_channel_pair_t channelPair)
0626 {
0627     return (uint32_t)ASRC_ASRDO_ADDR(base, channelPair);
0628 }
0629
0630 /*!
0631  * @brief ASRC configure ideal ratio.
0632  * The ideal ratio should be used when input clock source is not avalible.
0633  *
0634  * @param base ASRC base pointer.
0635  * @param channelPair ASRC channel pair.
0636  * @param inputSampleRate input audio data sample rate.
0637  * @param outputSampleRate output audio data sample rate.
0638  */
0639 status_t ASRC_SetIdealRatioConfig(ASRC_Type *base,
0640                                   asrc_channel_pair_t channelPair,
0641                                   uint32_t inputSampleRate,
0642                                   uint32_t outputSampleRate);
0643
0644 /*! @} */
0645
0646 /*!
0647  * @name Transactional
0648  * @{
0649  */
0650
0651 /*!
0652  * @brief ASRC configure channel pair.
0653  *
0654  * @param base ASRC base pointer.
0655  * @param handle ASRC transactional handle pointer.
0656  * @param config ASRC channel pair configuration pointer.
0657  * @param inputSampleRate input audio data sample rate.
0658  * @param outputSampleRate output audio data sample rate.
0659  */
0660 status_t ASRC_TransferSetChannelPairConfig(ASRC_Type *base,
0661                                            asrc_handle_t *handle,
0662                                            asrc_channel_pair_config_t *config,
0663                                            uint32_t inputSampleRate,
0664                                            uint32_t outputSampleRate);
0665
0666 /*!
0667  * @brief Initializes the ASRC handle.
0668  *
0669  * This function initializes the handle for the ASRC transactional APIs. Call
0670  * this function once to get the handle initialized.
0671  *
0672  * @param base ASRC base pointer
0673  * @param handle ASRC handle pointer.
0674  * @param channelPair ASRC channel pair.
0675  * @param inCallback Pointer to the user callback function.
0676  * @param outCallback Pointer to the user callback function.
0677  * @param userData User parameter passed to the callback function
0678  */
0679 void ASRC_TransferCreateHandle(ASRC_Type *base,
0680                                asrc_handle_t *handle,
0681                                asrc_channel_pair_t channelPair,
0682                                asrc_transfer_callback_t inCallback,
0683                                asrc_transfer_callback_t outCallback,
0684                                void *userData);
0685
0686 /*!
0687  * @brief Performs an interrupt non-blocking convert on asrc.
0688  *
0689  * @note This API returns immediately after the transfer initiates, application should check the wait and check the
0690  * callback status.
0691  *
0692  * @param base asrc base pointer.
0693  * @param handle Pointer to the asrc_handle_t structure which stores the transfer state.
0694  * @param xfer Pointer to the ASRC_transfer_t structure.
0695  * @retval kStatus_Success Successfully started the data receive.
0696  * @retval kStatus_ASRCBusy Previous receive still not finished.
0697  */
0698 status_t ASRC_TransferNonBlocking(ASRC_Type *base, asrc_handle_t *handle, asrc_transfer_t *xfer);
0699
0700 /*!
0701  * @brief Performs an blocking convert on asrc.
0702  *
0703  * @note This API returns immediately after the convert finished.
0704  *
0705  * @param base asrc base pointer.
0706  * @param channelPair channel pair index.
0707  * @param xfer Pointer to the ASRC_transfer_t structure.
0708  * @retval kStatus_Success Successfully started the data receive.
0709  */
0710 status_t ASRC_TransferBlocking(ASRC_Type *base, asrc_channel_pair_t channelPair, asrc_transfer_t *xfer);
0711
0712 /*!
0713  * @brief Get converted byte count.
0714  *
0715  * @param base ASRC base pointer.
0716  * @param handle Pointer to the asrc_handle_t structure which stores the transfer state.
0717  * @param count Bytes count sent.
0718  * @retval kStatus_Success Succeed get the transfer count.
0719  * @retval kStatus_ASRCIdle There is not a non-blocking transaction currently in progress.
0720  */
0721 status_t ASRC_TransferGetConvertedCount(ASRC_Type *base, asrc_handle_t *handle, size_t *count);
0722
0723 /*!
0724  * @brief Aborts the current convert.
0725  *
0726  * @note This API can be called any time when an interrupt non-blocking transfer initiates
0727  * to abort the transfer early.
0728  *
0729  * @param base ASRC base pointer.
0730  * @param handle Pointer to the asrc_handle_t structure which stores the transfer state.
0731  */
0732 void ASRC_TransferAbortConvert(ASRC_Type *base, asrc_handle_t *handle);
0733
0734 /*!
0735  * @brief Terminate all ASRC convert.
0736  *
0737  * This function will clear all transfer slots buffered in the asrc queue. If users only want to abort the
0738  * current transfer slot, please call ASRC_TransferAbortConvert.
0739  *
0740  * @param base ASRC base pointer.
0741  * @param handle ASRC eDMA handle pointer.
0742  */
0743 void ASRC_TransferTerminateConvert(ASRC_Type *base, asrc_handle_t *handle);
0744
0745 /*!
0746  * @brief ASRC convert interrupt handler.
0747  *
0748  * @param base ASRC base pointer.
0749  * @param handle Pointer to the asrc_handle_t structure.
0750  */
0751 void ASRC_TransferHandleIRQ(ASRC_Type *base, asrc_handle_t *handle);
0752
0753 /*! @} */
0754
0755 #if defined(__cplusplus)
0756 }
0757 #endif /*_cplusplus*/
0758
0759 /*! @} */
0760
0761 #endif /* _FSL_ASRC_H_ */